URL
https://opencores.org/ocsvn/wb4pb/wb4pb/trunk
Subversion Repositories wb4pb
Compare Revisions
- This comparison shows the changes necessary to convert path
/wb4pb
- from Rev 24 to Rev 25
- ↔ Reverse comparison
Rev 24 → Rev 25
/trunk/sim/do/picoblaze_wb_uart_tb.do
43,9 → 43,11
# IMPORTANT NOTICE! |
# Verilog (R) simulation flow requires Xilinx (R) ISE (R) to be installed. |
|
# user settings: preferred hdl and working directory |
set wd "e:/home_users/ste.fis/projects/wb4pb/trunk/sim" |
# user settings: preferred hdl, working directory and Xilinx (R) ISE (R) |
# installation path (needed for Verilog (R) simulation) |
set wd "d:/projects/wb4pb/sim" |
set isVHDL yes |
set XILINX_ISE_PATH "c:/xilinx/13.1" |
|
# working directory cannot be changed while simulation is running |
if {![string equal -nocase [pwd] $wd]} { |
88,7 → 90,7
vlog "../rtl/kcpsm3.v" |
vlog "../asm/pbwbuart.v" |
vlog "../sim/hdl/picoblaze_wb_uart_tb.v" |
vlog "$env(XILINX)/verilog/src/glbl.v" |
vlog "${XILINX_ISE_PATH}/ise_ds/ise/verilog/src/glbl.v" |
|
vsim picoblaze_wb_uart_tb glbl |
|
114,7 → 116,7
add wave sim:/dut/wb_stb |
add wave sim:/dut/wb_we |
add wave -radix hex sim:/dut/wb_adr |
add wave -radix hex sim:/dut/wb_dat_m2s |
add wave -radix ascii sim:/dut/wb_dat_m2s |
add wave -radix hex sim:/dut/wb_dat_s2m |
add wave sim:/dut/wb_ack |
} |
/trunk/sim/do/picoblaze_wb_gpio_tb.do
43,9 → 43,11
# IMPORTANT NOTICE! |
# Verilog (R) simulation flow requires Xilinx (R) ISE (R) to be installed. |
|
# user settings: preferred hdl and working directory |
set wd "e:/home_users/ste.fis/projects/wb4pb/trunk/sim" |
# user settings: preferred hdl, working directory and Xilinx (R) ISE (R) |
# installation path (needed for Verilog (R) simulation) |
set wd "d:/projects/wb4pb/sim" |
set isVHDL yes |
set XILINX_ISE_PATH "c:/xilinx/13.1" |
|
# working directory cannot be changed while simulation is running |
if {![string equal -nocase [pwd] $wd]} { |
78,7 → 80,7
vlog "../rtl/kcpsm3.v" |
vlog "../asm/pbwbgpio.v" |
vlog "../sim/hdl/picoblaze_wb_gpio_tb.v" |
vlog "$env(XILINX)/verilog/src/glbl.v" |
vlog "${XILINX_ISE_PATH}/ise_ds/ise/verilog/src/glbl.v" |
|
vsim picoblaze_wb_gpio_tb glbl |
|