OpenCores
URL https://opencores.org/ocsvn/wb_async_mem_bridge/wb_async_mem_bridge/trunk

Subversion Repositories wb_async_mem_bridge

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /wb_async_mem_bridge
    from Rev 4 to Rev 5
    Reverse comparison

Rev 4 → Rev 5

/trunk/src/wb_async_mem_bridge.v
71,13 → 71,6
wire sync_mem_cs_n;
wire sync_mem_we_n, sync_mem_we_n_rise, sync_mem_we_n_fall;
sync
(
.async_sig(),
.sync_out(),
.clk(wb_clk_i)
);
 
sync_edge_detect
i_sync_mem_oe_n(
.async_sig(mem_oe_n),
/trunk/src/wb_async_mem_sm.v
13,9 → 13,7
)
(
input [(DW-1):0] wb_data_i,
output [(DW-1):0] wb_data_o,
input [(AW-1):0] wb_addr_i,
output [3:0] wb_sel_o,
output wb_we_o,
output wb_cyc_o,
output wb_stb_o,

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