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URL https://opencores.org/ocsvn/wbscope/wbscope/trunk

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    /wbscope/trunk/sw
    from Rev 11 to Rev 12
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Rev 11 → Rev 12

/cfgscope.cpp
1,31 → 1,30
///////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
// Filename: cfgscope.cpp
//
// Project: FPGA library development (Basys-3 development board)
// Project: WBScope, a wishbone hosted scope
//
// Purpose: To read out, and decompose, the results of the wishbone scope
// as applied to the ICAPE2 interaction.
//
// This is provided together with the wbscope project as an
// example of what might be done with the wishbone scope.
// The intermediate details, though, between this and the
// wishbone scope are not part of the wishbone scope project.
// This is provided together with the wbscope project as an example of
// what might be done with the wishbone scope. The intermediate details,
// though, between this and the wishbone scope are not part of the
// wishbone scope project.
//
// Using this particular scope made it a *lot* easier to get the
// ICAPE2 interface up and running, since I was able to see what
// was going right (or wrong) with the interface as I was
// developing it. Sure, it would've been better to get it to work
// under a simulator instead of with the scope, but not being
// certain of how the interface was supposed to work made building
// a simulator difficult.
// Using this particular scope made it a *lot* easier to get the ICAPE2
// interface up and running, since I was able to see what was going right
// (or wrong) with the interface as I was developing it. Sure, it
// would've been better to get it to work under a simulator instead of
// with the scope, but not being certain of how the interface was
// supposed to work made building a simulator difficult.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
///////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015, Gisselquist Technology, LLC
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
38,7 → 37,7
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
46,36 → 45,76
// http://www.gnu.org/licenses/gpl.html
//
//
///////////////////////////////////////////////////////////////////////////
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <strings.h>
#include <ctype.h>
#include <string.h>
#include <signal.h>
#include <assert.h>
////////////////////////////////////////////////////////////////////////////////
//
//
#include "devbus.h"
#include "scopecls.h"
 
#include "port.h"
#include "llcomms.h" // This defines how we talk to the device over wishbone
#include "regdefs.h"
//
// CFGSCOPE
//
// When you wish to build your own scope, you'll need to build a version of this
// class to do so. This class has two particular functions to it: one
// (optional) one to define the traces used incase we wish to split these apart
// for output to a VCD file. The other function is for use with debug-by-printf
// approaches. As a result, it provides for a more flexible (textual) output.
//
class CFGSCOPE : public SCOPE {
 
// Here are the two registers needed for accessing our scope: A control register
// and a data register.
#define WBSCOPE R_CFGSCOPE
#define WBSCOPEDATA R_CFGSCOPED
virtual void define_traces(void) {
// Heres the interface for VCD files: We need to tell the VCD
// writer the names of all of our traces, how many bits each
// trace uses, and where the location of the value exists within
// the 32-bit trace word.
register_trace("cs_n", 1, 31);
register_trace("we_n", 1, 30);
register_trace("code", 6, 24);
register_trace("value", 24, 0);
}
 
//
// The DEVBUS structure encapsulates wishbone accesses, so that this code can
// access the wishbone bus on the FPGA.
DEVBUS *m_fpga;
void closeup(int v) {
m_fpga->kill();
exit(0);
}
//
// decode
//
// Decode the value to the standard-output stream. How you decode this
// value is up to you. Prior to the value being printed, a prefix
// identifying the clock number (as counted by the scope, with the
// internal clock enable on), and the raw value will be printed out.
// Further, after doing whatever printing you wish to do here, a newline
// will be printed before going to the next value.
//
virtual void decode(DEVBUS::BUSW v) const {
// Now, let's decompose our 32-bit wires into something ...
// meaningful and dump it to stdout. This section will change
// from project to project, scope to scope, depending on what
// wires are placed into the scope.
printf("%s %s ", (v&0x80000000)?" ":"CS",
(v&0x40000000)?"RD":"WR");
 
unsigned cw = (v>>24)&0x03f;
switch(cw) {
case 0x20: printf("DUMMY"); break;
case 0x10: printf("NOOP "); break;
case 0x08: printf("SYNC "); break;
case 0x04: printf("CMD "); break;
case 0x02: printf("IPROG"); break;
case 0x01: printf("DSYNC"); break;
default: printf("OTHER"); break;
}
printf(" -> %02x", v & 0x0ffffff);
}
};
 
int main(int argc, char **argv) {
// The DEVBUS structure encapsulates wishbone accesses, so that this
// code can access the wishbone bus on the FPGA.
DEVBUS *m_fpga;
 
// Open up a port to talk to the FPGA ...
//
// This may be unique to your FPGA, so feel free to adjust these lines
// for your setup. The result, though, must be a DEVBUS structure
// giving you access to the FPGA.
#ifndef FORCE_UART
m_fpga = new FPGA(new NETCOMMS("lazarus",PORT));
#else
82,75 → 121,28
m_fpga = new FPGA(new TTYCOMMS("/dev/ttyUSB2"));
#endif
 
signal(SIGSTOP, closeup);
signal(SIGHUP, closeup);
//
CFGSCOPE *scope = new CFGSCOPE(m_fpga, WBSCOPE);
 
// Check to see whether or not the scope has captured the data we need
// yet or not. If not, exit kindly.
unsigned v, lgln, scoplen;
v = m_fpga->readio(WBSCOPE);
if (0x60000000 != (v & 0x60000000)) {
printf("Scope is not yet ready:\n");
printf("\tRESET:\t\t%s\n", (v&0x80000000)?"Ongoing":"Complete");
printf("\tSTOPPED:\t%s\n", (v&0x40000000)?"Yes":"No");
printf("\tTRIGGERED:\t%s\n", (v&0x20000000)?"Yes":"No");
printf("\tPRIMED:\t\t%s\n", (v&0x10000000)?"Yes":"No");
printf("\tMANUAL:\t\t%s\n", (v&0x08000000)?"Yes":"No");
printf("\tDISABLED:\t%s\n", (v&0x04000000)?"Yes":"No");
printf("\tZERO:\t\t%s\n", (v&0x02000000)?"Yes":"No");
exit(0);
}
// yet or not.
if (scope->ready()) {
// If the data has been captured, we call print(). This
// function will print all our values to the standard output,
// and it will call the decode() function above to do it.
scope->print();
 
// Since the length of the scope memory is a configuration parameter
// internal to the scope, we read it here to find out how it was
// configured.
lgln = (v>>20) & 0x1f;
scoplen = (1<<lgln);
 
DEVBUS::BUSW *buf;
buf = new DEVBUS::BUSW[scoplen];
 
// There are two means of reading from a DEVBUS interface: The first
// is a vector read, optimized so that the address and read command
// only needs to be sent once. This is the optimal means. However,
// if the bus isn't (yet) trustworthy, it may be more reliable to access
// the port by reading one register at a time--hence the second method.
// If the bus works, you'll want to use readz(): read scoplen values
// into the buffer, from the address WBSCOPEDATA, without incrementing
// the address each time (hence the 'z' in readz--for zero increment).
if (true) {
m_fpga->readz(WBSCOPEDATA, scoplen, buf);
 
printf("Vector read complete\n");
// You can also write the results to a VCD trace file. To do
// this, just call writevcd and pass it the name you wish your
// VCD file to have.
scope->writevcd("cfgtrace.vcd");
} else {
for(int i=0; i<scoplen; i++)
buf[i] = m_fpga->readio(WBSCOPEDATA);
// If the scope isnt yet ready, print a message, decode its
// current state, and exit kindly.
printf("Scope is not (yet) ready:\n");
scope->decode_control();
}
 
// Now, let's decompose our 32-bit wires into something ... meaningful.
// This section will change from project to project, scope to scope,
// depending on what wires are placed into the scope.
for(int i=0; i<scoplen; i++) {
if ((i>0)&&(buf[i] == buf[i-1])&&
(i<scoplen-1)&&(buf[i] == buf[i+1]))
continue;
printf("%6d %08x:", i, buf[i]);
printf("%s %s ", (buf[i]&0x80000000)?" ":"CS",
(buf[i]&0x40000000)?"RD":"WR");
unsigned cw = (buf[i]>>24)&0x03f;
switch(cw) {
case 0x20: printf("DUMMY"); break;
case 0x10: printf("NOOP "); break;
case 0x08: printf("SYNC "); break;
case 0x04: printf("CMD "); break;
case 0x02: printf("IPROG"); break;
case 0x01: printf("DSYNC"); break;
default: printf("OTHER"); break;
}
printf(" -> %02x\n", buf[i] & 0x0ffffff);
}
 
// Clean up our interface, now, and we're done.
delete m_fpga;
}
 
/devbus.h
0,0 → 1,103
////////////////////////////////////////////////////////////////////////////////
//
// Filename: devbus.h
//
// Project: OpenArty, an entirely open SoC based upon the Arty platform
//
// Purpose: The purpose of this file is to document an interface which
// any devic with a bus, whether it be implemented over a UART,
// an ethernet, or a PCI express bus, must implement. This describes only
// an interface, and not how that interface is to be accomplished.
//
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#ifndef DEVBUS_H
#define DEVBUS_H
 
#include <stdio.h>
#include <unistd.h>
 
typedef unsigned int uint32;
 
class BUSERR {
public:
uint32 addr;
BUSERR(const uint32 a) : addr(a) {};
};
 
class DEVBUS {
public:
typedef uint32 BUSW;
 
virtual void kill(void) = 0;
virtual void close(void) = 0;
 
// Write a single value to a single address
virtual void writeio(const BUSW a, const BUSW v) = 0;
 
// Read a single value to a single address
virtual BUSW readio(const BUSW a) = 0;
 
// Read a series of values from values from a block of memory
virtual void readi(const BUSW a, const int len, BUSW *buf) = 0;
 
// Read a series of values from the same address in memory
virtual void readz(const BUSW a, const int len, BUSW *buf) = 0;
 
virtual void writei(const BUSW a, const int len, const BUSW *buf) = 0;
virtual void writez(const BUSW a, const int len, const BUSW *buf) = 0;
 
// Query whether or not an interrupt has taken place
virtual bool poll(void) = 0;
 
// Sleep until interrupt, but sleep no longer than msec milliseconds
virtual void usleep(unsigned msec) = 0;
 
// Sleep until an interrupt, no matter how long it takes for that
// interrupt to take place
virtual void wait(void) = 0;
 
// Query whether or not a bus error has taken place. This is somewhat
// of a misnomer, as my current bus error detection code exits any
// interface, but ... it is what it is.
virtual bool bus_err(void) const = 0;
 
// Clear any bus error condition.
virtual void reset_err(void) = 0;
 
// Clear any interrupt condition that has already been noticed by
// the interface, does not check for further interrupt
virtual void clear(void) = 0;
 
virtual ~DEVBUS(void) { };
};
 
#endif
/scopecls.cpp
0,0 → 1,283
////////////////////////////////////////////////////////////////////////////////
//
// Filename: scopecls.cpp
//
// Project: WBScope, a wishbone hosted scope
//
// Purpose: After rebuilding the same code over and over again for every
// "scope" I tried to interact with, I thought it would be simpler
// to try to make a more generic interface, that other things could plug
// into. This is that more generic interface.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <strings.h>
#include <ctype.h>
#include <string.h>
#include <signal.h>
#include <assert.h>
#include <time.h>
 
#include "devbus.h"
#include "scopecls.h"
 
bool SCOPE::ready() {
unsigned v;
v = m_fpga->readio(m_addr);
if (m_scoplen == 0) {
m_scoplen = (1<<((v>>20)&0x01f));
} v = (v>>28)&6;
return (v==6);
}
 
void SCOPE::decode_control(void) {
unsigned v;
 
v = m_fpga->readio(m_addr);
printf("\t31. RESET:\t%s\n", (v&0x80000000)?"Ongoing":"Complete");
printf("\t30. STOPPED:\t%s\n", (v&0x40000000)?"Yes":"No");
printf("\t29. TRIGGERED:\t%s\n", (v&0x20000000)?"Yes":"No");
printf("\t28. PRIMED:\t%s\n", (v&0x10000000)?"Yes":"No");
printf("\t27. MANUAL:\t%s\n", (v&0x08000000)?"Yes":"No");
printf("\t26. DISABLED:\t%s\n", (v&0x04000000)?"Yes":"No");
printf("\t25. ZERO:\t%s\n", (v&0x02000000)?"Yes":"No");
printf("\tSCOPLEN:\t%08x (%d)\n", m_scoplen, m_scoplen);
printf("\tHOLDOFF:\t%08x\n", (v&0x0fffff));
printf("\tTRIGLOC:\t%d\n", m_scoplen-(v&0x0fffff));
}
 
int SCOPE::scoplen(void) {
unsigned v, lgln;
 
// If the scope length is zero, then the scope isn't present.
// We use a length of zero here to also represent whether or not we've
// looked up the length by reading from the scope.
if (m_scoplen == 0) {
v = m_fpga->readio(m_addr);
 
// Since the length of the scope memory is a configuration
// parameter internal to the scope, we read it here to find
// out how the scope was configured.
lgln = (v>>20) & 0x1f;
 
// If the length is still zero, then there is no scope installed
if (lgln != 0) {
// Otherwise, the scope length contained in the device
// control register is the log base 2 of the actual
// length of what's in the FPGA. Here, we just convert
// that to the actual length of the scope.
m_scoplen = (1<<lgln);
}
// else we already know the length of the scope, and don't need to
// slow down to read that length from the device a second time.
} return m_scoplen;
}
 
//
// rawread
//
// Read the scope data from the scope.
void SCOPE::rawread(void) {
// If we've already read the data from the scope, then we don't need
// to read it a second time.
if (m_data)
return;
 
// Let's get the length of the scope, and check that it is a valid
// length
if (scoplen() <= 4) {
printf("ERR: Scope has less than a minimum length. Is it truly a scope?\n");
return;
}
 
// Now that we know the size of the scopes buffer, let's allocate a
// buffer to hold all this data
m_data = new DEVBUS::BUSW[m_scoplen];
 
// There are two means of reading from a DEVBUS interface: The first
// is a vector read, optimized so that the address and read command
// only needs to be sent once. This is the optimal means. However,
// if the bus isn't (yet) trustworthy, it may be more reliable to access
// the port by reading one register at a time--hence the second method.
// If the bus works, you'll want to use readz(): read scoplen values
// into the buffer, from the address WBSCOPEDATA, without incrementing
// the address each time (hence the 'z' in readz--for zero increment).
if (m_vector_read) {
m_fpga->readz(m_addr+4, m_scoplen, m_data);
} else {
for(unsigned int i=0; i<m_scoplen; i++)
m_data[i] = m_fpga->readio(m_addr+4);
}
}
 
void SCOPE::print(void) {
DEVBUS::BUSW addrv = 0;
 
rawread();
 
if(m_compressed) {
for(int i=0; i<(int)m_scoplen; i++) {
if ((m_data[i]>>31)&1) {
addrv += (m_data[i]&0x7fffffff);
printf(" ** (+0x%08x = %8d)\n",
(m_data[i]&0x07fffffff),
(m_data[i]&0x07fffffff));
continue;
}
printf("%10d %08x: ", addrv++, m_data[i]);
decode(m_data[i]);
printf("\n");
}
} else {
for(int i=0; i<(int)m_scoplen; i++) {
if ((i>0)&&(m_data[i] == m_data[i-1])&&(i<(int)(m_scoplen-1))) {
if ((i>2)&&(m_data[i] != m_data[i-2]))
printf(" **** ****\n");
continue;
} printf("%9d %08x: ", i, m_data[i]);
decode(m_data[i]);
printf("\n");
}
}
}
 
void SCOPE::write_trace_timescale(FILE *fp) {
fprintf(fp, "$timescle 1ns $end\n\n");
}
 
// $dumpoff and $dumpon
void SCOPE::write_trace_header(FILE *fp) {
time_t now;
 
time(&now);
fprintf(fp, "$version Generated by WBScope $end\n");
fprintf(fp, "$date %s\n $end\n", ctime(&now));
write_trace_timescale(fp);
 
fprintf(fp, " $scope module WBSCOPE $end\n");
// Print out all of the various values
fprintf(fp, " $var wire %2d \'C clk $end\n", 1);
fprintf(fp, " $var wire %2d \'R _raw_data [%d:0] $end\n",
(m_compressed)?31:32,
(m_compressed)?30:31);
 
for(unsigned i=0; i<m_traces.size(); i++) {
TRACEINFO *info = m_traces[i];
fprintf(fp, " $var wire %2d %s %s",
info->m_nbits, info->m_key, info->m_name);
if ((info->m_nbits > 0)&&(NULL == strchr(info->m_name, '[')))
fprintf(fp, "[%d:0] $end\n", info->m_nbits-1);
else
fprintf(fp, " $end\n");
}
 
fprintf(fp, " $upscope $end\n");
fprintf(fp, "$enddefinitions $end\n");
}
 
void SCOPE::write_binary_trace(FILE *fp, const int nbits, unsigned val,
const char *str) {
if (nbits <= 1) {
fprintf(fp, "%d%s\n", val&1, str);
return;
}
if ((unsigned)nbits < sizeof(val)*8)
val &= ~(-1<<nbits);
fputs("b", fp);
for(int i=0; i<nbits; i++)
fprintf(fp, "%d", (val>>(nbits-1-i))&1);
fprintf(fp, " %s\n", str);
}
 
void SCOPE::write_binary_trace(FILE *fp, TRACEINFO *info, unsigned value) {
write_binary_trace(fp, info->m_nbits, (value>>info->m_nshift),
info->m_key);
}
 
void SCOPE::register_trace(const char *name,
unsigned nbits, unsigned shift) {
TRACEINFO *info = new TRACEINFO;
int nkey = m_traces.size();
 
info->m_name = name;
info->m_nbits = nbits;
info->m_nshift = shift;
 
info->m_key[0] = 'v';
if (nkey < 26)
info->m_key[1] = 'a'+nkey;
else if (nkey < 26+26)
info->m_key[1] = 'A'+nkey-26;
else // if (nkey < 26+26+10) // Should never happen
info->m_key[1] = '0'+nkey-26-26;
info->m_key[2] = '\0';
info->m_key[3] = '\0';
 
m_traces.push_back(info);
}
 
void SCOPE::define_traces(void) {}
 
void SCOPE::writevcd(const char *trace_file_name) {
FILE *fp = fopen(trace_file_name, "w");
 
if (fp == NULL) {
fprintf(stderr, "ERR: Cannot open %s for writing!\n", trace_file_name);
fprintf(stderr, "ERR: Trace file not written\n");
return;
}
 
if (!m_data)
rawread();
 
write_trace_header(fp);
 
for(int i=0; i<(int)m_scoplen; i++) {
// Positive edge of the clock (everything is assumed to
// be on the positive edge)
fprintf(fp, "#%d\n", m_scoplen * 10);
fprintf(fp, "1\'C\n");
write_binary_trace(fp, (m_compressed)?31:32,
m_data[i], "\'R\n");
 
for(unsigned k=0; k<m_traces.size(); k++) {
TRACEINFO *info = m_traces[k];
write_binary_trace(fp, info, m_data[i]);
}
 
// Clock goes to zero
fprintf(fp, "#%d\n", m_scoplen * 10 + 5);
fprintf(fp, "0\'C\n");
}
}
 
/scopecls.h
0,0 → 1,88
////////////////////////////////////////////////////////////////////////////////
//
// Filename: scopecls.h
//
// Project: WBScope, a wishbone hosted scope
//
// Purpose: After rebuilding the same code over and over again for every
// "scope" I tried to interact with, I thought it would be simpler
// to try to make a more generic interface, that other things could plug
// into. This is that more generic interface.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#ifndef SCOPECLS_H
#define SCOPECLS_H
 
#include <vector>
#include "devbus.h"
 
class TRACEINFO {
public:
const char *m_name;
char m_key[4];
unsigned m_nbits, m_nshift;
};
 
class SCOPE {
DEVBUS *m_fpga;
DEVBUS::BUSW m_addr;
bool m_compressed, m_vector_read;
unsigned m_scoplen;
unsigned *m_data;
std::vector<TRACEINFO *> m_traces;
 
public:
SCOPE(DEVBUS *fpga, unsigned addr,
bool compressed=false, bool vecread=true)
: m_fpga(fpga), m_addr(addr),
m_compressed(compressed), m_vector_read(vecread),
m_scoplen(0), m_data(NULL) {}
~SCOPE(void) { if (m_data) delete[] m_data; }
 
bool ready();
void decode_control(void);
int scoplen(void);
virtual void rawread(void);
void print(void);
virtual void write_trace_timescale(FILE *fp);
virtual void write_trace_header(FILE *fp);
void write_binary_trace(FILE *fp, const int nbits,
unsigned val, const char *str);
void write_binary_trace(FILE *fp, TRACEINFO *info,
unsigned value);
void writevcd(const char *trace_file_name);
void register_trace(const char *varname,
unsigned nbits, unsigned shift);
virtual void decode(DEVBUS::BUSW v) const = 0;
virtual void define_traces(void);
};
 
#endif // SCOPECLS_H

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