URL
https://opencores.org/ocsvn/xucpu/xucpu/trunk
Subversion Repositories xucpu
Compare Revisions
- This comparison shows the changes necessary to convert path
/xucpu
- from Rev 33 to Rev 34
- ↔ Reverse comparison
Rev 33 → Rev 34
/trunk/src/system/S2.vhdl
51,6 → 51,9
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BEGIN -- ARCHITECTURE Structural |
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CLK <= CLOCK; |
RST <= RESET; |
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BA1 : S2ARB |
PORT MAP ( |
-- Main component connections |
/trunk/src/system/S2BOARD_SIM.vhdl
0,0 → 1,54
LIBRARY ieee; |
USE ieee.std_logic_1164.ALL; |
USE ieee.numeric_std.ALL; |
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ENTITY S2BOARD_SIM IS |
END ENTITY S2BOARD_SIM; |
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ARCHITECTURE Structural OF S2BOARD_SIM IS |
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COMPONENT S2 IS |
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PORT ( |
CLOCK : IN STD_LOGIC; |
RESET : IN STD_LOGIC; |
LED : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); |
SWITCH : IN STD_LOGIC_VECTOR(7 DOWNTO 0); |
BUTTON : IN STD_LOGIC_VECTOR(4 DOWNTO 0)); |
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END COMPONENT S2; |
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SIGNAL CLOCK : STD_LOGIC := '0'; |
SIGNAL RESET : STD_LOGIC := '0'; |
SIGNAL SWITCH : STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); |
SIGNAL BUTTON : STD_LOGIC_VECTOR(4 DOWNTO 0) := (OTHERS => '0'); |
SIGNAL LED : STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); |
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BEGIN -- ARCHITECTURE Structural |
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CLK1 : PROCESS IS |
BEGIN -- PROCESS CLK1 |
CLOCK <= '0'; |
WAIT FOR 5 NS; |
CLOCK <= '1'; |
WAIT FOR 5 NS; |
END PROCESS CLK1; |
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RST1 : PROCESS IS |
BEGIN |
WAIT FOR 23 NS; |
RESET <= '1'; |
WAIT FOR 16 NS; |
RESET <= '0'; |
WAIT; |
END PROCESS RST1; |
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BOARD1 : S2 |
PORT MAP ( |
CLOCK => CLOCK, |
RESET => RESET, |
LED => LED, |
SWITCH => SWITCH, |
BUTTON => BUTTON); |
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END ARCHITECTURE Structural; |
/trunk/ghdl/S2.make
0,0 → 1,49
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# |
# This file is part of the Experimental Unstable CPU System. |
# |
# The Experimental Unstable CPU System Is free software: you can redistribute |
# it and/or modify it under the terms of the GNU Lesser General Public License |
# as published by the Free Software Foundation, either version 3 of the |
# License, or (at your option) any later version. |
# |
# The Experimental Unstable CPU System is distributed in the hope that it will |
# be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser |
# General Public License for more details. |
# |
# You should have received a copy of the GNU Lesser General Public License |
# along with Experimental Unstable CPU System. If not, see |
# http://www.gnu.org/licenses/lgpl.txt. |
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FIND=gfind |
XARGS=gxargs |
UNISIM=/usr/local/share |
SOURCE= ../src/system/S2LIB.vhdl \ |
../src/system/S2.vhdl \ |
../src/system/S2ICC.vhdl \ |
../src/system/S2DCC.vhdl \ |
../src/system/S2CPU.vhdl \ |
../src/system/S2MEM.vhdl \ |
../src/system/S2BOARD_SIM.vhdl |
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analyse: |
ghdl -a -P./. -P./tmp --ieee=synopsys --workdir=tmp $(SOURCE) |
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build: unisim-obj93.cf analyse |
ghdl -e -g -P./. -P./tmp --warn-unused --ieee=synopsys --workdir=tmp S2BOARD_SIM |
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run: build |
ghdl -r -P. -P./tmp --ieee=synopsys --workdir=tmp S2BOARD_SIM --wave=S2_SCOPE.ghw --stop-time=300ns |
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clean: |
-rm *.o |
-rm unisim* |
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unisim: unisim-obj93.cf |
ghdl -a --ieee=synopsys --work=unisim --workdir=tmp $(UNISIM)/unisims/*.vhd |
$(FIND) $(UNISIM)/unisims/primitive/*.vhd -print0 | $(XARGS) -0 -n 1 -t ghdl -a --ieee=synopsys --work=unisim --workdir=tmp -fexplicit |
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unisim-obj93.cf: |
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# vim:set noet tw=0 ts=8 nowrap: |