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URL https://opencores.org/ocsvn/axi4_tlm_bfm/axi4_tlm_bfm/trunk

Subversion Repositories axi4_tlm_bfm

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Rev 26 → Rev 27

/axi4_tlm_bfm/trunk/workspace/simulation/questa/waves.do
0,0 → 1,55
configure wave -signalnamewidth 1
 
add wave -divider "DUV"
add wave -position end -decimal sim:/user/symbolsPerTransfer
add wave -position end -decimal sim:/user/axiMaster/outstandingTransactions
add wave -position end sim:/user/axiMaster/axiTxState
add wave -position end sim:/user/axiMaster/next_axiTxState
 
add wave -divider "Tester"
add wave -position end sim:/user/clk
add wave -position end sim:/user/reset
add wave -position end sim:/user/irq_write
add wave -position end sim:/user/axiMaster/trigger
add wave -position end sim:/user/axiMaster/i_trigger
add wave -position end -hexadecimal sim:/bist/prbs
 
# Paper publication:
#add wave -position end sim:/user/irq_write
#add wave -position end -hexadecimal sim:/user/axiMaster_in.tReady
#add wave -position end -hexadecimal sim:/user/axiMaster_out.tValid
#add wave -position end -hexadecimal sim:/user/axiMaster_out.tData
#add wave -position end -hexadecimal sim:/bist/prbs
#add wave -position end -hexadecimal sim:/user/writeRequest.trigger
#add wave -position end -hexadecimal sim:/user/writeResponse.trigger
 
add wave -position end -expand -hexadecimal sim:/user/axiMaster_in
add wave -position end -expand -hexadecimal sim:/user/axiMaster_out
#add wave -position end -expand -hexadecimal sim:/user/axiMaster/i_axiMaster_out
add wave -position end -decimal sim:/user/readRequest
add wave -position end -expand -hexadecimal sim:/user/writeRequest
add wave -position end -decimal sim:/user/readResponse
add wave -position end -expand -hexadecimal sim:/user/axiMaster/i_writeResponse
add wave -position end -expand -hexadecimal sim:/user/writeResponse
add wave -position end sim:/bist/txFSM
add wave -position end sim:/bist/i_txFSM
 
#OS-VVM solution:
#add wave -position end -unsigned -format analog-step -height 80 -scale 0.4e-17 sim:/user/axiMaster_out.tData
 
#LFSR solution:
add wave -position end -unsigned -format analog-step -height 80 -scale 0.18e-7 sim:/user/axiMaster_out.tData
 
add wave -position end sim:/bist/i_prbs/isParallelLoad
add wave -position end sim:/bist/i_prbs/loadEn
add wave -position end sim:/bist/i_prbs/loaded
add wave -position end sim:/bist/i_prbs/i_loaded
add wave -position end sim:/bist/i_prbs/load
add wave -position end -hexadecimal sim:/bist/i_prbs/d
add wave -position end -hexadecimal sim:/bist/i_prbs/seed
add wave -position end -hexadecimal sim:/bist/prbs
 
run 80 ns;
 
wave zoomfull
#.wave.tree zoomfull # with some versions of ModelSim
/axi4_tlm_bfm/trunk/workspace/simulation/questa/simulate.sh
0,0 → 1,66
#!/bin/bash
#
# Example bash script for Mentor Graphics QuestaSim/ModelSim simulation.
#
# Author(s):
# - Daniel C.K. Kho, daniel.kho@opencores.org | daniel.kho@tauhop.com
#
# Copyright (C) 2012-2013 Authors and OPENCORES.ORG
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
# This notice and disclaimer must be retained as part of this text at all times.
#
# @dependencies:
# @designer: Daniel C.K. Kho [daniel.kho@gmail.com] | [daniel.kho@tauhop.com]
# @history: @see Mercurial log for full list of changes.
#
# @Description:
#
 
#read -p "press Enter to run full simulation now, or Ctrl-C to exit: ";
echo $(date "+[%Y-%m-%d %H:%M:%S]: Removing previously-generated files and folders...");
rm -rf modelsim.ini ./simulate.log ./work ./altera ./osvvm ./tauhop;
 
echo $(date "+[%Y-%m-%d %H:%M:%S]: Remove successful.");
echo $(date "+[%Y-%m-%d %H:%M:%S]: Compiling project...");
vlib work; vmap work work;
vlib osvvm; vmap osvvm osvvm;
vlib tauhop; vmap tauhop tauhop;
 
vcom -2008 -work osvvm ../../../rtl/packages/os-vvm/SortListPkg_int.vhd \
../../../rtl/packages/os-vvm/RandomBasePkg.vhd \
../../../rtl/packages/os-vvm/RandomPkg.vhd \
../../../rtl/packages/os-vvm/CoveragePkg.vhd \
| tee -ai ./simulate.log;
 
vcom -2008 -work tauhop ../../../rtl/packages/pkg-tlm.vhdl \
../../../rtl/packages/pkg-axi-tlm.vhdl \
../../../rtl/packages/pkg-types.vhdl \
../../../rtl/axi4-stream-bfm-master.vhdl \
../../../tester/stimuli/galois-lfsr.vhdl \
../../../tester/stimuli/prbs-31.vhdl \
| tee -ai ./simulate.log;
 
vcom -2008 -work work ../../../tester/tester.vhdl \
../../../rtl/user.vhdl \
| tee -ai ./simulate.log;
 
errorStr=`grep "\*\* Error: " ./simulate.log`
if [ `echo ${#errorStr}` -gt 0 ]
then echo "Errors exist. Refer simulate.log for more details. Exiting."; exit;
else
vsim -t ps -do ./waves.do -voptargs="+acc" "work.user(rtl)";
echo $(date "+[%Y-%m-%d %H:%M:%S]: simulation loaded.");
fi

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