OpenCores
URL https://opencores.org/ocsvn/i650/i650/trunk

Subversion Repositories i650

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  • This comparison shows the changes necessary to convert path
    /i650
    from Rev 28 to Rev 29
    Reverse comparison

Rev 28 → Rev 29

/trunk/utils/ibm650_soap2/ibm650_soap2.xcodeproj/xcuserdata/rabeles.xcuserdatad/xcschemes/ibm650_soap2.xcscheme
0,0 → 1,94
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buildConfiguration = "Debug">
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<ArchiveAction
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/trunk/utils/ibm650_soap2/ibm650_soap2.xcodeproj/project.pbxproj
0,0 → 1,258
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/trunk/utils/ibm650_soap2/ibm650_soap2.xcodeproj/project.xcworkspace/contents.xcworkspacedata
0,0 → 1,7
<?xml version="1.0" encoding="UTF-8"?>
<Workspace
version = "1.0">
<FileRef
location = "self:ibm650_soap2.xcodeproj">
</FileRef>
</Workspace>
/trunk/utils/ibm650_soap2/ibm650_soap2.xcodeproj/project.xcworkspace/xcuserdata/rabeles.xcuserdatad/UserInterfaceState.xcuserstate Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
trunk/utils/ibm650_soap2/ibm650_soap2.xcodeproj/project.xcworkspace/xcuserdata/rabeles.xcuserdatad/UserInterfaceState.xcuserstate Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/utils/ibm650_soap2/ibm650_soap2/recreating_soap2.rtf =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/recreating_soap2.rtf (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/recreating_soap2.rtf (revision 29) @@ -0,0 +1,25 @@ +{\rtf1\ansi\ansicpg1252\cocoartf1347\cocoasubrtf570 +\cocoascreenfonts1{\fonttbl\f0\fnil\fcharset0 LucidaSans;\f1\fnil\fcharset0 LucidaBright;} +{\colortbl;\red255\green255\blue255;} +\margl1440\margr1440\vieww9000\viewh8400\viewkind0 +\pard\tx720\tx1440\tx2160\tx2880\tx3600\tx4320\tx5040\tx5760\tx6480\tx7200\tx7920\tx8640\pardirnatural + +\f0\fs28 \cf0 Recreating SOAP 2 Source and Object\ + +\f1\fs24 \ +From IBM publication 32-7646-1 "SOAP II for the IBM 650 Data Processing System"[1], I hand entered both the source statements and the 7-word object deck. \ +\ +Next, I verified the 7-word object deck by comparing a reading by voice synthesis with the original. I improved the audibility of the reading by first running the object deck through a small utility that added punctuation.\ +\ +I then wrote a program equivalent to SOAP 2 in C++ that included a command line switch to compare the generated object code with a 7-word object deck.\ +\ +Because SOAP 2 allocates operand and instruction locations according to an optimization algorithm, both the generated object code and its assigned location must be correct. This required that the optimization algorithm in my C++ code match the original in SOAP 2 exactly.\ +\ +Running the SOAP 2 source through my C++ code did not produce matching object code. Surely there were typos, but eliminating them did not improve object. The optimization algorithm in my code appeared to be working correctly. \ +\ +The problem turned out to be that some statements in the published listing were presented out of order. This may be the result of the author arranging the statements prior to assembly for optimal placement, and rearranging them for clarity. This reordering occurs in the main processing loop, symbol table lookup, and optimum location lookup and reservation.\ +\ +Another problem resulted from a patch made to the optimization table entries for the MPY and DIV instructions. It appears that the distributed SOAP 2 was assembled with a version of SOAP 2 that reversed the odd/even I optimization constants. The SOAP 2 listing and 7-word deck are corrected in [1].\ +\ +\ + } \ No newline at end of file Index: trunk/utils/ibm650_soap2/ibm650_soap2/soap2.txt =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/soap2.txt (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/soap2.txt (revision 29) @@ -0,0 +1,1413 @@ + 1 SOAP 2 + 1 + 1 SYMBOLIC OPTIMAL ASSEMBLY PROG + 1 + 1 FOR THE + 1 + 1 IBM 650 + 1 + 1 DATA PROCESSING SYSTEM + 1 + 1 + REGS0000 0399 SYMBOL TAB + REGE0400 0599 EQUIV TABL + REGA0600 0799 AVAIL TABL + REGN0800 0899 NUM OP TAB + BLR 1000 1000 ENTRY + BLR 1001 1012 PSEUDO ENT + BLR 1021 1049 REG TABLE + REGC1050 1164 SYM OP TAB + BLA 1098 1099 + BLA 1148 1149 + BLR 1900 1900 MANUAL PAT + SYNREADC 1950 + BLR 1951 1962 READ AREA + REGT1990 1992 TYPE + REGP1977 1986 PUNCH AREA + BLR 1998 1999 + EQUXXXX1 1961 + EQUXXXX2 1962 + BLR 1563 1570 TYPE2 + BLA 1565 1565 + BLA 1569 1569 + REGB0900 0901 SUB 2 + REGH0902 0904 TYPE 2 + REGM0905 0907 + REGQ0908 0909 + REGR1200 1207 SUB 5 + REGU1250 1259 SUB 13 + REGV0910 0912 EQU SYN + REGX0913 0914 TYPE O + REGY0915 0916 EQU SYN + REGZ0917 0919 + REGW0920 0922 + BLR 0923 0968 MULTIPLE R + REGI1300 1307 SUB13 + 1 + 1 CONTROL PROGRAM + 1 + 1000LDDREADC SUB16 ENTRY + 1 + READCRCD 1999 1998 READ CARD + 1998LDD 1951 TRANSFER + STDP0001 ALPHABETIC + LDD 1952 INPUT + STDP0002 TO + LDD 1953 OUTPUT + STDP0003 + LDD 1954 + STDP0004 + LDD 1955 + STDP0005 + LDD 1956 + STDP0006 + RALP0009 STEP + ALO1IXXX CARD + STLP0009 NUMBER + RAU 1960 STORE + SRT 0002 CONTROL + STUP0008 INFO + AUPTORG + STLP0010 8003 TRANSFER + 8003NOP 0000 9999 TO TYPE + 1 + PUNCHPCHP0001 READC PUNCH READ + 1 + SETCCRAUREADC SUB10 SUDO EXIT + 1 + 1 + 1900LDDREADC SUB14 MANUAL PAT + 1 + 1 + T0001LDDX SUBR3 TYPE 0 + 1 + X0001LDD PROCL 650 + LDD PROCD COMMAND OR + LDDPUNCH PROCI CONSTANTS + 1 + X0002NOP 0000 8003 PSEUDO OP + 1 + T0002RAUREADC SUB10 TYPE 1 COM + 1 + X 00 0000 X0001 + 1 + 1 RELOCATE ROUTINE + 1 + HEDT + T0003LDDQ SUBR3 PROCESS OP + Q0002NOP 0000 ILLOP ILLEGAL OP + Q0001RAL 1951 IS L FIXED + SLT 0002 + NZU REL + RAU 1957 FIXED L + SUP2000I DRUM CORE + BMI FC + AUP 8001 RES FIXED DRUM + FC RAL 1957 SETL FIXED CORE + SR RALXXXX1 SETL SET L + SETL SLT 0004 + LDDP0008 + SDAP0008 PROD + REL RAU 1957 DRUM CORE + SUP2000I + BMI RC + AUPDDIFF RELOCATE + BMI BL DRUM ADDR + AUP2000I RES + RES STUXXXX1 + LDDSR SUB2R RESERVE L + RC RAL 1957 RELOCATE + ALOCDIFF CORE + SLO9060 + BMI BL + ALO 8001 SETL + BL RAUPROD SUB12 BLANK L + 1 + REGJ0944 0944 D TYPE 2 + REGG0941 0941 + 1 + PROD LDDPROI SET D EXIT + STDEXITX + RAU 1952 WHAT IS d + LDDH SUBR4 + H0001RAL 1958 RELOCATE + SLO2000I D OR C + BMI 1564 1563 + H0002SRT 0008 C D OR F + AUP1500 8003 + 1563RALCDIFF CDD C + 1564RALDDIFF CDD D + 1566RAL 1958 J0001 F + CDD ALO 1958 J0001 + H0003NOP 0000 G0003 SYMBOLIC + 1 + REGJ0960 0960 I + REGF0955 0955 + 1 + PROI LDDPUNCH SET I EXIT + STDEXITX + RAU 1953 WHAT IS I + LDDM SUBR4 + M0001RAL 1959 RELOCATE + SLO2000I D OR C + BMI 1568 1567 + M0002SRT 0008 C D OR F + AUP1504 8003 + 1567RALCDIFF CDI C + 1568RALDDIFF CDI D + 1570RAL 1959 J0001 F + CDI ALO 1959 J0001 + M0003NOP 0000 F0003 SYMBOLIC + 1 + Q 00 0000 Q0001 CONSTANTS + 9060 00 0000 9060 + H 00 0000 H0001 + 1500 00 0000 1500 + M 00 0000 M0001 + 1504 00 0000 1504 + XXXX1 01 0000 XXXX1 ERASEABLE + 1 + 1 BOP ROUTINE + 1 + 1001LDD SUB16 INITIALIZE + RAUREADC SUB10 PUNCH + 1 + 1 BLR ROUTINE + 1 + 1002RAL 1959 BLR RESERVE + BLR SLO 1958 FWA TO + AUP 8001 LWA + LDDSETCC SUB2R + 1 + 1 RBR ROUTINE + 1 + 1012RAUDDIFF + ALO 1959 BLR + 1 + 1 BLA ROUTINE + 1 + 1003LDDH8XXX SET DRUM + STDDRUMT TAG TO 8 + RAL 1959 UNRESERVE + SLO 1958 FWA + AUP 8001 TO + LDDSETCC SUB2U LWA + 1 + 1 REG ROUTINE + 1 + HEDR + 1004RAL 1952 IS + SRT 0008 REGION + SLO90XXX CHARACTER + BMI 1002 ALPHBETIC + ALO29XXX + BMI 1002 + SLT 0004 STORE + ALOST REGION + AUP 1958 ORIGIN + AUPH9XXX 8002 + 8002STU 9999 1002 + 1 + ST STU 1021 1002 CONSTANTS + HED + 1 + 1 EQU REQ AND SYN ROUTINE + 1 + HEDZ + 1005LDDH8XXX BOTH EQU + 1006LDDH9XXX BOTH SYN + BOTH STDTAG + RAU 1953 WHAT IS I + LDDZ SUBR4 + Z0001RAL 1959 Y0001 ABSOLUTE + Z0002LDDY SUBR9 REGIONAL + Y0001STLE TD + Y0002RALP0010 BP REG ERROR + Z0003LDDW SUBR6 SYMBOLIC + W0001RALEQUIV Y0001 S DEFINED + W0002RALP0010 BP S UNDEFIND + W0003RALP0010 BP S TAB FULL + 1 + TD RAU 1952 HEAD D + LDD SUB15 AND EQUATE + LDDV SUBR6 TO E + V0003RALP0010 BP S TAB FULL + V0001ALOE SD + V0002ALOE SD + SD LDDTT SUBR7 + 1 + TT LDDTAG TEST TAG + BDOSETCC + RAUE RESERVE E + LDDSETCC SUB2R + 1 + 1011LDDH8XXX REQ + STDTAG ROUTINE + RAL 1959 IS I + SLO2000I DRUM O COR + BMID + ALOCDIFF CD + D ALODDIFF CD + CD ALO2000I Y0001 + 1 + Z 00 0000 Z0001 CONSTANTS + Y 00 0089 Y0001 + W 00 0000 W0001 + V 00 0000 V0001 + 88 00 8800 0000 + 1 + BP ALO88 BY PASS + STLP0010 PUNCH + 1 + TAG 01 0000 TAG ERASEABLE + E 01 0000 E + HED + 1 + 1 ALF ROUTINE + 1 + 1007LDD PROCL PROCES LOC + LDD 1952 + STDP0007 + RAL 1953 REPLACE + NZEPUNCH BLANK I + LDDSOAP2 BY + STDP0003 PUNCH SOAP2 + SOAP2ALFSOAP2 SOAP2 CONSTANT + 1 + 1 PAT ROUTINE + 1 + 1008RAU SUB10 + LDDREADC SUB14 + 1 + 1 HED ROUTINE + 1 + 1009RAL 1952 STORE + SRT 0008 HEADING + STL0000H SETCC CHARACTER + 1 + 1 REL ROUTINE + 1 + HEDM + 1010RAL 1952 SET + NZE SDD DRUM + RAL 1958 SDD AND + SDD STLDDIFF CORE + RAL 1953 DELTAS + NZE SCD + RAL 1959 SCD + SCD STLCDIFF SETCC + 1 + DDIFF 01 0000 DDIFF ERASEABLE + CDIFF 01 0000 CDIFF + HED + 1 + 1 LOAD AVAILABILITY TABLE + 1 + HEDL + 1999RAL 1951 CALC + SRT 0004 LOC + SLT 0004 W2 + ALO 8002 + ALO 8002 + ALOC1 + AUPC2 8003 + 8003LDD 9995 8002 LOAD + 8002STD 9994 TUP TABLE + TUP SUPTW + NZU READC + AUPTWP2 + ALO1DXXX 8003 + 1 + C1 STDA0001 TUP CONSTANTS + C2 LDD 1952 8002 + TW LDD 1958 8002 + TWP2 LDD 1960 8002 + HED + 1 + 1 OPTIMIZING TABLE + 1 + N0001 00 0404 0998 NOP + N0002 00 0404 0998 HLT + N0003 33 2322 0999 UFA + N0004 00 0505 0998 RTC + N0005 00 0505 0998 RTN + N0006 00 0505 0998 RTA + N0007 00 0505 0998 WTN + N0008 00 0505 0998 WTA + N0009 33 1212 0999 LIB + N0010 33 0202 0999 LDI + N0011 33 0504 0999 AUP + N0012 33 0504 0999 SUP + N0013 99 9999 9999 NOT USED + N0014 99 9999 9999 NOT USED + N0015 33 1110 0999 DIV + N0016 33 0504 0999 ALO + N0017 33 0504 0999 SLO + N0018 33 0504 0999 AML + N0019 33 0504 0999 SML + N0020 33 2120 0999 MPY + N0021 54 0303 0999 STL + N0022 45 0303 0999 STU + N0023 34 0303 0999 SDA + N0024 34 0303 0999 SIA + N0025 33 0303 0999 STD + N0026 44 0505 0998 NTS + N0027 00 0505 0998 BIN + N0028 00 0505 0998 SET + N0029 33 1212 0999 SIB + N0030 33 0202 0999 STI + N0031 00 0000 0988 SRT + N0032 00 0000 0888 SRD + N0033 33 2726 0999 FAD + N0034 33 2726 0999 FSB + N0035 33 0000 0999 FDV + N0036 00 0000 0988 SLT + N0037 00 0000 0988 SCT + N0038 33 2726 0999 FAM + N0039 33 2726 0999 FSM + N0040 33 0000 0999 FMP + N0041 33 0404 0998 NZA + N0042 33 0404 0998 BMA + N0043 33 0404 0998 NZB + N0044 33 0404 0998 BMB + N0045 34 0405 0998 NZU + N0046 43 0504 0998 NZE + N0047 33 0404 0998 BMI + N0048 33 0505 0998 BOV + N0049 33 0404 0998 NZC + N0050 33 0404 0998 BMC + N0051 00 0000 0898 AXA + N0052 00 0000 0898 SXA + N0053 00 0000 0898 AXB + N0054 00 0000 0898 SXB + N0055 44 0505 0998 NEF + N0056 00 0505 0998 RWD + N0057 00 0505 0998 WTM + N0058 00 0505 0998 BST + N0059 00 0000 0898 AXC + N0060 00 0000 0898 SXC + N0061 33 0504 0999 RAU + N0062 33 0504 0999 RSU + N0063 99 9999 9999 NOT USED + N0064 99 9999 9999 NOT USED + N0065 33 1110 0999 DVR + N0066 33 0504 0999 RAL + N0067 33 0504 0999 RSL + N0068 33 0504 0999 RAM + N0069 33 0504 0999 RSM + N0070 33 0303 0999 LDD + N0071 00 0000 0999 RD1 + N0072 00 0000 0999 WR1 + N0073 00 0000 0999 RC1 + N0074 00 0000 0999 RD2 + N0075 00 0000 0999 WR2 + N0076 00 0000 0999 RC2 + N0077 00 0000 0999 RD3 + N0078 00 0000 0999 WR3 + N0079 00 0000 0999 RC3 + N0080 00 0505 0999 RPY + N0081 00 0000 0898 RAA + N0082 00 0000 0898 RSA + N0083 00 0000 0898 RAB + N0084 00 0000 0898 RSB + N0085 33 0506 0999 TLU + N0086 00 0606 0998 SDA + N0087 00 0606 0998 RDS + N0088 00 0606 0998 WDS + N0089 00 0000 0898 RAC + N0090 00 0000 0898 RSC + N0091 44 0505 0998 BD0 + N0092 33 0505 0998 BD1 + N0093 33 0505 0998 BD2 + N0094 33 0505 0998 BD3 + N0095 33 0505 0998 BD4 + N0096 33 0505 0998 BD5 + N0097 33 0505 0998 BD6 + N0098 33 0505 0998 BD7 + N0099 33 0505 0998 BD8 + N0100 44 0505 0998 BD9 + 1 + 1 SYMBOLIC OP TABLE + 1 + C0001 61 7366 1007 ALF + C0002 61 7376 0015 ALO + C0003 61 7473 0017 AML + C0004 61 8477 0010 AUP + C0005 61 8761 0050 AXA + C0006 61 8762 0052 AXB + C0007 61 8763 0058 AXC + C0008 62 6476 0090 BD0 + C0009 62 6491 0091 BD1 + C0010 62 6492 0092 BD2 + C0011 62 6493 0093 BD3 + C0012 62 6494 0094 BD4 + C0013 62 6495 0095 BD5 + C0014 62 6496 0096 BD6 + C0015 62 6497 0097 BD7 + C0016 62 6498 0098 BD8 + C0017 62 6499 0099 BD9 + C0018 62 6975 0026 BIN + C0019 62 7361 1003 BLA + C0020 62 7379 1002 BLR + C0021 62 7461 0041 BMA + C0022 62 7462 0043 BMB + C0023 62 7463 0049 BMC + C0024 62 7469 0046 BMI + C0025 62 7677 1001 BOP + C0026 62 7685 0047 BOV + C0027 62 8283 0057 BST + C0028 64 6985 0014 DIV + C0029 64 8579 0064 DVR + C0030 65 7884 1005 EQU + C0031 66 6164 0032 FAD + C0032 66 6174 0037 FAM + C0033 66 6485 0034 FDV + C0034 66 7477 0039 FMP + C0035 66 8262 0033 FSB + C0036 66 8274 0038 FSM + C0037 68 6564 1009 HED + C0038 68 7383 0001 HLT + C0039 73 6464 0069 LDD + C0040 73 6469 0009 LDI + C0041 73 6962 0008 LIB + C0042 74 7788 0019 MPY + C0043 75 6566 0054 NEF + C0044 75 7677 0000 NOP + C0045 75 8382 0025 NTS + C0046 75 8961 0040 NZA + C0047 75 8962 0042 NZB + C0048 75 8963 0048 NZC + C0051 75 8965 0045 NZE + C0052 75 8984 0044 NZU + C0053 77 6183 1008 PAT + C0054 77 6368 0071 PCH + C0055 79 6161 0080 RAA + C0056 79 6162 0082 RAB + C0057 79 6163 0088 RAC + C0058 79 6173 0065 RAL + C0059 79 6174 0067 RAM + C0060 79 6184 0060 RAU + C0061 79 6279 1012 RBR + C0062 79 6364 0070 RCD + C0063 79 6391 0072 RC1 + C0064 79 6392 0075 RC2 + C0065 79 6393 0078 RC3 + C0066 79 6482 0086 RDS + C0067 79 6491 0070 RD1 + C0068 79 6492 0073 RD2 + C0069 79 6493 0076 RD3 + C0070 79 6567 1004 REG + C0071 79 6573 1010 REL + C0072 79 6578 1011 REQ + C0073 79 7788 0079 RPY + C0074 79 8261 0081 RSA + C0075 79 8262 0083 RSB + C0076 79 8263 0089 RSC + C0077 79 8273 0066 RSL + C0078 79 8274 0068 RSM + C0079 79 8284 0061 RSU + C0080 79 8361 0005 RTA + C0081 79 8363 0003 RTC + C0082 79 8375 0004 RTN + C0083 79 8664 0055 RWD + C0084 82 6383 0036 SCT + C0085 82 6461 0022 SDA + C0086 82 6482 0085 SDS + C0087 82 6583 0027 SET + C0088 82 6961 0023 SIA + C0089 82 6962 0028 SIB + C0090 82 7376 0016 SLO + C0091 82 7383 0035 SLT + C0092 82 7473 0018 SML + C0093 82 7964 0031 SRD + C0094 82 7983 0030 SRT + C0095 82 8364 0024 STD + C0096 82 8369 0029 STI + C0097 82 8373 0020 STL + C0098 82 8384 0021 STU + C0101 82 8477 0011 SUP + C0102 82 8761 0051 SXA + C0103 82 8762 0053 SXB + C0104 82 8763 0059 SXC + C0105 82 8875 1006 SYN + C0106 83 7384 0084 TLU + C0107 84 6661 0002 UFA + C0108 86 6482 0087 WDS + C0109 86 7991 0071 WR1 + C0110 86 7992 0074 WR2 + C0111 86 7993 0077 WR3 + C0112 86 8361 0007 WTA + C0113 86 8374 0056 WTM + C0114 86 8375 0006 WTN + C0115 99 9999 0001 TABLE END + 1 + 1 SUB 1 STORE IN FWA TO LWA + 1 + HED1 + SUBR1STDEXITX STORE EXIT + STUXXXX1 STORE K + LDDFWA SET + SDAFWA FWA + SLT 0004 LWA + SDAXXXX2 ADDRESSES + RAUFWA + ALOXXXX1 8003 + 8003STL 9999 NEXT STORE K + NEXT SUPXXXX2 END OF + NZU EXITX LOOP TEST + AUP 8001 + AUP1DXXX 8003 STEP + 1 + FWA STL 9998 NEXT CONSTANTS + XXXX2 01 0000 XXXX2 ERASEABLE + HED + 1 + 1 SUB 2 RESERVE UNRESERVE + 1 + HED2 + B0002SLT 0009 XX + XX STUUH + SLT 0001 + RAL 8002 + AUPW + SRT 0001 + AUPUH SPR + SPR SRT 0009 SA + SA STL 9983 B0001 + B0001RALN IS N ZERO + NZE EXITY + SLO1I REDUCE N + STLN BY 1 + RAUSA IS AI + SUPA197 IN LAST + BMI TP BLOCK OF + AUPA201 SU 4 + 1 + SUB2RSTDEXITY RESERVE + LDDZ RU ENTRY + SUB2USTDEXITY UNRESERVE + LDD1I RU ENTRY + TP RALSPR IS P 9 + SLOC2 + NZE ZP + ALOC5 STEP P + LDDC1 + SDAB0002 + STLSPR + RAUSA REDUCE AI + SUPC6 SU BY 196 + 1 + ZP LDDC1 SET P + STDB0002 TO ZERO + LDDC7 + STDSPR + RAUSA REDUCE AI + SUPC8 SU BY 195 + RU STDW SET W + STLN STORE N + SLO 8001 CALC AO + AUP 8003 AND PO + SRT 0003 + STUX + SUP 8001 + SLT 0001 + STUP + SUP 8001 + SLT 0002 + AUP 8003 + AUPX + ALOP + SLT 0004 + ALOC1 + STLB0002 + LDDC2 + SDASPR + AUPC3 SU + SU STUSA + AUPC4 8003 + 8003RAL 9992 B0002 + 1 + C1 SLT 0000 XX CONSTANTS + C2 SRT 0009 SA + C3 STLA0001 B0001 + C4 45 0000 0001 + 1I 00 0000 0001 + A197 STLA0197 B0001 + A201 STLA0201 B0001 + C5 SRT 0010 SA + C6 00 0196 0000 + C7 SRT 0000 SA + C8 00 0195 0000 + Z 00 0000 0000 + W 01 0000 W ERASEABLE + N 01 0000 N + B0002 01 0000 B0002 + SPR 01 0000 SPR + SA 01 0000 SA + UH 01 0000 UH + X 01 0000 X + HED + 1 + 1 SUB 3 PROCESS OP CODE + 1 + HED3 + SUBR3STDEXITX STORE EXIT + RAL 1954 + SRT 0004 IS OP + NZE ILLOP BLANK + SLT 0006 IS OP + NZU NUM NUMERIC + SRT 0002 + STLXXXX1 SEARCH + SLO 8001 SYMBOLIC + TLUC0001 OP TABLE + ALO1 8002 + 8002RAL 9997 NEXT IS + NEXT SLOXXXX1 SYM OP + SLT 0006 LEGAL + NZUILLOP + SLT 0001 TEST FOR + NZUPSEU PSEUDO OP + SLT 0001 SNO STORE NUM + SNO STLP0007 650 OP + SRT 0004 GET OPTIM + ALO3 8002 CONSTANTS + 8002LDD 9996 NEX + NEX STDOPTIM EXITX + 1 + NUM SLO4 FORM + SLT 0002 NUMERIC + SLO 8002 OP + SRT 0001 CODE + ALO 8001 SNO + 1 + ILLOPRALP0010 ILLEGAL OP + ALO5 SET 8 + STLP0010 FOR BLANK + LDD6 NEX OP + 1 + PSEU SLT 0003 PSEUDO + ALOEXITX OP + ALO1IXXX 8002 + 1 + 1 RAL 0000 NEXT CONSTANTS + 2 10 0000 0000 + 3 LDDN0001 NEX + 4 90 9000 0000 + 5 00 0000 0008 + 6 55 0505 0999 + HED + 1 + 1 SUB 4 WHAT IS ADDRESS + 1 + HED4 + SUBR4STDEXITZ STORE EXIT + STUXXXX1 STORE ADDR + SRT 0008 IS C5 + NZU EXITZ BLANK + STUXXXX2 SAVE C5 + RAU 8002 ARE LOW 4 + AUP90XXX CHARACTERS + BOVLOOP LOOP NUMERIC + LOOP AUPH1 + BOV SYM + SLT 0002 + NZULOOP + RALXXXX2 LOW 4 NUM + SLO90XXX IS C5 + BMI SYM ALPHABETIC + ALO29XXX + BMISYM + RAL1IXXX REGIONAL + AUPXXXX1 AEX + AEX ALOEXITZ + SLO 8002 8001 + SYM RAUXXXX1 HED SYMBOL + LDD SUB15 + ALO2IXXX STEP EXIT + STUHSYMB AEX + H1 10 0000 0000 + HSYMB 01 0000 HSYMB ERASEABLE + HED + 1 + 1 SUB 5 TEST ABSOLUTE ADDRESS + 1 + HED5 + SUBR5STDEXITZ STORE EXIT + STLXXXX1 STORE A + SLT 0004 + SLO 8002 + TLUR0001 TLU + ALOGET 8002 RANGE + 8002RAU 9972 X TABLE + X SLT 0006 + SRT 0006 + AUPEXITZ + ALOXXXX1 + SUP 8003 8001 + GET RAU 0000 X + R0001 00 1999 0000 RANGE + R0002 00 7999 0003 TABLE + R0003 00 8003 0001 + R0004 00 8004 0003 + R0005 00 8007 0001 + R0006 00 8999 0003 + R0007 00 9059 0002 + R0008 99 9999 0003 + HED + 1 + 1 SUB 6 SYMBOL TEST ROUTINE + HED6 + SYNOFF 6 1270 + SYNLI 6 1614 + SYNS 6 1601 + SYNDEF 6 1811 + SYNSW 6 1610 + SYNA 6 1395 + OFF SLOLMAX MAXIMUM + NZE MAX + ALOLMP1 SLI STEP LI + ON SLOLO IS LI EQUA + NZE SWSYM TO LO + ALOLOP1 SLI STEP LI + MAX LDDSWON SET + STDSW SWITCH ON + RALL1 SLI ZERO LI + A NZE UND LI ZERO + SLOS IS CONT OF + NZESW DEF LI SYMB + 1 + SUBR6STDEXITZ STORE EXIT + STUS STORE SYMB + LDDSWOF SET SWITCH + STDSW OFF + MPYSC SCRAMBLE + RAL 8002 SYMBOL + SLT 0003 GIVING + MPYCF LO + SRT 0001 + SLT 0004 SET + ALOL1P1 TEST + STLLOP1 WORD + SLO1DXXX + STLLO SLI SAVE LO + SLI STLLI 8001 INIT LI + 8001RAL 9990 A IS CONT OF + SW RALLI OFF IS LI + 1 + UND RALEXITZ UNDEFINED + ALO1IXXX STEP + STLEXITZ EXIT + RALLI + SLOL1 + STLLSYMB ASU + 1 + DEF RALLI DEFINED + LDDASU SUBR8 GET + ASU AUPS EXITZ EQUIVALENT + 1 + SWSYMHLT 0111 SYMOF S TAB FULL + SYMOFLDDSYMON SET SW SYM + STDSWSYM SYMON ON + SYMONRALEXITZ + ALO2IXXX 8002 + 1 + SWOF RALLI OFF CONSTANTS + SWON RALLI ON + SC 10 0100 1001 + CF 00 0000 0004 + L1 RAL 0000 A + L1P1 RAL 0001 A + LMAX RALE0000 A + LMP1 RALE0001 A + S 01 0000 S ERASEABLE + SW 01 0000 SW + LO 01 0000 LO + LI 01 0000 LI + LSYMB 01 0000 LSYMB + HED + 1 + 1 SUB 7 STORE SYMBOL AND EQUIV + 1 + HED7 + SUBR7STDEXITZ STORE EXIT + LDDSS + SDAXXXX2 8001 STORE + 8001STU 9988 A SYMBOL + A SUP 8001 + STLXXXX1 SAVE E + SRT 0004 + DIV2IXXX CALCULATE + SLT 0004 LOCATION + ALOC1 OF + LDDC2 E + SDASEL AND + LDDC3 STORE + SDASER + STLOBEE + SLO 8001 + ALOXXXX1 OBEE + OBEE LDD 9986 B + B NZUSER + SLT 0004 SEL + SS STU 9987 A CONSTANTS + C1 LDDE0001 B + C2 SDA 9985 EXITZ + C3 SIA 9984 EXITZ + OBEE 01 0000 OBEE ERASEABLE + SEL 01 0000 SEL + SER 01 0000 SER + HED + 1 + 1 SUB 8 GIVEN SYM LOC GET EQUIV + 1 + HED8 + SUBR8STDEXIT STORE EXIT + LDD 8003 + SDALSYMB STORE L + RAL 8001 + DIV2DXXX + SLT 0004 + ALOE1 8002 + 8002LDD 9975 TR + TR NZU LH + RAM 8001 LR GET E RH + LH RAM 8001 GET E LH + SRT 0004 LR + LR LDD 8003 + SIAEQUIV + RALLSYMB EXIT + 1 + E1 LDDE0001 TR CONSTANT + EXIT 01 0000 EXIT ERASEABLE + EQUIV 01 0000 EQUIV + HED + 1 + 1 SUB 9 CALCULATE REG ADDRESS + HED9 + SUBR9STDEXITZ STORE EXIT + SRT 0008 + RAL 8003 + SLT 0004 + ALOC 8002 IS + 8002RAL 9991 NEX REGION + NEX BDOILL DEFINED + SLT 0001 + RAL 8002 + SRT 0001 + LDDEXITZ + BD6 L + BD5D I + L ALO 1957 ALL + D ALO 1958 ALL + I ALO 1959 ALL + ALL SLO1IXXX + BMIILL EXITZ + ILL RALEXITZ UNDEFINED + ALO1IXXX 8002 OR ILLEG + 1 + C RAL 0960 NEX CONSTANT + HED + 1 SUB 10 SET CC 8 AND PUNCH + 1 + SUB10ALOP0010 + ALO84TH + STLP0010 + PCHP0001 8003 + 1 + 84TH 00 0800 0000 CONSTANT + 1 + 1 SUB 11 FIND AND RESERVE BEST + 1 + HED0 + SYNSW 0 1584 + SYNSWOF0 1691 + SYNSWON0 1751 + SYNYES 0 1583 + SW RAUAI SWOF + SWOF SLOAMAX IS AI MAX + NZE MAX + ALOAMP1 SAI STEP AI + SWON SLOAO IS AI EQUA + NZE FULL TO AO + ALOBP1 SAI STEP AI + MAX LDDON SET SW ON + STDSW + RALA1 SAI SET AI TO + SUB11LDDDRUMT TEST + BDO SEX DRUM TAG + STLEXIT IS ADR L + BD6DI + RAL 8003 SSW L + DI LDDF D OR I + SDAXXXX1 SUB13 FIND OPTIM + GDA SLT 0004 DYNAM ADR + ALO 8002 + ALO 8002 SSW + SSW LDDOFF SET SW OFF + STDSW + ALOA1P1 GET TABLE + STLBP1 START ADDR + SLO1DXXX + STLAO SAI SAVE AO + SAI STLAI 8001 + 8001RAU 9975 TA IS A LOCAT + TA NZUYES SW AVAILABLE + 1 + FULL HLT 0222 DRUM PAKED + LDDH9XXX SET DRUM + STDDRUMT TAG TO 9 + RALEXIT SEX STEP EXIT + SEX ALO1IXXX 8002 + 1 + YES SCT 0000 RESERVE + SLT 0001 LOCATION + SRT 0001 FOUND + STLXXXX2 SAVE P + SUP 8003 + SLT 0004 + AUP 8001 + ALOSRP 8002 + 8002SRT 0009 SCA NULIFY SCT + SCA RAU 8003 + ALOAI + LDDST + SDAERAS 8001 + 8001STU 9972 CA + CA SUP 8001 CALCULATE + SLOA1 LOCATION + SRT 0004 FOUND + DIV4I + MPY500 + ALO 8003 + SUP 8001 + AUPXXXX2 + MPY50 + ALO 8003 + SUP 8001 EXIT + F 00 0000 GDA CONSTANTS + OFF RALAI SWOF + A1P1 RAUA0002 TA + AMAX RAUA0200 TA + AMP1 RAUA0201 TA + ON RALAI SWON + A1 RAUA0001 TA + SRP SRT 0000 SCA + ST STU 9999 CA + 4I 00 0000 0004 + 500 00 0000 0500 + 50 00 0000 0050 + FON RAL 8001 STEPX + AO 01 0000 AO ERASEABLE + AI 01 0000 AI + BP1 01 0000 BP1 + EXIT 01 0000 EXIT + HED + 1 + 1 SUB 12 SET BLANK L 8 + 1 + SUB12ALOP0010 + ALO87TH + STLP0010 8003 + 1 + 87TH 00 0000 8000 CONSTANT + 1 + 1 SUB 13 CAL OPTIMUM DYNAMIC ADR + 1 + HEDY + SUB13STDEXITZ STORE EXIT + BD5 I D OR I + RALOPTIM D + SLT 0001 + SLO 8002 + SLT 0001 + ALO 8001 + SRT 0003 SEO + I RALOPTIM I + BD2SHOP SHIFT TEST + BD3XAS XAS TEST + SLT 0002 SEO + SEO STLXXXX1 SAVE EV OD + RALOPREG IS BASE + DIV2IXXX EVEN OR OD + RAU 8003 + ALOXXXX1 + NZU R8 + SLT 0002 + RAL 8002 R8 + R8 SRT 0008 GET BASE + ALOOPREG PLUS DELTA + DIV50 MOD 50 + RAL 8003 EXITZ + 1 + SHOP RALP0007 TLU UNITS + SRT 0004 DIGIT OF + SLT 0009 D ADDRESS + SLO 8002 + TLUU0001 + ALOGU 8002 + 8002RAL 9969 TOP + TOP SLT 0002 + LDDOPTIM IS OP SRD + BD3 SEO + SLT 0004 SEO SRD + 1 + XAS RALP0007 TLU + SRT 0004 D ADDRESS + SLT 0006 + SLO 8002 + TLUI0001 + ALOGXD 8002 + 8002RAL 9968 NXT + NXT SLT 0004 SEO + 1 + U0001 00 2322 2524 SHIFT + U0002 10 0706 0706 OPTIMIZING + U0003 20 0706 0908 TABLE + U0004 30 0908 1110 + U0005 40 1110 1312 + U0006 50 1312 1514 + U0007 60 1514 1716 + U0008 70 1716 1918 + U0009 80 1918 2120 + U0010 90 2120 2322 + 1 + I0001 19 9906 0600 X ACCUM + I0002 79 9907 0700 ADD SUB + I0003 80 0008 0800 TABLE + I0004 80 0106 0600 + I0005 80 0209 0800 + I0006 80 0308 0900 + I0007 90 5908 0800 + I0008 99 9909 0900 + 1 + GU RAL 0000 TOP CONSTANTS + GXD RAL 0000 NXT + 50 00 0000 0050 + HED + 1 + 1 SUB 14 PUNCH AVIL TABLE + 1 + HEDP + SUB14STDEXITX STORE EXIT + LDD85TH SET PUNCH + STDP0010 8 + LDDA1 INIT AI + STDXXXX1 + RALRS1 LOOP INIT RS + LOOP AUPC1 8001 + 8001STL 9999 NEXT SET LOCAT + NEXT SUPTW1 + NZU SRS + AUPC2 + ALOC3 8003 + SRS STLXXXX2 SAVE RS + RAUC4 + ALOXXXX1 8002 + 8002LDD 9998 8003 STORE + 8002STD 9997 TP AV TABLE + TP SUPTW2 + NZU PUN + AUPC5 + ALOC6 8002 + PUN PCHP0001 + SLOAIM IS AI MAX + NZE EXITX + ALOAMP1 STEP AI + STLXXXX1 + RALXXXX2 + SLOC7 LOOP + 1 + C1 STLP0001 NEXT CONSTANTS + C2 STLP0009 NEXT + C3 00 0500 0500 + C4 STDP0002 TP + C5 STDP0010 TP + C6 00 0001 0000 + C7 00 1499 1499 + TW1 STLP0007 NEXT + TW2 STDP0008 TP + 85TH 00 0080 0000 + A1 LDDA0001 8003 + RS1 00 0000 0450 + AIM LDDA0200 8003 + AMP1 LDDA0201 8003 + HED + 1 + 1 SUB 15 HEADING ROUTINE + 1 + HEDH + SUB15STDEXITY SAVE EXIT + LDD 8003 IS C1 + SLT 0008 BLANK + NZUDH + RAU 8001 HEAD + AUP0000H EXITY + DH RAU 8001 EXITY DONT HEAD + HED + 1 + 1 SUB 16 INITIALIZATION + 1 + SUB16STDEXITY STORE EXIT + RALI1 + STUP0009 ZERO CARD + STD0000H ZERO HEAD + LDD SUBR1 ZERO SYM T + RALI2 MAKE DRUM + AUPI3 AVAILABLE + LDD SUBR1 + LDDH8XXX SET DRUM + STDDRUMT TAG TO 8 + LDDI4 SET SWSYM + STDSWSYM OFF + RALI5 UNDEFINE + AUPH8XXX REGIONS + LDDEXITY SUBR1 + 1 + I1 00S0001 E0200 CONSTANTS + I2 00A0001 A0200 + I3 11 1111 1111 + I4 01 0111 SYMOF + I5 00 1021 1049 + PACOFBD6FINDI FINDL + 1 + 1 SUB 17 CALC 800X EQUIVALENT + 1 + HEDX + SB17DLDDDEQ DI D EQUIV + SB17ILDDIEQ DI I EQUIV + DI STDXXXX1 SAVE TAG + STUEXITY STORE EXIT + STLXXXX2 STORE 800X + LDDXXXX1 SUB13 GET OPTIM + SDA STLXXXX1 DYNAM ADDR + DIV2IXXX IS DY ADDR + NZUOD EV EVEN OR ODD + OD RAL8002 EO + EV RAL8003 EO + EO SLOXXXX2 + NZE ADD1 + RALXXXX1 EXITY + ADD1 RALXXXX1 + ALO1IXXX EXITY + 1 + DEQ 00 0008 SDA CONSTANTS + IEQ 00 0009 SDA + 8002 00 0000 8002 + 8003 00 0000 8003 + HED + 1 + 1 SUB 18 INDEX ADDRESS + 1 + HEDW + INDEXSTDEXITY STORE EXIT + STLXXXX1 STORE ADDR + RAU 1954 + SLT 0007 + LDDEXITY + BD5D D OR I + SLT 0002 D + D SRT 0009 + MPY2000I + LDDEXITY + BD6DS DRUM O COR + SRT 0001 DS CORE + DS ALOXXXX1 EXITY + 1 + EXITY 01 0000 EXITY ERASEABLE + HED + 1 + 1 SUB 19 PROCESS LOCATION + 1 + REGD0923 0923 PROC L + REGG0925 0925 + REGJ0928 0928 + REGK0931 0931 + REGL0933 0933 + 1 + HEDA + PROCLSTDEXITX STORE EXIT + RAU 1951 IS L BLANK + NZUNB + LDDDRUMT BLANK TEST + BD0B D0002 DRUM TAG + B RALOPREG SETL BLANK + SETL SLT 0004 SET L + LDDP0008 TO OR + SDAP0008 EXITX + NB LDDG SUBR4 WHAT IS L + G0001RAL 1957 K0001 ABSOLUTE + G0002LDDK SUBR9 REGIONAL + G0003LDDJ SUBR6 SYMBOLIC + K0001LDDL SUBR5 TEST RANGE + K0002RAU87TH X REG ERROR + X AUPP0010 SET BLANK + STUP0010 SETL L8 + L0001STLOPREG SETL DRUM ADDR + L0002AUP86TH 800X 800X + L0003LDDORCEQ 89X CORE ADDR + L0004RAU87TH X OTHER + 800X LDDORXEQ 89X + 89X STDOPREG X + J0001RALEQUIV K0001 SYM DEFIND + J0002RALD SUB11 SYM UNDEF + J0003RAU87TH X S TAB FULL + D0001STLOPREG SS S EQ FOUND + D0002RAU87TH X DRUM PAKED + SS AUPHSYMB STORE + ALOLSYMB SYMBOL + LDDB SUBR7 + 1 + G 00 0000 G0001 CONSTANTS + K 00 0090 K0001 + J 00 0000 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0029 + 2000I 00 0000 2000 CONSTANT + TORG 00 0000 T0001 + 1 \ No newline at end of file Index: trunk/utils/ibm650_soap2/ibm650_soap2/soap2.7wd =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/soap2.7wd (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/soap2.7wd (revision 29) @@ -0,0 +1,165 @@ +00 0800 0007 00 0404 0998 00 0404 0998 33 2322 0999 00 0505 0998 00 0505 0998 00 0505 0998 00 0505 0998 +00 0807 0007 00 0505 0998 33 1212 0999 33 0202 0999 33 0504 0999 33 0504 0999 99 9999 9999 99 9999 9999 +00 0814 0007 33 1110 0999 33 0504 0999 33 0504 0999 33 0504 0999 33 0504 0999 33 2120 0999 54 0303 0999 +00 0821 0007 45 0303 0999 34 0303 0999 34 0303 0999 33 0303 0999 44 0505 0998 00 0505 0998 00 0505 0998 +00 0828 0007 33 1212 0999 33 0202 0999 00 0000 0988 00 0000 0888 33 2726 0999 33 2726 0999 33 0000 0999 +00 0835 0007 00 0000 0988 00 0000 0988 33 2726 0999 33 2726 0999 33 0000 0999 33 0404 0998 33 0404 0998 +00 0842 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1925 65 1624 1929 +00 1869 0007 15 8001 1753 24 1212 1466 15 0992 1647 01 1872 8000- 35 0004 1683 01 1874 8000- 65 1452 1910 +00 1876 0007 20 1961 1926 90 1781 0924 69 1983 1436 15 1961 8002 69 1781 1279 20 1596 1728 00 0088 0939 +00 1883 0007 44 1788 1838 90 1988 0959 00 0000 0962 23 1983 1936 30 0004 1997 65 1692 1801 10 1842 1854 +00 1890 0007 01 1890 8000- 15 1594 1799 01 1892 8000- 01 1893 8000- 01 1894 8000- 01 1895 8000- 01 1896 8000- +00 1897 0007 11 8001 1725 01 1898 8000- 60 1951 1827 69 1950 1403 01 1901 8000- 69 1924 1627 01 0000 1903 +00 1904 0007 20 1961 1676 16 8002 1963 60 0800 1579 10 1176 1231 65 8002 1667 65 1687 1751 92 1666 1716 +00 1911 0007 01 0000 1911 15 1967 8002 10 8003 1571 01 0222 1318 01 0000 1915 35 0004 1947 16 8002 1975 +00 1918 0007 69 1406 1968 21 1961 1464 00 0000 0050 20 1575 1278 35 0002 1729 65 1452 1860 00 0008 1904 +00 1925 0007 35 0001 1581 60 1954 1976 35 0004 1987 00 0098 1931 21 1985 1488 69 1983 1636 35 0004 1642 +00 1932 0007 69 1785 1279 44 1888 1938 20 1986 1196 00 0000 0965 69 1492 1745 30 0004 1198 69 1212 1884 +00 1939 0007 69 1983 1989 01 1940 8000- 15 1872 1327 01 1942 8000- 01 1943 8000- 01 1944 8000- 01 1945 8000- +00 1946 0005 01 1946 8000- 20 1961 1766 01 1948 8000- 60 1952 1678 70 1999 1998 +00 1963 0007 30 0001 1869 24 1416 1970 90 1770 1820 16 8002 1476 65 0000 1274 24 1212 1674 20 1961 1514 +00 1970 0007 95 1923 1875 65 1416 1572 30 0008 1941 35 0002 1779 00 0009 1904 84 1250 1812 35 0007 1693 +00 1987 0007 69 1984 1638 65 1492 0968 23 1983 1440 69 0993 0996 60 1950 1405 69 1195 0996 01 1993 8000- +00 1994 0006 01 1994 8000- 01 1995 8000- 01 1996 8000- 35 0009 1917 69 1951 1354 65 1951 1605 Index: trunk/utils/ibm650_soap2/ibm650_soap2/soap2.cpp =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/soap2.cpp (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/soap2.cpp (revision 29) @@ -0,0 +1,1256 @@ +////////////////////////////////////////////////////////////////////////////////// +// IBM 650 Reconstruction in Verilog (i650) +// +// This file is part of the IBM 650 Reconstruction in Verilog (i650) project +// http:////www.opencores.org/project,i650 +// +// Description: An implementation of SOAP 2 for the IBM 650. +// +// Additional Comments: . +// +// Copyright (c) 2015 Robert Abeles +// +// This source file is free software; you can redistribute it +// and/or modify it under the terms of the GNU Lesser General +// Public License as published by the Free Software Foundation; +// either version 2.1 of the License, or (at your option) any +// later version. +// +// This source is distributed in the hope that it will be +// useful, but WITHOUT ANY WARRANTY; without even the implied +// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +// PURPOSE. See the GNU Lesser General Public License for more +// details. +// +// You should have received a copy of the GNU Lesser General +// Public License along with this source; if not, download it +// from http://www.opencores.org/lgpl.shtml +////////////////////////////////////////////////////////////////////////////////// + +#include "soap2.h" + +static addr_type get_addr_type(int32_t addr) +{ + if ((addr >= 0) && (addr <= 1999)) + return addr_gs; + if ((addr >= 9000) && (addr <= 9059)) + return addr_ias; + if ((addr >= 8000) && (addr <= 8003)) + return addr_800X; + if ((addr >= 8005) && (addr <= 8007)) + return addr_800X; + + return addr_invalid; +} + +static inline char zone_x(int c) +{ + c = (c < '0')? '0' : (c > '9')? '9' : c; + c = (c == '0')? '!' : (c - '0' + 'J'); + return c; +} + +static inline char zone_y(int c) +{ + c = (c < '0')? '0' : (c > '9')? '9' : c; + c = (c == '0')? '?' : (c - '0' + 'A'); + return c; +} + +asmfield::asmfield(const string &f, u_int8_t h) : src(f), type(field_error) +{ + if (src == " ") { + type = field_blank; + return; + } + + if (src[0] == ' ') { + for (int i = 1; i < 5; i++) + if (!isdigit(src[i])) return; + type = field_numeric; + nval = stoi(src.substr(1,4)); + return; + } + + if (isalpha(src[0])) { + bool numeric = true; + for (int i = 1; i < 5; i++) + if (!isdigit(src[i])) numeric = false; + if (numeric) { + type = field_region; + nval = stoi(src.substr(1, 4)); + region = src[0]; + return; + } + } + + type = field_symbolic; + symbol = src; + if (symbol[4] == ' ') + symbol[4] = h; +} + +void memory::load_7wd_deck(istream &d7) +{ + bool ctl_word = true; + bool op_fld = true; + bool op_d = false; + bool op_i = false; + string number = ""; + char ch; + + bool word_valid = false; + u_int32_t addr = 0; + bool sign = false; // true is minus + u_int32_t op = 0; + u_int32_t d = 0; + u_int32_t i = 0; + + while (EOF != (ch = d7.get())) { + if ('\n' == ch) { + if (word_valid) { + i = stoi(number); + int64_t v = op * 100000000LL + d * 10000 + i; + mem[addr].set_sign(sign); + mem[addr].set_value(v); + addr++; + sign = false; + op = d = i = 0; + word_valid = false; + } + ctl_word = true; + op_fld = true; + op_d = false; + op_i = false; + number = ""; + } else if (isdigit(ch)) { + word_valid = true; + number += ch; + } else if (' ' == ch) { + if (number != "") { + if (op_fld) { + op = stoi(number); + op_fld = false; + op_d = true; + } else if (op_d) { + d = stoi(number); + op_d = false; + op_i = true; + } else if (op_i) { + i = stoi(number); + op_i = false; + op_fld = true; + if (ctl_word) { + addr = d; + ctl_word = false; + } else { + int64_t v = op * 100000000LL + d * 10000 + i; + mem[addr].set_sign(sign); + mem[addr].set_value(v); + addr++; + sign = false; + op = d = i = 0; + word_valid = false; + } + } + number = ""; + } + } else if ('-' == ch) { + sign = true; + } + } +} + +memmap::memmap(u_int32_t s, u_int32_t o) + : size(s) + , origin(o) + , freectr(s) +{ + allocmap.resize(size, false); +} + +void memmap::reserve(u_int32_t addr) +{ + if ((addr >= origin) && (addr < (origin + size))) { + if (!allocmap[addr-origin]) { + freectr--; + allocmap[addr-origin] = true; + } + } +} + +void memmap::reserve(u_int32_t fwa, u_int32_t sz) +{ + for (int i = 0; i < sz; i++) + reserve(fwa+i); +} + +void memmap::unreserve(u_int32_t addr) +{ + if ((addr >= origin) && (addr < (origin + size))) { + if (allocmap[addr-origin]) { + freectr--; + allocmap[addr-origin] = false; + } + } +} + +void memmap::unreserve(u_int32_t fwa, u_int32_t sz) +{ + for (int i= 0; i < sz; i++) + unreserve(fwa+i); +} + +void memmap::reset() +{ + for (int i = 0; i < size; i++) + allocmap[i] = false; + freectr = size; +} + +int32_t memmap::optimum(u_int32_t rot) +{ + // 50 words per band + // 40 bands per drum + if (isfull()) + return -1; + u_int32_t addr = rot; + for (signed ctr = 0; ctr < size; ctr++) { + if (!allocmap[addr]) { + allocmap[addr] = true; + freectr--; + break; + } + addr += 50; + if (addr >= size) + addr = (addr % 50) + 1; + } + return addr; +} + +static opcode optab[] = { + // the flags field is encoded 8 for on, 9 for off + // the digits in the flag field are, left to right, + // A, B, and C. + // A is on for index reg ops and for the SRD op + // B is on for shift ops + // C is on for index reg ops, shift ops, branch ops, HLT, NOP, etc. + + // SOAP2 decodes the flags with a nest of conditional branches. + // + // |------------------------------- Decimal opcode + // | |---------------------------- Idx reg ops and SRD + // | ||--------------------------- Shift ops + // | |||-------------------------- Idx reg, shift, branch, etc. + // | ||| |----------------------- D even + // | ||| | |-------------------- D odd + // | ||| | | |---------------- I even + // | ||| | | | |------------ I odd + // v vvv v v v v + opcode("ALO", 15, 999, 3, 3, 5, 4, real_op), + opcode("AML", 17, 999, 3, 3, 5, 4, real_op), + opcode("AUP", 10, 999, 3, 3, 5, 4, real_op), + opcode("AXA", 50, 898, 0, 0, 0, 0, real_op), + opcode("AXB", 52, 898, 0, 0, 0, 0, real_op), + opcode("AXC", 58, 898, 0, 0, 0, 0, real_op), + opcode("BDO", 90, 998, 4, 4, 5, 5, real_op), + opcode("BD1", 91, 998, 3, 3, 5, 5, real_op), + opcode("BD2", 92, 998, 3, 3, 5, 5, real_op), + opcode("BD3", 93, 998, 3, 3, 5, 5, real_op), + opcode("BD4", 94, 998, 3, 3, 5, 5, real_op), + opcode("BD5", 95, 998, 3, 3, 5, 5, real_op), + opcode("BD6", 96, 998, 3, 3, 5, 5, real_op), + opcode("BD7", 97, 998, 3, 3, 5, 5, real_op), + opcode("BD8", 98, 998, 3, 3, 5, 5, real_op), + opcode("BD9", 99, 998, 4, 4, 5, 5, real_op), + opcode("BIN", 26, 998, 0, 0, 5, 5, real_op), + opcode("BMA", 41, 998, 3, 3, 4, 4, real_op), + opcode("BMB", 43, 998, 3, 3, 4, 4, real_op), + opcode("BMC", 49, 998, 3, 3, 4, 4, real_op), + opcode("BMI", 46, 998, 3, 3, 4, 4, real_op), + opcode("BOV", 47, 998, 3, 3, 5, 5, real_op), + opcode("BST", 57, 998, 0, 0, 5, 5, real_op), + opcode("DIV", 14, 999, 3, 3, 10, 11, real_op), // modified from 11,10 + opcode("DVR", 64, 999, 3, 3, 11, 10, real_op), + opcode("FAD", 32, 999, 3, 3, 27, 26, real_op), + opcode("FAM", 37, 999, 3, 3, 27, 26, real_op), + opcode("FDV", 34, 999, 3, 3, 0, 0, real_op), + opcode("FMP", 39, 999, 3, 3, 0, 0, real_op), + opcode("FSB", 33, 999, 3, 3, 27, 26, real_op), + opcode("FSM", 38, 999, 3, 3, 27, 26, real_op), + opcode("HLT", 1, 998, 0, 0, 4, 4, real_op), + opcode("LDD", 69, 999, 3, 3, 3, 3, real_op), + opcode("LDI", 9, 999, 3, 3, 2, 2, real_op), + opcode("LIB", 8, 999, 3, 3, 12, 12, real_op), + opcode("MPY", 19, 999, 3, 3, 20, 21, real_op), // modified from 21,20 + opcode("NEF", 54, 998, 4, 4, 5, 5, real_op), + opcode("NOP", 0, 998, 0, 0, 4, 4, real_op), + opcode("NTS", 25, 998, 4, 4, 5, 5, real_op), + opcode("NZA", 40, 998, 3, 3, 4, 4, real_op), + opcode("NZB", 42, 998, 3, 3, 4, 4, real_op), + opcode("NZC", 48, 998, 3, 3, 4, 4, real_op), + opcode("NZE", 45, 998, 4, 3, 5, 4, real_op), + opcode("NZU", 44, 998, 3, 4, 4, 5, real_op), + opcode("RAA", 80, 898, 0, 0, 0, 0, real_op), + opcode("RAB", 82, 898, 0, 0, 0, 0, real_op), + opcode("RAC", 88, 898, 0, 0, 0, 0, real_op), + opcode("RAL", 65, 999, 3, 3, 5, 4, real_op), + opcode("RAM", 67, 999, 3, 3, 5, 4, real_op), + opcode("RAU", 60, 999, 3, 3, 5, 4, real_op), + opcode("RC1", 72, 999, 0, 0, 0, 0, real_op), + opcode("RC2", 75, 999, 0, 0, 0, 0, real_op), + opcode("RC3", 78, 999, 0, 0, 0, 0, real_op), + opcode("RD1", 70, 999, 0, 0, 0, 0, real_op), + opcode("RD2", 73, 999, 0, 0, 0, 0, real_op), + opcode("RD3", 76, 999, 0, 0, 0, 0, real_op), + opcode("RDS", 86, 998, 0, 0, 6, 6, real_op), + opcode("RPY", 79, 999, 0, 0, 5, 5, real_op), + opcode("RSA", 81, 898, 0, 0, 0, 0, real_op), + opcode("RSB", 83, 898, 0, 0, 0, 0, real_op), + opcode("RSC", 89, 898, 0, 0, 0, 0, real_op), + opcode("RSL", 66, 999, 3, 3, 5, 4, real_op), + opcode("RSM", 68, 999, 3, 3, 5, 4, real_op), + opcode("RSU", 61, 999, 3, 3, 5, 4, real_op), + opcode("RTA", 5, 998, 0, 0, 5, 5, real_op), + opcode("RTC", 3, 998, 0, 0, 5, 5, real_op), + opcode("RTN", 4, 998, 0, 0, 5, 5, real_op), + opcode("RWD", 55, 998, 0, 0, 5, 5, real_op), + opcode("SCT", 36, 988, 0, 0, 0, 0, real_op), + opcode("SDA", 22, 999, 3, 4, 3, 3, real_op), + opcode("SDS", 85, 998, 0, 0, 6, 6, real_op), + opcode("SET", 27, 998, 0, 0, 5, 5, real_op), + opcode("SIA", 23, 999, 3, 4, 3, 3, real_op), + opcode("SIB", 28, 999, 3, 3, 12, 12, real_op), + opcode("SLO", 16, 999, 3, 3, 5, 4, real_op), + opcode("SLT", 35, 988, 0, 0, 0, 0, real_op), + opcode("SML", 18, 999, 3, 3, 5, 4, real_op), + opcode("SRD", 31, 888, 0, 0, 0, 0, real_op), + opcode("SRT", 30, 988, 0, 0, 0, 0, real_op), + opcode("STD", 24, 999, 3, 3, 3, 3, real_op), + opcode("STI", 29, 999, 3, 3, 2, 2, real_op), + opcode("STL", 20, 999, 5, 4, 3, 3, real_op), + opcode("STU", 21, 999, 4, 5, 3, 3, real_op), + opcode("SUP", 11, 999, 3, 3, 5, 4, real_op), + opcode("SXA", 51, 898, 0, 0, 0, 0, real_op), + opcode("SXB", 53, 898, 0, 0, 0, 0, real_op), + opcode("SXC", 59, 898, 0, 0, 0, 0, real_op), + opcode("TLU", 84, 999, 3, 3, 5, 6, real_op), + opcode("UFA", 2, 999, 3, 3, 23, 22, real_op), + opcode("WDS", 87, 998, 0, 0, 6, 6, real_op), + opcode("WR1", 71, 999, 0, 0, 0, 0, real_op), + opcode("WR2", 74, 999, 0, 0, 0, 0, real_op), + opcode("WR3", 77, 999, 0, 0, 0, 0, real_op), + opcode("WTA", 7, 998, 0, 0, 5, 5, real_op), + opcode("WTM", 56, 998, 0, 0, 5, 5, real_op), + opcode("WTN", 6, 998, 0, 0, 5, 5, real_op), +#if 0 + opcode("",12,Unused op,,,,,,,, + opcode("",13,Unused op,,,,,,,, + opcode("",62,Unused op,,,,,,,, + opcode("",63,Unused op,,,,,,,, +#endif + // symbolic op aliases + opcode("RCD", "RD1"), + opcode("PCH", "WR1"), + opcode("BD0", "BDO"), + + // pseudo ops + opcode("ALF", pseudo_alf, 0, 0, 0, 0, 0, pseudo_op), + opcode("BLA", pseudo_bla, 0, 0, 0, 0, 0, pseudo_op), + opcode("BLR", pseudo_blr, 0, 0, 0, 0, 0, pseudo_op), + opcode("BOP", pseudo_bop, 0, 0, 0, 0, 0, pseudo_op), + opcode("EQU", pseudo_equ, 0, 0, 0, 0, 0, pseudo_op), + opcode("HED", pseudo_hed, 0, 0, 0, 0, 0, pseudo_op), + opcode("PAT", pseudo_pat, 0, 0, 0, 0, 0, pseudo_op), + opcode("RBR", pseudo_rbr, 0, 0, 0, 0, 0, pseudo_op), + opcode("REG", pseudo_reg, 0, 0, 0, 0, 0, pseudo_op), + opcode("REL", pseudo_rel, 0, 0, 0, 0, 0, pseudo_op), + opcode("REQ", pseudo_req, 0, 0, 0, 0, 0, pseudo_op), + opcode("SYN", pseudo_syn, 0, 0, 0, 0, 0, pseudo_op), + + opcode("FIN", 0, 0, 0, 0, 0, 0, final_op), +}; + +static opcode dummy_op("DUM", 0, 999, 5, 5, 5, 5, real_op); + +void soap2::init_opcodetab() +{ + // initialize opcode lookup by-symbol and by-opcode tables + opbycodetab.resize(100, &dummy_op); + for (int i=0; optab[i].type != final_op; i++) { + opcodetab[optab[i].op] = &optab[i]; + if (optab[i].type == real_op) + opbycodetab[optab[i].code] = &optab[i]; + } + +} + +soap2::soap2(int c, int f, istream &cds_in, ostream &cds_out, ostream &listing, istream &ck_deck) + : gsmap (2000, 0) + , input_deck (cds_in) + , output_deck (cds_out) + , listing (listing) + , check_deck (ck_deck) + , ibm_obj (2000) + , codec (c) + , flags (f) +{ + init_opcodetab(); + if (flags & asmflag_k) + ibm_obj.load_7wd_deck(check_deck); + assemble(); +} + +void soap2::error_message(const string &msg) +{ + errors << cardnumber << ": " << msg << endl; +} + +void soap2::assemble() +{ + char inbuf[102]; + hed_char = ' '; + opt_addr = -1; + opt_gs = -1; + opt_ias = -1; + opt_800x = -1; + cardnumber = 0; + while (!input_deck.eof()) { + ++cardnumber; + input_deck.getline(&inbuf[0], 100); + src = inbuf; + src.resize(80, ' '); + assemble_statement(); + } + if (!errors.str().empty()) { + cout << "Errors:" << endl; + cout << errors.str(); + listing << endl << "Errors:" << endl; + listing << errors.str(); + } + print_symtab(listing); + print_availtab(listing); + print_regiontab(listing); +} + +void soap2::assemble_statement() +{ + // resets for new statement + asm_loc = 0; + asm_op = 0; + asm_d = 0; + asm_i = 0; + op = NULL; + blank_loc = false; + blank_op = false; + blank_d = false; + blank_i = false; + punch_800x = false; + bypass = false; + + // break statement into assembler fields + src_type = src.substr(40, 1); + src_sign = src.substr(41, 1); + src_loc = src.substr(42, 5); + src_op = src.substr(47, 3); + src_d = src.substr(50, 5); + src_dtag = src.substr(55, 1); + src_i = src.substr(56, 5); + src_itag = src.substr(61, 1); + src_comm = src.substr(62, 10); + src_fcom = src.substr(42, 30); + + // determine type and invoke processor + switch (src_type[0]) { + case ' ': + assemble_command(); + punch_command(output_deck); + print_command(listing); + break; + case '1': + assemble_comment(); + if (flags & asmflag_c) + punch_comment(output_deck); + print_comment(listing); + break; + case '2': + error_message("Relocatable statements no supported."); + //assemble_relocate(); + break; + default: + error_message("Invalid statement type code"); + break; + } +} + +void soap2::assemble_command() +{ + process_op(); + if (op) { + switch (op->type) { + case real_op: + assemble_realop(); + break; + case pseudo_op: + assemble_pseudo(); + break; + default: + error_message("Internal error, invalid op type"); + break; + } + } else { + error_message("Invalid opcode"); + } +} + +void soap2::punch_command(ostream &os) +{ + if (op) { + if ((op->type == real_op) || (op->code == pseudo_alf)) { + if (punch_800x && (flags & asmflag_e)) { + os << zone_y('6') << "91954800" << zone_y('0') + << " " + << setfill('0') << setw(4) << dec << (cardnumber % 10000) + << "24" << setfill('0') << setw(4) << dec << asm_loc + << "800" << zone_y('0') + << setfill('0') << setw(2) << dec << asm_op + << setfill('0') << setw(4) << dec << asm_d + << setfill('0') << setw(3) << dec << (asm_i / 10) + << ((src_sign == " ")? zone_y(asm_i % 10 + '0') + : zone_x(asm_i % 10 + '0')) + << src_type + << ((src_sign == " ")? ' ' : '-') + << src_fcom + << " " << '-' << " " + << endl; + } else { + os << zone_y('6') << "91954195" << zone_y('3') + << " " + << setfill('0') << setw(4) << dec << (cardnumber % 10000) + << "24" << setfill('0') << setw(4) << dec << asm_loc + << "800" << zone_y('0') + << setfill('0') << setw(2) << dec << asm_op + << setfill('0') << setw(4) << dec << asm_d + << setfill('0') << setw(3) << dec << (asm_i / 10) + << ((src_sign == " ")? zone_y(asm_i % 10 + '0') + : zone_x(asm_i % 10 + '0')) + << src_type + << ((src_sign == " ")? ' ' : '-') + << src_fcom + << " " + << endl; + } + } else if ((op->type == pseudo_op) && (flags & asmflag_p)) { + os << zone_y('0') << "00000800" << zone_y('0') + << " " + << setfill('0') << setw(4) << dec << (cardnumber % 10000) + << " " + << src_type + << ((src_sign == " ")? ' ' : '-') + << src_fcom + << "9 " + << endl; + } + } +} + +void soap2::print_command(ostream &os) +{ + if (op) { + if ((op->type == real_op) || (op->code == pseudo_alf)) { + os << dec << setfill(' ') << setw(4) << cardnumber << ": " + << src_loc + << ' ' << src_op + << ' ' << src_d << src_dtag + << ' ' << src_i << src_itag + << ' ' << src_comm << " " + << dec << setfill(' ') << setw(4) << asm_loc << ": " + << setfill('0') << setw(2) << asm_op + << ' ' << setw(4) << asm_d + << ' ' << setw(4) << asm_i; + check_obj(os); + os << endl; + } else if (op->type == pseudo_op) { + os << setfill(' ') << setw(4) << dec << cardnumber + << ": " + << src_loc + << ' ' << src_op + << ' ' << src_d << src_dtag + << ' ' << src_i << src_itag + << ' ' << src_comm + << endl; + } + } +} + +void soap2::assemble_comment() +{ +} + +void soap2::punch_comment(ostream &os) +{ + os << zone_y('0') << "00000800" << zone_y('0') + << " " + << setfill('0') << setw(4) << dec << (cardnumber % 10000) + << " " + << src_type + << ((src_sign == " ")? ' ' : '-') + << src_fcom + << "9" << " " + << endl; +} + +void soap2::print_comment(ostream &os) +{ + os << setfill(' ') << setw(4) << dec << cardnumber + << ": " + << src_fcom + << endl; +} + +void soap2::assemble_relocate() +{ +} + +void soap2::assemble_realop() +{ + process_loc(); + process_d(); + process_i(); +} + +void soap2::assemble_pseudo() +{ + asmfield d(src_d, ' '); + asmfield i(src_i, ' '); + switch (op->code) { + case pseudo_alf: + process_loc(); + asm_op = ascii_to_650(src_d[0]); + asm_d = ascii_to_650(src_d[1]) * 100 + ascii_to_650(src_d[2]); + asm_i = ascii_to_650(src_d[3]) * 100 + ascii_to_650(src_d[4]); + if ((src_i) == " ") + src_i = "SOAP2"; + break; + + case pseudo_bla: + if (d.type == field_numeric) { + if (i.type == field_numeric) { + if (gsmap.isvalid(d.nval, i.nval - d.nval + 1)) + gsmap.unreserve(d.nval, i.nval - d.nval + 1); + else + error_message("Invalid address range"); + } else { + error_message("Invalid I field"); + } + } else { + error_message("Invalid D field"); + } + break; + + case pseudo_blr: + if (d.type == field_numeric) { + if (i.type == field_numeric) { + if (gsmap.isvalid(d.nval, i.nval - d.nval + 1)) + gsmap.reserve(d.nval, i.nval - d.nval + 1); + else + error_message("Invalid address range"); + } else { + error_message("Invalid I field"); + } + } else { + error_message("Invalid D field"); + } + break; + + case pseudo_bop: + error_message("BOP not supported"); + break; + + case pseudo_syn: + case pseudo_equ: { + int32_t eaddr = -1; + switch (i.type) { + case field_numeric: + eaddr = i.nval; + break; + + case field_region: { + regiter ri = regiontab.find(i.region); + if (ri == regiontab.end()) { + error_message("Region not defined"); + bypass = true; + } else { + eaddr = ri->second->start + i.nval; + } + } + break; + + case field_symbolic: { + symiter si = symboltab.find(i.symbol); + if (si == symboltab.end()) { + error_message("Symbol not defined"); + bypass = true; + } else { + eaddr = si->second->location; + si->second->add_ref(cardnumber); + } + } + break; + + case field_blank: + error_message("I field may not be blank"); + bypass = true; + break; + + case field_error: + error_message("Invalid I field"); + bypass = true; + break; + + default: + error_message("Internal error: unknown field code"); + bypass = true; + break; + } + if (!bypass) { + if (d.type != field_symbolic) { + error_message("D field must be a symbol"); + bypass = true; + } else { + symboltab[d.symbol] = new symbol(d.symbol, eaddr, cardnumber); + if (op->code == pseudo_syn) + gsmap.reserve(eaddr); + } + } + } + break; + + case pseudo_hed: + hed_char = src_d[0]; + break; + + case pseudo_pat: + print_availtab(cout); + //error_message("PAT not supported"); + break; + + case pseudo_rbr: + error_message("RBR not supported"); + break; + + case pseudo_reg: + switch (d.type) { + case field_numeric: + case field_region: + switch (i.type) { + case field_numeric: + if (d.type == field_region) { + regiter ri = regiontab.find(d.region); + if (ri == regiontab.end()) { + regiontab[d.region] = new region(d.region, d.nval); + } else { + ri->second->start = d.nval; + } + } + if (d.nval < i.nval) + gsmap.reserve(d.nval, i.nval - d.nval + 1); + break; + default: + error_message("Invalid I field"); + break; + } + break; + default: + error_message("Invalid D field"); + break; + } + break; + + case pseudo_rel: + error_message("REL not supported"); + break; + + case pseudo_req: + error_message("REQ not supported"); + break; + + default: + error_message("Internal error, invalid pseudo op"); + break; + } +} + +void soap2::check_obj(ostream &os) +{ + if (((op->type == real_op) && !punch_800x) || (op->code == pseudo_alf)) { + int64_t v = asm_op * 100000000LL + asm_d * 10000 + asm_i; + if ((v != ibm_obj[asm_loc].value()) || ((src_sign == " ") && ibm_obj[asm_loc].sign())) { + int64_t ov = ibm_obj[asm_loc].value(); + os << " : " << setfill('0') << setw(2) << ov / 100000000LL + << ' ' << setw(4) << ov / 10000 % 10000 + << ' ' << setw(4) << ov % 10000; + } + } +} + +struct opt_deltas { + int even; + int odd; + + opt_deltas(int even, int odd) : even(even), odd(odd) {} + opt_deltas() : even(0), odd(0) {} +}; + +static opt_deltas shift_deltas[] = { + opt_deltas(23, 22), + opt_deltas( 7, 6), + opt_deltas( 7, 6), + opt_deltas( 9, 8), + opt_deltas(11, 10), + opt_deltas(13, 12), + opt_deltas(15, 14), + opt_deltas(17, 16), + opt_deltas(19, 18), + opt_deltas(21, 20) +}; + +static opt_deltas srd_deltas[] = { + opt_deltas(25, 24), + opt_deltas( 7, 6), + opt_deltas( 9, 8), + opt_deltas(11, 10), + opt_deltas(13, 12), + opt_deltas(15, 14), + opt_deltas(17, 16), + opt_deltas(19, 18), + opt_deltas(21, 20), + opt_deltas(23, 22) +}; + +u_int32_t soap2::find_optimal_wt(opt_type ot) +{ + opt_deltas deltas; + + if (opt_addr < 0) { + return 0; + } + if (opt_i == ot) { + deltas = opt_deltas(op->i_even, op->i_odd); + if (op->opt_B()) { + int scount = asm_d % 10; + deltas = (op->opt_A())? srd_deltas[scount] : shift_deltas[scount]; + } else if (op->opt_A()) { + if (asm_d <= 1999) deltas = opt_deltas( 6, 6); + else if (asm_d <= 7999) deltas = opt_deltas( 6, 6); + else if (asm_d == 8000) deltas = opt_deltas( 8, 8); + else if (asm_d == 8001) deltas = opt_deltas( 6, 6); + else if (asm_d == 8002) deltas = opt_deltas( 9, 8); + else if (asm_d == 8003) deltas = opt_deltas( 8, 9); + else if (asm_d <= 9059) deltas = opt_deltas( 8, 8); + else deltas = opt_deltas( 9, 9); + + } + } else { + deltas = opt_deltas(op->d_even, op->d_odd); + } + int delta = (opt_addr & 1)? deltas.odd : deltas.even; + return (opt_addr + delta) % 50; +} + +u_int32_t soap2::find_optimal_800x(opt_type ot, u_int32_t opa) +{ + u_int32_t opta = find_optimal_wt(ot); + if (8002 == opa) { + if ((opta & 1)) opta++; + } else if (8003 == opa) { + if (!(opta & 1)) opta++; + } + return opta % 50; +} + +void soap2::process_loc_addr() +{ + switch (get_addr_type(asm_loc)) { + case addr_gs: + opt_addr = asm_loc; + break; + + case addr_800X: + opt_addr = opt_800x; + punch_800x = true; + break; + + case addr_ias: + opt_addr = opt_ias; + break; + + case addr_invalid: + error_message("Invalid location address"); + blank_loc = true; + break; + + default: + break; + } +} + +void soap2::process_loc() +{ + asmfield field(src_loc, hed_char); + switch (field.type) { + case field_blank: + if (opt_addr < 0) { + error_message("Cannot assign location, optimal address invalid"); + blank_loc = true; + } else { + asm_loc = opt_addr; + } + break; + + case field_symbolic: { + symiter symi = symboltab.find(field.symbol); + if (symi == symboltab.end()) { + int32_t oaddr = gsmap.optimum(0); + if (oaddr < 0) { + error_message("General storage packed"); + blank_loc = true; + } else { + symboltab[field.symbol] = new symbol(field.symbol, oaddr, cardnumber); + opt_addr = oaddr; + asm_loc = oaddr; + } + } else { + asm_loc = symi->second->location; + symi->second->add_ref(cardnumber); + process_loc_addr(); + } + } + break; + case field_numeric: + asm_loc = field.nval; + process_loc_addr(); + break; + + case field_region: { + regiter regi = regiontab.find(field.region); + if (regi == regiontab.end()) { + error_message("Undefined region"); + blank_loc = true; + } else { + asm_loc = field.nval - 1 + regi->second->start; + process_loc_addr(); + } + } + break; + + case field_error: + error_message("Invalid location field"); + blank_loc = true; + break; + + default: + error_message("Internal error: processing location"); + blank_loc = true; + break; + } +} + +void soap2::process_op() +{ + op = NULL; + if (src_op[0] == ' ') { + bool numeric = true; + for (int i = 1; i < 3; i++) + if (!isdigit(src_op[i])) + numeric = false; + if (numeric) { + int opcode = stoi(src_op.substr(1, 2)); + op = opbycodetab[opcode]; + asm_op = opcode; + return; + } else { + error_message("Malformed opcode"); + blank_op = true; + return; + } + } + opiter oi = opcodetab.find(src_op); + if (oi != opcodetab.end()) { + if (oi->second->type == alias_op) { + oi = opcodetab.find(oi->second->alias); + if (oi == opcodetab.end()) { + error_message("Internal error: opcode alias not found"); + blank_op = true; + return; + } + } + op = oi->second; + asm_op = op->code; + } else { + error_message("Invalid symbolic opcode"); + op = &dummy_op; + blank_op = true; + } +} + +void soap2::process_d_addr() +{ + switch (get_addr_type(asm_d)) { + case addr_gs: + // todo: index + if (!op->opt_C()) + opt_addr = asm_d; + break; + + case addr_800X: + opt_800x = find_optimal_800x(opt_d, asm_d); + opt_addr = opt_800x; + break; + + case addr_ias: + // todo: index + opt_ias = find_optimal_wt(opt_d); + if (!op->opt_C()) + opt_addr = asm_d; + break; + + case addr_invalid: + if (!op->opt_C()) + opt_addr = asm_d; + break; + + default: + error_message("Internal error: processing D field"); + blank_d = true; + break; + } +} + +void soap2::process_d() +{ + asmfield field(src_d, hed_char); + switch (field.type) { + case field_blank: { + int32_t oaddr = gsmap.optimum(find_optimal_wt(opt_d)); + if (oaddr < 0) { + error_message("General storage packed"); + blank_d = true; + } else { + opt_b = oaddr; + asm_d = oaddr; + if (!op->opt_C()) + opt_addr = oaddr; + } + } + break; + + case field_numeric: + asm_d = field.nval; + process_d_addr(); + break; + + case field_symbolic: { + symiter symi = symboltab.find(field.symbol); + if (symi == symboltab.end()) { + int32_t oaddr = gsmap.optimum(find_optimal_wt(opt_d)); + if (oaddr < 0) { + error_message("General storage packed"); + blank_d = true; + } else { + symboltab[field.symbol] = new symbol(field.symbol, oaddr, cardnumber); + asm_d = oaddr; + if (!op->opt_C()) + opt_addr = oaddr; + } + } else { + asm_d = symi->second->location; + symi->second->add_ref(cardnumber); + process_d_addr(); + } + } + break; + + case field_region: { + regiter regi = regiontab.find(field.region); + if (regi == regiontab.end()) { + error_message("Undefined region"); + blank_d = true; + } else { + asm_d = field.nval - 1 + regi->second->start; + process_d_addr(); + } + } + break; + + case field_error: + error_message("Invalid D field"); + blank_loc = true; + break; + + default: + error_message("Internal error: processing D field"); + blank_loc = true; + break; + } +} + +void soap2::process_i_addr() +{ + switch (get_addr_type(asm_i)) { + case addr_gs: + // todo: index + break; + + case addr_800X: { + opt_800x = find_optimal_800x(opt_i, asm_i); + break; + } + case addr_ias: + // todo: index + opt_ias = find_optimal_wt(opt_i); + break; + + case addr_invalid: + break; + + default: + error_message("Internal error: processing I field"); + blank_i = true; + break; + } + opt_addr = opt_b; +} + +void soap2::process_i() +{ + asmfield field(src_i, hed_char); + asmfield field_d(src_d, hed_char); + switch (field.type) { + case field_blank: + if (field_blank == field_d.type) { + if (gsmap.isfull()) { + blank_i = true; + } else { + asm_i = opt_b; + opt_addr = opt_b; + } + } else { + int32_t oaddr = gsmap.optimum(find_optimal_wt(opt_i)); + if (oaddr < 0) { + error_message("General storage packed"); + blank_i = true; + } else { + opt_b = oaddr; + asm_i = oaddr; + opt_addr = oaddr; + } + } + break; + + case field_numeric: + asm_i = field.nval; + process_i_addr(); + break; + + case field_symbolic: { + symiter symi = symboltab.find(field.symbol); + if (symi == symboltab.end()) { + int32_t oaddr = gsmap.optimum(find_optimal_wt(opt_i)); + if (oaddr < 0) { + error_message("General storage packed"); + blank_i = true; + } else { + symboltab[field.symbol] = new symbol(field.symbol, oaddr, cardnumber); + asm_i = oaddr; + opt_addr = opt_b; + } + } else { + asm_i = symi->second->location; + symi->second->add_ref(cardnumber); + process_i_addr(); + } + } + break; + + case field_region: { + regiter regi = regiontab.find(field.region); + if (regi == regiontab.end()) { + error_message("Undefined region"); + blank_i = true; + } else { + asm_i = field.nval - 1 + regi->second->start; + process_i_addr(); + } + } + break; + + case field_error: + error_message("Invalid I field"); + blank_loc = true; + break; + + default: + error_message("Internal error: processing I field"); + blank_loc = true; + break; + } +} + +void soap2::print_symtab(ostream &sout) +{ + sout << endl << "Symbol Table:" << endl; + symiter siter; + for (siter = symboltab.begin(); siter != symboltab.end(); siter++) { + sout << siter->first << ": " << setfill(' ') << setw(4) << dec << siter->second->location; + int rctr = 0; + for (int ref : siter->second->ref_line) { + if (0 == (++rctr % 20)) sout << endl << " "; + sout << " " << setfill(' ') << setw(4) << dec << ref; + } + sout << endl; + } +} + +void memmap::print_availtab(ostream &sout) +{ + sout << endl << "Availability Table:" << endl; + for (int i = 0; i < size; i++) { + sout.width(4); + if (0 == i % 50) sout << endl << i << ":"; + sout.width(1); + if (0 == i % 10) sout << " "; + sout << ((allocmap[i])? '1' : '0'); + } + sout << endl; + for (int i = 0; i < 50; i++) { + sout << setw(2) << i << ':'; + int addr = i; + int ctr = 0; + while (addr < size) { + if (0 == allocmap[addr]) { + if (ctr == 20) { + sout << endl << " "; + ctr = 0; + } + sout << ' ' << setw(4) << addr; + ctr++; + } + addr += 50; + } + sout << endl; + } +} + +void soap2::print_availtab(ostream &sout) +{ + gsmap.print_availtab(sout); +} + +void soap2::print_regiontab(ostream &sout) +{ + sout << endl << "Region Table:" << endl; + for (regiter riter = regiontab.begin(); riter != regiontab.end(); riter++) { + sout << riter->first << ": " << riter->second->start << endl; + } +} Index: trunk/utils/ibm650_soap2/ibm650_soap2/main.cpp =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/main.cpp (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/main.cpp (revision 29) @@ -0,0 +1,141 @@ +////////////////////////////////////////////////////////////////////////////////// +// IBM 650 Reconstruction in Verilog (i650) +// +// This file is part of the IBM 650 Reconstruction in Verilog (i650) project +// http:////www.opencores.org/project,i650 +// +// Description: An implementation of SOAP 2 for the IBM 650. +// +// Additional Comments: . +// +// Copyright (c) 2015 Robert Abeles +// +// This source file is free software; you can redistribute it +// and/or modify it under the terms of the GNU Lesser General +// Public License as published by the Free Software Foundation; +// either version 2.1 of the License, or (at your option) any +// later version. +// +// This source is distributed in the hope that it will be +// useful, but WITHOUT ANY WARRANTY; without even the implied +// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +// PURPOSE. See the GNU Lesser General Public License for more +// details. +// +// You should have received a copy of the GNU Lesser General +// Public License along with this source; if not, download it +// from http://www.opencores.org/lgpl.shtml +////////////////////////////////////////////////////////////////////////////////// + +#include +#include "soap2.h" + +static void usage() { + cout << "Usage: ibm650_soap2 [options] source_file" << endl; + cout << "Options" << endl; + cout << " -h, --help Print this message and exit." << endl; + cout << " -c, --punch_comments Punches comment cards." << endl; + cout << " -e, --punch_800x Punches 800x cards." << endl; + cout << " -p, --punch_pseudo Punches pseudo op cards." << endl; + cout << " -k, --check_object Compare generated object to 7-word deck." << endl; +} + +int main(int argc, char *argv[]) { + ifstream file_source, file_check; + ofstream file_list, file_obj; + string name_prefix, name_source, name_list, name_obj, name_check; + int ch; + int help_flag = 0; + int err_flag = 0; + int flags = 0; + + static struct option longopts[] = { + { "help", no_argument, NULL, 'h' }, + { "punch_comments", no_argument, NULL, 'c' }, + { "punch_800x", no_argument, NULL, 'e' }, + { "punch_pseudo", no_argument, NULL, 'p' }, + { "check_object", no_argument, NULL, 'k' }, + { NULL, 0, NULL, 0 } + }; + + while ((ch = ::getopt_long(argc, argv, "hcepk", longopts, NULL)) != -1) + switch (ch) { + case 'h': + help_flag = 1; + break; + case 'c': + flags |= asmflag_c; + break; + case 'e': + flags |= asmflag_e; + break; + case 'p': + flags |= asmflag_p; + break; + case 'k': + flags |= asmflag_k; + break; + default: + err_flag = 1; + break; + } + argc -= optind; + argv += optind; + if (argc == 0) { + cout << "Error: Missing source_file." << endl; + err_flag = 1; + } + if (argc > 1) { + cout << "Error: Extraneous argument(s)." << endl; + err_flag = 1; + } + if (err_flag) { + usage(); + return -1; + } + if (help_flag) { + usage(); + return 0; + } + name_source = argv[0]; + if (string::npos != name_source.rfind('.')) { + name_prefix = name_source.substr(0, name_source.rfind('.')); + if (name_prefix.empty()) { + cout << "Error: Malformed source_file." << endl; + err_flag = 1; + } + } else { + name_prefix = name_source; + } + name_list = name_prefix + ".listing"; + name_obj = name_prefix + ".obj"; + name_check= name_prefix + ".7wd"; + file_source.open(name_source); + if (!file_source) { + cout << "Error: Unable to open source_file." << endl; + err_flag = 1; + } + file_list.open(name_list); + if (!file_list) { + cout << "Error: Unable to open list_file." << endl; + err_flag = 1; + } + file_obj.open(name_obj); + if (!file_obj) { + cout << "Error: Unable to open obj_file." << endl; + err_flag = 1; + } + if (flags & asmflag_k) { + file_check.open(name_check); + if (!file_check) { + cout << "Error: Unable to open check_file." << endl; + err_flag = 1; + } + } + if (err_flag) { + usage(); + return -1; + } + soap2 myasm(cs_bcd48+cs_bcd48_f, flags, file_source, file_obj, file_list, file_check); + return 0; +} Index: trunk/utils/ibm650_soap2/ibm650_soap2/ibm_codec.cpp =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/ibm_codec.cpp (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/ibm_codec.cpp (revision 29) @@ -0,0 +1,342 @@ +////////////////////////////////////////////////////////////////////////////////// +// IBM 650 Reconstruction in Verilog (i650) +// +// This file is part of the IBM 650 Reconstruction in Verilog (i650) project +// http:////www.opencores.org/project,i650 +// +// Description: An implementation of SOAP 2 for the IBM 650. +// +// Additional Comments: . +// +// Copyright (c) 2015 Robert Abeles +// +// This source file is free software; you can redistribute it +// and/or modify it under the terms of the GNU Lesser General +// Public License as published by the Free Software Foundation; +// either version 2.1 of the License, or (at your option) any +// later version. +// +// This source is distributed in the hope that it will be +// useful, but WITHOUT ANY WARRANTY; without even the implied +// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +// PURPOSE. See the GNU Lesser General Public License for more +// details. +// +// You should have received a copy of the GNU Lesser General +// Public License along with this source; if not, download it +// from http://www.opencores.org/lgpl.shtml +////////////////////////////////////////////////////////////////////////////////// + +#include "ibm_codec.h" +#include +#include + +using namespace std; + +// ------------------------------------------------------------------------- +// Hollerith zone and digit punches. +// ------------------------------------------------------------------------- +enum holl_zn { + holl_znone, + holl_z0, + holl_z11, // aka X punch + holl_z12 // aka Y punch +}; +enum holl_dig { + holl_dnone, + holl_d0, + holl_d1, + holl_d2, + holl_d3, + holl_d4, + holl_d5, + holl_d6, + holl_d7, + holl_d8, + holl_d9, + holl_d8_2, + holl_d8_3, + holl_d8_4, + holl_d8_5, + holl_d8_6, + holl_d8_7 +}; + +// ------------------------------------------------------------------------- +// Glyph specification. +// ------------------------------------------------------------------------- +struct glyph_spec { + holl_zn zone; + holl_dig digit; + int unicode; + int ascii; + int keycode; // Qt keycode + int code650; + int bcd704; + int bcd705; + int codeset; +}; + +// ------------------------------------------------------------------------- +// Not all BCD characters have readily available keyboard equivalents. +// To these characters, we assign a modifier plus an alphabetic key. +// When the keycode field is not negative, it contains the unmodified +// keycode of the alphabetic key that when entered with a platform- +// pecific modifier key will enter the unavailable code. For example, +// pressing alt-R on a Mac will enter the unicode 'square root' character. +// Pressing the modifier key with a digit, '-', or '=' key will act +// as a multipunch, where '-' is an 11 punch and '=' is a 12 punch. +// +// The special characters in the final group, shown below, have +// several alternate encodings, designated by IBM as special character +// arrangements A through K. Encodings A, F and H are implemented above. +// +// A - &.^-$*,%/#@ +// B - /.^-$*,%&#@ +// C - &.^-$*,%0#@ +// D - -.^-$*,%/#@ +// E - -.<./*,%&#> +// F - +.)-$*,(/=- +// G - +.^-$*,%/+- +// H - +.)-$*,(/=' +// J - +.^-$*,%/#@ +// K - +.)-$*,(/=@ +// +// In addition to the standard 48 BCD encodings shown above, the 705 +// uses 6 additional encodings, 4 for marks (tape mark, record mark, +// group mark, storage and drum mark), and 2 encodings for signed zeroes +// (plus zero, minus zero). +// +// A word about marks. Some of the BCD character codes have special meaning to +// early IBM business computers. The 702 and its successor machines (705, 7070) +// were 'character oriented', i.e., they operated on variable length BCD character +// strings. Mark characters ('tape mark', 'record mark', 'group mark', +// 'segment mark', and 'word separator') served to delineate variable length +// objects on tape and in memory. +// +// In fact, a six bit character can have 64 unique values. The remaining +// unused BCD character codes were assigned by subsequent machines until +// all possible codes were accounted for. Mappings between BCD and Hollerith +// remain stable across the IBM product line, but glyph assignment differs +// between systems, options, and RPQs. +// ------------------------------------------------------------------------- +#define A48 cs_bcd48_a +#define F48 cs_bcd48_f +#define H48 cs_bcd48_h +#define BCD48 cs_bcd48 +#define BCD64 cs_bcd64 + +static glyph_spec glyph_codes[] = { +// zone digit unicode ascii keycd 650 704 14xx codeset(s) +// BCD BCD BCD + {holl_znone, holl_dnone, ' ', ' ', -1, 00, 060, 000, BCD48}, + {holl_znone, holl_d0, '0', '0', -1, 90, 000, 012, BCD48}, + {holl_znone, holl_d1, '1', '1', -1, 91, 001, 001, BCD48}, + {holl_znone, holl_d2, '2', '2', -1, 92, 002, 002, BCD48}, + {holl_znone, holl_d3, '3', '3', -1, 93, 003, 003, BCD48}, + {holl_znone, holl_d4, '4', '4', -1, 94, 004, 004, BCD48}, + {holl_znone, holl_d5, '5', '5', -1, 95, 005, 005, BCD48}, + {holl_znone, holl_d6, '6', '6', -1, 96, 006, 006, BCD48}, + {holl_znone, holl_d7, '7', '7', -1, 97, 007, 007, BCD48}, + {holl_znone, holl_d8, '8', '8', -1, 98, 010, 010, BCD48}, + {holl_znone, holl_d9, '9', '9', -1, 99, 011, 011, BCD48}, + + {holl_z12, holl_d0, '?', '?', -1, -1, 032, 072, BCD64}, // plus zero + {holl_z12, holl_d1, 'A', 'A', -1, 61, 021, 061, BCD48}, + {holl_z12, holl_d2, 'B', 'B', -1, 62, 022, 062, BCD48}, + {holl_z12, holl_d3, 'C', 'C', -1, 63, 023, 063, BCD48}, + {holl_z12, holl_d4, 'D', 'D', -1, 64, 024, 064, BCD48}, + {holl_z12, holl_d5, 'E', 'E', -1, 65, 025, 065, BCD48}, + {holl_z12, holl_d6, 'F', 'F', -1, 66, 026, 066, BCD48}, + {holl_z12, holl_d7, 'G', 'G', -1, 67, 027, 067, BCD48}, + {holl_z12, holl_d8, 'H', 'H', -1, 68, 030, 070, BCD48}, + {holl_z12, holl_d9, 'I', 'I', -1, 69, 031, 071, BCD48}, + + {holl_z11, holl_d0, '!', '!', -1, -1, 052, 052, BCD64}, // minus zero + {holl_z11, holl_d1, 'J', 'J', -1, 71, 041, 041, BCD48}, + {holl_z11, holl_d2, 'K', 'K', -1, 72, 042, 042, BCD48}, + {holl_z11, holl_d3, 'L', 'L', -1, 73, 043, 043, BCD48}, + {holl_z11, holl_d4, 'M', 'M', -1, 74, 044, 044, BCD48}, + {holl_z11, holl_d5, 'N', 'N', -1, 75, 045, 045, BCD48}, + {holl_z11, holl_d6, 'O', 'O', -1, 76, 046, 046, BCD48}, + {holl_z11, holl_d7, 'P', 'P', -1, 77, 047, 047, BCD48}, + {holl_z11, holl_d8, 'Q', 'Q', -1, 78, 050, 050, BCD48}, + {holl_z11, holl_d9, 'R', 'R', -1, 79, 051, 051, BCD48}, + + {holl_z0, holl_d1, '/', '/', -1, 31, 061, 021, A48+F48+H48}, + {holl_z0, holl_d2, 'S', 'S', -1, 82, 062, 022, BCD48}, + {holl_z0, holl_d3, 'T', 'T', -1, 83, 063, 023, BCD48}, + {holl_z0, holl_d4, 'U', 'U', -1, 84, 064, 024, BCD48}, + {holl_z0, holl_d5, 'V', 'V', -1, 85, 065, 025, BCD48}, + {holl_z0, holl_d6, 'W', 'W', -1, 86, 066, 026, BCD48}, + {holl_z0, holl_d7, 'X', 'X', -1, 87, 067, 027, BCD48}, + {holl_z0, holl_d8, 'Y', 'Y', -1, 88, 070, 030, BCD48}, + {holl_z0, holl_d9, 'Z', 'Z', -1, 89, 071, 031, BCD48}, + + {holl_z12, holl_dnone, '&', '&', -1, 20, 020, 060, A48}, + {holl_z12, holl_dnone, '+', '+', -1, 20, 020, 060, F48+H48}, + {holl_z12, holl_d8_3, '.', '.', -1, 18, 033, 073, A48+F48+H48}, + {holl_z12, holl_d8_4, L'⌑', '^', 'L', 19, 034, 074, A48}, // unicode 'square lozenge' + {holl_z12, holl_d8_4, ')', ')', -1, 19, 034, 074, F48+H48}, + {holl_z12, holl_d8_5, '[', '[', -1, -1, 035, 075, BCD64}, + {holl_z12, holl_d8_6, '<', '<', -1, -1, 036, 076, BCD64}, + {holl_z12, holl_d8_7,L'\uF000', -1, 'G', -1, 037, 077, BCD64}, // group mark, use uF000 for triple dagger + + {holl_z11, holl_dnone, '-', '-', -1, 30, 040, 040, A48+F48+H48}, + {holl_z11, holl_d8_3, '$', '$', -1, 28, 053, 053, A48+F48+H48}, + {holl_z11, holl_d8_4, '*', '*', -1, 29, 054, 054, A48+F48+H48}, + {holl_z11, holl_d8_5, ']', ']', -1, 29, 055, 055, BCD64}, + {holl_z11, holl_d8_6, ';', ';', -1, 29, 056, 056, BCD64}, + {holl_z11, holl_d8_7,L'\uF004', -1, 'D', 29, 057, 057, BCD64}, // delta -> unicode uppercase delta + + {holl_z0, holl_d8_2, L'‡', -1, 'R', -1, 073, 033, BCD64}, // record mark -> double dagger + {holl_z0, holl_d8_3, ',', ',', -1, 38, 073, 033, A48+F48+H48}, + {holl_z0, holl_d8_4, '%', '%', -1, 39, 074, 034, A48}, + {holl_z0, holl_d8_4, '(', '(', -1, 39, 074, 034, F48+H48}, + {holl_z0, holl_d8_5,L'\u2423', -1, 'W', -1, 075, 035, BCD64}, // word separator -> open box + {holl_z0, holl_d8_6, '\\', '\\', -1, -1, 076, 036, BCD64}, // left oblique + {holl_z0, holl_d8_7,L'\u29FB', -1, 'S', -1, 077, 037, BCD64}, // segment mark -> triple plus + + {holl_znone, holl_d8_2,L'\u2422',' ', ' ', -1, 060, 020, BCD64}, // alternate blank + {holl_znone, holl_d8_3, '#', '#', -1, 48, 013, 013, A48}, + {holl_znone, holl_d8_3, '=', '=', -1, 48, 013, 013, F48+H48}, + {holl_znone, holl_d8_4, '@', '@', -1, 49, 014, 014, A48}, + {holl_znone, holl_d8_4, '-', '-', -1, 49, 014, 014, F48}, // FORTRAN's other minus + {holl_znone, holl_d8_4, '\'', '\'', -1, 49, 014, 014, H48}, + {holl_znone, holl_d8_5, ':', ':', -1, -1, 015, 015, BCD64}, // colon + {holl_znone, holl_d8_6, '>', '>', -1, -1, 016, 016, BCD64}, // greater than + {holl_znone, holl_d8_7, L'√', -1, 'T', -1, 017, 017, BCD64} // radical +}; + +static uint16_t make_holl(int z, int d) +{ + uint16_t h = 0; + switch (z) { + case holl_znone: + break; + case holl_z0: + h += (1 << 9); + break; + case holl_z11: + h += (1 << 10); + break; + case holl_z12: + h += (1 << 11); + break; + default: + break; + } + switch (d) { + case holl_dnone: + break; + case holl_d0: + h += (1 << 9); + break; + case holl_d1: + h += (1 << 8); + break; + case holl_d2: + h += (1 << 7); + break; + case holl_d3: + h += (1 << 6); + break; + case holl_d4: + h += (1 << 5); + break; + case holl_d5: + h += (1 << 4); + break; + case holl_d6: + h += (1 << 3); + break; + case holl_d7: + h += (1 << 2); + break; + case holl_d8: + h += (1 << 1); + break; + case holl_d9: + h += (1 << 0); + break; + case holl_d8_2: + h += (1 << 1) + (1 << 7); + break; + case holl_d8_3: + h += (1 << 1) + (1 << 6); + break; + case holl_d8_4: + h += (1 << 1) + (1 << 5); + break; + case holl_d8_5: + h += (1 << 1) + (1 << 4); + break; + case holl_d8_6: + h += (1 << 1) + (1 << 3); + break; + case holl_d8_7: + h += (1 << 1) + (1 << 2); + break; + default: + break; + } + return h; +} + +void ibm_codec::setup_tables(int c) { + hollerith_to_code650_.resize(4096); + code650_to_hollerith_.resize(100); + hollerith_to_unicode_.resize(4096); + unicode_to_hollerith_.resize(65536); + hollerith_to_ascii_ .resize(4096); + ascii_to_hollerith_ .resize(256); + ascii_to_code650_ .resize(256); + code650_to_ascii_ .resize(100); + keycode_to_unicode_ .resize(256); + + // mark all translations invalid (-1) + for (int i = 0; i < 65536; i++) { + unicode_to_hollerith_[i] = -1; + if (i < 4096) { + hollerith_to_code650_[i] = -1; + hollerith_to_unicode_[i] = -1; + hollerith_to_ascii_[i] = -1; + } + if (i < 256) { + ascii_to_code650_[i] = -1; + ascii_to_hollerith_[i] = -1; + keycode_to_unicode_[i] = -1; + } + if (i < 100) { + code650_to_hollerith_[i] = -1; + code650_to_ascii_[i] = -1; + } + } + + // Fill in glyphs from table that are in the specified codeset(s). + // When multiple glyphs map to the same codepoint, the first + // glyph encoutered in the table occupying a codepoint takes + // precedence. + for (auto glyph : glyph_codes) { + if (!(glyph.codeset & c)) continue; + uint16_t hcode = make_holl(glyph.zone, glyph.digit); + if (hollerith_to_code650_[hcode] < 0) + hollerith_to_code650_[hcode] = glyph.code650; + if (code650_to_hollerith_[glyph.code650] < 0) + code650_to_hollerith_[glyph.code650] = hcode; + if (hollerith_to_unicode_[hcode] < 0) + hollerith_to_unicode_[hcode] = glyph.unicode; + if (unicode_to_hollerith_[glyph.unicode] < 0) + unicode_to_hollerith_[glyph.unicode] = hcode; + if (keycode_to_unicode_[glyph.keycode] < 0) + keycode_to_unicode_[glyph.keycode] = glyph.unicode; + if (hollerith_to_ascii_[hcode] < 0) + hollerith_to_ascii_[hcode] = glyph.ascii; + if (ascii_to_hollerith_[glyph.ascii] < 0) + ascii_to_hollerith_[glyph.ascii] = hcode; + if (ascii_to_code650_[glyph.ascii] < 0) + ascii_to_code650_[glyph.ascii] = glyph.code650; + if (code650_to_ascii_[glyph.code650] < 0) + code650_to_ascii_[glyph.code650] = glyph.ascii; + } +} Index: trunk/utils/ibm650_soap2/ibm650_soap2/soap2.h =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/soap2.h (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/soap2.h (revision 29) @@ -0,0 +1,293 @@ +////////////////////////////////////////////////////////////////////////////////// +// IBM 650 Reconstruction in Verilog (i650) +// +// This file is part of the IBM 650 Reconstruction in Verilog (i650) project +// http:////www.opencores.org/project,i650 +// +// Description: An implementation of SOAP 2 for the IBM 650. +// +// Additional Comments: . +// +// Copyright (c) 2015 Robert Abeles +// +// This source file is free software; you can redistribute it +// and/or modify it under the terms of the GNU Lesser General +// Public License as published by the Free Software Foundation; +// either version 2.1 of the License, or (at your option) any +// later version. +// +// This source is distributed in the hope that it will be +// useful, but WITHOUT ANY WARRANTY; without even the implied +// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +// PURPOSE. See the GNU Lesser General Public License for more +// details. +// +// You should have received a copy of the GNU Lesser General +// Public License along with this source; if not, download it +// from http://www.opencores.org/lgpl.shtml +////////////////////////////////////////////////////////////////////////////////// + +#ifndef ibm650_soap2_soap2_h +#define ibm650_soap2_soap2_h + +#include +#include +#include +#include +#include +#include +#include +#include "ibm_codec.h" + +using namespace std; + +struct region { + u_int8_t code; + u_int32_t start; + + region(u_int8_t c, u_int32_t s) : code(c), start(s) {} +}; + +struct symbol { + string name; + u_int32_t location; + vector ref_line; + + symbol(string n, u_int32_t l, u_int32_t r) : name(n), location(l) { + ref_line.push_back(r); + } + void add_ref(u_int32_t r) {ref_line.push_back(r);} +}; + +enum { + real_op, + alias_op, + unused_op, + pseudo_op, + final_op +}; + +enum { + pseudo_alf = 1000, + pseudo_bla, + pseudo_blr, + pseudo_bop, + pseudo_equ, + pseudo_hed, + pseudo_pat, + pseudo_rbr, + pseudo_reg, + pseudo_rel, + pseudo_req, + pseudo_syn +}; + +enum { + asmflag_c = 0x0001, + asmflag_e = 0x0002, + asmflag_p = 0x0004, + asmflag_k = 0x0008 +}; + +struct opcode { + string op; + u_int32_t code; + u_int32_t group; + u_int32_t d_even; + u_int32_t d_odd; + u_int32_t i_even; + u_int32_t i_odd; + u_int32_t type; + string alias; + + opcode(const string& o, u_int32_t c, u_int32_t g,u_int32_t de, u_int32_t dodd, u_int32_t ie, u_int32_t io, u_int32_t t) + : op(o) + , code(c) + , group(g) + , d_even(de) + , d_odd(dodd) + , i_even(ie) + , i_odd(io) + , type(t) + {} + + opcode(const string& o, const string& a) : op(o), alias(a), type(alias_op) {} + + inline bool opt_A() const {return (8 == (group / 100));} + inline bool opt_B() const {return (8 == ((group / 10) % 10));} + inline bool opt_C() const {return (8 == (group % 10));} +}; + +enum fieldtype { + field_blank, + field_symbolic, + field_numeric, + field_region, + field_error +}; + +struct asmfield { + string src; + fieldtype type; + u_int32_t nval; + string symbol; + u_int8_t region; + + asmfield(const string&, u_int8_t); +}; + +class biq_number { + u_int64_t val; + + public: + biq_number(const biq_number &n) {val = n.val;} + biq_number(bool s, u_int64_t v) { + val = (((s)? 1LL : 0LL) << 63) | (v % 10000000000LL); + } + biq_number() : val(0) {} + bool sign() const {return (val & 0x8000000000000000LL);} + u_int64_t value() const {return (val & 0x7fffffffffffffffLL);} + void set_sign(bool s) { + val = (val & 0x7fffffffffffffffLL) | (((s)? 1LL : 0LL) << 63); + } + void set_value(u_int64_t v) { + val = (val & 0x8000000000000000LL) | (v % 10000000000LL); + } +}; + +class memory { + vector mem; + +public: + memory(u_int32_t sz) : mem(sz) {} + + void load_7wd_deck(istream &); + biq_number& operator[](unsigned ix) {ix %= mem.size(); return mem[ix];} +}; + +class memmap { + u_int32_t size; + u_int32_t origin; + vector allocmap; + int32_t freectr; + +public: + memmap(u_int32_t s, u_int32_t o); + void reserve(u_int32_t addr); + void reserve(u_int32_t fwa, u_int32_t sz); + void unreserve(u_int32_t addr); + void unreserve(u_int32_t fwa, u_int32_t sz); + void reset(); + int32_t optimum(u_int32_t rot); + inline bool isfull() const {return (freectr <= 0);} + inline bool isvalid(u_int32_t addr) const {return (addr >= origin) && (addr < (origin+size));} + inline bool isvalid(u_int32_t fwa, u_int32_t sz) const { return (fwa >= origin) && ((fwa + sz - 1) < (origin+size));} + void print_availtab(ostream &); +}; + +enum addr_type { + addr_gs, + addr_ias, + addr_800X, + addr_invalid +}; + +class soap2 { + typedef map::iterator symiter; + map symboltab; // symbol -> location + typedef map::iterator regiter; + map regiontab; // character -> region + memmap gsmap; // general storage (drum) allocation map + map opcodetab; // opcode lookup table + typedef map::iterator opiter; + vector opbycodetab; // opcode indexed by opcode + istream &input_deck; + istream &check_deck; + ostream &output_deck; + ostream &listing; + memory ibm_obj; + ibm_codec codec; + int flags; + + void init_opcodetab(); + + ostringstream errors; + u_int32_t cardnumber; + u_int8_t hed_char; + + int32_t opt_addr; + int32_t opt_gs; + int32_t opt_ias; + int32_t opt_800x; + int32_t opt_b; + + // statement currently under assembly + string src; + string src_type; + string src_sign; + string src_loc; + string src_op; + string src_d; + string src_dtag; + string src_i; + string src_itag; + string src_comm; + string src_fcom; + + u_int32_t asm_loc; + u_int32_t asm_op; + u_int32_t asm_d; + u_int32_t asm_i; + + opcode *op; + + bool blank_loc; + bool blank_op; + bool blank_d; + bool blank_i; + bool punch_800x; + bool bypass; + + enum opt_type { + opt_d, + opt_i, + }; + u_int32_t find_optimal_wt(opt_type); + u_int32_t find_optimal_800x(opt_type, u_int32_t); + + void process_loc(); + void process_loc_addr(); + void process_op(); + void process_d(); + void process_d_addr(); + void process_i(); + void process_i_addr(); + + void assemble(); + void assemble_statement(); + void assemble_command(); + void assemble_comment(); + void assemble_relocate(); + void assemble_realop(); + void assemble_pseudo(); + void check_obj(ostream &); + + void punch_comment(ostream &); + void punch_command(ostream &); + void print_comment(ostream &); + void print_command(ostream &); + + void print_symtab(ostream &); + void print_availtab(ostream &); + void print_regiontab(ostream &); + + void error_message(const string &); + +public: + soap2(int, int, istream &, ostream &, ostream &, istream &); + inline u_int8_t ascii_to_650(int c) const { + return codec.valid_code650_for_ascii(c)? codec.ascii_to_code650(c) : 0; + } +}; + +#endif Index: trunk/utils/ibm650_soap2/ibm650_soap2/ibm_codec.h =================================================================== --- trunk/utils/ibm650_soap2/ibm650_soap2/ibm_codec.h (nonexistent) +++ trunk/utils/ibm650_soap2/ibm650_soap2/ibm_codec.h (revision 29) @@ -0,0 +1,201 @@ +////////////////////////////////////////////////////////////////////////////////// +// IBM 650 Reconstruction in Verilog (i650) +// +// This file is part of the IBM 650 Reconstruction in Verilog (i650) project +// http:////www.opencores.org/project,i650 +// +// Description: An implementation of SOAP 2 for the IBM 650. +// +// Additional Comments: +// +// Code translation tables for character codes used by early IBM data processing +// machines. An ibm_codec object translates codes for a specific codeset between +// Unicode or ASCII and a number of machine-specific codes. +// +// Hollerith code is a 12-bit code representing a column on an IBM punched card. +// The 12-bit column is split into zones and digits, a zero punch being both a +// zone and a digit. Zone punches are 12, 11, zero, and none, while digit +// punches are zero, 1, 2, ... 8, and 9. If all 12 rows of a card column are +// utilized, there are 1024 possible codes per column. In practice, codes +// were restricted to a single zone punch combined with one or two digit punches. +// For codes where two digit punches are used, one of those punches will be an 8. +// The zero punch may act as either a zone or digit: It is considered to be a +// digit when it appears alone or combined an 11 or 12 punch, otherwise it acts +// as a zone punch. +// +// Binary Coded Decimal (BCD) is a 6-bit code made up of a 2-bit zone code and a +// 4-bit digit code, providing up to 64 unique codes. Tape (the usual destination +// and source for BCD data) adds an additional parity bit. The bits comprising +// BCD characters were recorded on 1/2" magnetic tape in 7 parallel tracks. +// +// Due to its method of operation, a BCD character on tape may not consist of +// all zero bits. Automatic conversion is provided by the tape hardware between +// an even parity BCD zero (000) and a BCD 'substitute blank' (0020) character +// when writing to tape. Likewise, a substitute blank is converted to a BCD zero +// when reading a tape in even parity mode. Tapes written in odd parity mode +// suffer no such limitations because an odd parity BCD zero (0100) already has +// a bit set. +// +// Present in the BCD character set are codes that have special meaning to various +// hardware devices. Generally called marks, they serve to delineate character +// data in various ways. As used by IBM tape systems, the 'tape mark' character is +// used to delineate a file on tape. Tape hardware may search independently of the +// CPU for tape marks, accelerating certain types of tape processing. +// +// In even parity mode, the 704 tape hardware automatically modifies the BCD zone +// bits. This translation preserves the BCD collating sequence when character +// comparisons are performed by binary magnitude comparison. +// +// Collating sequence is an important property of any character set. An +// examination of BCD codes shows that simply sorting by the binary magnitude +// of the codes will not yield a useful collating sequence. Hardware or +// software methods are needed to sort this character set. The 701/704/709/709x +// family of machines translated BCD on its way to and from tape when operating +// in the even parity mode. Translation conisted of reassigning zones so that +// BCD alphabetic characters sorted naturally, but did not help with special +// characters. The 14xx machines incorporated complex hardware logic to compare +// BCD codes directly, resulting in what we consider to be the authoritative BCD +// collating sequence. See fig. 64 in A24-3116-0, "System Operation Reference +// Manual, IBM 1440 Data Processing System". The 1401 BCD compare logic can +// be found in system diagrams 44.30.11.2, 44.31.11.2, 44.32.11.2, 44.33.11.2, +// 44.34.11.2, 44.34.21.2, and 44.34.31.2. +// +// Early machines used modified card machines (ex. 407 for 704 printer) for unit +// record I/O, and so were limited to the 48 character BCD codeset supported by +// these machines. +// +// +// Copyright (c) 2015 Robert Abeles +// +// This source file is free software; you can redistribute it +// and/or modify it under the terms of the GNU Lesser General +// Public License as published by the Free Software Foundation; +// either version 2.1 of the License, or (at your option) any +// later version. +// +// This source is distributed in the hope that it will be +// useful, but WITHOUT ANY WARRANTY; without even the implied +// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +// PURPOSE. See the GNU Lesser General Public License for more +// details. +// +// You should have received a copy of the GNU Lesser General +// Public License along with this source; if not, download it +// from http://www.opencores.org/lgpl.shtml +////////////////////////////////////////////////////////////////////////////////// + +#ifndef __ibm650_soap2__ibm_codec__ +#define __ibm650_soap2__ibm_codec__ + +#include +#include + +// ------------------------------------------------------------------------------- +// Selects the character code set. Selections may be combined, for example to +// select the FORTRAN 48 character BCD set, specify cs_bcd48+cs_bcd48_f. +// ------------------------------------------------------------------------------- +enum ibm_codeset { + cs_bcd48 = 0x00000001, // 36 letters and digits BCD codeset + cs_bcd48_a = 0x00000002, // commercial 48 character BCD codeset + cs_bcd48_f = 0x00000004, // FORTRAN 48 character BCD codeset + cs_bcd48_h = 0x00000008, // scientific 48 character BCD codeset + cs_bcd64 = 0x00000010 // 64 character BCD codeset +}; + +// ------------------------------------------------------------------------------- +// Binary Hollerith punch codes. +// ------------------------------------------------------------------------------- +enum { + holl_12_punch = (1 << 11), + holl_11_punch = (1 << 10), + holl_0_punch = (1 << 9), + holl_1_punch = (1 << 8), + holl_2_punch = (1 << 7), + holl_3_punch = (1 << 6), + holl_4_punch = (1 << 5), + holl_5_punch = (1 << 4), + holl_6_punch = (1 << 3), + holl_7_punch = (1 << 2), + holl_8_punch = (1 << 1), + holl_9_punch = (1 << 0) +}; + +// ------------------------------------------------------------------------------- +// Class ibm_codec. +// ------------------------------------------------------------------------------- +class ibm_codec { + std::vector hollerith_to_code650_; + std::vector code650_to_hollerith_; + std::vector hollerith_to_unicode_; + std::vector unicode_to_hollerith_; + std::vector keycode_to_unicode_; + std::vector hollerith_to_ascii_; + std::vector ascii_to_hollerith_; + std::vector ascii_to_code650_; + std::vector code650_to_ascii_; + void setup_tables(int); + +public: + static inline int clamp_650(int v) { + return (v < 0) ? 0 : (v > 99) ? 99 : v; + } + static inline int clamp_hollerith(int v) { + return (v < 0) ? 0 : (v > 4095) ? 4095 : v; + } + static inline int clamp_unicode(int v) { + return (v < 0) ? 0 : (v > 65535) ? 65535 : v; + } + static inline int clamp_keycode(int v) { + return (v < 0) ? 0 : (v > 255) ? 0 : v; + } + static inline int clamp_ascii(int v) { + return (v < 0) ? 0 : (v > 255) ? 0 : v; + } + ibm_codec(int c) { setup_tables(c); } + void change_codeset(int c) { setup_tables(c); } + + inline bool valid_hollerith_for_650(int c) const { + return code650_to_hollerith_[clamp_650(c)] >= 0; + } + inline uint16_t hollerith_to_unicode(int c) const { + return clamp_unicode(hollerith_to_unicode_[clamp_hollerith(c)]); + } + inline bool valid_unicode_for_hollerith(int c) const { + return hollerith_to_unicode_[clamp_hollerith(c)] >= 0; + } + inline uint16_t unicode_to_hollerith(int c) const { + return clamp_hollerith(unicode_to_hollerith_[clamp_unicode(c)]); + } + inline bool valid_hollerith_for_unicode(int c) const { + return unicode_to_hollerith_[clamp_unicode(c)] >= 0; + } + inline uint16_t keycode_to_unicode(int c) const { + return keycode_to_unicode_[clamp_keycode(c)]; + } + inline bool valid_unicode_for_keycode(int c) const { + return keycode_to_unicode_[clamp_keycode(c)] >= 0; + } + inline uint16_t hollerith_to_ascii(int c) const { + return clamp_unicode(hollerith_to_ascii_[clamp_hollerith(c)]); + } + inline uint16_t ascii_to_hollerith(int c) const { + return clamp_hollerith(ascii_to_hollerith_[clamp_ascii(c)]); + } + inline bool valid_hollerith_for_ascii(int c) const { + return ascii_to_hollerith_[clamp_ascii(c)] >= 0; + } + inline uint8_t ascii_to_code650(int c) const { + return clamp_650(ascii_to_code650_[clamp_ascii(c)]); + } + inline bool valid_code650_for_ascii(int c) const { + return ascii_to_code650_[clamp_ascii(c)] >= 0; + } + inline uint16_t code650_to_ascii(int c) const { + return clamp_ascii(code650_to_ascii_[clamp_650(c)]); + } + inline bool valid_ascii_for_code650(int c) const { + return code650_to_ascii_[clamp_650(c)] >= 0; + } +}; + +#endif /* defined(__ibm650_soap2__ibm_codec__) */ Index: trunk/utils/i650_objutil/i650_objutil.xcodeproj/project.pbxproj =================================================================== --- trunk/utils/i650_objutil/i650_objutil.xcodeproj/project.pbxproj (nonexistent) +++ trunk/utils/i650_objutil/i650_objutil.xcodeproj/project.pbxproj (revision 29) @@ -0,0 +1,242 @@ +// !$*UTF8*$! +{ + archiveVersion = 1; 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+ CLANG_WARN_DIRECT_OBJC_ISA_USAGE = YES_ERROR; + CLANG_WARN_EMPTY_BODY = YES; + CLANG_WARN_ENUM_CONVERSION = YES; + CLANG_WARN_INT_CONVERSION = YES; + CLANG_WARN_OBJC_ROOT_CLASS = YES_ERROR; + CLANG_WARN_UNREACHABLE_CODE = YES; + CLANG_WARN__DUPLICATE_METHOD_MATCH = YES; + COPY_PHASE_STRIP = NO; + DEBUG_INFORMATION_FORMAT = "dwarf-with-dsym"; + ENABLE_NS_ASSERTIONS = NO; + ENABLE_STRICT_OBJC_MSGSEND = YES; + GCC_C_LANGUAGE_STANDARD = gnu99; + GCC_NO_COMMON_BLOCKS = YES; + GCC_WARN_64_TO_32_BIT_CONVERSION = YES; + GCC_WARN_ABOUT_RETURN_TYPE = YES_ERROR; + GCC_WARN_UNDECLARED_SELECTOR = YES; + GCC_WARN_UNINITIALIZED_AUTOS = YES_AGGRESSIVE; + GCC_WARN_UNUSED_FUNCTION = YES; + GCC_WARN_UNUSED_VARIABLE = YES; + MACOSX_DEPLOYMENT_TARGET = 10.10; + MTL_ENABLE_DEBUG_INFO = NO; + SDKROOT = macosx; + }; + name = Release; + }; + 2B0DFB1D1AF156CD00690E1F /* Debug */ = { + isa = XCBuildConfiguration; + buildSettings = { + PRODUCT_NAME = "$(TARGET_NAME)"; + }; + name = Debug; + }; + 2B0DFB1E1AF156CD00690E1F /* Release */ = { + isa = XCBuildConfiguration; + buildSettings = { + PRODUCT_NAME = "$(TARGET_NAME)"; + }; + name = Release; + }; +/* End XCBuildConfiguration section */ + +/* Begin XCConfigurationList section */ + 2B0DFB101AF156CD00690E1F /* Build configuration list for PBXProject "i650_objutil" */ = { + isa = XCConfigurationList; + buildConfigurations = ( + 2B0DFB1A1AF156CD00690E1F /* Debug */, + 2B0DFB1B1AF156CD00690E1F /* Release */, + ); + defaultConfigurationIsVisible = 0; + defaultConfigurationName = Release; + }; + 2B0DFB1C1AF156CD00690E1F /* Build configuration list for PBXNativeTarget "i650_objutil" */ = { + isa = XCConfigurationList; + buildConfigurations = ( + 2B0DFB1D1AF156CD00690E1F /* Debug */, + 2B0DFB1E1AF156CD00690E1F /* Release */, + ); + defaultConfigurationIsVisible = 0; + }; +/* End XCConfigurationList section */ + }; + rootObject = 2B0DFB0D1AF156CD00690E1F /* Project object */; +} Index: trunk/utils/i650_objutil/i650_objutil/main.cpp =================================================================== --- trunk/utils/i650_objutil/i650_objutil/main.cpp (nonexistent) +++ trunk/utils/i650_objutil/i650_objutil/main.cpp (revision 29) @@ -0,0 +1,15 @@ +// +// main.cpp +// i650_objutil +// +// Created by Robert Abeles on 4/29/15. +// Copyright (c) 2015 Robert Abeles. All rights reserved. +// + +#include + +int main(int argc, const char * argv[]) { + // insert code here... + std::cout << "Hello, World!\n"; + return 0; +} Index: trunk/rtl/toplev.v =================================================================== --- trunk/rtl/toplev.v (revision 28) +++ trunk/rtl/toplev.v (revision 29) @@ -138,6 +138,13 @@ ar_addr_8002, ar_addr_8003, ar_addr_8002_8003, ar_invalid_addr; //----------------------------------------------------------------------------- + // Arithmetic control + //----------------------------------------------------------------------------- + wire at_end_of_operation, at_arith_restart_d5, at_zero_insert, at_carry_blank, + at_no_carry_blank, at_carry_insert, at_no_carry_insert, at_compl_adj, + at_divide, at_multiply, at_acc_true_add, at_half_correct, at_hc_add_5; + + //----------------------------------------------------------------------------- // Accumulator and TLU validity checking //----------------------------------------------------------------------------- wire ca_acc_zero, ca_acc_no_zero, ca_check_latch; @@ -247,7 +254,7 @@ .prog_step_early_out(ps_early_out), .select_storage_out(ss_selected_out), .addr_u(ar_addr_u), - .acc_true_add_gate(1'b0), // 85o + .acc_true_add_gate(at_acc_true_add), .acc_compl_add_gate(1'b0), // 85r .left_shift_gate(1'b0), // 85b .prog_step_add_gate(tl_prog_add), @@ -316,11 +323,11 @@ .tlu_on(tl_tlu_on), .left_shift_off(1'b1), // 85d .left_shift_on(1'b0), // 85d - .no_carry_insert(1'b0), // 85e - .no_carry_blank(1'b0), // 85e - .carry_insert(1'b0), // 85e - .carry_blank(1'b0), // 85e - .zero_insert(1'b0), // 85j + .no_carry_insert(at_no_carry_insert), + .no_carry_blank(at_no_carry_blank), + .carry_insert(at_carry_insert), + .carry_blank(at_carry_blank), + .zero_insert(at_zero_insert), .error_reset(oc_err_reset), .quotient_digit_on(1'b0), // 85p .overflow_stop_sw(oc_ovflw_stop_sw), @@ -327,7 +334,7 @@ .overflow_sense_sw(oc_ovflw_sense_sw), .mult_div_off(1'b0), // 85k .dist_true_add_gate(1'b0), // 85r - .acc_true_add_latch(1'b0), // 85r + .acc_true_add_latch(at_acc_true_add), .shift_overflow(1'b0), // 85b .adder_out(ad_adder_out), .carry_test(ad_carry_test), @@ -394,6 +401,39 @@ .invalid_addr(ar_invalid_addr) ); + arith_ctl at ( + .rst(rst), + .ap(ap), + .bp(bp), + .cp(cp), + .dx(dx), + .d0(d0), + .d5(d5), + .d9(d9), + .dxl(dxl), + .d0l(d0l), + .d1l(d1l), + .wu(wu), + .adder_out(ad_adder_out), + .man_acc_reset(ac_man_acc_reset), + .overflow_stop(ad_overflow_stop), + .prog_add_d0(tl_prog_add_d0), + .half_correct_sig(dc_half_correct_sig), + .end_of_operation(at_end_of_operation), + .arith_restart_d5(at_arith_restart_d5), + .zero_insert(at_zero_insert), + .carry_blank(at_carry_blank), + .no_carry_blank(at_no_carry_blank), + .carry_insert(at_carry_insert), + .no_carry_insert(at_no_carry_insert), + .compl_adj(at_compl_adj), + .divide(at_divide), + .multiply(at_multiply), + .acc_true_add(at_acc_true_add), + .half_correct(at_half_correct), + .hc_add_5(at_hc_add_5) + ); + check_acc_tlu ca ( .rst(oc_hard_reset), .ap(ap), @@ -438,13 +478,13 @@ .prog_restart(ps_restart_sig), .error_stop(es_err_stop), .error_sense_restart(es_err_sense_restart), - .arith_restart(1'b0), // 85d + .arith_restart(at_arith_restart_d5), // **** .stop_code(dc_stop_code), .code_69(dc_code_69), .start_10s_60s(dc_turn_on_single_intlk), .end_shift_cntrl(dc_end_shift_control), .tlu_on(tl_tlu_on), - .end_of_operation(1'b0), // 85d + .end_of_operation(at_end_of_operation), .turn_on_op_intlk(dc_turn_on_op_intlk), .decode_restarts(dc_all_restarts), .use_d_for_i(dc_use_d_for_i), @@ -536,7 +576,7 @@ .acc_plus_test(1'b0), // 85t .acc_minus_test(1'b0), // 85t .single_intlk(cc_single_intlk), - .arith_restart(1'b0), // 85d + .arith_restart(at_arith_restart_d5), // **** .overflow_sense_sig(ad_overflow_sense_sig), .man_acc_reset(oc_man_acc_reset), .all_restarts(dc_all_restarts), @@ -778,7 +818,7 @@ .tlu_sig(dc_tlu_sig), .upper_sig(dc_upper_sig), .lower_sig(dc_lower_sig), - .divide_on(1'b0), // 85p + .divide_on(at_divide), .mult_nozero_edxl(1'b0), // 85j .carry_test_latch(ad_carry_test), .tlu_or_acc_zero_check(ca_check_latch), @@ -786,7 +826,7 @@ .reset_sig(dc_reset_sig), .no_reset_sig(dc_no_reset_sig), .acc_minus_sign(1'b0), // 85t - .compl_adj(1'b0), // 85s + .compl_adj(at_compl_adj), .quot_digit_on(1'b0), // 85p .dist_compl_add(1'b0), // 85p .any_left_shift_on(1'b0), // 85j @@ -794,9 +834,9 @@ .left_shift_on(1'b0), // 85b .mult_div_left_shift(1'b0), // 85k .sig_digit_on(1'b0), // 85j - .hc_add_5(1'b0), // 85a - .mult_on(1'b0), // 85q - .acc_true_add_gate(1'b0), // 85d + .hc_add_5(at_hc_add_5), + .mult_on(at_multiply), + .acc_true_add_gate(at_acc_true_add), .tlu_on(tl_tlu_on), .early_dist_zero_entry(tl_early_dist_zero_entry), .early_dist_zero_control(tl_early_dist_zero_control),
/trunk/rtl/arith_ctl.v
0,0 → 1,208
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// IBM 650 Reconstruction in Verilog (i650)
//
// This file is part of the IBM 650 Reconstruction in Verilog (i650) project
// http:////www.opencores.org/project,i650
//
// Description: Arithmetic operation control.
//
// Additional Comments: See US 2959351, Fig. 85.
//
// Copyright (c) 2015 Robert Abeles
//
// This source file is free software; you can redistribute it
// and/or modify it under the terms of the GNU Lesser General
// Public License as published by the Free Software Foundation;
// either version 2.1 of the License, or (at your option) any
// later version.
//
// This source is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
// PURPOSE. See the GNU Lesser General Public License for more
// details.
//
// You should have received a copy of the GNU Lesser General
// Public License along with this source; if not, download it
// from http://www.opencores.org/lgpl.shtml
//////////////////////////////////////////////////////////////////////////////////
`include "defines.v"
 
module arith_ctl (
input rst,
input ap, bp, cp,
input dx, d0, d5, d9, dxl, d0l, d1l,
input wu,
input [0:6] adder_out,
input man_acc_reset, overflow_stop,
input prog_add_d0,
input half_correct_sig,
output end_of_operation, arith_restart_d5, zero_insert, carry_blank,
no_carry_blank, carry_insert, no_carry_insert,
output reg compl_adj, divide, multiply, acc_true_add,
output reg half_correct, hc_add_5
);
// registers to be defined:
// reg compl_adj, divide, multiply;
reg compl_result, end_mult_div, acc_compl_add, left_shift, shift_count,
right_shift, dist_true;
 
//-----------------------------------------------------------------------------
// Special control circuits
//
// [88:70] Several special control circuits which are not associated with any
// particular operation or group of operations are energized by the arithmetic
// controls.
//
// These are: (1) Arithmetic operation and arithmetic restart. (2) Upper-lower
// check (adder control gate). (3) Adder output zero insert control. (4) No
// carry insert-carry blank and carry insert-no carry blank. (5) Accumulator
// sign read-out.
//-----------------------------------------------------------------------------
 
//-----------------------------------------------------------------------------
// Arithmetic operation and arithmetic restart
//
// [89:20] On arithmetic operations the restart signal is sent back to program
// control shortly after the operation signal is received by arithmetic
// control, before the operation is completed. This allows the control
// commutator to advance on its "I" half cycle, find the next instruction and
// begin its interpretation, concurrently with the performance of the operation
// by arithmetic control. The control commutator's operation interlock will
// prevent its advance beyond the point where there would be conflict between
// the arithmetic operation in process and an operation called for by the new
// instruction. Athe the end of the arithmetic operation in process, and end of
// operation signal developed by arithmetic control releases the operation
// interlock and allows the contorl commutator to advance.
//-----------------------------------------------------------------------------
reg arith_operation, arith_restart;
assign arith_restart_d5 = arith_restart & d5;
wire arith_op_on_p = compl_adj
| divide
| multiply
| compl_result
| acc_true_add
| acc_compl_add
| hc_add_5
| left_shift
| shift_count
| right_shift
| overflow_stop
| end_mult_div;
always @(posedge ap)
if (rst) begin
arith_operation <= 0;
arith_restart <= 0;
end else begin
arith_operation <= arith_op_on_p? 1'b1
: dx? 1'b0
: arith_operation;
arith_restart <= (arith_op_on_p & ~arith_operation)? 1'b1
: d9? 1'b0
: arith_restart;
end;
digit_pulse eop (rst, bp, ~arith_operation, 1'b1, end_of_operation);
 
`ifdef 0
//-----------------------------------------------------------------------------
// Upper-lower check -- adder control gate
//
// [90:5] It will be recalled from the description of the one digit adder in
// the section on basic principles that an upper-lower check gate was required
// as on of the conditions necessary to allow the distributor early outputs
// through to the adder, in either true or complement form. The purpose of this
// gate is to insure that either an upper or a lower signal and not both has
// been sensed and that both reset and no reset are not present before allowing
// distributor values to enter the adder.
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Adder output zero insert control
//
// [90:45]
//-----------------------------------------------------------------------------
assign zero_insert = dxl & right_shift
| (dxl | d0l) & left_shift
| (dxl | d0l) & acc_true_add & compl_adj
| end_mult_div & acc_true_add & dist_true
& div & no_rem & wu
| d0l & add_or_subt_sig
| dxl & mult_or_div_sig
| left_shift & (dxl | (d1l & ~significant_digit))
| mult_div_left_shift & d1l
| d0l & significant_digit;
 
//-----------------------------------------------------------------------------
// Carry insertion
//-----------------------------------------------------------------------------
assign carry_blank = dxl
| prog_add_d0
| (d0l & ~compl_acc_or_dist & ~hc_add_5);
assign no_carry_blank = d1 & sel_stor_add_tlu
| d1l & quotient_digit & compl_acc_or_dist
| d0l & ~quotient_digit & compl_acc_or_dist;
assign carry_insert = d1 & sel_stor_add_tlu
| d1l & quotient_digit & compl_acc_or_dist
| d0l & ~quotient_digit & compl_acc_or_dist;
assign no_carry_insert = dxl
| prog_add_d0
| (d0l & ~compl_acc_or_dist & ~hc_add_5);
 
//-----------------------------------------------------------------------------
// Sign control
//-----------------------------------------------------------------------------
assign acc_plus_out = (((~rem & d0u & ~ap) | (d0l & ~ap)) & acc_plus)
| (d0u & rem & rem_plus & ~ap);
assign acc_minus_out = (((~rem & d0u & ~ap) | (d0l & ~ap)) & acc_plus)
| (d0u & rem & rem_minus & ~ap);
wire acc_sign_reset = (d1l & add_sign_ctrl & ~divide & ~multiply)
| (d0 & mult_or_div_sig & a_c);
reg acc_plus, acc_minus;
//wire acc_plus_on_p = (carry_test & compl_result_test_sig)
// | (add_or_subt_sig & reset_op)
// | (rem_minus &
//wire acc_minus_on_p =
 
//-----------------------------------------------------------------------------
// Adder entry controls
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// Arithmetic control
//-----------------------------------------------------------------------------
wire end_true_add;
//-----------------------------------------------------------------------------
// Half correct control
//-----------------------------------------------------------------------------
wire hc_ed0l_9 = ed0l & half_correct
& adder_out[`biq_b5] & adder_out[`biq_q4];
always @(posedge rst, posedge cp) begin
if (rst) begin
half_correct <= 0;
hc_add_5 <= 0;
end else begin
if (man_acc_reset | end_true_add) begin
hc_add_5 <= 0;
end else if (hc_ed0l_9) begin
hc_add_5 <= 1;
end
if (hc_add_5 & ~hc_ed0l_9 & ed0l) begin
half_correct <= 0;
end else if (half_correct_sig) begin
half_correct <= 1;
end
end
end;
`endif
endmodule
trunk/rtl/arith_ctl.v Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property

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