OpenCores
URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

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  • This comparison shows the changes necessary to convert path 
    /rio
    from Rev 37 to Rev 38
    ↔ Reverse comparison
  •

Rev 37 → Rev 38

/branches/singleSymbol/bench/vhdl/TestRioLogicalCommon.vhd
84,22 → 84,11
writeContent_o : out std_logic;
writeContentData_o : out std_logic_vector(31 downto 0);
 
masterCyc_o : out std_logic;
masterStb_o : out std_logic;
masterAdr_o : out std_logic_vector(7 downto 0);
masterDat_o : out std_logic_vector(31 downto 0);
masterAck_i : in std_logic;
slaveCyc_i : in std_logic;
slaveStb_i : in std_logic;
slaveDat_i : in std_logic_vector(31 downto 0);
slaveAck_o : out std_logic;
 
configStb_o : out std_logic;
configWe_o : out std_logic;
configAdr_o : out std_logic_vector(20 downto 0);
configDat_o : out std_logic_vector(63 downto 0);
configSel_o : out std_logic_vector(7 downto 0);
configDat_i : in std_logic_vector(63 downto 0);
configAdr_o : out std_logic_vector(21 downto 0);
configDat_o : out std_logic_vector(31 downto 0);
configDat_i : in std_logic_vector(31 downto 0);
configAck_i : in std_logic);
end component;
 
158,23 → 147,12
signal readContentEnd : std_logic;
signal readContentData : std_logic_vector(31 downto 0);
 
signal masterCyc : std_logic;
signal masterStb : std_logic;
signal masterAdr : std_logic_vector(7 downto 0);
signal masterDat : std_logic_vector(31 downto 0);
signal masterAck : std_logic;
signal slaveCyc : std_logic;
signal slaveStb : std_logic;
signal slaveDat : std_logic_vector(31 downto 0);
signal slaveAck : std_logic;
signal configStb, configStbExpected : std_logic;
signal configWe, configWeExpected : std_logic;
signal configAddr, configAddrExpected : std_logic_vector(20 downto 0);
signal configSel, configSelExpected : std_logic_vector(7 downto 0);
signal configDataWrite, configDataWriteExpected : std_logic_vector(63 downto 0);
signal configDataRead, configDataReadExpected : std_logic_vector(63 downto 0);
signal configAck, configAckExpected : std_logic;
signal configWe : std_logic;
signal configAddr : std_logic_vector(21 downto 0);
signal configDataWrite : std_logic_vector(31 downto 0);
signal configDataRead : std_logic_vector(31 downto 0);
signal configAck : std_logic;
begin
217,96 → 195,10
frameExpected <= '0';
end procedure;
 
---------------------------------------------------------------------------
--
---------------------------------------------------------------------------
procedure ReadConfig32(constant destinationId : std_logic_vector(15 downto 0);
constant sourceId : std_logic_vector(15 downto 0);
constant hop : std_logic_vector(7 downto 0);
constant tid : std_logic_vector(7 downto 0);
constant address : std_logic_vector(23 downto 0);
constant data : std_logic_vector(31 downto 0)) is
variable maintData : DoubleWordArray(0 to 7);
begin
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>sourceId, destId=>destinationId,
payload=>RioMaintenance(transaction=>"0000",
size=>"1000",
tid=>tid,
hopCount=>hop,
configOffset=>address(23 downto 3),
wdptr=>address(2),
dataLength=>0,
data=>maintData)));
if (address(2) = '0') then
maintData(0) := data & x"00000000";
else
maintData(0) := x"00000000" & data ;
end if;
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>destinationId, destId=>sourceId,
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>tid,
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>1,
data=>maintData)));
end procedure;
 
---------------------------------------------------------------------------
--
---------------------------------------------------------------------------
procedure WriteConfig32(constant destinationId : std_logic_vector(15 downto 0);
constant sourceId : std_logic_vector(15 downto 0);
constant hop : std_logic_vector(7 downto 0);
constant tid : std_logic_vector(7 downto 0);
constant address : std_logic_vector(23 downto 0);
constant data : std_logic_vector(31 downto 0)) is
variable maintData : DoubleWordArray(0 to 7);
begin
if (address(2) = '0') then
maintData(0) := data & x"00000000";
else
maintData(0) := x"00000000" & data ;
end if;
 
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>sourceId, destId=>destinationId,
payload=>RioMaintenance(transaction=>"0001",
size=>"1000",
tid=>tid,
hopCount=>hop,
configOffset=>address(23 downto 3),
wdptr=>address(2),
dataLength=>1,
data=>maintData)));
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>destinationId, destId=>sourceId,
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>tid,
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
end procedure;
 
variable seed1 : positive := 1;
variable seed2: positive := 1;
 
variable data : DoubleWordArray(0 to 31);
variable randomPayload : RioPayload;
variable randomPayload1 : RioPayload;
variable randomPayload2 : RioPayload;
variable maintData : DoubleWordArray(0 to 7);
variable frame : RioFrame;
begin
316,7 → 208,8
frameValid <= '0';
frameExpected <= '0';
 
configAddrExpected(20) <= '0';
configStbExpected <= '0';
configAck <= '0';
wait until clk'event and clk = '1';
wait until clk'event and clk = '1';
329,33 → 222,1025
PrintS("TG_RioLogicalCommon");
PrintS("-----------------------------------------------------------------");
PrintS("TG_RioLogicalCommon-TC1");
PrintS("Description: Test switch maintenance accesses on different ports.");
PrintS("Description: Test maintenance read requests.");
PrintS("Requirement: XXXXX");
PrintS("-----------------------------------------------------------------");
PrintS("Step 1");
PrintS("Action: Read and write to/from the implementation defined space.");
PrintS("Step 1:");
PrintS("Action: Send maintenance read request for one word on even offset.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC1-Step1");
---------------------------------------------------------------------------
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0000",
size=>"1000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
configWeExpected <= '0';
configAddrExpected(19 downto 0) <= x"01000";
configDataReadExpected <= x"00000000deadbeef";
wait until clk = '1';
assert configWe = '0';
assert configAddr = "0000000000000000000000";
wait until clk = '1';
configDataRead <= x"deadbeef";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
configStbExpected <= '0';
maintData(0) := x"deadbeef00000000";
ReadConfig32(destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
tid=>x"06", address=>x"010000", data=>x"deadbeef");
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>1,
data=>maintData)));
 
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 2:");
PrintS("Action: Send maintenance read request for one word on odd offset.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC1-Step2");
---------------------------------------------------------------------------
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0000",
size=>"1000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'1',
dataLength=>0,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
configWeExpected <= '1';
configAddrExpected(19 downto 0) <= x"01000";
configDataWriteExpected <= x"c0debabe00000000";
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000001" report "Unexpected config address." severity error;
configDataRead <= x"c0debabe";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
configStbExpected <= '0';
maintData(0) := x"00000000c0debabe";
WriteConfig32(destinationId=>x"0000", sourceId=>x"0002", hop=>x"00",
tid=>x"06", address=>x"010004", data=>x"c0debabe");
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>1,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 3:");
PrintS("Action: Send maintenance read request for two words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC1-Step3");
---------------------------------------------------------------------------
 
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0000",
size=>"1011",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
configDataRead <= x"11111111";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
configDataRead <= x"22222222";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
maintData(0) := x"1111111122222222";
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>1,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 4:");
PrintS("Action: Send maintenance read request for four words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC1-Step4");
---------------------------------------------------------------------------
 
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0000",
size=>"1011",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'1',
dataLength=>0,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
configDataRead <= x"11111111";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
configDataRead <= x"22222222";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000100" report "Unexpected config address." severity error;
configDataRead <= x"33333333";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000101" report "Unexpected config address." severity error;
configDataRead <= x"44444444";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
maintData(0) := x"1111111122222222";
maintData(1) := x"3333333344444444";
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>2,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 5:");
PrintS("Action: Send maintenance read request for eight words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC1-Step5");
---------------------------------------------------------------------------
 
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0000",
size=>"1100",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
configDataRead <= x"11111111";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
configDataRead <= x"22222222";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000100" report "Unexpected config address." severity error;
configDataRead <= x"33333333";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000101" report "Unexpected config address." severity error;
configDataRead <= x"44444444";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000110" report "Unexpected config address." severity error;
configDataRead <= x"55555555";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000111" report "Unexpected config address." severity error;
configDataRead <= x"66666666";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001000" report "Unexpected config address." severity error;
configDataRead <= x"77777777";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001001" report "Unexpected config address." severity error;
configDataRead <= x"88888888";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
maintData(0) := x"1111111122222222";
maintData(1) := x"3333333344444444";
maintData(2) := x"5555555566666666";
maintData(3) := x"7777777788888888";
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>4,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 6:");
PrintS("Action: Send maintenance read request for sixteen words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC1-Step6");
---------------------------------------------------------------------------
 
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0000",
size=>"1100",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'1',
dataLength=>0,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
configDataRead <= x"11111111";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
configDataRead <= x"22222222";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000100" report "Unexpected config address." severity error;
configDataRead <= x"33333333";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000101" report "Unexpected config address." severity error;
configDataRead <= x"44444444";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000110" report "Unexpected config address." severity error;
configDataRead <= x"55555555";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000111" report "Unexpected config address." severity error;
configDataRead <= x"66666666";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001000" report "Unexpected config address." severity error;
configDataRead <= x"77777777";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001001" report "Unexpected config address." severity error;
configDataRead <= x"88888888";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001010" report "Unexpected config address." severity error;
configDataRead <= x"99999999";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001011" report "Unexpected config address." severity error;
configDataRead <= x"aaaaaaaa";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001100" report "Unexpected config address." severity error;
configDataRead <= x"bbbbbbbb";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001101" report "Unexpected config address." severity error;
configDataRead <= x"cccccccc";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001110" report "Unexpected config address." severity error;
configDataRead <= x"dddddddd";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001111" report "Unexpected config address." severity error;
configDataRead <= x"eeeeeeee";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000010000" report "Unexpected config address." severity error;
configDataRead <= x"ffffffff";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '0' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000010001" report "Unexpected config address." severity error;
configDataRead <= x"10101010";
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
maintData(0) := x"1111111122222222";
maintData(1) := x"3333333344444444";
maintData(2) := x"5555555566666666";
maintData(3) := x"7777777788888888";
maintData(4) := x"99999999aaaaaaaa";
maintData(5) := x"bbbbbbbbcccccccc";
maintData(6) := x"ddddddddeeeeeeee";
maintData(7) := x"ffffffff10101010";
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0010",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>8,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("TG_RioLogicalCommon-TC2");
PrintS("Description: Test maintenance write requests.");
PrintS("Requirement: XXXXX");
PrintS("-----------------------------------------------------------------");
PrintS("Step 1:");
PrintS("Action: Send maintenance write request for one word on even offset.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC2-Step1");
---------------------------------------------------------------------------
 
maintData(0) := x"deadbeef00000000";
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0001",
size=>"1000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"100000000000000000000",
wdptr=>'0',
dataLength=>1,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
wait until clk = '1';
assert configWe = '1' report "Unexpected configWe." severity error;
assert configAddr = "1000000000000000000000" report "Unexpected configAddr." severity error;
assert configDataWrite = x"deadbeef" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
configStbExpected <= '0';
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 2:");
PrintS("Action: Send maintenance write request for one word on odd offset.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC2-Step2");
---------------------------------------------------------------------------
maintData(0) := x"00000000c0debabe";
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0001",
size=>"1000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"100000000000000000000",
wdptr=>'1',
dataLength=>1,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "1000000000000000000001" report "Unexpected config address." severity error;
assert configDataWrite = x"c0debabe" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
configStbExpected <= '0';
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>x"aa",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 3:");
PrintS("Action: Send maintenance write request for two words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC2-Step3");
---------------------------------------------------------------------------
 
maintData(0) := x"1111111122222222";
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0001",
size=>"1011",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"100000000000000000001",
wdptr=>'0',
dataLength=>1,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "1000000000000000000010" report "Unexpected config address." severity error;
assert configDataWrite = x"11111111" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "1000000000000000000011" report "Unexpected config address." severity error;
assert configDataWrite = x"22222222" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 4:");
PrintS("Action: Send maintenance write request for four words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC2-Step4");
---------------------------------------------------------------------------
 
maintData(0) := x"1111111122222222";
maintData(1) := x"3333333344444444";
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0001",
size=>"1011",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'1',
dataLength=>2,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
assert configDataWrite = x"11111111" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
assert configDataWrite = x"22222222" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000100" report "Unexpected config address." severity error;
assert configDataWrite = x"33333333" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000101" report "Unexpected config address." severity error;
assert configDataWrite = x"44444444" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 5:");
PrintS("Action: Send maintenance write request for eight words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC2-Step5");
---------------------------------------------------------------------------
 
maintData(0) := x"1111111122222222";
maintData(1) := x"3333333344444444";
maintData(2) := x"5555555566666666";
maintData(3) := x"7777777788888888";
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0001",
size=>"1100",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'0',
dataLength=>4,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
assert configDataWrite = x"11111111" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
assert configDataWrite = x"22222222" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000100" report "Unexpected config address." severity error;
assert configDataWrite = x"33333333" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000101" report "Unexpected config address." severity error;
assert configDataWrite = x"44444444" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000110" report "Unexpected config address." severity error;
assert configDataWrite = x"55555555" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000111" report "Unexpected config address." severity error;
assert configDataWrite = x"66666666" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001000" report "Unexpected config address." severity error;
assert configDataWrite = x"77777777" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001001" report "Unexpected config address." severity error;
assert configDataWrite = x"88888888" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
---------------------------------------------------------------------------
PrintS("-----------------------------------------------------------------");
PrintS("Step 6:");
PrintS("Action: Send maintenance write request for sixteen words.");
PrintS("Result: Check the accesses on the external configuration port.");
PrintS("-----------------------------------------------------------------");
---------------------------------------------------------------------------
PrintR("TG_RioLogicalCommon-TC2-Step6");
---------------------------------------------------------------------------
 
maintData(0) := x"1111111122222222";
maintData(1) := x"3333333344444444";
maintData(2) := x"5555555566666666";
maintData(3) := x"7777777788888888";
maintData(4) := x"99999999aaaaaaaa";
maintData(5) := x"bbbbbbbbcccccccc";
maintData(6) := x"ddddddddeeeeeeee";
maintData(7) := x"ffffffff10101010";
SendFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"dead", destId=>x"beef",
payload=>RioMaintenance(transaction=>"0001",
size=>"1100",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000001",
wdptr=>'1',
dataLength=>8,
data=>maintData)));
 
wait until configStb = '1';
configStbExpected <= '1';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000010" report "Unexpected config address." severity error;
assert configDataWrite = x"11111111" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000011" report "Unexpected config address." severity error;
assert configDataWrite = x"22222222" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000100" report "Unexpected config address." severity error;
assert configDataWrite = x"33333333" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000101" report "Unexpected config address." severity error;
assert configDataWrite = x"44444444" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000110" report "Unexpected config address." severity error;
assert configDataWrite = x"55555555" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000000111" report "Unexpected config address." severity error;
assert configDataWrite = x"66666666" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001000" report "Unexpected config address." severity error;
assert configDataWrite = x"77777777" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001001" report "Unexpected config address." severity error;
assert configDataWrite = x"88888888" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001010" report "Unexpected config address." severity error;
assert configDataWrite = x"99999999" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001011" report "Unexpected config address." severity error;
assert configDataWrite = x"aaaaaaaa" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001100" report "Unexpected config address." severity error;
assert configDataWrite = x"bbbbbbbb" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001101" report "Unexpected config address." severity error;
assert configDataWrite = x"cccccccc" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001110" report "Unexpected config address." severity error;
assert configDataWrite = x"dddddddd" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000001111" report "Unexpected config address." severity error;
assert configDataWrite = x"eeeeeeee" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000010000" report "Unexpected config address." severity error;
assert configDataWrite = x"ffffffff" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
wait until clk = '1';
assert configWe = '1' report "Unexpected config write." severity error;
assert configAddr = "0000000000000000010001" report "Unexpected config address." severity error;
assert configDataWrite = x"10101010" report "Unexpected configDataWrite." severity error;
configAck <= '1';
wait until clk = '1';
configAck <= '0';
 
configStbExpected <= '0';
ReceiveFrame(RioFrameCreate(ackId=>"00000", vc=>'0', crf=>'0', prio=>"00",
tt=>"01", ftype=>FTYPE_MAINTENANCE_CLASS,
sourceId=>x"beef", destId=>x"dead",
payload=>RioMaintenance(transaction=>"0011",
size=>"0000",
tid=>x"cc",
hopCount=>x"ff",
configOffset=>"000000000000000000000",
wdptr=>'0',
dataLength=>0,
data=>maintData)));
 
 
---------------------------------------------------------------------------
-- Test completed.
---------------------------------------------------------------------------
370,18 → 1255,7
begin
loop
wait until clk'event and clk = '1';
if (configStb = '1') then
assert configWe = configWeExpected report "Unexpected configWe." severity error;
assert configAddr = configAddrExpected report "Unexpected configAddr." severity error;
if (configWe = '1') then
assert configDataWrite = configDataWriteExpected
report "Unexpected configDataWrite." severity error;
else
configDataRead <= configDataReadExpected;
end if;
else
 
end if;
assert configStbExpected = configStb report "Unexpected config-space access." severity error;
end loop;
end process;
388,7 → 1262,8
-----------------------------------------------------------------------------
-- Instantiate the test port array.
-----------------------------------------------------------------------------
 
readFrameRestart <= '0';
TestPortInst: TestPort
port map(
clk=>clk, areset_n=>areset_n,
429,19 → 1304,9
readContent_o=>readContent,
readContentEnd_i=>readContentEnd,
readContentData_i=>readContentData,
masterCyc_o=>masterCyc,
masterStb_o=>masterStb,
masterAdr_o=>masterAdr,
masterDat_o=>masterDat,
masterAck_i=>masterAck,
slaveCyc_i=>slaveCyc,
slaveStb_i=>slaveStb,
slaveDat_i=>slaveDat,
slaveAck_o=>slaveAck,
configStb_o=>configStb,
configWe_o=>configWe,
configAdr_o=>configAddr,
configSel_o=>configSel,
configDat_o=>configDataWrite,
configDat_i=>configDataRead,
configAck_i=>configAck);
/branches/singleSymbol/rtl/vhdl/RioLogicalCommon.vhd
57,75 → 57,7
-- 16-bit deviceAddress support. All fields are right-justified.
-------------------------------------------------------------------------------
-- REMARK: Egress; Places packets in different queues depending on the packet priority?
-- REMARK: Use inputOutput/message/maintenance/gsm/...-strobes instead?
-- REMARK: If the deviceId:s are removed, it will work for both 8/16-bit deviceIds.
-- case (ftype) is
-- when x"1" =>
-- -- Intervention-request class.
-- gsmStb_o <= '1';
-- when x"2" =>
-- -- Request-class.
-- if ((transaction = "0100") or
-- (transaction = "1100") or (transaction = "1101") or
-- (transaction = "1110") or (transaction = "1111")) then
-- inputOutputStb_o <= '1';
-- else
-- gsmStb_o <= '1';
-- end if;
-- when x"5" =>
-- -- Write-class.
-- if ((transaction = "0100") or (transaction = "0101") or
-- (transaction = "1100") or (transaction = "1101") or
-- (transaction = "1110")) then
-- inputOutputStb_o <= '1';
-- elsif ((transaction = "0000") or (transaction = "0001")) then
-- gsmStb_o <= '1';
-- end if;
-- when x"6" =>
-- -- Streaming-Write class.
-- inputOutputStb_o <= '1';
-- when x"7" =>
-- -- Flow-control class.
-- flowControlStb_o <= '1';
-- when x"8" =>
-- -- Maintenance class.
-- maintenanceStb_o <= '1';
-- when x"9" =>
-- -- Data-Streaming class.
-- dataStreamingStb_o <= '1';
-- when x"a" =>
-- -- Doorbell class.
-- -- REMARK: Make this belong to input/output since the packets
-- -- and their responses look the same?
-- messagePassingStb_o <= '1';
-- when x"b" =>
-- -- Message class.
-- messagePassingStb_o <= '1';
-- when x"d" =>
-- -- Response class.
-- -- REMARK: Seperate strobe for this???
-- if ((transaction = "0000") or (transaction = "1000")) then
-- -- REMARK: Doorbell-response going in here as well... *sigh*
-- -- REMARK: GSM-responses going in here as well...
-- responseStb_o <= '1';
-- elsif (transaction = "0001") then
-- messagePassing <= '1';
-- end if;
-- when others =>
-- -- Unsupported ftype.
-- -- REMARK: Discard this packet.
-- end case;
 
-- tt=00
-- 0: header(15:0);dest(7:0);src(7:0);
-- 1: transaction(3:0)
-- shifter: 32 (32 empty)
-- tt=01
-- 0: header(15:0);dest(15:0);
-- 1: src(15:0);transaction(3:0)
-- shifter: 16 (48 empty)
 
 
-- REMARK: Do not use Wishbone, use request/grant scheme instead...
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
132,6 → 64,9
use work.rio_common.all;
 
 
-------------------------------------------------------------------------------
--
-------------------------------------------------------------------------------
entity RioLogicalCommon is
port(
clk : in std_logic;
149,26 → 84,18
writeContent_o : out std_logic;
writeContentData_o : out std_logic_vector(31 downto 0);
 
masterCyc_o : out std_logic;
masterStb_o : out std_logic;
masterAdr_o : out std_logic_vector(7 downto 0);
masterDat_o : out std_logic_vector(31 downto 0);
masterAck_i : in std_logic;
slaveCyc_i : in std_logic;
slaveStb_i : in std_logic;
slaveDat_i : in std_logic_vector(31 downto 0);
slaveAck_o : out std_logic;
 
configStb_o : out std_logic;
configWe_o : out std_logic;
configAdr_o : out std_logic_vector(20 downto 0);
configSel_o : out std_logic_vector(7 downto 0);
configDat_o : out std_logic_vector(63 downto 0);
configDat_i : in std_logic_vector(63 downto 0);
configAdr_o : out std_logic_vector(21 downto 0);
configDat_o : out std_logic_vector(31 downto 0);
configDat_i : in std_logic_vector(31 downto 0);
configAck_i : in std_logic);
end entity;
 
 
-------------------------------------------------------------------------------
--
-------------------------------------------------------------------------------
architecture RioLogicalCommon of RioLogicalCommon is
 
component RioLogicalCommonIngress is
214,10 → 141,9
 
configStb_o : out std_logic;
configWe_o : out std_logic;
configAdr_o : out std_logic_vector(20 downto 0);
configDat_o : out std_logic_vector(63 downto 0);
configSel_o : out std_logic_vector(7 downto 0);
configDat_i : in std_logic_vector(63 downto 0);
configAdr_o : out std_logic_vector(21 downto 0);
configDat_o : out std_logic_vector(31 downto 0);
configDat_i : in std_logic_vector(31 downto 0);
configAck_i : in std_logic;
slaveCyc_i : in std_logic;
243,23 → 169,22
signal slaveDat : std_logic_vector(31 downto 0);
signal slaveAck : std_logic;
 
signal masterMaintenanceAck : std_logic;
signal slaveMaintenanceAck : std_logic;
begin
 
-- REMARK: Add crossbar for slave interface?
masterCyc_o <= masterCyc;
masterStb_o <= masterStb;
masterAdr_o <= masterAdr;
masterDat_o <= masterDat;
masterAck <= masterAck_i or masterMaintenanceAck;
slaveCyc <= slaveCyc_i;
slaveStb <= slaveStb_i;
slaveDat <= slaveDat_i;
slaveAck_o <= slaveAck or slaveMaintenanceAck;
Ingress: RioLogicalCommonIngress
port map(
clk=>clk, areset_n=>areset_n,
readFrameEmpty_i=>readFrameEmpty_i,
readFrame_o=>readFrame_o,
readContent_o=>readContent_o,
readContentEnd_i=>readContentEnd_i,
readContentData_i=>readContentData_i,
masterCyc_o=>masterCyc,
masterStb_o=>masterStb,
masterAdr_o=>masterAdr,
masterDat_o=>masterDat,
masterAck_i=>masterAck);
 
LogicalMaintenance: RioLogicalMaintenance
port map(
clk=>clk, areset_n=>areset_n, enable=>enable,
267,7 → 192,6
configWe_o=>configWe_o,
configAdr_o=>configAdr_o,
configDat_o=>configDat_o,
configSel_o=>configSel_o,
configDat_i=>configDat_i,
configAck_i=>configAck_i,
slaveCyc_i=>masterCyc,
274,28 → 198,12
slaveStb_i=>masterStb,
slaveAdr_i=>masterAdr,
slaveDat_i=>masterDat,
slaveAck_o=>masterMaintenanceAck,
slaveAck_o=>masterAck,
masterCyc_o=>slaveCyc,
masterStb_o=>slaveStb,
masterDat_o=>slaveDat,
masterAck_i=>slaveMaintenanceAck);
masterAck_i=>slaveAck);
 
-- REMARK: Add interconnect for master signals...
Ingress: RioLogicalCommonIngress
port map(
clk=>clk, areset_n=>areset_n,
readFrameEmpty_i=>readFrameEmpty_i,
readFrame_o=>readFrame_o,
readContent_o=>readContent_o,
readContentEnd_i=>readContentEnd_i,
readContentData_i=>readContentData_i,
masterCyc_o=>masterCyc,
masterStb_o=>masterStb,
masterAdr_o=>masterAdr,
masterDat_o=>masterDat,
masterAck_i=>masterAck);
 
Egress: RioLogicalCommonEgress
port map(
clk=>clk, areset_n=>areset_n,
369,6 → 277,9
process(clk, areset_n)
begin
if (areset_n = '0') then
masterCyc_o <= '0';
masterStb_o <= '0';
state <= IDLE;
packetPosition <= 0;
packetContent <= (others=>'0');
375,8 → 286,12
tt <= "00";
ftype <= "0000";
transaction <= "0000";
 
readContent_o <= '0';
readFrame_o <= '0';
elsif (clk'event and clk = '1') then
readContent_o <= '0';
readFrame_o <= '0';
case state is
when IDLE =>
428,6 → 343,7
---------------------------------------------------------------------
--
---------------------------------------------------------------------
masterCyc_o <= '1';
masterStb_o <= '1';
masterAdr_o <= ftype & transaction;
masterDat_o <= x"0000" & packetContent(63 downto 48);
445,8 → 361,7
packetContent <= packetContent(55 downto 0) & x"00";
elsif (tt = "01") then
masterDat_o <= x"0000" & packetContent(63 downto 48);
packetContent <= packetContent(31 downto 0) & readContentData_i;
readContent_o <= '1';
packetContent <= packetContent(47 downto 0) & x"0000";
end if;
 
state <= SEND_SOURCE;
462,7 → 377,8
packetContent <= packetContent(55 downto 0) & x"00";
elsif (tt = "01") then
masterDat_o <= x"0000" & packetContent(63 downto 48);
packetContent <= packetContent(47 downto 0) & x"0000";
packetContent <= packetContent(47 downto 32) & readContentData_i & x"0000";
readContent_o <= '1';
end if;
 
state <= FORWARD_SHORT;
473,11 → 389,15
--
---------------------------------------------------------------------
if (masterAck_i = '1') then
masterDat_o <= packetContent(63 downto 32);
packetPosition <= packetPosition + 1;
 
packetPosition <= packetPosition + 1;
packetContent <=
packetContent(31 downto 0) & readContentData_i;
if (tt = "00") then
masterDat_o <= packetContent(63 downto 32);
packetContent <= packetContent(31 downto 0) & readContentData_i;
elsif (tt = "01") then
masterDat_o <= packetContent(63 downto 32);
packetContent <= packetContent(31 downto 16) & readContentData_i & x"0000";
end if;
if (readContentEnd_i = '0') then
if (packetPosition = 20) then
487,7 → 407,7
readContent_o <= '1';
else
readFrame_o <= '1';
state <= FORWARD_LAST;
state <= END_PACKET;
end if;
end if;
 
545,6 → 465,8
--
---------------------------------------------------------------------
if (masterAck_i = '1') then
masterCyc_o <= '0';
masterStb_o <= '0';
state <= IDLE;
end if;
620,8 → 542,7
signal header : std_logic_vector(15 downto 0);
signal tt : std_logic_vector(1 downto 0);
signal dstAddr : std_logic_vector(31 downto 0);
signal srcAddr : std_logic_vector(31 downto 0);
signal dstAddr : std_logic_vector(7 downto 0);
signal writeContentData : std_logic_vector(31 downto 0);
 
636,6 → 557,14
if (areset_n = '0') then
state <= IDLE;
crc16Current <= x"0000";
 
slaveAck_o <= '0';
 
halfWordPending <= '0';
writeContent_o <= '0';
writeFrame_o <= '0';
writeFrameAbort_o <= '0';
writeContentData <= (others=>'0');
elsif (clk'event and clk = '1') then
writeContent_o <= '0';
648,8 → 577,8
---------------------------------------------------------------------
packetPosition <= 0;
if (writeFrameFull_i = '0') then
crc16Current <= x"ffff";
state <= HEADER_GET;
crc16Current <= x"ffff";
end if;
 
when HEADER_GET =>
663,7 → 592,7
slaveAck_o <= '1';
state <= HEADER_ACK;
else
state <= RESTART_FRAME;
state <= HEADER_GET;
end if;
 
when HEADER_ACK =>
680,7 → 609,7
if ((slaveCyc_i = '1') and (slaveStb_i = '1')) then
if (tt = "00") then
dstAddr <= x"00" & slaveDat_i(7 downto 0);
dstAddr <= slaveDat_i(7 downto 0);
elsif (tt = "01") then
writeContent_o <= '1';
writeContentData <= header & slaveDat_i(15 downto 0);
702,6 → 631,10
slaveAck_o <= '0';
state <= SOURCE_GET;
 
if (tt = "01") then
crc16Current <= crc16Next;
end if;
 
when SOURCE_GET =>
---------------------------------------------------------------------
--
731,11 → 664,6
--
---------------------------------------------------------------------
slaveAck_o <= '0';
 
if (tt = "00") then
crc16Current <= crc16Next;
end if;
state <= CONTENT_GET;
when CONTENT_GET =>
773,9 → 701,9
halfWordPending <= '1';
halfWord <= crc16Next;
else
-- REMARK: The current CRC has to be updated when this is written.
writeContent_o <= '1';
writeContentData <= halfWord & crc16Next;
crc16Current <= crc16Next;
packetPosition <= packetPosition + 1;
halfWordPending <= '0';
halfWord <= crc16Next;
788,14 → 716,12
---------------------------------------------------------------------
--
---------------------------------------------------------------------
if (halfWordPending = '0') then
if (tt = "00") then
writeContent_o <= '1';
writeContentData <= crc16Current & x"0000";
packetPosition <= packetPosition + 1;
else
elsif (tt = "01") then
writeContent_o <= '1';
writeContentData <= halfWord & crc16Current;
packetPosition <= packetPosition + 1;
writeContentData <= crc16Current & x"0000";
end if;
 
state <= SEND_FRAME;
818,6 → 744,7
---------------------------------------------------------------------
--
---------------------------------------------------------------------
writeFrameAbort_o <= '0';
state <= IDLE;
when others =>
869,10 → 796,9
 
configStb_o : out std_logic;
configWe_o : out std_logic;
configAdr_o : out std_logic_vector(20 downto 0);
configDat_o : out std_logic_vector(63 downto 0);
configSel_o : out std_logic_vector(7 downto 0);
configDat_i : in std_logic_vector(63 downto 0);
configAdr_o : out std_logic_vector(21 downto 0);
configDat_o : out std_logic_vector(31 downto 0);
configDat_i : in std_logic_vector(31 downto 0);
configAck_i : in std_logic;
slaveCyc_i : in std_logic;
909,10 → 835,10
requestSrcId_o : out std_logic_vector(31 downto 0);
requestTid_o : out std_logic_vector(7 downto 0);
requestOffset_o : out std_logic_vector(20 downto 0);
requestPayloadSelect_o : out std_logic_vector(7 downto 0);
requestPayloadLength_o : out std_logic_vector(4 downto 0);
requestPayloadIndex_i : in std_logic_vector(4 downto 0);
requestPayload_o : out std_logic_vector(63 downto 0);
requestWdptr_o : out std_logic;
requestPayloadLength_o : out std_logic_vector(3 downto 0);
requestPayloadIndex_i : in std_logic_vector(3 downto 0);
requestPayload_o : out std_logic_vector(31 downto 0);
requestDone_i : in std_logic;
slaveCyc_i : in std_logic;
937,10 → 863,11
responseDstId_i : in std_logic_vector(31 downto 0);
responseSrcId_i : in std_logic_vector(31 downto 0);
responseTid_i : in std_logic_vector(7 downto 0);
responseWdptr_i : in std_logic;
responsePayloadLength_i : in std_logic_vector(3 downto 0);
responsePayloadWrite_i : in std_logic;
responsePayloadIndex_i : in std_logic_vector(4 downto 0);
responsePayload_i : in std_logic_vector(63 downto 0);
responsePayloadIndex_i : in std_logic_vector(3 downto 0);
responsePayload_i : in std_logic_vector(31 downto 0);
responseDone_o : out std_logic;
masterCyc_o : out std_logic;
961,26 → 888,29
signal dstId : std_logic_vector(31 downto 0);
signal srcId : std_logic_vector(31 downto 0);
signal tid : std_logic_vector(7 downto 0);
signal wdptr : std_logic;
 
signal configAdr : std_logic_vector(20 downto 0);
signal configAdr : std_logic_vector(21 downto 0);
signal configDat : std_logic_vector(31 downto 0);
signal requestReadReady : std_logic;
signal requestWriteReady : std_logic;
signal requestOffset : std_logic_vector(20 downto 0);
signal requestPayloadLength : std_logic_vector(4 downto 0);
signal requestPayloadIndex : std_logic_vector(4 downto 0);
signal requestPayloadLength : std_logic_vector(3 downto 0);
signal requestPayloadIndex : std_logic_vector(3 downto 0);
signal requestPayload : std_logic_vector(31 downto 0);
signal requestDone : std_logic;
signal responseReadReady : std_logic;
signal responseWriteReady : std_logic;
signal responsePayloadLength : std_logic_vector(3 downto 0);
signal responsePayloadWrite : std_logic;
signal responsePayloadIndex : std_logic_vector(4 downto 0);
signal responsePayloadIndex : std_logic_vector(3 downto 0);
signal responseDone : std_logic;
begin
 
configAdr_o <= configAdr;
configDat_o <= configDat;
-----------------------------------------------------------------------------
--
988,25 → 918,47
Maintenance: process(clk, areset_n)
begin
if (areset_n = '0') then
configStb_o <= '0';
configWe_o <= '0';
configAdr <= (others=>'0');
configDat <= (others=>'0');
 
responseReadReady <= '0';
responseWriteReady <= '0';
responsePayloadWrite <= '0';
 
requestDone <= '0';
requestPayloadIndex <= (others=>'0');
elsif (clk'event and clk = '1') then
requestDone <= '0';
responsePayloadWrite <= '0';
 
if (responsePayloadWrite = '1') then
responsePayloadIndex <= std_logic_vector(unsigned(responsePayloadIndex) + 1);
end if;
case state is
when IDLE =>
---------------------------------------------------------------------
--
---------------------------------------------------------------------
responsePayloadIndex <= (others=>'0');
if (requestReadReady = '1') then
configStb_o <= '1';
configWe_o <= '0';
configAdr <= requestOffset;
responsePayloadIndex <= (others=>'0');
configAdr <= requestOffset & wdptr;
state <= CONFIG_READ;
elsif (requestWriteReady = '1') then
configStb_o <= '1';
configWe_o <= '1';
configAdr <= requestOffset;
configAdr <= requestOffset & wdptr;
configDat <= requestPayload;
requestPayloadIndex <= std_logic_vector(unsigned(requestPayloadIndex) + 1);
state <= CONFIG_WRITE;
else
responsePayloadIndex <= (others=>'0');
requestPayloadIndex <= (others=>'0');
state <= CONFIG_WRITE;
end if;
 
when CONFIG_READ =>
1015,8 → 967,6
---------------------------------------------------------------------
if (configAck_i = '1') then
responsePayloadWrite <= '1';
responsePayloadIndex <=
std_logic_vector(unsigned(responsePayloadIndex) + 1);
if (responsePayloadIndex /= requestPayloadLength) then
configAdr <= std_logic_vector(unsigned(configAdr) + 1);
1031,9 → 981,11
---------------------------------------------------------------------
--
---------------------------------------------------------------------
responseReadReady <= '1';
if (responseDone = '1') then
responseReadReady <= '0';
state <= IDLE;
else
responseReadReady <= '1';
end if;
 
when CONFIG_WRITE =>
1041,14 → 993,16
--
---------------------------------------------------------------------
if (configAck_i = '1') then
responsePayloadWrite <= '1';
 
if (responsePayloadIndex /= requestPayloadLength) then
configAdr <= std_logic_vector(unsigned(configAdr) + 1);
requestPayloadIndex <=
std_logic_vector(unsigned(requestPayloadIndex) + 1);
configDat <= requestPayload;
requestPayloadIndex <= std_logic_vector(unsigned(requestPayloadIndex) + 1);
else
requestDone <= '1';
configStb_o <= '0';
state <= CONFIG_READ_RESPONSE;
state <= CONFIG_WRITE_RESPONSE;
end if;
end if;
 
1056,9 → 1010,11
---------------------------------------------------------------------
--
---------------------------------------------------------------------
responseWriteReady <= '1';
if (responseDone = '1') then
responseWriteReady <= '0';
state <= IDLE;
else
responseWriteReady <= '1';
end if;
 
when others =>
1084,11 → 1040,11
requestDstId_o=>dstId,
requestSrcId_o=>srcId,
requestTid_o=>tid,
requestOffset_o=>requestOffset,
requestPayloadSelect_o=>configSel_o,
requestOffset_o=>requestOffset,
requestWdptr_o=>wdptr,
requestPayloadLength_o=>requestPayloadLength,
requestPayloadIndex_i=>requestPayloadIndex,
requestPayload_o=>configDat_o,
requestPayload_o=>requestPayload,
requestDone_i=>requestDone,
slaveCyc_i=>slaveCyc_i,
slaveStb_i=>slaveStb_i,
1112,8 → 1068,9
responseTt_i=>tt,
responseDstId_i=>srcId,
responseSrcId_i=>dstId,
responseTid_i=>tid,
responsePayloadLength_i=>responsePayloadLength,
responseTid_i=>tid,
responseWdptr_i=>wdptr,
responsePayloadLength_i=>requestPayloadLength,
responsePayloadWrite_i=>responsePayloadWrite,
responsePayloadIndex_i=>responsePayloadIndex,
responsePayload_i=>configDat_i,
1154,10 → 1111,10
requestSrcId_o : out std_logic_vector(31 downto 0);
requestTid_o : out std_logic_vector(7 downto 0);
requestOffset_o : out std_logic_vector(20 downto 0);
requestPayloadSelect_o : out std_logic_vector(7 downto 0);
requestPayloadLength_o : out std_logic_vector(4 downto 0);
requestPayloadIndex_i : in std_logic_vector(4 downto 0);
requestPayload_o : out std_logic_vector(63 downto 0);
requestWdptr_o : out std_logic;
requestPayloadLength_o : out std_logic_vector(3 downto 0);
requestPayloadIndex_i : in std_logic_vector(3 downto 0);
requestPayload_o : out std_logic_vector(31 downto 0);
requestDone_i : in std_logic;
slaveCyc_i : in std_logic;
1193,8 → 1150,7
 
signal wdptr : std_logic;
signal size : std_logic_vector(3 downto 0);
signal byteLanes : std_logic_vector(7 downto 0);
signal doubleWords : natural range 0 to 32;
signal words : natural range 0 to 32;
 
signal slaveAck : std_logic;
signal maintReadComplete : std_logic;
1201,24 → 1157,39
signal maintWriteComplete : std_logic;
 
signal packetIndex : natural range 0 to 33;
signal requestData : std_logic_vector(63 downto 0);
signal requestData : std_logic_vector(31 downto 0);
 
signal memoryEnable : std_logic;
signal memoryWrite : std_logic;
signal memoryAddress : std_logic_vector(4 downto 0);
signal memoryDataIn : std_logic_vector(63 downto 0);
signal memoryAddress : std_logic_vector(3 downto 0);
signal memoryDataIn : std_logic_vector(31 downto 0);
 
begin
 
slaveAck_o <= slaveAck;
 
requestReadReady_o <= maintReadComplete;
requestWriteReady_o <= maintWriteComplete;
requestReadReady_o <= maintReadComplete when (state = READY) else '0';
requestWriteReady_o <= maintWriteComplete when (state = READY) else '0';
 
MaintenanceRequest: process(clk, areset_n)
begin
if (areset_n = '0') then
slaveAck <= '0';
 
maintReadComplete <= '0';
maintWriteComplete <= '0';
requestVc_o <= '0';
requestCrf_o <= '0';
requestPrio_o <= "00";
requestTt_o <= "00";
requestOffset_o <= (others=>'0');
 
wdptr <= '0';
packetIndex <= 0;
memoryWrite <= '0';
memoryAddress <= (others=>'0');
memoryDataIn <= (others=>'0');
elsif (clk'event and clk = '1') then
case state is
when RECEIVE_PACKET =>
1294,24 → 1265,25
when 4 =>
-- config_offset(12:0) & wdptr & rsrv & double-word(63:48)
requestOffset_o(12 downto 0) <= slaveDat_i(31 downto 19);
requestData(63 downto 48) <= slaveDat_i(15 downto 0);
wdptr <= slaveDat_i(18);
requestData(31 downto 16) <= slaveDat_i(15 downto 0);
packetIndex <= packetIndex + 1;
when 5 | 7 | 9 | 11 | 13 | 15 | 17 | 19 | 21 | 23 | 25 | 27 | 29 | 31 =>
-- double-word(47:16)
requestData(47 downto 16) <= slaveDat_i;
requestData(31 downto 16) <= slaveDat_i(15 downto 0);
packetIndex <= packetIndex + 1;
 
if (not ((size = "1000") and (wdptr = '1'))) then
memoryWrite <= '1';
memoryDataIn <= requestData(31 downto 16) & slaveDat_i(31 downto 16);
end if;
when 6 | 8 | 10 | 12 | 14 | 16 | 18 | 20 | 22 | 24 | 26 | 28 | 30 | 32 =>
-- double-word(15:0) & double-word(63:48)
requestData(63 downto 48) <= slaveDat_i(15 downto 0);
requestData(31 downto 16) <= slaveDat_i(15 downto 0);
packetIndex <= packetIndex + 1;
 
memoryEnable <= '1';
memoryAddress <=
std_logic_vector(unsigned(memoryAddress) + 1);
memoryWrite <= '1';
memoryDataIn <=
requestData(63 downto 16) & slaveDat_i(31 downto 16);
memoryDataIn <= requestData(31 downto 16) & slaveDat_i(31 downto 16);
maintWriteComplete <= '1';
when others =>
-- There should be no more content in a maintenance write request.
1321,7 → 1293,10
slaveAck <= '1';
end if;
else
memoryEnable <= '0';
if (memoryWrite = '1') then
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
end if;
memoryWrite <= '0';
slaveAck <= '0';
end if;
1345,6 → 1320,9
end if;
when others =>
---------------------------------------------------------------------
--
---------------------------------------------------------------------
 
end case;
end if;
1353,119 → 1331,51
-----------------------------------------------------------------------------
-- Transformation of rdsize/wrsize into length of access and byte lanes.
-----------------------------------------------------------------------------
requestPayloadLength_o <= std_logic_vector(to_unsigned(doubleWords, 5));
requestPayloadSelect_o <= byteLanes;
-- REMARK: Make this a common component? Can be used in IO-accesses as well.
-- REMARK: Not all of these are allowed in a maintenance request.
process(clk, areset_n)
begin
if (areset_n = '0') then
doubleWords <= 0;
byteLanes <= (others=>'0');
requestPayloadLength_o <= (others=>'0');
requestWdptr_o <= '0';
elsif (clk'event and clk = '1') then
if (maintReadComplete = '1') or (maintWriteComplete = '1') then
if (wdptr = '0') then
case to_integer(unsigned(size)) is
when 0 =>
doubleWords <= 1;
byteLanes <= "10000000";
when 1 =>
doubleWords <= 1;
byteLanes <= "01000000";
when 2 =>
doubleWords <= 1;
byteLanes <= "00100000";
when 3 =>
doubleWords <= 1;
byteLanes <= "00010000";
when 4 =>
doubleWords <= 1;
byteLanes <= "11000000";
when 5 =>
doubleWords <= 1;
byteLanes <= "11100000";
when 6 =>
doubleWords <= 1;
byteLanes <= "00110000";
when 7 =>
doubleWords <= 1;
byteLanes <= "11111000";
when 8 =>
doubleWords <= 1;
byteLanes <= "11110000";
when 9 =>
doubleWords <= 1;
byteLanes <= "11111100";
when 10 =>
doubleWords <= 1;
byteLanes <= "11111110";
when 11 =>
doubleWords <= 1;
byteLanes <= "11111111";
when 12 =>
doubleWords <= 4;
byteLanes <= "11111111";
when 13 =>
doubleWords <= 12;
byteLanes <= "11111111";
when 14 =>
doubleWords <= 20;
byteLanes <= "11111111";
case size is
when "1000" =>
-- Read 1 word.
requestPayloadLength_o <= "0000";
requestWdptr_o <= '0';
when "1011" =>
-- Read 2 words.
requestPayloadLength_o <= "0001";
requestWdptr_o <= '0';
when "1100" =>
-- Read 8 words.
requestPayloadLength_o <= "0111";
requestWdptr_o <= '0';
when others =>
doubleWords <= 28;
byteLanes <= "11111111";
-- REMARK: Not allowed for a maintenance packet.
requestPayloadLength_o <= "0000";
requestWdptr_o <= '0';
end case;
else
case to_integer(unsigned(size)) is
when 0 =>
doubleWords <= 1;
byteLanes <= "00001000";
when 1 =>
doubleWords <= 1;
byteLanes <= "00000100";
when 2 =>
doubleWords <= 1;
byteLanes <= "00000010";
when 3 =>
doubleWords <= 1;
byteLanes <= "00000001";
when 4 =>
doubleWords <= 1;
byteLanes <= "00001100";
when 5 =>
doubleWords <= 1;
byteLanes <= "00000111";
when 6 =>
doubleWords <= 1;
byteLanes <= "00000011";
when 7 =>
doubleWords <= 1;
byteLanes <= "00011111";
when 8 =>
doubleWords <= 1;
byteLanes <= "00001111";
when 9 =>
doubleWords <= 1;
byteLanes <= "00111111";
when 10 =>
doubleWords <= 1;
byteLanes <= "01111111";
when 11 =>
doubleWords <= 2;
byteLanes <= "11111111";
when 12 =>
doubleWords <= 8;
byteLanes <= "11111111";
when 13 =>
doubleWords <= 16;
byteLanes <= "11111111";
when 14 =>
doubleWords <= 24;
byteLanes <= "11111111";
case size is
when "1000" =>
-- Read 1 word.
requestPayloadLength_o <= "0000";
requestWdptr_o <= '1';
when "1011" =>
-- Read 4 words.
requestPayloadLength_o <= "0011";
requestWdptr_o <= '0';
when "1100" =>
-- Read 16 words.
requestPayloadLength_o <= "1111";
requestWdptr_o <= '0';
when others =>
doubleWords <= 32;
byteLanes <= "11111111";
-- REMARK: Not allowed for a maintenance packet.
requestPayloadLength_o <= "0000";
requestWdptr_o <= '0';
end case;
end if;
end if;
1476,7 → 1386,7
-- Payload content memory.
-----------------------------------------------------------------------------
PayloadMemory: MemorySimpleDualPort
generic map(ADDRESS_WIDTH=>5, DATA_WIDTH=>64)
generic map(ADDRESS_WIDTH=>4, DATA_WIDTH=>32)
port map(clkA_i=>clk,
enableA_i=>memoryWrite,
addressA_i=>memoryAddress,
1516,10 → 1426,11
responseDstId_i : in std_logic_vector(31 downto 0);
responseSrcId_i : in std_logic_vector(31 downto 0);
responseTid_i : in std_logic_vector(7 downto 0);
responseWdptr_i : in std_logic;
responsePayloadLength_i : in std_logic_vector(3 downto 0);
responsePayloadWrite_i : in std_logic;
responsePayloadIndex_i : in std_logic_vector(4 downto 0);
responsePayload_i : in std_logic_vector(63 downto 0);
responsePayloadIndex_i : in std_logic_vector(3 downto 0);
responsePayload_i : in std_logic_vector(31 downto 0);
responseDone_o : out std_logic;
masterCyc_o : out std_logic;
1551,16 → 1462,17
 
type StateType is (WAIT_PACKET,
READ_RESPONSE, WRITE_RESPONSE,
RESPONSE_DONE);
WAIT_COMPLETE, RESPONSE_DONE);
signal state : StateType;
 
signal packetIndex : natural range 0 to 33;
signal responseHeader : std_logic_vector(31 downto 0);
signal responsePayload : std_logic_vector(63 downto 0);
signal responsePayload : std_logic_vector(31 downto 0);
signal responsePayloadIndex : std_logic_vector(2 downto 0);
signal memoryEnable : std_logic;
signal memoryAddress : std_logic_vector(4 downto 0);
signal memoryDataRead : std_logic_vector(63 downto 0);
signal memoryAddress : std_logic_vector(3 downto 0);
signal memoryDataRead : std_logic_vector(31 downto 0);
 
begin
1571,9 → 1483,18
MaintenanceResponse: process(clk, areset_n)
begin
if (areset_n = '0') then
masterCyc_o <= '0';
masterStb_o <= '0';
 
memoryEnable <= '0';
memoryAddress <= (others=>'0');
 
responsePayloadIndex <= (others=>'0');
responseDone_o <= '0';
state <= WAIT_PACKET;
elsif (clk'event and clk = '1') then
if (responseReadReady_i = '1') or (responseWriteReady_i = '1') then
if (enable = '1') then
case state is
when WAIT_PACKET =>
-------------------------------------------------------------------
1585,6 → 1506,8
masterDat_o <= responseHeader;
packetIndex <= 1;
memoryEnable <= '1';
memoryAddress <= (others=>'0');
responsePayloadIndex <= (others=>'0');
state <= READ_RESPONSE;
elsif (responseWriteReady_i = '1') then
masterCyc_o <= '1';
1599,47 → 1522,80
--
---------------------------------------------------------------------
if (masterAck_i = '1') then
if (packetIndex = unsigned(responsePayloadLength_i)) then
masterCyc_o <= '0';
masterStb_o <= '0';
state <= RESPONSE_DONE;
else
case (packetIndex) is
when 1 =>
-- destination
masterDat_o <= responseDstId_i;
case (packetIndex) is
when 1 =>
-- destination
masterDat_o <= responseDstId_i;
packetIndex <= packetIndex + 1;
when 2 =>
-- source
masterDat_o <= responseSrcId_i;
packetIndex <= packetIndex + 1;
when 3 =>
-- transaction & status & targetTID & hop & reserved(7:0)
masterDat_o <= "0010" & "0000" & responseTid_i & x"ff" & x"00";
packetIndex <= packetIndex + 1;
when 4 =>
-- reserved(15:0) & double-wordN(63:48)
if (responsePayloadLength_i = "0000") and (responseWdptr_i = '0') then
masterDat_o <= x"0000" & memoryDataRead(31 downto 16);
responsePayload(31 downto 16) <= memoryDataRead(15 downto 0);
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
elsif (responsePayloadLength_i = "0000") and (responseWdptr_i = '1') then
masterDat_o <= x"0000" & x"0000";
else
masterDat_o <= x"0000" & memoryDataRead(31 downto 16);
responsePayload(31 downto 16) <= memoryDataRead(15 downto 0);
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
end if;
packetIndex <= packetIndex + 1;
when 5 | 7 | 9 | 11 | 13 | 15 | 17 | 19 | 21 | 23 | 25 | 27 | 29 | 31 =>
-- double-wordN(47:16)
if (responsePayloadLength_i = "0000") and (responseWdptr_i = '0') then
masterDat_o <= responsePayload(31 downto 16) & x"0000";
elsif (responsePayloadLength_i = "0000") and (responseWdptr_i = '1') then
masterDat_o <= x"0000" & memoryDataRead(31 downto 16);
responsePayload(31 downto 16) <= memoryDataRead(15 downto 0);
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
else
masterDat_o <=
responsePayload(31 downto 16) & memoryDataRead(31 downto 16);
responsePayload(31 downto 16) <= memoryDataRead(15 downto 0);
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
end if;
packetIndex <= packetIndex + 1;
when 6 | 8 | 10 | 12 | 14 | 16 | 18 | 20 | 22 | 24 | 26 | 28 | 30 | 32 =>
-- double-wordN(15:0) & double-wordN(63:48)
if (responsePayloadLength_i = "0000") and (responseWdptr_i = '0') then
masterDat_o <= x"0000" & x"0000";
elsif (responsePayloadLength_i = "0000") and (responseWdptr_i = '1') then
masterDat_o <= responsePayload(31 downto 16) & x"0000";
else
if (responsePayloadIndex /= responsePayloadLength_i(3 downto 1)) then
masterDat_o <=
responsePayload(31 downto 16) & memoryDataRead(31 downto 16);
responsePayload(31 downto 16) <= memoryDataRead(15 downto 0);
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
else
masterDat_o <=
responsePayload(31 downto 16) & x"0000";
responsePayload(31 downto 16) <= memoryDataRead(15 downto 0);
memoryAddress <= std_logic_vector(unsigned(memoryAddress) + 1);
end if;
end if;
responsePayloadIndex <=
std_logic_vector(unsigned(responsePayloadIndex) + 1);
if (responsePayloadIndex = responsePayloadLength_i(3 downto 1)) then
state <= WAIT_COMPLETE;
else
packetIndex <= packetIndex + 1;
when 2 =>
-- source
masterDat_o <= responseSrcId_i;
packetIndex <= packetIndex + 1;
when 3 =>
-- transaction & status & targetTID & hop & reserved(7:0)
masterDat_o <= "0010" & "0000" & responseTid_i & x"ff" & x"00";
responsePayload <= memoryDataRead;
memoryAddress <=
std_logic_vector(unsigned(memoryAddress) + 1);
packetIndex <= packetIndex + 1;
when 4 =>
-- reserved(15:0) & double-wordN(63:48)
masterDat_o <= x"0000" & responsePayload(63 downto 48);
packetIndex <= packetIndex + 1;
when 5 | 7 | 9 | 11 | 13 | 15 | 17 | 19 | 21 | 23 | 25 | 27 | 29 | 31 =>
-- double-wordN(47:16)
masterDat_o <= responsePayload(47 downto 16);
packetIndex <= packetIndex + 1;
when 6 | 8 | 10 | 12 | 14 | 16 | 18 | 20 | 22 | 24 | 26 | 28 | 30 | 32 =>
-- double-wordN(15:0) & double-wordN(63:32)
masterDat_o <= responsePayload(15 downto 0) & responsePayload_i(63 downto 48);
responsePayload <= memoryDataRead;
memoryAddress <=
std_logic_vector(unsigned(memoryAddress) + 1);
packetIndex <= packetIndex + 1;
when others =>
-- Unallowed response length.
-- Dont do anything.
end case;
end if;
end if;
when others =>
-- Unallowed response length.
-- Dont do anything.
end case;
end if;
when WRITE_RESPONSE =>
1658,20 → 1614,25
packetIndex <= packetIndex + 1;
when 3 =>
-- transaction & status & targetTID & hop & reserved(7:0)
masterDat_o <= "0010" & "0000" & responseTid_i & x"ff" & x"00";
responsePayload <= memoryDataRead;
masterDat_o <= "0011" & "0000" & responseTid_i & x"ff" & x"00";
packetIndex <= packetIndex + 1;
when 4 =>
when others =>
-- reserved(15:0) & crc(15:0)
masterDat_o <= x"00000000";
packetIndex <= packetIndex + 1;
when others =>
-- Response packet has been completed.
masterCyc_o <= '0';
masterStb_o <= '0';
state <= RESPONSE_DONE;
state <= WAIT_COMPLETE;
end case;
end if;
 
when WAIT_COMPLETE =>
-------------------------------------------------------------------
--
-------------------------------------------------------------------
if (masterAck_i = '1') then
masterCyc_o <= '0';
masterStb_o <= '0';
state <= RESPONSE_DONE;
end if;
when RESPONSE_DONE =>
---------------------------------------------------------------------
1700,7 → 1661,7
-- Payload content memory.
-----------------------------------------------------------------------------
PayloadMemory: MemorySimpleDualPort
generic map(ADDRESS_WIDTH=>5, DATA_WIDTH=>64)
generic map(ADDRESS_WIDTH=>4, DATA_WIDTH=>32)
port map(clkA_i=>clk,
enableA_i=>responsePayloadWrite_i,
addressA_i=>responsePayloadIndex_i,
1711,3 → 1672,121
dataB_o=>memoryDataRead);
 
end architecture;
 
 
 
---- REMARK: Make this a common component? Can be used in IO-accesses as well.
---- REMARK: Not all of these are allowed in a maintenance request.
--process(clk, areset_n)
--begin
-- if (areset_n = '0') then
-- doubleWords <= 0;
-- byteLanes <= (others=>'0');
-- elsif (clk'event and clk = '1') then
-- if (maintReadComplete = '1') or (maintWriteComplete = '1') then
-- if (wdptr = '0') then
-- case to_integer(unsigned(size)) is
-- when 0 =>
-- doubleWords <= 0;
-- byteLanes <= "10000000";
-- when 1 =>
-- doubleWords <= 0;
-- byteLanes <= "01000000";
-- when 2 =>
-- doubleWords <= 0;
-- byteLanes <= "00100000";
-- when 3 =>
-- doubleWords <= 0;
-- byteLanes <= "00010000";
-- when 4 =>
-- doubleWords <= 0;
-- byteLanes <= "11000000";
-- when 5 =>
-- doubleWords <= 0;
-- byteLanes <= "11100000";
-- when 6 =>
-- doubleWords <= 0;
-- byteLanes <= "00110000";
-- when 7 =>
-- doubleWords <= 0;
-- byteLanes <= "11111000";
-- when 8 =>
-- doubleWords <= 0;
-- byteLanes <= "11110000";
-- when 9 =>
-- doubleWords <= 0;
-- byteLanes <= "11111100";
-- when 10 =>
-- doubleWords <= 0;
-- byteLanes <= "11111110";
-- when 11 =>
-- doubleWords <= 0;
-- byteLanes <= "11111111";
-- when 12 =>
-- doubleWords <= 3;
-- byteLanes <= "11111111";
-- when 13 =>
-- doubleWords <= 11;
-- byteLanes <= "11111111";
-- when 14 =>
-- doubleWords <= 19;
-- byteLanes <= "11111111";
-- when others =>
-- doubleWords <= 27;
-- byteLanes <= "11111111";
-- end case;
-- else
-- case to_integer(unsigned(size)) is
-- when 0 =>
-- doubleWords <= 0;
-- byteLanes <= "00001000";
-- when 1 =>
-- doubleWords <= 0;
-- byteLanes <= "00000100";
-- when 2 =>
-- doubleWords <= 0;
-- byteLanes <= "00000010";
-- when 3 =>
-- doubleWords <= 0;
-- byteLanes <= "00000001";
-- when 4 =>
-- doubleWords <= 0;
-- byteLanes <= "00001100";
-- when 5 =>
-- doubleWords <= 0;
-- byteLanes <= "00000111";
-- when 6 =>
-- doubleWords <= 0;
-- byteLanes <= "00000011";
-- when 7 =>
-- doubleWords <= 0;
-- byteLanes <= "00011111";
-- when 8 =>
-- doubleWords <= 0;
-- byteLanes <= "00001111";
-- when 9 =>
-- doubleWords <= 0;
-- byteLanes <= "00111111";
-- when 10 =>
-- doubleWords <= 0;
-- byteLanes <= "01111111";
-- when 11 =>
-- doubleWords <= 1;
-- byteLanes <= "11111111";
-- when 12 =>
-- doubleWords <= 7;
-- byteLanes <= "11111111";
-- when 13 =>
-- doubleWords <= 15;
-- byteLanes <= "11111111";
-- when 14 =>
-- doubleWords <= 23;
-- byteLanes <= "11111111";
-- when others =>
-- doubleWords <= 31;
-- byteLanes <= "11111111";
-- end case;
-- end if;
-- end if;
-- end if;
--end process;

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