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URL https://opencores.org/ocsvn/sockit_owm/sockit_owm/trunk

Subversion Repositories sockit_owm

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    from Rev 4 to Rev 5
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Rev 4 → Rev 5

/sockit_owm/trunk/HAL/src/sockit_owm.c
32,9 → 32,10
* *
******************************************************************************/
 
// this header would be used if a proper file handler could be assidned,
// but due to global variables in the public domain kit, this is not possible
//#include <fcntl.h>
 
#include <fcntl.h>
 
#include "sys/alt_dev.h"
#include "sys/alt_irq.h"
#include "sys/ioctl.h"
83,7 → 84,7
#endif
{
// clear onewire interrupts
IORD_SOCKIT_OWM (sockit_owm.base);
IORD_SOCKIT_OWM_CTL (sockit_owm.base);
// set the flag indicating a completed 1-wire cycle
ALT_FLAG_POST (sockit_owm.irq, 0x1, OS_FLAG_SET);
}
/sockit_owm/trunk/demo/Terasic_DE1/DE1_soc_nios2.qsf
15,7 → 15,7
set_global_assignment -name TOP_LEVEL_ENTITY DE1_soc_nios2
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:21:40 APRIL 17, 2010"
set_global_assignment -name LAST_QUARTUS_VERSION "10.0 SP1"
set_global_assignment -name LAST_QUARTUS_VERSION "10.1 SP1"
 
# Terasic DE1 board FPGA
set_global_assignment -name FAMILY "Cyclone II"
/sockit_owm/trunk/hdl/sockit_owm.v
379,7 → 379,7
 
// state counter (initial value depends whether the cycle is reset or data)
always @ (posedge clk, posedge rst)
if (rst) cnt <= 0;
if (rst) cnt <= 'd0;
else begin
if (bus_wen_ctl_sts) cnt <= (&bus_wdt[1:0] ? t_idl : bus_wdt[1] ? t_rst : t_bit) - 'd1;
else if (pls) cnt <= cnt - 'd1;
/sockit_owm/trunk/hdl/onewire_slave_model.v
6,7 → 6,7
// //
//////////////////////////////////////////////////////////////////////////////
// //
// This RTL is free hardware: you can redistribute it and/or modify //
// This HDL is free hardware: you can redistribute it and/or modify //
// it under the terms of the GNU Lesser General Public License //
// as published by the Free Software Foundation, either //
// version 3 of the License, or (at your option) any later version. //
/sockit_owm/trunk/sockit_owm_sw.tcl
74,10 → 74,10
add_sw_property supported_bsp_type UCOSII
 
# Driver configuration options
add_sw_setting boolean_define_only public_mk_define polling_driver_enable SOCKIT_OWM_POLLING false "Small-footprint (polled mode) driver"
add_sw_setting boolean_define_only public_mk_define hardware_delay_enable SOCKIT_OWM_HW_DLY true "Mili second delay implemented in hardware"
add_sw_setting boolean_define_only public_mk_define error_detection_enable SOCKIT_OWM_ERR_ENABLE true "Implement error detection support"
add_sw_setting boolean_define_only public_mk_define error_detection_small SOCKIT_OWM_ERR_SMALL true "Reduced memory consumption for error detection"
add_sw_setting boolean_define_only public_mk_define polling_driver_enable SOCKIT_OWM_POLLING true "Small-footprint (polled mode) driver"
add_sw_setting boolean_define_only public_mk_define hardware_delay_enable SOCKIT_OWM_HW_DLY true "Mili second delay implemented in hardware"
add_sw_setting boolean_define_only public_mk_define error_detection_enable SOCKIT_OWM_ERR_ENABLE true "Implement error detection support"
add_sw_setting boolean_define_only public_mk_define error_detection_small SOCKIT_OWM_ERR_SMALL true "Reduced memory consumption for error detection"
 
# Enable application layer code
#add_sw_setting boolean_define_only public_mk_define enable_A SOCKIT_OWM_A false "Enable driver A"
/sockit_owm/trunk/sockit_owm_hw.tcl
32,7 → 32,7
set_module_property DESCRIPTION "1-wire (onewire) master"
set_module_property AUTHOR "Iztok Jeras"
 
set_module_property TOP_LEVEL_HDL_FILE sockit_owm.v
set_module_property TOP_LEVEL_HDL_FILE hdl/sockit_owm.v
set_module_property TOP_LEVEL_HDL_MODULE sockit_owm
set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
set_module_property EDITABLE true

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