OpenCores
URL https://opencores.org/ocsvn/tiny_tate_bilinear_pairing/tiny_tate_bilinear_pairing/trunk

Subversion Repositories tiny_tate_bilinear_pairing

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /tiny_tate_bilinear_pairing
    from Rev 17 to Rev 18
    ↔ Reverse comparison
  •

Rev 17 → Rev 18

/trunk/group_size_is_697_bits/testbench/simulation.do
0,0 → 1,17
vlib work
vlog ../rtl/*.v
vlog *.v
vsim -novopt test_pairing
add wave -noupdate -format Logic -radix unsigned /test_pairing/clk
add wave -noupdate -format Logic -radix unsigned /test_pairing/reset
add wave -noupdate -divider input
add wave -noupdate -format Logic -radix unsigned /test_pairing/sel
add wave -noupdate -format Logic -radix unsigned /test_pairing/w
add wave -noupdate -format Literal -radix hexadecimal /test_pairing/addr
add wave -noupdate -format Logic -radix unsigned /test_pairing/update
add wave -noupdate -format Logic -radix unsigned /test_pairing/ready
add wave -noupdate -format Logic -radix unsigned /test_pairing/i
add wave -noupdate -divider output
add wave -noupdate -format Logic -radix unsigned /test_pairing/done
add wave -noupdate -format Logic -radix unsigned /test_pairing/o
run -all
/trunk/group_size_is_697_bits/testbench/test_tiny.v
0,0 → 1,129
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`timescale 1ns / 1ps
`define P 20 // clock period
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
module test_tiny;
 
// Inputs
reg clk;
reg reset;
reg sel;
reg [5:0] addr;
reg w;
reg [`WIDTH_D0:0] data;
 
// Outputs
wire [`WIDTH_D0:0] out;
wire done;
 
// Instantiate the Unit Under Test (UUT)
tiny uut (
.clk(clk),
.reset(reset),
.sel(sel),
.addr(addr),
.w(w),
.data(data),
.out(out),
.done(done)
);
 
initial begin
// Initialize Inputs
clk = 0;
reset = 0;
sel = 0;
addr = 0;
w = 0;
data = 0;
 
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
reset = 1; // keep FSM silent
// init x, y
write(3, 1006'h0412500224298894260864922a0084a98a0454681a18164a08268062495a596469659050406960a191646a024a0aa26688240682059585a258a89664946584924a9a8a1a8145400889899a6a2601184a2596419a04161969169128281805669a9509145852901691690a8506a9145224850109a150110629229564901a00);
write(5, 1006'h161181618265a480158208a088a01aa89a424001019a90912969511008944a806119a1429520105654089861546a912295590518a90842962660a665899405681aa510844840524240145a0295855920091640a66a5a044568510469454a18a06218922914510004a25409a81a5800456055996128a965624116289904aa);
write(6, 1006'h0412500224298894260864922a0084a98a0454681a18164a08268062495a596469659050406960a191646a024a0aa26688240682059585a258a89664946584924a9a8a1a8145400889899a6a2601184a2596419a04161969169128281805669a9509145852901691690a8506a9145224850109a150110629229564901a00);
write(7, 1006'h161181618265a480158208a088a01aa89a424001019a90912969511008944a806119a1429520105654089861546a912295590518a90842962660a665899405681aa510844840524240145a0295855920091640a66a5a044568510469454a18a06218922914510004a25409a81a5800456055996128a965624116289904aa);
/* read back. uncomment me if error happens */
/* read(3);
$display("xp = %h", out);
read(5);
$display("yp = %h", out);
read(6);
$display("xq = %h", out);
read(7);
$display("yq = %h", out);*/
reset = 0;
sel = 0; w = 0;
@(posedge done);
@(negedge clk);
read(9);
check(1006'h2965a664a44a85426524a19821aa12a42605258540a056525248149a96061560451a6a95861496a8140985a8902955951552696a425948159a2141a0aaa5840442851218546a49a2a2496658644656a9a6162a5098a025645151aa668902aaa102a0805900488980545120462896204252584282868449488a00884995a9);
read(10);
check(1006'h244151402864a58144a0509a26121148024224a299a4062a248944801589895a04a8a681a4245492a5aa5958901a142120515582941220529512012554699982594528256086220a55641a5a212511aa50a0a4a198200560a628994925551249659028459a8a24688191044a08529064119949a112564a52082068858890);
read(11);
check(1006'h180645a168488aa651260a226a124a66080299922a8595404428610808262992a22682905a55625665824505a609882a88422a886296551a6221a29a16aa11141a12280942aa84094946860205964a26669684569054810a914124a086212a5a5821440119015a98844101854a9951141981221169224a1599a11914a504);
read(12);
check(1006'h18a6911a415584242209a6a52629464160400a0a45554552866a9a20a8520a551856814024118140a144a151604449609aa24085a609a2a0851285445a96602a2461212641204a591a66a5604211004882191912920862a9860a861a88a005516611622a44880a48690412292244615156004952521664a84a5961510225);
read(13);
check(1006'h250869062a008a1882940945a20441680111009595094282260a95488aaa4588262641912aa64a29a8526408451940619612014212441090209588888a004002462206a8294a158809258852650a15226a99808952201191614814166198a52a8151454968a288295994286919811691aa21048661a5288402182a558215);
read(14);
check(1006'h016641111896469064656661124a160226a89485469954a6a5406aa28590655a018922965688045984585a61888165085289a61a051258a59459210842108082566966664250991442a2941521806608610a52182256042680a4881900605a8459260a9824295244629865a6a62a18958a66955152404814065588150894);
$display("Good");
$finish;
end
 
initial #100 forever #(`P/2) clk = ~clk;
 
task write;
input [6:0] adr;
input [`WIDTH_D0:0] dat;
begin
sel = 1;
w = 1;
addr = adr;
data = dat;
#(`P);
end
endtask
 
task read;
input [6:0] adr;
begin
sel = 1;
w = 0;
addr = adr;
#(`P);
end
endtask
 
task check;
input [`WIDTH_D0:0] wish;
begin
if (out !== wish)
begin $display("Error! %h %h", out, wish); end
end
endtask
endmodule
 
/trunk/group_size_is_697_bits/testbench/test_pe.v
0,0 → 1,123
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`timescale 1ns / 1ps
`define P 20
 
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
module test_pe;
 
// Inputs
reg clk;
reg reset;
reg [10:0] ctrl;
reg [`WIDTH_D0:0] d0;
reg [`WIDTH:0] d1;
reg [`WIDTH:0] d2;
reg [`WIDTH:0] wish;
 
// Outputs
wire [`WIDTH:0] out;
 
// Instantiate the Unit Under Test (UUT)
PE uut (
.clk(clk),
.reset(reset),
.ctrl(ctrl),
.d0(d0),
.d1(d1),
.d2(d2),
.out(out)
);
 
initial begin
// Initialize Inputs
clk = 0;
reset = 0;
ctrl = 0;
d0 = 0;
d1 = 0;
d2 = 0;
 
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
// test mult
d0 = 1006'h1119248464094a51549514585519508512555548915458194454a95a5a6550224816556284a5412965419544014a511556aa55955144aa5699655618601a19691a6691682455451456154a4585906a8615595595560656a15511545a9029959510158140619554a45a96a199aa69010216541569025125a4999591561495;
d1 = 1006'h1a55960985561659551851556895049209954912568a591559455151a6a96614a415025691809658645a12a415a665241565a565896195925a558154045551590a9610255981a119295065a605955445a165985126506828941554156694564a29585611655965010115198aa64986559214641456656425290954464964;
d2 = d1;
wish = 1006'h296690698528561902a89185a6682428590645221996249986180602212996548298118549a161545666651980291a9806a99a9911a2044444908214800aaa04402a2209496440aa11991aa5949a0152899416598196510996a5a50629996aa68a4a9150058552196045aa42209094906684805604282410248094120a61;
@(negedge clk);
reset=1;#`P reset=0;
ctrl=11'b11111_000000; #`P;
ctrl=11'b00000_111111; #(168*`P);
check;
// test cubic
d0 = {6'b10101, 1002'd0};
d1 = 1006'h1119248464094a51549514585519508512555548915458194454a95a5a6550224816556284a5412965419544014a511556aa55955144aa5699655618601a19691a6691682455451456154a4585906a8615595595560656a15511545a9029959510158140619554a45a96a199aa69010216541569025125a4999591561495;
d2 = d1;
wish = 1006'h25025a210a560a450298548062454110aa9458192245809a45964889a65a258440598a41411492199a15615080a4159911826049059a691598688804a991996924864959490519956855484104849a08904919aa59886a56859269504516a0aa604a49215a25a129458a6944aa5495981061589105441842001a50899565;
@(negedge clk);
reset=1;#`P reset=0;
ctrl=11'b11111_000000; #`P;
ctrl=1; #(`P);
check;
// test add
d0 = {6'b000101, 1002'd0};
d1 = 1006'h1119248464094a51549514585519508512555548915458194454a95a5a6550224816556284a5412965419544014a511556aa55955144aa5699655618601a19691a6691682455451456154a4585906a8615595595560656a15511545a9029959510158140619554a45a96a199aa69010216541569025125a4999591561495;
d2 = 1006'h1a55960985561659551851556895049209954912568a591559455151a6a96614a415025691809658645a12a415a665241565a565896195925a558154045551590a9610255981a119295065a605955445a165985126506828941554156694564a29585611655965010115198aa64986559214641456656425290954464964;
wish = 1006'h28628a81295051aaa9a165a181a25454182a925a2412a52291990aa80112860620285485556514459998a4281621860968100a0a1aa54025248a146064606a861509a151411626214065a0288a65820886822126495682992926a8600681281009611451962289a558a88a5451a68454a568494155865999869225995109;
@(negedge clk);
reset=1;#`P reset=0;
ctrl=11'b11111_000000; #`P;
ctrl=11'b10001; #(`P);
check;
 
// test sub
d0 = {6'b001001, 1002'd0};
d1 = 1006'h1119248464094a51549514585519508512555548915458194454a95a5a6550224816556284a5412965419544014a511556aa55955144aa5699655618601a19691a6691682455451456154a4585906a8615595595560656a15511545a9029959510158140619554a45a96a199aa69010216541569025125a4999591561495;
d2 = 1006'h1a55960985561659551851556895049209954912568a591559455151a6a96614a415025691809658645a12a415a665241565a565896195925a558154045551590a9610255981a119295065a605955445a165985126506828941554156694564a29585611655965010115198aa64986559214641456656425290954464964;
wish = 1006'h0684518aa2a664040289860629445826158018694a9902042a125809a488291a940156182625aa9101268690289428214145a060941615844210958468858810109081469a94940a69851592800a16416424894460a62a85810800456955425a26896a62084822a65981941204204aa94440a155a8288182a09849109a61;
@(negedge clk);
reset=1;#`P reset=0;
ctrl=11'b11111_000000; #`P;
ctrl=11'b10001; #(`P);
check;
 
$display("Good!");
$finish;
end
 
initial #100 forever #(`P/2) clk = ~clk;
 
task check;
begin
if (out !== wish)
begin $display("E %h %h", out, wish); $finish; end
end
endtask
endmodule
 
/trunk/group_size_is_697_bits/testbench/test_const.v
0,0 → 1,73
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`timescale 1ns / 1ps
`define P 20 // clock period
 
module test_const;
 
// Inputs
reg clk;
reg [5:0] addr;
 
// Outputs
wire [1007:0] out;
wire effective;
reg [1007:0] w_out;
reg w_effective;
// Instantiate the Unit Under Test (UUT)
const_ uut (
.clk(clk),
.addr(addr),
.out(out),
.effective(effective)
);
 
initial begin
// Initialize Inputs
addr = 0; clk = 0;
 
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
@ (negedge clk);
addr = 1; w_out = 0; w_effective = 1;
#(`P); check;
addr = 2; w_out = 1;
#(`P); check;
addr = 4; w_out = {6'b000101, 1002'd0};
#(`P); check;
addr = 8; w_out = {6'b001001, 1002'd0};
#(`P); check;
addr = 16; w_out = {6'b010101, 1002'd0};
#(`P); check;
addr = 0; w_out = 0; w_effective = 0;
#(`P); check;
$display("Good");
$finish;
end
 
initial #100 forever #(`P/2) clk = ~clk;
 
task check;
begin
if (out !== w_out || effective !== w_effective)
$display("E %d %h %h", addr, out, w_out);
end
endtask
endmodule
/trunk/group_size_is_697_bits/testbench/Read_Me.txt
0,0 → 1,9
How to start the simulation
 
1. simulation.do
----------------
This file is a batch file for Modelsim to compile the HDL files, setup the wave file, and begin function simulation. The working directory of Modelsim must be the same directory of the batch file.
 
2. test_pairing.v
----------------------
This file is the main test bench. It is self-checked. It feeds input data to the core and compare the correct result with the output of the core. If the output is wrong, the test bench will display an error message.
/trunk/group_size_is_697_bits/testbench/test_pairing.v
0,0 → 1,162
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`timescale 1ns / 1ps
`define P 20 // clock period
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
module test_pairing;
 
// Inputs
reg clk;
reg reset;
reg sel;
reg [5:0] addr;
reg w;
reg update;
reg ready;
reg i;
 
// Outputs
wire done;
wire o;
 
// Buffers
reg [`WIDTH_D0:0] out;
 
// Instantiate the Unit Under Test (UUT)
pairing uut (
.clk(clk),
.reset(reset),
.sel(sel),
.addr(addr),
.w(w),
.update(update),
.ready(ready),
.i(i),
.o(o),
.done(done)
);
 
initial begin
// Initialize Inputs
clk = 0;
reset = 0;
sel = 0;
addr = 0;
w = 0;
update = 0;
ready = 0;
i = 0;
out = 0;
 
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
/* keep FSM silent */
reset = 1;
/* init xp, yp, xq, yq */
write(3, 1006'h0412500224298894260864922a0084a98a0454681a18164a08268062495a596469659050406960a191646a024a0aa26688240682059585a258a89664946584924a9a8a1a8145400889899a6a2601184a2596419a04161969169128281805669a9509145852901691690a8506a9145224850109a150110629229564901a00);
write(5, 1006'h161181618265a480158208a088a01aa89a424001019a90912969511008944a806119a1429520105654089861546a912295590518a90842962660a665899405681aa510844840524240145a0295855920091640a66a5a044568510469454a18a06218922914510004a25409a81a5800456055996128a965624116289904aa);
write(6, 1006'h0412500224298894260864922a0084a98a0454681a18164a08268062495a596469659050406960a191646a024a0aa26688240682059585a258a89664946584924a9a8a1a8145400889899a6a2601184a2596419a04161969169128281805669a9509145852901691690a8506a9145224850109a150110629229564901a00);
write(7, 1006'h161181618265a480158208a088a01aa89a424001019a90912969511008944a806119a1429520105654089861546a912295590518a90842962660a665899405681aa510844840524240145a0295855920091640a66a5a044568510469454a18a06218922914510004a25409a81a5800456055996128a965624116289904aa);
/* read back. uncomment me if error happens */
/* read(3);
$display("xp = %h", out);
read(5);
$display("yp = %h", out);
read(6);
$display("xq = %h", out);
read(7);
$display("yq = %h", out);*/
reset = 0;
sel = 0; w = 0;
@(posedge done);
@(negedge clk);
read(9);
check(1006'h2965a664a44a85426524a19821aa12a42605258540a056525248149a96061560451a6a95861496a8140985a8902955951552696a425948159a2141a0aaa5840442851218546a49a2a2496658644656a9a6162a5098a025645151aa668902aaa102a0805900488980545120462896204252584282868449488a00884995a9);
read(10);
check(1006'h244151402864a58144a0509a26121148024224a299a4062a248944801589895a04a8a681a4245492a5aa5958901a142120515582941220529512012554699982594528256086220a55641a5a212511aa50a0a4a198200560a628994925551249659028459a8a24688191044a08529064119949a112564a52082068858890);
read(11);
check(1006'h180645a168488aa651260a226a124a66080299922a8595404428610808262992a22682905a55625665824505a609882a88422a886296551a6221a29a16aa11141a12280942aa84094946860205964a26669684569054810a914124a086212a5a5821440119015a98844101854a9951141981221169224a1599a11914a504);
read(12);
check(1006'h18a6911a415584242209a6a52629464160400a0a45554552866a9a20a8520a551856814024118140a144a151604449609aa24085a609a2a0851285445a96602a2461212641204a591a66a5604211004882191912920862a9860a861a88a005516611622a44880a48690412292244615156004952521664a84a5961510225);
read(13);
check(1006'h250869062a008a1882940945a20441680111009595094282260a95488aaa4588262641912aa64a29a8526408451940619612014212441090209588888a004002462206a8294a158809258852650a15226a99808952201191614814166198a52a8151454968a288295994286919811691aa21048661a5288402182a558215);
read(14);
check(1006'h016641111896469064656661124a160226a89485469954a6a5406aa28590655a018922965688045984585a61888165085289a61a051258a59459210842108082566966664250991442a2941521806608610a52182256042680a4881900605a8459260a9824295244629865a6a62a18958a66955152404814065588150894);
$display("Good");
$finish;
end
 
initial #100 forever #(`P/2) clk = ~clk;
 
task write;
input [5:0] adr;
input [`WIDTH_D0:0] dat;
integer j;
begin
sel = 1;
w = 0;
addr = adr;
update = 1;
#`P;
update = 0;
ready = 1;
for(j=0;j<`WIDTH_D0+1;j=j+1)
begin
i = dat[j];
#`P;
end
ready = 0;
w = 1; #`P; w = 0;
end
endtask
 
task read;
input [5:0] adr;
integer j;
begin
sel = 1;
w = 0;
addr = adr;
#`P;
update = 1;
#`P;
update = 0;
out = 0;
ready = 1;
for(j=0;j<`WIDTH_D0+1;j=j+1)
begin
out = {o, out[`WIDTH_D0:1]};
#`P;
end
end
endtask
task check;
input [`WIDTH_D0:0] wish;
begin
if (out !== wish)
begin $display("Error!"); $finish; end
end
endtask
endmodule
 
/trunk/group_size_is_697_bits/rtl/rom.v
0,0 → 1,455
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
module rom (clk, addr, out);
input clk;
input [8:0] addr;
output reg [27:0] out;
always @(posedge clk)
case (addr)
0: out <= 28'hc30042;
1: out <= 28'h1450045;
2: out <= 28'h1868041;
3: out <= 28'h1c78041;
4: out <= 28'h30046;
5: out <= 28'h580ea00;
6: out <= 28'h5c08041;
7: out <= 28'h5c5ea17;
8: out <= 28'h605ea07;
9: out <= 28'h658ea07;
10: out <= 28'h3d74059;
11: out <= 28'h3c5404f;
12: out <= 28'h5d8ea05;
13: out <= 28'h617ea00;
14: out <= 28'h587ea16;
15: out <= 28'h4580056;
16: out <= 28'h4850041;
17: out <= 28'h4c7ea00;
18: out <= 28'h4d34057;
19: out <= 28'h5014041;
20: out <= 28'h5474041;
21: out <= 28'hf8041;
22: out <= 28'h5918041;
23: out <= 28'h5d28041;
24: out <= 28'h6138041;
25: out <= 28'h6548041;
26: out <= 28'h6958041;
27: out <= 28'h3c00057;
28: out <= 28'h3cf0059;
29: out <= 28'h4560058;
30: out <= 28'h451005a;
31: out <= 28'h4510051;
32: out <= 28'h4974059;
33: out <= 28'h4da4058;
34: out <= 28'h5190041;
35: out <= 28'h55a005a;
36: out <= 28'h1868081;
37: out <= 28'h1864042;
38: out <= 28'h1c78081;
39: out <= 28'h1c70047;
40: out <= 28'h30046;
41: out <= 28'h5800040;
42: out <= 28'h5c5ea07;
43: out <= 28'h16ea00;
44: out <= 28'h6000056;
45: out <= 28'h6404056;
46: out <= 28'h68f0054;
47: out <= 28'h6da0052;
48: out <= 28'h71a4052;
49: out <= 28'h74f4054;
50: out <= 28'h79d4053;
51: out <= 28'h75d0053;
52: out <= 28'h7d10055;
53: out <= 28'h81f0053;
54: out <= 28'h85f4053;
55: out <= 28'h8970056;
56: out <= 28'h5974056;
57: out <= 28'h8d14055;
58: out <= 28'h9230052;
59: out <= 28'h8e34052;
60: out <= 28'h9580057;
61: out <= 28'h99b0060;
62: out <= 28'h9c00062;
63: out <= 28'ha1e0064;
64: out <= 28'ha590057;
65: out <= 28'ha9c0061;
66: out <= 28'hac00056;
67: out <= 28'hb1d0063;
68: out <= 28'h618ea1b;
69: out <= 28'h6e5ea26;
70: out <= 28'h817ea20;
71: out <= 28'h780ea1e;
72: out <= 28'h967ea28;
73: out <= 28'h8a2ea24;
74: out <= 28'h659ea1c;
75: out <= 28'h729ea2a;
76: out <= 28'h5d7ea21;
77: out <= 28'hea1d;
78: out <= 28'h76bea2c;
79: out <= 28'h596ea23;
80: out <= 28'h8580065;
81: out <= 28'h8e0005d;
82: out <= 28'h9204057;
83: out <= 28'h9994058;
84: out <= 28'h5d70060;
85: out <= 28'h5e24057;
86: out <= 28'h5d70056;
87: out <= 28'h6190058;
88: out <= 28'h618405e;
89: out <= 28'h6184040;
90: out <= 28'h6634061;
91: out <= 28'h659405e;
92: out <= 28'h5990056;
93: out <= 28'h6610063;
94: out <= 28'h659405b;
95: out <= 28'h6590062;
96: out <= 28'h190040;
97: out <= 28'h6640066;
98: out <= 28'h7a44066;
99: out <= 28'h79e005c;
100: out <= 28'h79e405b;
101: out <= 28'h8170058;
102: out <= 28'h5d74058;
103: out <= 28'h5d7005c;
104: out <= 28'h5d7005b;
105: out <= 28'h5d74065;
106: out <= 28'h5d7405d;
107: out <= 28'h3d64052;
108: out <= 28'h4404053;
109: out <= 28'h194052;
110: out <= 28'h4054;
111: out <= 28'h59e4053;
112: out <= 28'h5964055;
113: out <= 28'h520405a;
114: out <= 28'h557405f;
115: out <= 28'h4804041;
116: out <= 28'h4d64041;
117: out <= 28'h24f8041;
118: out <= 28'hf0052;
119: out <= 28'h54;
120: out <= 28'h58fea0f;
121: out <= 28'h5cfea12;
122: out <= 28'h612ea14;
123: out <= 28'h654ea14;
124: out <= 28'hea00;
125: out <= 28'h5d70058;
126: out <= 28'h6164058;
127: out <= 28'h6594057;
128: out <= 28'h57;
129: out <= 28'h4056;
130: out <= 28'h5910053;
131: out <= 28'h5960055;
132: out <= 28'h5d1ea11;
133: out <= 28'h691ea13;
134: out <= 28'h6d3ea15;
135: out <= 28'h715ea15;
136: out <= 28'h596ea16;
137: out <= 28'h69a005b;
138: out <= 28'h6d7405b;
139: out <= 28'h71c405a;
140: out <= 28'h596005a;
141: out <= 28'h5964057;
142: out <= 28'h5cf0052;
143: out <= 28'h68f0054;
144: out <= 28'h7520054;
145: out <= 28'h7910053;
146: out <= 28'h7d10055;
147: out <= 28'h8130055;
148: out <= 28'h84fea11;
149: out <= 28'h892ea13;
150: out <= 28'h8d4ea15;
151: out <= 28'h5d7ea1e;
152: out <= 28'h69aea1f;
153: out <= 28'h75dea20;
154: out <= 28'h7a14062;
155: out <= 28'h7de4063;
156: out <= 28'h7df005d;
157: out <= 28'h5d7405e;
158: out <= 28'h5d7005d;
159: out <= 28'h69a405e;
160: out <= 28'h758405b;
161: out <= 28'h799405c;
162: out <= 28'h8004056;
163: out <= 28'h618005b;
164: out <= 28'h659005c;
165: out <= 28'h56;
166: out <= 28'h5980059;
167: out <= 28'h6d84040;
168: out <= 28'h7194058;
169: out <= 28'h840405c;
170: out <= 28'h898ea18;
171: out <= 28'h8d9ea19;
172: out <= 28'h900ea00;
173: out <= 28'h658ea19;
174: out <= 28'h618ea00;
175: out <= 28'hea16;
176: out <= 28'h5a2ea1b;
177: out <= 28'h6e3ea1c;
178: out <= 28'h724ea21;
179: out <= 28'h596005b;
180: out <= 28'h596005c;
181: out <= 28'h6d60041;
182: out <= 28'h71b8041;
183: out <= 28'h71bea1c;
184: out <= 28'h71c8041;
185: out <= 28'h71bea1c;
186: out <= 28'h85c8041;
187: out <= 28'h6dbea21;
188: out <= 28'h85b80c1;
189: out <= 28'h71cea21;
190: out <= 28'h71c8101;
191: out <= 28'h71bea1c;
192: out <= 28'h85c8101;
193: out <= 28'h6dbea21;
194: out <= 28'h85b83c1;
195: out <= 28'h6dbea21;
196: out <= 28'h85b8781;
197: out <= 28'h6dbea21;
198: out <= 28'h85b8f01;
199: out <= 28'h6dbea21;
200: out <= 28'h85b82c1;
201: out <= 28'h71cea21;
202: out <= 28'h71c9e01;
203: out <= 28'h6dbea1c;
204: out <= 28'h71bbec1;
205: out <= 28'h6dbea1c;
206: out <= 28'h6db8041;
207: out <= 28'h59bea16;
208: out <= 28'h59bea16;
209: out <= 28'h6e34064;
210: out <= 28'h722405b;
211: out <= 28'h1c4040;
212: out <= 28'h6644059;
213: out <= 28'h61b4058;
214: out <= 28'h16ea00;
215: out <= 28'h656ea19;
216: out <= 28'h596ea18;
217: out <= 28'h61d005e;
218: out <= 28'h6dd0060;
219: out <= 28'h71e0060;
220: out <= 28'h8400059;
221: out <= 28'h8800056;
222: out <= 28'h8d90056;
223: out <= 28'h75dea00;
224: out <= 28'h79eea19;
225: out <= 28'h820ea16;
226: out <= 28'h618ea21;
227: out <= 28'h6dbea22;
228: out <= 28'h71cea23;
229: out <= 28'h75d405e;
230: out <= 28'h79d4060;
231: out <= 28'h79e005c;
232: out <= 28'h618405d;
233: out <= 28'h618005c;
234: out <= 28'h6db405d;
235: out <= 28'h71f0057;
236: out <= 28'h75f005a;
237: out <= 28'h817005a;
238: out <= 28'h8400059;
239: out <= 28'h8800056;
240: out <= 28'h8d90056;
241: out <= 28'h1fea00;
242: out <= 28'h5d7ea19;
243: out <= 28'h59aea16;
244: out <= 28'h65cea21;
245: out <= 28'h69dea22;
246: out <= 28'h720ea23;
247: out <= 28'h4057;
248: out <= 28'h5804056;
249: out <= 28'h596005c;
250: out <= 28'h5d94040;
251: out <= 28'h5d7005c;
252: out <= 28'h1a4040;
253: out <= 28'h65e0056;
254: out <= 28'h6980057;
255: out <= 28'h71b4040;
256: out <= 28'h75eea1b;
257: out <= 28'h7d6ea00;
258: out <= 28'h6d8ea1b;
259: out <= 28'h17ea00;
260: out <= 28'h819ea1c;
261: out <= 28'h596ea18;
262: out <= 28'h5deea17;
263: out <= 28'h619ea1a;
264: out <= 28'h65aea1c;
265: out <= 28'h6960057;
266: out <= 28'h61a4058;
267: out <= 28'h69b0040;
268: out <= 28'h69a005a;
269: out <= 28'h405b;
270: out <= 28'h6df405d;
271: out <= 28'h6db0060;
272: out <= 28'h702005d;
273: out <= 28'h71c005f;
274: out <= 28'h71c405a;
275: out <= 28'h5974056;
276: out <= 28'h59b0056;
277: out <= 28'h5d80041;
278: out <= 28'h7590040;
279: out <= 28'h6dd005b;
280: out <= 28'h618005a;
281: out <= 28'h6180058;
282: out <= 28'h190040;
283: out <= 28'h40;
284: out <= 28'h65c8041;
285: out <= 28'h6968041;
286: out <= 28'h7578041;
287: out <= 28'h79b8041;
288: out <= 28'h7d88041;
289: out <= 28'h8008041;
290: out <= 28'h659005d;
291: out <= 28'h659005f;
292: out <= 28'h69a005a;
293: out <= 28'h69a405e;
294: out <= 28'h69a4060;
295: out <= 28'h75d405f;
296: out <= 28'h7a0405e;
297: out <= 28'h8200060;
298: out <= 28'h6598041;
299: out <= 28'h69a8041;
300: out <= 28'h75d8041;
301: out <= 28'h79e8041;
302: out <= 28'h7df8041;
303: out <= 28'h8208041;
304: out <= 28'h659005d;
305: out <= 28'h659005f;
306: out <= 28'h69a005a;
307: out <= 28'h69a405e;
308: out <= 28'h69a4060;
309: out <= 28'h75d405f;
310: out <= 28'h7a0405e;
311: out <= 28'h8200060;
312: out <= 28'h85c0056;
313: out <= 28'h897005b;
314: out <= 28'h8d84040;
315: out <= 28'h91cea18;
316: out <= 28'h956ea00;
317: out <= 28'h617ea18;
318: out <= 28'h1bea00;
319: out <= 28'h9a1ea23;
320: out <= 28'h596ea17;
321: out <= 28'h5dcea1b;
322: out <= 28'h6e1ea22;
323: out <= 28'h722ea23;
324: out <= 28'h8560057;
325: out <= 28'h6e1405b;
326: out <= 28'h8580040;
327: out <= 28'h8610061;
328: out <= 28'h4058;
329: out <= 28'h6254064;
330: out <= 28'h6180066;
331: out <= 28'h8820064;
332: out <= 28'h8a20065;
333: out <= 28'h8a24061;
334: out <= 28'h5974056;
335: out <= 28'h5980056;
336: out <= 28'h5db0041;
337: out <= 28'h8dc0040;
338: out <= 28'h6230058;
339: out <= 28'h6db0061;
340: out <= 28'h6db005b;
341: out <= 28'h1c0040;
342: out <= 28'h40;
343: out <= 28'h69a005a;
344: out <= 28'h71e005e;
345: out <= 28'h7a00060;
346: out <= 28'h819005f;
347: out <= 28'h860005d;
348: out <= 28'h820405d;
349: out <= 28'h8e2005b;
350: out <= 28'h9230057;
351: out <= 28'h8e34057;
352: out <= 28'h659405f;
353: out <= 28'h959405c;
354: out <= 28'h659005c;
355: out <= 28'h8a2405b;
356: out <= 28'h9a24058;
357: out <= 28'h8a20058;
358: out <= 28'h9da005e;
359: out <= 28'ha27005c;
360: out <= 28'h727405c;
361: out <= 28'h9d60040;
362: out <= 28'ha670058;
363: out <= 28'h6274058;
364: out <= 28'h69a405e;
365: out <= 28'h9da005d;
366: out <= 28'h69a405d;
367: out <= 28'h5964040;
368: out <= 28'h7560057;
369: out <= 28'h5964057;
370: out <= 28'h5e10068;
371: out <= 28'haa40069;
372: out <= 28'hae50067;
373: out <= 28'hb26005d;
374: out <= 28'hb60005c;
375: out <= 28'hba30058;
376: out <= 28'hbd9005a;
377: out <= 28'hc220056;
378: out <= 28'hc5f005e;
379: out <= 28'hc9b0040;
380: out <= 28'h861ea24;
381: out <= 28'h5d7ea2a;
382: out <= 28'h928ea29;
383: out <= 28'h965ea26;
384: out <= 28'h9abea2c;
385: out <= 28'h767ea1d;
386: out <= 28'h820ea23;
387: out <= 28'h8edea2e;
388: out <= 28'h61cea18;
389: out <= 28'h659ea22;
390: out <= 28'h72fea30;
391: out <= 28'h59aea16;
392: out <= 28'h69fea1b;
393: out <= 28'h6f1ea32;
394: out <= 28'h1eea00;
395: out <= 28'h7a10066;
396: out <= 28'h79e005a;
397: out <= 28'h7e4005c;
398: out <= 28'h7df0040;
399: out <= 28'h6a0005a;
400: out <= 28'h180040;
401: out <= 28'h40;
402: out <= 28'h623005b;
403: out <= 28'h8000064;
404: out <= 28'h89a4061;
405: out <= 28'h4064;
406: out <= 28'h5d;
407: out <= 28'h56;
408: out <= 28'h69a0061;
409: out <= 28'h69a4065;
410: out <= 28'h69a4059;
411: out <= 28'h25f405e;
412: out <= 28'h2494065;
413: out <= 28'h2490056;
414: out <= 28'h29e005f;
415: out <= 28'h28a4057;
416: out <= 28'h28a005d;
417: out <= 28'h28a0059;
418: out <= 28'h28a405b;
419: out <= 28'h2e00062;
420: out <= 28'h3204062;
421: out <= 28'h30c0058;
422: out <= 28'h30c4057;
423: out <= 28'h340005a;
424: out <= 28'h380405a;
425: out <= 28'h38e0058;
426: out <= 28'h38e0057;
427: out <= 28'h38e4066;
428: out <= 28'h38e405c;
default: out <= 0;
endcase
endmodule
/trunk/group_size_is_697_bits/rtl/ram.v
0,0 → 1,67
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
module ram #(
parameter DATA = 1008,
parameter ADDR = 6
) (
input clk,
 
// Port A
input wire a_wr,
input wire [ADDR-1:0] a_addr,
input wire [DATA-1:0] a_din,
output reg [DATA-1:0] a_dout,
// Port B
input wire b_wr,
input wire [ADDR-1:0] b_addr,
input wire [DATA-1:0] b_din,
output reg [DATA-1:0] b_dout
);
 
// Shared memory
reg [DATA-1:0] mem [(2**ADDR)-1:0];
 
initial begin : init
integer i;
for(i = 0; i < (2**ADDR); i = i + 1)
mem[i] = 0;
end
 
// Port A
always @(posedge clk) begin
a_dout <= mem[a_addr];
if(a_wr) begin
a_dout <= a_din;
mem[a_addr] <= a_din;
end
end
 
// Port B
always @(posedge clk) begin
b_dout <= mem[b_addr];
if(b_wr) begin
b_dout <= b_din;
mem[b_addr] <= b_din;
end
end
 
endmodule
/trunk/group_size_is_697_bits/rtl/tiny.v
0,0 → 1,88
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
module tiny(clk, reset, sel, addr, w, data, out, done);
input clk, reset;
input sel;
input [5:0] addr;
input w;
input [`WIDTH_D0:0] data;
output [`WIDTH_D0:0] out;
output done;
 
/* for FSM */
wire [5:0] fsm_addr;
/* for RAM */
wire [5:0] ram_a_addr, ram_b_addr;
wire [`WIDTH_D0:0] ram_b_data_in;
wire ram_a_w, ram_b_w;
wire [`WIDTH_D0:0] ram_a_data_out, ram_b_data_out;
/* for const */
wire [`WIDTH_D0:0] const0_out, const1_out;
wire const0_effective, const1_effective;
/* for muxer */
wire [`WIDTH_D0:0] muxer0_out, muxer1_out;
/* for ROM */
wire [8:0] rom_addr;
wire [27:0] rom_q;
/* for PE */
wire [10:0] pe_ctrl;
assign out = ram_a_data_out;
select
select0 (sel, addr, fsm_addr, w, ram_a_addr, ram_a_w);
rom
rom0 (clk, rom_addr, rom_q);
FSM
fsm0 (clk, reset, rom_addr, rom_q, fsm_addr, ram_b_addr, ram_b_w, pe_ctrl, done);
const_
const0 (clk, ram_a_addr, const0_out, const0_effective),
const1 (clk, ram_b_addr, const1_out, const1_effective);
ram
ram0 (clk, ram_a_w, ram_a_addr, data, ram_a_data_out, ram_b_w, ram_b_addr[5:0], ram_b_data_in, ram_b_data_out);
muxer
muxer0 (ram_a_data_out, const0_out, const0_effective, muxer0_out),
muxer1 (ram_b_data_out, const1_out, const1_effective, muxer1_out);
PE
pe0 (clk, reset, pe_ctrl, muxer1_out, muxer0_out[`WIDTH:0], muxer0_out[`WIDTH:0], ram_b_data_in[`WIDTH:0]);
assign ram_b_data_in[`WIDTH_D0:`WIDTH+1] = 0;
endmodule
 
module select(sel, addr_in, addr_fsm_in, w_in, addr_out, w_out);
input sel;
input [5:0] addr_in;
input [5:0] addr_fsm_in;
input w_in;
output [5:0] addr_out;
output w_out;
assign addr_out = sel ? addr_in : addr_fsm_in;
assign w_out = sel & w_in;
endmodule
 
module muxer(from_ram, from_const, const_effective, out);
input [`WIDTH_D0:0] from_ram, from_const;
input const_effective;
output [`WIDTH_D0:0] out;
assign out = const_effective ? from_const : from_ram;
endmodule
/trunk/group_size_is_697_bits/rtl/pe.v
0,0 → 1,162
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
/* PE: processing element */
module PE(clk, reset, ctrl, d0, d1, d2, out);
input clk;
input reset;
input [10:0] ctrl;
input [`WIDTH_D0:0] d0;
input [`WIDTH:0] d1, d2;
output [`WIDTH:0] out;
reg [`WIDTH_D0:0] R0;
reg [`WIDTH:0] R1, R2, R3;
wire [1:0] e0, e1, e2; /* part of R0 */
wire [`WIDTH:0] ppg0, ppg1, ppg2, /* output of PPG */
mx0, mx1, mx2, mx3, mx4, mx5, mx6, mx7, /* output of MUX */
ad0, ad1, ad2, /* output of GF(3^m) adder */
cu0, cu1, cu2, cu3, /* output of cubic */
mo0, mo1, mo2, /* output of mod_p */
t0, t1, t2;
wire c0,c1,c2,c3,c4,c5,c6,c7,c8,c9,c10;
assign {c0,c1,c2,c3,c4,c5,c6,c7,c8,c9,c10} = ctrl;
assign mx0 = c0 ? d1 : ad2;
assign mx1 = c2 ? d2 : ad2;
always @ (posedge clk)
if(reset) R1 <= 0;
else if (c1) R1 <= mx0;
always @ (posedge clk)
if(reset) R2 <= 0;
else if (c3) R2 <= mx1;
always @ (posedge clk)
if(reset) R0 <= 0;
else if (c4) R0 <= d0;
else if (c5) R0 <= R0 << 6;
assign {e2,e1,e0} = R0[`WIDTH_D0:(`WIDTH_D0-5)];
PPG
ppg_0 (e0, R1, ppg0),
ppg_1 (e1, R2, ppg1),
ppg_2 (e2, R1, ppg2);
v0 v0_ (ppg0, cu0);
v1 v1_ (ppg1, cu1);
v2 v2_ (ppg2, cu2);
v3 v3_ (R2, cu3);
assign mx2 = c6 ? ppg0 : cu0;
assign mx3 = c6 ? ppg1 : cu1;
assign mx4 = c6 ? mo1 : cu2;
assign mx5 = c7 ? mo2 : R3;
mod_p
mod_p_0 (mx3, mo0),
mod_p_1 (ppg2, t0),
mod_p_2 (t0, mo1),
mod_p_3 (R3, t1),
mod_p_4 (t1, t2),
mod_p_5 (t2, mo2);
assign mx6 = c9 ? mo0 : mx3;
assign mx7 = c6 ? (c8 ? mx5 : 0) : cu3;
f3m_add
f3m_add_0 (mx2, mx6, ad0),
f3m_add_1 (mx4, mx7, ad1),
f3m_add_2 (ad0, ad1, ad2);
always @ (posedge clk)
if (reset) R3 <= 0;
else if (c10) R3 <= ad2;
else R3 <= 0; /* change */
assign out = R3;
endmodule
 
// C = (x*B mod p(x))
module mod_p(B, C);
input [`WIDTH:0] B;
output [`WIDTH:0] C;
wire [`WIDTH+2:0] A;
assign A = {B[`WIDTH:0], 2'd0}; // A == B*x
wire [1:0] w0;
f3_mult m0 (A[1007:1006], 2'd2, w0);
f3_sub s0 (A[1:0], w0, C[1:0]);
assign C[207:2] = A[207:2];
wire [1:0] w104;
f3_mult m104 (A[1007:1006], 2'd1, w104);
f3_sub s104 (A[209:208], w104, C[209:208]);
assign C[1005:210] = A[1005:210];
endmodule
 
// PPG: partial product generator, C == A*d in GF(3^m)
module PPG(d, A, C);
input [1:0] d;
input [`WIDTH:0] A;
output [`WIDTH:0] C;
genvar i;
generate
for (i=0; i < `M; i=i+1)
begin: ppg0
f3_mult f3_mult_0 (d, A[2*i+1:2*i], C[2*i+1:2*i]);
end
endgenerate
endmodule
 
// f3m_add: C = A + B, in field F_{3^M}
module f3m_add(A, B, C);
input [`WIDTH : 0] A, B;
output [`WIDTH : 0] C;
genvar i;
generate
for(i=0; i<`M; i=i+1) begin: aa
f3_add aa(A[(2*i+1) : 2*i], B[(2*i+1) : 2*i], C[(2*i+1) : 2*i]);
end
endgenerate
endmodule
 
// f3_add: C == A+B (mod 3)
module f3_add(A, B, C);
input [1:0] A, B;
output [1:0] C;
wire a0, a1, b0, b1, c0, c1;
assign {a1, a0} = A;
assign {b1, b0} = B;
assign C = {c1, c0};
assign c0 = ( a0 & ~a1 & ~b0 & ~b1) |
(~a0 & ~a1 & b0 & ~b1) |
(~a0 & a1 & ~b0 & b1) ;
assign c1 = (~a0 & a1 & ~b0 & ~b1) |
( a0 & ~a1 & b0 & ~b1) |
(~a0 & ~a1 & ~b0 & b1) ;
endmodule
 
// f3_sub: C == A-B (mod 3)
module f3_sub(A, B, C);
input [1:0] A, B;
output [1:0] C;
f3_add a0(A, {B[0],B[1]}, C);
endmodule
 
// f3_mult: C = A*B (mod 3)
module f3_mult(A, B, C);
input [1:0] A;
input [1:0] B;
output [1:0] C;
wire a0, a1, b0, b1;
assign {a1, a0} = A;
assign {b1, b0} = B;
assign C[0] = (~a1 & a0 & ~b1 & b0) | (a1 & ~a0 & b1 & ~b0);
assign C[1] = (~a1 & a0 & b1 & ~b0) | (a1 & ~a0 & ~b1 & b0);
endmodule
/trunk/group_size_is_697_bits/rtl/cubic.v
0,0 → 1,2050
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
/* v0(a)+v1(a)+v2(a)+v3(a) == a^3 in GF(3^m) */
 
/* c == v0(a) */
module v0(a, c);
input [1005:0] a;
output [1005:0] c;
assign c[1:0] = a[1:0];
assign c[3:2] = a[337:336];
assign c[5:4] = a[673:672];
assign c[7:6] = a[3:2];
assign c[9:8] = a[339:338];
assign c[11:10] = a[675:674];
assign c[13:12] = a[5:4];
assign c[15:14] = a[341:340];
assign c[17:16] = a[677:676];
assign c[19:18] = a[7:6];
assign c[21:20] = {a[608], a[609]};
assign c[23:22] = a[945:944];
assign c[25:24] = a[9:8];
assign c[27:26] = {a[610], a[611]};
assign c[29:28] = a[947:946];
assign c[31:30] = a[11:10];
assign c[33:32] = {a[612], a[613]};
assign c[35:34] = a[949:948];
assign c[37:36] = a[13:12];
assign c[39:38] = a[881:880];
assign c[41:40] = a[951:950];
assign c[43:42] = a[15:14];
assign c[45:44] = a[883:882];
assign c[47:46] = a[953:952];
assign c[49:48] = a[17:16];
assign c[51:50] = a[353:352];
assign c[53:52] = a[689:688];
assign c[55:54] = a[19:18];
assign c[57:56] = a[355:354];
assign c[59:58] = a[691:690];
assign c[61:60] = a[21:20];
assign c[63:62] = a[357:356];
assign c[65:64] = a[693:692];
assign c[67:66] = a[23:22];
assign c[69:68] = {a[624], a[625]};
assign c[71:70] = a[961:960];
assign c[73:72] = a[25:24];
assign c[75:74] = {a[626], a[627]};
assign c[77:76] = a[963:962];
assign c[79:78] = a[27:26];
assign c[81:80] = {a[628], a[629]};
assign c[83:82] = a[965:964];
assign c[85:84] = a[29:28];
assign c[87:86] = a[897:896];
assign c[89:88] = a[967:966];
assign c[91:90] = a[31:30];
assign c[93:92] = a[899:898];
assign c[95:94] = a[969:968];
assign c[97:96] = a[33:32];
assign c[99:98] = a[369:368];
assign c[101:100] = a[705:704];
assign c[103:102] = a[35:34];
assign c[105:104] = a[371:370];
assign c[107:106] = a[707:706];
assign c[109:108] = a[37:36];
assign c[111:110] = a[373:372];
assign c[113:112] = a[709:708];
assign c[115:114] = a[39:38];
assign c[117:116] = {a[640], a[641]};
assign c[119:118] = a[977:976];
assign c[121:120] = a[41:40];
assign c[123:122] = {a[642], a[643]};
assign c[125:124] = a[979:978];
assign c[127:126] = a[43:42];
assign c[129:128] = {a[644], a[645]};
assign c[131:130] = a[981:980];
assign c[133:132] = a[45:44];
assign c[135:134] = a[913:912];
assign c[137:136] = a[983:982];
assign c[139:138] = a[47:46];
assign c[141:140] = a[915:914];
assign c[143:142] = a[985:984];
assign c[145:144] = a[49:48];
assign c[147:146] = a[385:384];
assign c[149:148] = a[721:720];
assign c[151:150] = a[51:50];
assign c[153:152] = a[387:386];
assign c[155:154] = a[723:722];
assign c[157:156] = a[53:52];
assign c[159:158] = a[389:388];
assign c[161:160] = a[725:724];
assign c[163:162] = a[55:54];
assign c[165:164] = {a[656], a[657]};
assign c[167:166] = a[993:992];
assign c[169:168] = a[57:56];
assign c[171:170] = {a[658], a[659]};
assign c[173:172] = a[995:994];
assign c[175:174] = a[59:58];
assign c[177:176] = {a[660], a[661]};
assign c[179:178] = a[997:996];
assign c[181:180] = a[61:60];
assign c[183:182] = a[929:928];
assign c[185:184] = a[999:998];
assign c[187:186] = a[63:62];
assign c[189:188] = a[931:930];
assign c[191:190] = a[1001:1000];
assign c[193:192] = a[65:64];
assign c[195:194] = a[401:400];
assign c[197:196] = a[737:736];
assign c[199:198] = a[67:66];
assign c[201:200] = a[403:402];
assign c[203:202] = a[739:738];
assign c[205:204] = a[69:68];
assign c[207:206] = a[405:404];
assign c[209:208] = a[741:740];
assign c[211:210] = {a[336], a[337]};
assign c[213:212] = a[673:672];
assign c[215:214] = a[743:742];
assign c[217:216] = {a[338], a[339]};
assign c[219:218] = a[675:674];
assign c[221:220] = a[745:744];
assign c[223:222] = {a[340], a[341]};
assign c[225:224] = a[677:676];
assign c[227:226] = a[747:746];
assign c[229:228] = a[609:608];
assign c[231:230] = a[679:678];
assign c[233:232] = a[749:748];
assign c[235:234] = a[611:610];
assign c[237:236] = a[681:680];
assign c[239:238] = a[751:750];
assign c[241:240] = a[81:80];
assign c[243:242] = a[417:416];
assign c[245:244] = a[753:752];
assign c[247:246] = {a[880], a[881]};
assign c[249:248] = a[419:418];
assign c[251:250] = a[755:754];
assign c[253:252] = {a[882], a[883]};
assign c[255:254] = a[421:420];
assign c[257:256] = a[757:756];
assign c[259:258] = {a[352], a[353]};
assign c[261:260] = a[689:688];
assign c[263:262] = a[759:758];
assign c[265:264] = {a[354], a[355]};
assign c[267:266] = a[691:690];
assign c[269:268] = a[761:760];
assign c[271:270] = {a[356], a[357]};
assign c[273:272] = a[693:692];
assign c[275:274] = a[763:762];
assign c[277:276] = a[625:624];
assign c[279:278] = a[695:694];
assign c[281:280] = a[765:764];
assign c[283:282] = a[627:626];
assign c[285:284] = a[697:696];
assign c[287:286] = a[767:766];
assign c[289:288] = a[97:96];
assign c[291:290] = a[433:432];
assign c[293:292] = a[769:768];
assign c[295:294] = {a[896], a[897]};
assign c[297:296] = a[435:434];
assign c[299:298] = a[771:770];
assign c[301:300] = {a[898], a[899]};
assign c[303:302] = a[437:436];
assign c[305:304] = a[773:772];
assign c[307:306] = {a[368], a[369]};
assign c[309:308] = a[705:704];
assign c[311:310] = a[775:774];
assign c[313:312] = {a[370], a[371]};
assign c[315:314] = a[707:706];
assign c[317:316] = a[777:776];
assign c[319:318] = {a[372], a[373]};
assign c[321:320] = a[709:708];
assign c[323:322] = a[779:778];
assign c[325:324] = a[641:640];
assign c[327:326] = a[711:710];
assign c[329:328] = a[781:780];
assign c[331:330] = a[643:642];
assign c[333:332] = a[713:712];
assign c[335:334] = a[783:782];
assign c[337:336] = a[113:112];
assign c[339:338] = a[449:448];
assign c[341:340] = a[785:784];
assign c[343:342] = {a[912], a[913]};
assign c[345:344] = a[451:450];
assign c[347:346] = a[787:786];
assign c[349:348] = {a[914], a[915]};
assign c[351:350] = a[453:452];
assign c[353:352] = a[789:788];
assign c[355:354] = {a[384], a[385]};
assign c[357:356] = a[721:720];
assign c[359:358] = a[791:790];
assign c[361:360] = {a[386], a[387]};
assign c[363:362] = a[723:722];
assign c[365:364] = a[793:792];
assign c[367:366] = {a[388], a[389]};
assign c[369:368] = a[725:724];
assign c[371:370] = a[795:794];
assign c[373:372] = a[657:656];
assign c[375:374] = a[727:726];
assign c[377:376] = a[797:796];
assign c[379:378] = a[659:658];
assign c[381:380] = a[729:728];
assign c[383:382] = a[799:798];
assign c[385:384] = a[129:128];
assign c[387:386] = a[465:464];
assign c[389:388] = a[801:800];
assign c[391:390] = {a[928], a[929]};
assign c[393:392] = a[467:466];
assign c[395:394] = a[803:802];
assign c[397:396] = {a[930], a[931]};
assign c[399:398] = a[469:468];
assign c[401:400] = a[805:804];
assign c[403:402] = {a[400], a[401]};
assign c[405:404] = a[737:736];
assign c[407:406] = a[807:806];
assign c[409:408] = {a[402], a[403]};
assign c[411:410] = a[739:738];
assign c[413:412] = a[809:808];
assign c[415:414] = {a[404], a[405]};
assign c[417:416] = a[741:740];
assign c[419:418] = a[811:810];
assign c[421:420] = a[673:672];
assign c[423:422] = a[743:742];
assign c[425:424] = a[813:812];
assign c[427:426] = a[675:674];
assign c[429:428] = a[745:744];
assign c[431:430] = a[815:814];
assign c[433:432] = a[145:144];
assign c[435:434] = a[481:480];
assign c[437:436] = a[817:816];
assign c[439:438] = {a[944], a[945]};
assign c[441:440] = a[483:482];
assign c[443:442] = a[819:818];
assign c[445:444] = {a[946], a[947]};
assign c[447:446] = a[485:484];
assign c[449:448] = a[821:820];
assign c[451:450] = {a[416], a[417]};
assign c[453:452] = a[753:752];
assign c[455:454] = a[823:822];
assign c[457:456] = {a[418], a[419]};
assign c[459:458] = a[755:754];
assign c[461:460] = a[825:824];
assign c[463:462] = {a[420], a[421]};
assign c[465:464] = a[757:756];
assign c[467:466] = a[827:826];
assign c[469:468] = a[689:688];
assign c[471:470] = a[759:758];
assign c[473:472] = a[829:828];
assign c[475:474] = a[691:690];
assign c[477:476] = a[761:760];
assign c[479:478] = a[831:830];
assign c[481:480] = a[161:160];
assign c[483:482] = a[497:496];
assign c[485:484] = a[833:832];
assign c[487:486] = {a[960], a[961]};
assign c[489:488] = a[499:498];
assign c[491:490] = a[835:834];
assign c[493:492] = {a[962], a[963]};
assign c[495:494] = a[501:500];
assign c[497:496] = a[837:836];
assign c[499:498] = {a[432], a[433]};
assign c[501:500] = a[769:768];
assign c[503:502] = a[839:838];
assign c[505:504] = {a[434], a[435]};
assign c[507:506] = a[771:770];
assign c[509:508] = a[841:840];
assign c[511:510] = {a[436], a[437]};
assign c[513:512] = a[773:772];
assign c[515:514] = a[843:842];
assign c[517:516] = a[705:704];
assign c[519:518] = a[775:774];
assign c[521:520] = a[845:844];
assign c[523:522] = a[707:706];
assign c[525:524] = a[777:776];
assign c[527:526] = a[847:846];
assign c[529:528] = a[177:176];
assign c[531:530] = a[513:512];
assign c[533:532] = a[849:848];
assign c[535:534] = {a[976], a[977]};
assign c[537:536] = a[515:514];
assign c[539:538] = a[851:850];
assign c[541:540] = {a[978], a[979]};
assign c[543:542] = a[517:516];
assign c[545:544] = a[853:852];
assign c[547:546] = {a[448], a[449]};
assign c[549:548] = a[785:784];
assign c[551:550] = a[855:854];
assign c[553:552] = {a[450], a[451]};
assign c[555:554] = a[787:786];
assign c[557:556] = a[857:856];
assign c[559:558] = {a[452], a[453]};
assign c[561:560] = a[789:788];
assign c[563:562] = a[859:858];
assign c[565:564] = a[721:720];
assign c[567:566] = a[791:790];
assign c[569:568] = a[861:860];
assign c[571:570] = a[723:722];
assign c[573:572] = a[793:792];
assign c[575:574] = a[863:862];
assign c[577:576] = a[193:192];
assign c[579:578] = a[529:528];
assign c[581:580] = a[865:864];
assign c[583:582] = {a[992], a[993]};
assign c[585:584] = a[531:530];
assign c[587:586] = a[867:866];
assign c[589:588] = {a[994], a[995]};
assign c[591:590] = a[533:532];
assign c[593:592] = a[869:868];
assign c[595:594] = {a[464], a[465]};
assign c[597:596] = a[801:800];
assign c[599:598] = a[871:870];
assign c[601:600] = {a[466], a[467]};
assign c[603:602] = a[803:802];
assign c[605:604] = a[873:872];
assign c[607:606] = {a[468], a[469]};
assign c[609:608] = a[805:804];
assign c[611:610] = a[875:874];
assign c[613:612] = a[737:736];
assign c[615:614] = a[807:806];
assign c[617:616] = a[877:876];
assign c[619:618] = a[739:738];
assign c[621:620] = a[809:808];
assign c[623:622] = a[879:878];
assign c[625:624] = a[209:208];
assign c[627:626] = a[545:544];
assign c[629:628] = a[881:880];
assign c[631:630] = a[211:210];
assign c[633:632] = a[547:546];
assign c[635:634] = a[883:882];
assign c[637:636] = a[213:212];
assign c[639:638] = a[549:548];
assign c[641:640] = a[885:884];
assign c[643:642] = {a[480], a[481]};
assign c[645:644] = a[817:816];
assign c[647:646] = a[887:886];
assign c[649:648] = {a[482], a[483]};
assign c[651:650] = a[819:818];
assign c[653:652] = a[889:888];
assign c[655:654] = {a[484], a[485]};
assign c[657:656] = a[821:820];
assign c[659:658] = a[891:890];
assign c[661:660] = a[753:752];
assign c[663:662] = a[823:822];
assign c[665:664] = a[893:892];
assign c[667:666] = a[755:754];
assign c[669:668] = a[825:824];
assign c[671:670] = a[895:894];
assign c[673:672] = a[225:224];
assign c[675:674] = a[561:560];
assign c[677:676] = a[897:896];
assign c[679:678] = a[227:226];
assign c[681:680] = a[563:562];
assign c[683:682] = a[899:898];
assign c[685:684] = a[229:228];
assign c[687:686] = a[565:564];
assign c[689:688] = a[901:900];
assign c[691:690] = {a[496], a[497]};
assign c[693:692] = a[833:832];
assign c[695:694] = a[903:902];
assign c[697:696] = {a[498], a[499]};
assign c[699:698] = a[835:834];
assign c[701:700] = a[905:904];
assign c[703:702] = {a[500], a[501]};
assign c[705:704] = a[837:836];
assign c[707:706] = a[907:906];
assign c[709:708] = a[769:768];
assign c[711:710] = a[839:838];
assign c[713:712] = a[909:908];
assign c[715:714] = a[771:770];
assign c[717:716] = a[841:840];
assign c[719:718] = a[911:910];
assign c[721:720] = a[241:240];
assign c[723:722] = a[577:576];
assign c[725:724] = a[913:912];
assign c[727:726] = a[243:242];
assign c[729:728] = a[579:578];
assign c[731:730] = a[915:914];
assign c[733:732] = a[245:244];
assign c[735:734] = a[581:580];
assign c[737:736] = a[917:916];
assign c[739:738] = {a[512], a[513]};
assign c[741:740] = a[849:848];
assign c[743:742] = a[919:918];
assign c[745:744] = {a[514], a[515]};
assign c[747:746] = a[851:850];
assign c[749:748] = a[921:920];
assign c[751:750] = {a[516], a[517]};
assign c[753:752] = a[853:852];
assign c[755:754] = a[923:922];
assign c[757:756] = a[785:784];
assign c[759:758] = a[855:854];
assign c[761:760] = a[925:924];
assign c[763:762] = a[787:786];
assign c[765:764] = a[857:856];
assign c[767:766] = a[927:926];
assign c[769:768] = a[257:256];
assign c[771:770] = a[593:592];
assign c[773:772] = a[929:928];
assign c[775:774] = a[259:258];
assign c[777:776] = a[595:594];
assign c[779:778] = a[931:930];
assign c[781:780] = a[261:260];
assign c[783:782] = a[597:596];
assign c[785:784] = a[933:932];
assign c[787:786] = {a[528], a[529]};
assign c[789:788] = a[865:864];
assign c[791:790] = a[935:934];
assign c[793:792] = {a[530], a[531]};
assign c[795:794] = a[867:866];
assign c[797:796] = a[937:936];
assign c[799:798] = {a[532], a[533]};
assign c[801:800] = a[869:868];
assign c[803:802] = a[939:938];
assign c[805:804] = a[801:800];
assign c[807:806] = a[871:870];
assign c[809:808] = a[941:940];
assign c[811:810] = a[803:802];
assign c[813:812] = a[873:872];
assign c[815:814] = a[943:942];
assign c[817:816] = a[273:272];
assign c[819:818] = a[609:608];
assign c[821:820] = a[945:944];
assign c[823:822] = a[275:274];
assign c[825:824] = a[611:610];
assign c[827:826] = a[947:946];
assign c[829:828] = a[277:276];
assign c[831:830] = a[613:612];
assign c[833:832] = a[949:948];
assign c[835:834] = {a[544], a[545]};
assign c[837:836] = a[881:880];
assign c[839:838] = a[951:950];
assign c[841:840] = {a[546], a[547]};
assign c[843:842] = a[883:882];
assign c[845:844] = a[953:952];
assign c[847:846] = {a[548], a[549]};
assign c[849:848] = a[885:884];
assign c[851:850] = a[955:954];
assign c[853:852] = a[817:816];
assign c[855:854] = a[887:886];
assign c[857:856] = a[957:956];
assign c[859:858] = a[819:818];
assign c[861:860] = a[889:888];
assign c[863:862] = a[959:958];
assign c[865:864] = a[289:288];
assign c[867:866] = a[625:624];
assign c[869:868] = a[961:960];
assign c[871:870] = a[291:290];
assign c[873:872] = a[627:626];
assign c[875:874] = a[963:962];
assign c[877:876] = a[293:292];
assign c[879:878] = a[629:628];
assign c[881:880] = a[965:964];
assign c[883:882] = {a[560], a[561]};
assign c[885:884] = a[897:896];
assign c[887:886] = a[967:966];
assign c[889:888] = {a[562], a[563]};
assign c[891:890] = a[899:898];
assign c[893:892] = a[969:968];
assign c[895:894] = {a[564], a[565]};
assign c[897:896] = a[901:900];
assign c[899:898] = a[971:970];
assign c[901:900] = a[833:832];
assign c[903:902] = a[903:902];
assign c[905:904] = a[973:972];
assign c[907:906] = a[835:834];
assign c[909:908] = a[905:904];
assign c[911:910] = a[975:974];
assign c[913:912] = a[305:304];
assign c[915:914] = a[641:640];
assign c[917:916] = a[977:976];
assign c[919:918] = a[307:306];
assign c[921:920] = a[643:642];
assign c[923:922] = a[979:978];
assign c[925:924] = a[309:308];
assign c[927:926] = a[645:644];
assign c[929:928] = a[981:980];
assign c[931:930] = {a[576], a[577]};
assign c[933:932] = a[913:912];
assign c[935:934] = a[983:982];
assign c[937:936] = {a[578], a[579]};
assign c[939:938] = a[915:914];
assign c[941:940] = a[985:984];
assign c[943:942] = {a[580], a[581]};
assign c[945:944] = a[917:916];
assign c[947:946] = a[987:986];
assign c[949:948] = a[849:848];
assign c[951:950] = a[919:918];
assign c[953:952] = a[989:988];
assign c[955:954] = a[851:850];
assign c[957:956] = a[921:920];
assign c[959:958] = a[991:990];
assign c[961:960] = a[321:320];
assign c[963:962] = a[657:656];
assign c[965:964] = a[993:992];
assign c[967:966] = a[323:322];
assign c[969:968] = a[659:658];
assign c[971:970] = a[995:994];
assign c[973:972] = a[325:324];
assign c[975:974] = a[661:660];
assign c[977:976] = a[997:996];
assign c[979:978] = {a[592], a[593]};
assign c[981:980] = a[929:928];
assign c[983:982] = a[999:998];
assign c[985:984] = {a[594], a[595]};
assign c[987:986] = a[931:930];
assign c[989:988] = a[1001:1000];
assign c[991:990] = {a[596], a[597]};
assign c[993:992] = a[933:932];
assign c[995:994] = a[1003:1002];
assign c[997:996] = a[865:864];
assign c[999:998] = a[935:934];
assign c[1001:1000] = a[1005:1004];
assign c[1003:1002] = a[867:866];
assign c[1005:1004] = a[937:936];
endmodule
/* c == v1(a) */
module v1(a, c);
input [1005:0] a;
output [1005:0] c;
assign c[1:0] = 0;
assign c[3:2] = a[869:868];
assign c[5:4] = a[939:938];
assign c[7:6] = 0;
assign c[9:8] = a[871:870];
assign c[11:10] = a[941:940];
assign c[13:12] = 0;
assign c[15:14] = a[873:872];
assign c[17:16] = a[943:942];
assign c[19:18] = 0;
assign c[21:20] = a[343:342];
assign c[23:22] = a[679:678];
assign c[25:24] = 0;
assign c[27:26] = a[345:344];
assign c[29:28] = a[681:680];
assign c[31:30] = 0;
assign c[33:32] = a[347:346];
assign c[35:34] = a[683:682];
assign c[37:36] = 0;
assign c[39:38] = {a[614], a[615]};
assign c[41:40] = a[685:684];
assign c[43:42] = 0;
assign c[45:44] = {a[616], a[617]};
assign c[47:46] = a[687:686];
assign c[49:48] = 0;
assign c[51:50] = a[885:884];
assign c[53:52] = a[955:954];
assign c[55:54] = 0;
assign c[57:56] = a[887:886];
assign c[59:58] = a[957:956];
assign c[61:60] = 0;
assign c[63:62] = a[889:888];
assign c[65:64] = a[959:958];
assign c[67:66] = 0;
assign c[69:68] = a[359:358];
assign c[71:70] = a[695:694];
assign c[73:72] = 0;
assign c[75:74] = a[361:360];
assign c[77:76] = a[697:696];
assign c[79:78] = 0;
assign c[81:80] = a[363:362];
assign c[83:82] = a[699:698];
assign c[85:84] = 0;
assign c[87:86] = {a[630], a[631]};
assign c[89:88] = a[701:700];
assign c[91:90] = 0;
assign c[93:92] = {a[632], a[633]};
assign c[95:94] = a[703:702];
assign c[97:96] = 0;
assign c[99:98] = a[901:900];
assign c[101:100] = a[971:970];
assign c[103:102] = 0;
assign c[105:104] = a[903:902];
assign c[107:106] = a[973:972];
assign c[109:108] = 0;
assign c[111:110] = a[905:904];
assign c[113:112] = a[975:974];
assign c[115:114] = 0;
assign c[117:116] = a[375:374];
assign c[119:118] = a[711:710];
assign c[121:120] = 0;
assign c[123:122] = a[377:376];
assign c[125:124] = a[713:712];
assign c[127:126] = 0;
assign c[129:128] = a[379:378];
assign c[131:130] = a[715:714];
assign c[133:132] = 0;
assign c[135:134] = {a[646], a[647]};
assign c[137:136] = a[717:716];
assign c[139:138] = 0;
assign c[141:140] = {a[648], a[649]};
assign c[143:142] = a[719:718];
assign c[145:144] = 0;
assign c[147:146] = a[917:916];
assign c[149:148] = a[987:986];
assign c[151:150] = 0;
assign c[153:152] = a[919:918];
assign c[155:154] = a[989:988];
assign c[157:156] = 0;
assign c[159:158] = a[921:920];
assign c[161:160] = a[991:990];
assign c[163:162] = 0;
assign c[165:164] = a[391:390];
assign c[167:166] = a[727:726];
assign c[169:168] = 0;
assign c[171:170] = a[393:392];
assign c[173:172] = a[729:728];
assign c[175:174] = 0;
assign c[177:176] = a[395:394];
assign c[179:178] = a[731:730];
assign c[181:180] = 0;
assign c[183:182] = {a[662], a[663]};
assign c[185:184] = a[733:732];
assign c[187:186] = 0;
assign c[189:188] = {a[664], a[665]};
assign c[191:190] = a[735:734];
assign c[193:192] = 0;
assign c[195:194] = a[933:932];
assign c[197:196] = a[1003:1002];
assign c[199:198] = 0;
assign c[201:200] = a[935:934];
assign c[203:202] = a[1005:1004];
assign c[205:204] = 0;
assign c[207:206] = a[937:936];
assign c[209:208] = 0;
assign c[211:210] = {a[868], a[869]};
assign c[213:212] = a[407:406];
assign c[215:214] = 0;
assign c[217:216] = {a[870], a[871]};
assign c[219:218] = a[409:408];
assign c[221:220] = 0;
assign c[223:222] = {a[872], a[873]};
assign c[225:224] = a[411:410];
assign c[227:226] = 0;
assign c[229:228] = {a[342], a[343]};
assign c[231:230] = a[413:412];
assign c[233:232] = 0;
assign c[235:234] = {a[344], a[345]};
assign c[237:236] = a[415:414];
assign c[239:238] = 0;
assign c[241:240] = a[613:612];
assign c[243:242] = a[683:682];
assign c[245:244] = 0;
assign c[247:246] = a[83:82];
assign c[249:248] = a[685:684];
assign c[251:250] = 0;
assign c[253:252] = a[85:84];
assign c[255:254] = a[687:686];
assign c[257:256] = 0;
assign c[259:258] = {a[884], a[885]};
assign c[261:260] = a[423:422];
assign c[263:262] = 0;
assign c[265:264] = {a[886], a[887]};
assign c[267:266] = a[425:424];
assign c[269:268] = 0;
assign c[271:270] = {a[888], a[889]};
assign c[273:272] = a[427:426];
assign c[275:274] = 0;
assign c[277:276] = {a[358], a[359]};
assign c[279:278] = a[429:428];
assign c[281:280] = 0;
assign c[283:282] = {a[360], a[361]};
assign c[285:284] = a[431:430];
assign c[287:286] = 0;
assign c[289:288] = a[629:628];
assign c[291:290] = a[699:698];
assign c[293:292] = 0;
assign c[295:294] = a[99:98];
assign c[297:296] = a[701:700];
assign c[299:298] = 0;
assign c[301:300] = a[101:100];
assign c[303:302] = a[703:702];
assign c[305:304] = 0;
assign c[307:306] = {a[900], a[901]};
assign c[309:308] = a[439:438];
assign c[311:310] = 0;
assign c[313:312] = {a[902], a[903]};
assign c[315:314] = a[441:440];
assign c[317:316] = 0;
assign c[319:318] = {a[904], a[905]};
assign c[321:320] = a[443:442];
assign c[323:322] = 0;
assign c[325:324] = {a[374], a[375]};
assign c[327:326] = a[445:444];
assign c[329:328] = 0;
assign c[331:330] = {a[376], a[377]};
assign c[333:332] = a[447:446];
assign c[335:334] = 0;
assign c[337:336] = a[645:644];
assign c[339:338] = a[715:714];
assign c[341:340] = 0;
assign c[343:342] = a[115:114];
assign c[345:344] = a[717:716];
assign c[347:346] = 0;
assign c[349:348] = a[117:116];
assign c[351:350] = a[719:718];
assign c[353:352] = 0;
assign c[355:354] = {a[916], a[917]};
assign c[357:356] = a[455:454];
assign c[359:358] = 0;
assign c[361:360] = {a[918], a[919]};
assign c[363:362] = a[457:456];
assign c[365:364] = 0;
assign c[367:366] = {a[920], a[921]};
assign c[369:368] = a[459:458];
assign c[371:370] = 0;
assign c[373:372] = {a[390], a[391]};
assign c[375:374] = a[461:460];
assign c[377:376] = 0;
assign c[379:378] = {a[392], a[393]};
assign c[381:380] = a[463:462];
assign c[383:382] = 0;
assign c[385:384] = a[661:660];
assign c[387:386] = a[731:730];
assign c[389:388] = 0;
assign c[391:390] = a[131:130];
assign c[393:392] = a[733:732];
assign c[395:394] = 0;
assign c[397:396] = a[133:132];
assign c[399:398] = a[735:734];
assign c[401:400] = 0;
assign c[403:402] = {a[932], a[933]};
assign c[405:404] = a[471:470];
assign c[407:406] = 0;
assign c[409:408] = {a[934], a[935]};
assign c[411:410] = a[473:472];
assign c[413:412] = 0;
assign c[415:414] = {a[936], a[937]};
assign c[417:416] = a[475:474];
assign c[419:418] = 0;
assign c[421:420] = {a[406], a[407]};
assign c[423:422] = a[477:476];
assign c[425:424] = 0;
assign c[427:426] = {a[408], a[409]};
assign c[429:428] = a[479:478];
assign c[431:430] = 0;
assign c[433:432] = a[677:676];
assign c[435:434] = a[747:746];
assign c[437:436] = 0;
assign c[439:438] = a[147:146];
assign c[441:440] = a[749:748];
assign c[443:442] = 0;
assign c[445:444] = a[149:148];
assign c[447:446] = a[751:750];
assign c[449:448] = 0;
assign c[451:450] = {a[948], a[949]};
assign c[453:452] = a[487:486];
assign c[455:454] = 0;
assign c[457:456] = {a[950], a[951]};
assign c[459:458] = a[489:488];
assign c[461:460] = 0;
assign c[463:462] = {a[952], a[953]};
assign c[465:464] = a[491:490];
assign c[467:466] = 0;
assign c[469:468] = {a[422], a[423]};
assign c[471:470] = a[493:492];
assign c[473:472] = 0;
assign c[475:474] = {a[424], a[425]};
assign c[477:476] = a[495:494];
assign c[479:478] = 0;
assign c[481:480] = a[693:692];
assign c[483:482] = a[763:762];
assign c[485:484] = 0;
assign c[487:486] = a[163:162];
assign c[489:488] = a[765:764];
assign c[491:490] = 0;
assign c[493:492] = a[165:164];
assign c[495:494] = a[767:766];
assign c[497:496] = 0;
assign c[499:498] = {a[964], a[965]};
assign c[501:500] = a[503:502];
assign c[503:502] = 0;
assign c[505:504] = {a[966], a[967]};
assign c[507:506] = a[505:504];
assign c[509:508] = 0;
assign c[511:510] = {a[968], a[969]};
assign c[513:512] = a[507:506];
assign c[515:514] = 0;
assign c[517:516] = {a[438], a[439]};
assign c[519:518] = a[509:508];
assign c[521:520] = 0;
assign c[523:522] = {a[440], a[441]};
assign c[525:524] = a[511:510];
assign c[527:526] = 0;
assign c[529:528] = a[709:708];
assign c[531:530] = a[779:778];
assign c[533:532] = 0;
assign c[535:534] = a[179:178];
assign c[537:536] = a[781:780];
assign c[539:538] = 0;
assign c[541:540] = a[181:180];
assign c[543:542] = a[783:782];
assign c[545:544] = 0;
assign c[547:546] = {a[980], a[981]};
assign c[549:548] = a[519:518];
assign c[551:550] = 0;
assign c[553:552] = {a[982], a[983]};
assign c[555:554] = a[521:520];
assign c[557:556] = 0;
assign c[559:558] = {a[984], a[985]};
assign c[561:560] = a[523:522];
assign c[563:562] = 0;
assign c[565:564] = {a[454], a[455]};
assign c[567:566] = a[525:524];
assign c[569:568] = 0;
assign c[571:570] = {a[456], a[457]};
assign c[573:572] = a[527:526];
assign c[575:574] = 0;
assign c[577:576] = a[725:724];
assign c[579:578] = a[795:794];
assign c[581:580] = 0;
assign c[583:582] = a[195:194];
assign c[585:584] = a[797:796];
assign c[587:586] = 0;
assign c[589:588] = a[197:196];
assign c[591:590] = a[799:798];
assign c[593:592] = 0;
assign c[595:594] = {a[996], a[997]};
assign c[597:596] = a[535:534];
assign c[599:598] = 0;
assign c[601:600] = {a[998], a[999]};
assign c[603:602] = a[537:536];
assign c[605:604] = 0;
assign c[607:606] = {a[1000], a[1001]};
assign c[609:608] = a[539:538];
assign c[611:610] = 0;
assign c[613:612] = {a[470], a[471]};
assign c[615:614] = a[541:540];
assign c[617:616] = 0;
assign c[619:618] = {a[472], a[473]};
assign c[621:620] = a[543:542];
assign c[623:622] = 0;
assign c[625:624] = a[741:740];
assign c[627:626] = a[811:810];
assign c[629:628] = 0;
assign c[631:630] = a[743:742];
assign c[633:632] = a[813:812];
assign c[635:634] = 0;
assign c[637:636] = a[745:744];
assign c[639:638] = a[815:814];
assign c[641:640] = 0;
assign c[643:642] = a[215:214];
assign c[645:644] = a[551:550];
assign c[647:646] = 0;
assign c[649:648] = a[217:216];
assign c[651:650] = a[553:552];
assign c[653:652] = 0;
assign c[655:654] = a[219:218];
assign c[657:656] = a[555:554];
assign c[659:658] = 0;
assign c[661:660] = {a[486], a[487]};
assign c[663:662] = a[557:556];
assign c[665:664] = 0;
assign c[667:666] = {a[488], a[489]};
assign c[669:668] = a[559:558];
assign c[671:670] = 0;
assign c[673:672] = a[757:756];
assign c[675:674] = a[827:826];
assign c[677:676] = 0;
assign c[679:678] = a[759:758];
assign c[681:680] = a[829:828];
assign c[683:682] = 0;
assign c[685:684] = a[761:760];
assign c[687:686] = a[831:830];
assign c[689:688] = 0;
assign c[691:690] = a[231:230];
assign c[693:692] = a[567:566];
assign c[695:694] = 0;
assign c[697:696] = a[233:232];
assign c[699:698] = a[569:568];
assign c[701:700] = 0;
assign c[703:702] = a[235:234];
assign c[705:704] = a[571:570];
assign c[707:706] = 0;
assign c[709:708] = {a[502], a[503]};
assign c[711:710] = a[573:572];
assign c[713:712] = 0;
assign c[715:714] = {a[504], a[505]};
assign c[717:716] = a[575:574];
assign c[719:718] = 0;
assign c[721:720] = a[773:772];
assign c[723:722] = a[843:842];
assign c[725:724] = 0;
assign c[727:726] = a[775:774];
assign c[729:728] = a[845:844];
assign c[731:730] = 0;
assign c[733:732] = a[777:776];
assign c[735:734] = a[847:846];
assign c[737:736] = 0;
assign c[739:738] = a[247:246];
assign c[741:740] = a[583:582];
assign c[743:742] = 0;
assign c[745:744] = a[249:248];
assign c[747:746] = a[585:584];
assign c[749:748] = 0;
assign c[751:750] = a[251:250];
assign c[753:752] = a[587:586];
assign c[755:754] = 0;
assign c[757:756] = {a[518], a[519]};
assign c[759:758] = a[589:588];
assign c[761:760] = 0;
assign c[763:762] = {a[520], a[521]};
assign c[765:764] = a[591:590];
assign c[767:766] = 0;
assign c[769:768] = a[789:788];
assign c[771:770] = a[859:858];
assign c[773:772] = 0;
assign c[775:774] = a[791:790];
assign c[777:776] = a[861:860];
assign c[779:778] = 0;
assign c[781:780] = a[793:792];
assign c[783:782] = a[863:862];
assign c[785:784] = 0;
assign c[787:786] = a[263:262];
assign c[789:788] = a[599:598];
assign c[791:790] = 0;
assign c[793:792] = a[265:264];
assign c[795:794] = a[601:600];
assign c[797:796] = 0;
assign c[799:798] = a[267:266];
assign c[801:800] = a[603:602];
assign c[803:802] = 0;
assign c[805:804] = {a[534], a[535]};
assign c[807:806] = a[605:604];
assign c[809:808] = 0;
assign c[811:810] = {a[536], a[537]};
assign c[813:812] = a[607:606];
assign c[815:814] = 0;
assign c[817:816] = a[805:804];
assign c[819:818] = a[875:874];
assign c[821:820] = 0;
assign c[823:822] = a[807:806];
assign c[825:824] = a[877:876];
assign c[827:826] = 0;
assign c[829:828] = a[809:808];
assign c[831:830] = a[879:878];
assign c[833:832] = 0;
assign c[835:834] = a[279:278];
assign c[837:836] = a[615:614];
assign c[839:838] = 0;
assign c[841:840] = a[281:280];
assign c[843:842] = a[617:616];
assign c[845:844] = 0;
assign c[847:846] = a[283:282];
assign c[849:848] = a[619:618];
assign c[851:850] = 0;
assign c[853:852] = {a[550], a[551]};
assign c[855:854] = a[621:620];
assign c[857:856] = 0;
assign c[859:858] = {a[552], a[553]};
assign c[861:860] = a[623:622];
assign c[863:862] = 0;
assign c[865:864] = a[821:820];
assign c[867:866] = a[891:890];
assign c[869:868] = 0;
assign c[871:870] = a[823:822];
assign c[873:872] = a[893:892];
assign c[875:874] = 0;
assign c[877:876] = a[825:824];
assign c[879:878] = a[895:894];
assign c[881:880] = 0;
assign c[883:882] = a[295:294];
assign c[885:884] = a[631:630];
assign c[887:886] = 0;
assign c[889:888] = a[297:296];
assign c[891:890] = a[633:632];
assign c[893:892] = 0;
assign c[895:894] = a[299:298];
assign c[897:896] = a[635:634];
assign c[899:898] = 0;
assign c[901:900] = {a[566], a[567]};
assign c[903:902] = a[637:636];
assign c[905:904] = 0;
assign c[907:906] = {a[568], a[569]};
assign c[909:908] = a[639:638];
assign c[911:910] = 0;
assign c[913:912] = a[837:836];
assign c[915:914] = a[907:906];
assign c[917:916] = 0;
assign c[919:918] = a[839:838];
assign c[921:920] = a[909:908];
assign c[923:922] = 0;
assign c[925:924] = a[841:840];
assign c[927:926] = a[911:910];
assign c[929:928] = 0;
assign c[931:930] = a[311:310];
assign c[933:932] = a[647:646];
assign c[935:934] = 0;
assign c[937:936] = a[313:312];
assign c[939:938] = a[649:648];
assign c[941:940] = 0;
assign c[943:942] = a[315:314];
assign c[945:944] = a[651:650];
assign c[947:946] = 0;
assign c[949:948] = {a[582], a[583]};
assign c[951:950] = a[653:652];
assign c[953:952] = 0;
assign c[955:954] = {a[584], a[585]};
assign c[957:956] = a[655:654];
assign c[959:958] = 0;
assign c[961:960] = a[853:852];
assign c[963:962] = a[923:922];
assign c[965:964] = 0;
assign c[967:966] = a[855:854];
assign c[969:968] = a[925:924];
assign c[971:970] = 0;
assign c[973:972] = a[857:856];
assign c[975:974] = a[927:926];
assign c[977:976] = 0;
assign c[979:978] = a[327:326];
assign c[981:980] = a[663:662];
assign c[983:982] = 0;
assign c[985:984] = a[329:328];
assign c[987:986] = a[665:664];
assign c[989:988] = 0;
assign c[991:990] = a[331:330];
assign c[993:992] = a[667:666];
assign c[995:994] = 0;
assign c[997:996] = {a[598], a[599]};
assign c[999:998] = a[669:668];
assign c[1001:1000] = 0;
assign c[1003:1002] = {a[600], a[601]};
assign c[1005:1004] = a[671:670];
endmodule
/* c == v2(a) */
module v2(a, c);
input [1005:0] a;
output [1005:0] c;
assign c[1:0] = 0;
assign c[3:2] = {a[602], a[603]};
assign c[5:4] = 0;
assign c[7:6] = 0;
assign c[9:8] = {a[604], a[605]};
assign c[11:10] = 0;
assign c[13:12] = 0;
assign c[15:14] = {a[606], a[607]};
assign c[17:16] = 0;
assign c[19:18] = 0;
assign c[21:20] = a[875:874];
assign c[23:22] = 0;
assign c[25:24] = 0;
assign c[27:26] = a[877:876];
assign c[29:28] = 0;
assign c[31:30] = 0;
assign c[33:32] = a[879:878];
assign c[35:34] = 0;
assign c[37:36] = 0;
assign c[39:38] = a[349:348];
assign c[41:40] = 0;
assign c[43:42] = 0;
assign c[45:44] = a[351:350];
assign c[47:46] = 0;
assign c[49:48] = 0;
assign c[51:50] = {a[618], a[619]};
assign c[53:52] = 0;
assign c[55:54] = 0;
assign c[57:56] = {a[620], a[621]};
assign c[59:58] = 0;
assign c[61:60] = 0;
assign c[63:62] = {a[622], a[623]};
assign c[65:64] = 0;
assign c[67:66] = 0;
assign c[69:68] = a[891:890];
assign c[71:70] = 0;
assign c[73:72] = 0;
assign c[75:74] = a[893:892];
assign c[77:76] = 0;
assign c[79:78] = 0;
assign c[81:80] = a[895:894];
assign c[83:82] = 0;
assign c[85:84] = 0;
assign c[87:86] = a[365:364];
assign c[89:88] = 0;
assign c[91:90] = 0;
assign c[93:92] = a[367:366];
assign c[95:94] = 0;
assign c[97:96] = 0;
assign c[99:98] = {a[634], a[635]};
assign c[101:100] = 0;
assign c[103:102] = 0;
assign c[105:104] = {a[636], a[637]};
assign c[107:106] = 0;
assign c[109:108] = 0;
assign c[111:110] = {a[638], a[639]};
assign c[113:112] = 0;
assign c[115:114] = 0;
assign c[117:116] = a[907:906];
assign c[119:118] = 0;
assign c[121:120] = 0;
assign c[123:122] = a[909:908];
assign c[125:124] = 0;
assign c[127:126] = 0;
assign c[129:128] = a[911:910];
assign c[131:130] = 0;
assign c[133:132] = 0;
assign c[135:134] = a[381:380];
assign c[137:136] = 0;
assign c[139:138] = 0;
assign c[141:140] = a[383:382];
assign c[143:142] = 0;
assign c[145:144] = 0;
assign c[147:146] = {a[650], a[651]};
assign c[149:148] = 0;
assign c[151:150] = 0;
assign c[153:152] = {a[652], a[653]};
assign c[155:154] = 0;
assign c[157:156] = 0;
assign c[159:158] = {a[654], a[655]};
assign c[161:160] = 0;
assign c[163:162] = 0;
assign c[165:164] = a[923:922];
assign c[167:166] = 0;
assign c[169:168] = 0;
assign c[171:170] = a[925:924];
assign c[173:172] = 0;
assign c[175:174] = 0;
assign c[177:176] = a[927:926];
assign c[179:178] = 0;
assign c[181:180] = 0;
assign c[183:182] = a[397:396];
assign c[185:184] = 0;
assign c[187:186] = 0;
assign c[189:188] = a[399:398];
assign c[191:190] = 0;
assign c[193:192] = 0;
assign c[195:194] = {a[666], a[667]};
assign c[197:196] = 0;
assign c[199:198] = 0;
assign c[201:200] = {a[668], a[669]};
assign c[203:202] = 0;
assign c[205:204] = 0;
assign c[207:206] = {a[670], a[671]};
assign c[209:208] = 0;
assign c[211:210] = a[71:70];
assign c[213:212] = 0;
assign c[215:214] = 0;
assign c[217:216] = a[73:72];
assign c[219:218] = 0;
assign c[221:220] = 0;
assign c[223:222] = a[75:74];
assign c[225:224] = 0;
assign c[227:226] = 0;
assign c[229:228] = {a[874], a[875]};
assign c[231:230] = 0;
assign c[233:232] = 0;
assign c[235:234] = {a[876], a[877]};
assign c[237:236] = 0;
assign c[239:238] = 0;
assign c[241:240] = {a[346], a[347]};
assign c[243:242] = 0;
assign c[245:244] = 0;
assign c[247:246] = a[615:614];
assign c[249:248] = 0;
assign c[251:250] = 0;
assign c[253:252] = a[617:616];
assign c[255:254] = 0;
assign c[257:256] = 0;
assign c[259:258] = a[87:86];
assign c[261:260] = 0;
assign c[263:262] = 0;
assign c[265:264] = a[89:88];
assign c[267:266] = 0;
assign c[269:268] = 0;
assign c[271:270] = a[91:90];
assign c[273:272] = 0;
assign c[275:274] = 0;
assign c[277:276] = {a[890], a[891]};
assign c[279:278] = 0;
assign c[281:280] = 0;
assign c[283:282] = {a[892], a[893]};
assign c[285:284] = 0;
assign c[287:286] = 0;
assign c[289:288] = {a[362], a[363]};
assign c[291:290] = 0;
assign c[293:292] = 0;
assign c[295:294] = a[631:630];
assign c[297:296] = 0;
assign c[299:298] = 0;
assign c[301:300] = a[633:632];
assign c[303:302] = 0;
assign c[305:304] = 0;
assign c[307:306] = a[103:102];
assign c[309:308] = 0;
assign c[311:310] = 0;
assign c[313:312] = a[105:104];
assign c[315:314] = 0;
assign c[317:316] = 0;
assign c[319:318] = a[107:106];
assign c[321:320] = 0;
assign c[323:322] = 0;
assign c[325:324] = {a[906], a[907]};
assign c[327:326] = 0;
assign c[329:328] = 0;
assign c[331:330] = {a[908], a[909]};
assign c[333:332] = 0;
assign c[335:334] = 0;
assign c[337:336] = {a[378], a[379]};
assign c[339:338] = 0;
assign c[341:340] = 0;
assign c[343:342] = a[647:646];
assign c[345:344] = 0;
assign c[347:346] = 0;
assign c[349:348] = a[649:648];
assign c[351:350] = 0;
assign c[353:352] = 0;
assign c[355:354] = a[119:118];
assign c[357:356] = 0;
assign c[359:358] = 0;
assign c[361:360] = a[121:120];
assign c[363:362] = 0;
assign c[365:364] = 0;
assign c[367:366] = a[123:122];
assign c[369:368] = 0;
assign c[371:370] = 0;
assign c[373:372] = {a[922], a[923]};
assign c[375:374] = 0;
assign c[377:376] = 0;
assign c[379:378] = {a[924], a[925]};
assign c[381:380] = 0;
assign c[383:382] = 0;
assign c[385:384] = {a[394], a[395]};
assign c[387:386] = 0;
assign c[389:388] = 0;
assign c[391:390] = a[663:662];
assign c[393:392] = 0;
assign c[395:394] = 0;
assign c[397:396] = a[665:664];
assign c[399:398] = 0;
assign c[401:400] = 0;
assign c[403:402] = a[135:134];
assign c[405:404] = 0;
assign c[407:406] = 0;
assign c[409:408] = a[137:136];
assign c[411:410] = 0;
assign c[413:412] = 0;
assign c[415:414] = a[139:138];
assign c[417:416] = 0;
assign c[419:418] = 0;
assign c[421:420] = {a[938], a[939]};
assign c[423:422] = 0;
assign c[425:424] = 0;
assign c[427:426] = {a[940], a[941]};
assign c[429:428] = 0;
assign c[431:430] = 0;
assign c[433:432] = {a[410], a[411]};
assign c[435:434] = 0;
assign c[437:436] = 0;
assign c[439:438] = a[679:678];
assign c[441:440] = 0;
assign c[443:442] = 0;
assign c[445:444] = a[681:680];
assign c[447:446] = 0;
assign c[449:448] = 0;
assign c[451:450] = a[151:150];
assign c[453:452] = 0;
assign c[455:454] = 0;
assign c[457:456] = a[153:152];
assign c[459:458] = 0;
assign c[461:460] = 0;
assign c[463:462] = a[155:154];
assign c[465:464] = 0;
assign c[467:466] = 0;
assign c[469:468] = {a[954], a[955]};
assign c[471:470] = 0;
assign c[473:472] = 0;
assign c[475:474] = {a[956], a[957]};
assign c[477:476] = 0;
assign c[479:478] = 0;
assign c[481:480] = {a[426], a[427]};
assign c[483:482] = 0;
assign c[485:484] = 0;
assign c[487:486] = a[695:694];
assign c[489:488] = 0;
assign c[491:490] = 0;
assign c[493:492] = a[697:696];
assign c[495:494] = 0;
assign c[497:496] = 0;
assign c[499:498] = a[167:166];
assign c[501:500] = 0;
assign c[503:502] = 0;
assign c[505:504] = a[169:168];
assign c[507:506] = 0;
assign c[509:508] = 0;
assign c[511:510] = a[171:170];
assign c[513:512] = 0;
assign c[515:514] = 0;
assign c[517:516] = {a[970], a[971]};
assign c[519:518] = 0;
assign c[521:520] = 0;
assign c[523:522] = {a[972], a[973]};
assign c[525:524] = 0;
assign c[527:526] = 0;
assign c[529:528] = {a[442], a[443]};
assign c[531:530] = 0;
assign c[533:532] = 0;
assign c[535:534] = a[711:710];
assign c[537:536] = 0;
assign c[539:538] = 0;
assign c[541:540] = a[713:712];
assign c[543:542] = 0;
assign c[545:544] = 0;
assign c[547:546] = a[183:182];
assign c[549:548] = 0;
assign c[551:550] = 0;
assign c[553:552] = a[185:184];
assign c[555:554] = 0;
assign c[557:556] = 0;
assign c[559:558] = a[187:186];
assign c[561:560] = 0;
assign c[563:562] = 0;
assign c[565:564] = {a[986], a[987]};
assign c[567:566] = 0;
assign c[569:568] = 0;
assign c[571:570] = {a[988], a[989]};
assign c[573:572] = 0;
assign c[575:574] = 0;
assign c[577:576] = {a[458], a[459]};
assign c[579:578] = 0;
assign c[581:580] = 0;
assign c[583:582] = a[727:726];
assign c[585:584] = 0;
assign c[587:586] = 0;
assign c[589:588] = a[729:728];
assign c[591:590] = 0;
assign c[593:592] = 0;
assign c[595:594] = a[199:198];
assign c[597:596] = 0;
assign c[599:598] = 0;
assign c[601:600] = a[201:200];
assign c[603:602] = 0;
assign c[605:604] = 0;
assign c[607:606] = a[203:202];
assign c[609:608] = 0;
assign c[611:610] = 0;
assign c[613:612] = {a[1002], a[1003]};
assign c[615:614] = 0;
assign c[617:616] = 0;
assign c[619:618] = {a[1004], a[1005]};
assign c[621:620] = 0;
assign c[623:622] = 0;
assign c[625:624] = {a[474], a[475]};
assign c[627:626] = 0;
assign c[629:628] = 0;
assign c[631:630] = {a[476], a[477]};
assign c[633:632] = 0;
assign c[635:634] = 0;
assign c[637:636] = {a[478], a[479]};
assign c[639:638] = 0;
assign c[641:640] = 0;
assign c[643:642] = a[747:746];
assign c[645:644] = 0;
assign c[647:646] = 0;
assign c[649:648] = a[749:748];
assign c[651:650] = 0;
assign c[653:652] = 0;
assign c[655:654] = a[751:750];
assign c[657:656] = 0;
assign c[659:658] = 0;
assign c[661:660] = a[221:220];
assign c[663:662] = 0;
assign c[665:664] = 0;
assign c[667:666] = a[223:222];
assign c[669:668] = 0;
assign c[671:670] = 0;
assign c[673:672] = {a[490], a[491]};
assign c[675:674] = 0;
assign c[677:676] = 0;
assign c[679:678] = {a[492], a[493]};
assign c[681:680] = 0;
assign c[683:682] = 0;
assign c[685:684] = {a[494], a[495]};
assign c[687:686] = 0;
assign c[689:688] = 0;
assign c[691:690] = a[763:762];
assign c[693:692] = 0;
assign c[695:694] = 0;
assign c[697:696] = a[765:764];
assign c[699:698] = 0;
assign c[701:700] = 0;
assign c[703:702] = a[767:766];
assign c[705:704] = 0;
assign c[707:706] = 0;
assign c[709:708] = a[237:236];
assign c[711:710] = 0;
assign c[713:712] = 0;
assign c[715:714] = a[239:238];
assign c[717:716] = 0;
assign c[719:718] = 0;
assign c[721:720] = {a[506], a[507]};
assign c[723:722] = 0;
assign c[725:724] = 0;
assign c[727:726] = {a[508], a[509]};
assign c[729:728] = 0;
assign c[731:730] = 0;
assign c[733:732] = {a[510], a[511]};
assign c[735:734] = 0;
assign c[737:736] = 0;
assign c[739:738] = a[779:778];
assign c[741:740] = 0;
assign c[743:742] = 0;
assign c[745:744] = a[781:780];
assign c[747:746] = 0;
assign c[749:748] = 0;
assign c[751:750] = a[783:782];
assign c[753:752] = 0;
assign c[755:754] = 0;
assign c[757:756] = a[253:252];
assign c[759:758] = 0;
assign c[761:760] = 0;
assign c[763:762] = a[255:254];
assign c[765:764] = 0;
assign c[767:766] = 0;
assign c[769:768] = {a[522], a[523]};
assign c[771:770] = 0;
assign c[773:772] = 0;
assign c[775:774] = {a[524], a[525]};
assign c[777:776] = 0;
assign c[779:778] = 0;
assign c[781:780] = {a[526], a[527]};
assign c[783:782] = 0;
assign c[785:784] = 0;
assign c[787:786] = a[795:794];
assign c[789:788] = 0;
assign c[791:790] = 0;
assign c[793:792] = a[797:796];
assign c[795:794] = 0;
assign c[797:796] = 0;
assign c[799:798] = a[799:798];
assign c[801:800] = 0;
assign c[803:802] = 0;
assign c[805:804] = a[269:268];
assign c[807:806] = 0;
assign c[809:808] = 0;
assign c[811:810] = a[271:270];
assign c[813:812] = 0;
assign c[815:814] = 0;
assign c[817:816] = {a[538], a[539]};
assign c[819:818] = 0;
assign c[821:820] = 0;
assign c[823:822] = {a[540], a[541]};
assign c[825:824] = 0;
assign c[827:826] = 0;
assign c[829:828] = {a[542], a[543]};
assign c[831:830] = 0;
assign c[833:832] = 0;
assign c[835:834] = a[811:810];
assign c[837:836] = 0;
assign c[839:838] = 0;
assign c[841:840] = a[813:812];
assign c[843:842] = 0;
assign c[845:844] = 0;
assign c[847:846] = a[815:814];
assign c[849:848] = 0;
assign c[851:850] = 0;
assign c[853:852] = a[285:284];
assign c[855:854] = 0;
assign c[857:856] = 0;
assign c[859:858] = a[287:286];
assign c[861:860] = 0;
assign c[863:862] = 0;
assign c[865:864] = {a[554], a[555]};
assign c[867:866] = 0;
assign c[869:868] = 0;
assign c[871:870] = {a[556], a[557]};
assign c[873:872] = 0;
assign c[875:874] = 0;
assign c[877:876] = {a[558], a[559]};
assign c[879:878] = 0;
assign c[881:880] = 0;
assign c[883:882] = a[827:826];
assign c[885:884] = 0;
assign c[887:886] = 0;
assign c[889:888] = a[829:828];
assign c[891:890] = 0;
assign c[893:892] = 0;
assign c[895:894] = a[831:830];
assign c[897:896] = 0;
assign c[899:898] = 0;
assign c[901:900] = a[301:300];
assign c[903:902] = 0;
assign c[905:904] = 0;
assign c[907:906] = a[303:302];
assign c[909:908] = 0;
assign c[911:910] = 0;
assign c[913:912] = {a[570], a[571]};
assign c[915:914] = 0;
assign c[917:916] = 0;
assign c[919:918] = {a[572], a[573]};
assign c[921:920] = 0;
assign c[923:922] = 0;
assign c[925:924] = {a[574], a[575]};
assign c[927:926] = 0;
assign c[929:928] = 0;
assign c[931:930] = a[843:842];
assign c[933:932] = 0;
assign c[935:934] = 0;
assign c[937:936] = a[845:844];
assign c[939:938] = 0;
assign c[941:940] = 0;
assign c[943:942] = a[847:846];
assign c[945:944] = 0;
assign c[947:946] = 0;
assign c[949:948] = a[317:316];
assign c[951:950] = 0;
assign c[953:952] = 0;
assign c[955:954] = a[319:318];
assign c[957:956] = 0;
assign c[959:958] = 0;
assign c[961:960] = {a[586], a[587]};
assign c[963:962] = 0;
assign c[965:964] = 0;
assign c[967:966] = {a[588], a[589]};
assign c[969:968] = 0;
assign c[971:970] = 0;
assign c[973:972] = {a[590], a[591]};
assign c[975:974] = 0;
assign c[977:976] = 0;
assign c[979:978] = a[859:858];
assign c[981:980] = 0;
assign c[983:982] = 0;
assign c[985:984] = a[861:860];
assign c[987:986] = 0;
assign c[989:988] = 0;
assign c[991:990] = a[863:862];
assign c[993:992] = 0;
assign c[995:994] = 0;
assign c[997:996] = a[333:332];
assign c[999:998] = 0;
assign c[1001:1000] = 0;
assign c[1003:1002] = a[335:334];
assign c[1005:1004] = 0;
endmodule
/* c == v3(a) */
module v3(a, c);
input [1005:0] a;
output [1005:0] c;
assign c[1:0] = 0;
assign c[3:2] = 0;
assign c[5:4] = 0;
assign c[7:6] = 0;
assign c[9:8] = 0;
assign c[11:10] = 0;
assign c[13:12] = 0;
assign c[15:14] = 0;
assign c[17:16] = 0;
assign c[19:18] = 0;
assign c[21:20] = 0;
assign c[23:22] = 0;
assign c[25:24] = 0;
assign c[27:26] = 0;
assign c[29:28] = 0;
assign c[31:30] = 0;
assign c[33:32] = 0;
assign c[35:34] = 0;
assign c[37:36] = 0;
assign c[39:38] = 0;
assign c[41:40] = 0;
assign c[43:42] = 0;
assign c[45:44] = 0;
assign c[47:46] = 0;
assign c[49:48] = 0;
assign c[51:50] = 0;
assign c[53:52] = 0;
assign c[55:54] = 0;
assign c[57:56] = 0;
assign c[59:58] = 0;
assign c[61:60] = 0;
assign c[63:62] = 0;
assign c[65:64] = 0;
assign c[67:66] = 0;
assign c[69:68] = 0;
assign c[71:70] = 0;
assign c[73:72] = 0;
assign c[75:74] = 0;
assign c[77:76] = 0;
assign c[79:78] = 0;
assign c[81:80] = 0;
assign c[83:82] = 0;
assign c[85:84] = 0;
assign c[87:86] = 0;
assign c[89:88] = 0;
assign c[91:90] = 0;
assign c[93:92] = 0;
assign c[95:94] = 0;
assign c[97:96] = 0;
assign c[99:98] = 0;
assign c[101:100] = 0;
assign c[103:102] = 0;
assign c[105:104] = 0;
assign c[107:106] = 0;
assign c[109:108] = 0;
assign c[111:110] = 0;
assign c[113:112] = 0;
assign c[115:114] = 0;
assign c[117:116] = 0;
assign c[119:118] = 0;
assign c[121:120] = 0;
assign c[123:122] = 0;
assign c[125:124] = 0;
assign c[127:126] = 0;
assign c[129:128] = 0;
assign c[131:130] = 0;
assign c[133:132] = 0;
assign c[135:134] = 0;
assign c[137:136] = 0;
assign c[139:138] = 0;
assign c[141:140] = 0;
assign c[143:142] = 0;
assign c[145:144] = 0;
assign c[147:146] = 0;
assign c[149:148] = 0;
assign c[151:150] = 0;
assign c[153:152] = 0;
assign c[155:154] = 0;
assign c[157:156] = 0;
assign c[159:158] = 0;
assign c[161:160] = 0;
assign c[163:162] = 0;
assign c[165:164] = 0;
assign c[167:166] = 0;
assign c[169:168] = 0;
assign c[171:170] = 0;
assign c[173:172] = 0;
assign c[175:174] = 0;
assign c[177:176] = 0;
assign c[179:178] = 0;
assign c[181:180] = 0;
assign c[183:182] = 0;
assign c[185:184] = 0;
assign c[187:186] = 0;
assign c[189:188] = 0;
assign c[191:190] = 0;
assign c[193:192] = 0;
assign c[195:194] = 0;
assign c[197:196] = 0;
assign c[199:198] = 0;
assign c[201:200] = 0;
assign c[203:202] = 0;
assign c[205:204] = 0;
assign c[207:206] = 0;
assign c[209:208] = 0;
assign c[211:210] = a[603:602];
assign c[213:212] = 0;
assign c[215:214] = 0;
assign c[217:216] = a[605:604];
assign c[219:218] = 0;
assign c[221:220] = 0;
assign c[223:222] = a[607:606];
assign c[225:224] = 0;
assign c[227:226] = 0;
assign c[229:228] = a[77:76];
assign c[231:230] = 0;
assign c[233:232] = 0;
assign c[235:234] = a[79:78];
assign c[237:236] = 0;
assign c[239:238] = 0;
assign c[241:240] = {a[878], a[879]};
assign c[243:242] = 0;
assign c[245:244] = 0;
assign c[247:246] = {a[348], a[349]};
assign c[249:248] = 0;
assign c[251:250] = 0;
assign c[253:252] = {a[350], a[351]};
assign c[255:254] = 0;
assign c[257:256] = 0;
assign c[259:258] = a[619:618];
assign c[261:260] = 0;
assign c[263:262] = 0;
assign c[265:264] = a[621:620];
assign c[267:266] = 0;
assign c[269:268] = 0;
assign c[271:270] = a[623:622];
assign c[273:272] = 0;
assign c[275:274] = 0;
assign c[277:276] = a[93:92];
assign c[279:278] = 0;
assign c[281:280] = 0;
assign c[283:282] = a[95:94];
assign c[285:284] = 0;
assign c[287:286] = 0;
assign c[289:288] = {a[894], a[895]};
assign c[291:290] = 0;
assign c[293:292] = 0;
assign c[295:294] = {a[364], a[365]};
assign c[297:296] = 0;
assign c[299:298] = 0;
assign c[301:300] = {a[366], a[367]};
assign c[303:302] = 0;
assign c[305:304] = 0;
assign c[307:306] = a[635:634];
assign c[309:308] = 0;
assign c[311:310] = 0;
assign c[313:312] = a[637:636];
assign c[315:314] = 0;
assign c[317:316] = 0;
assign c[319:318] = a[639:638];
assign c[321:320] = 0;
assign c[323:322] = 0;
assign c[325:324] = a[109:108];
assign c[327:326] = 0;
assign c[329:328] = 0;
assign c[331:330] = a[111:110];
assign c[333:332] = 0;
assign c[335:334] = 0;
assign c[337:336] = {a[910], a[911]};
assign c[339:338] = 0;
assign c[341:340] = 0;
assign c[343:342] = {a[380], a[381]};
assign c[345:344] = 0;
assign c[347:346] = 0;
assign c[349:348] = {a[382], a[383]};
assign c[351:350] = 0;
assign c[353:352] = 0;
assign c[355:354] = a[651:650];
assign c[357:356] = 0;
assign c[359:358] = 0;
assign c[361:360] = a[653:652];
assign c[363:362] = 0;
assign c[365:364] = 0;
assign c[367:366] = a[655:654];
assign c[369:368] = 0;
assign c[371:370] = 0;
assign c[373:372] = a[125:124];
assign c[375:374] = 0;
assign c[377:376] = 0;
assign c[379:378] = a[127:126];
assign c[381:380] = 0;
assign c[383:382] = 0;
assign c[385:384] = {a[926], a[927]};
assign c[387:386] = 0;
assign c[389:388] = 0;
assign c[391:390] = {a[396], a[397]};
assign c[393:392] = 0;
assign c[395:394] = 0;
assign c[397:396] = {a[398], a[399]};
assign c[399:398] = 0;
assign c[401:400] = 0;
assign c[403:402] = a[667:666];
assign c[405:404] = 0;
assign c[407:406] = 0;
assign c[409:408] = a[669:668];
assign c[411:410] = 0;
assign c[413:412] = 0;
assign c[415:414] = a[671:670];
assign c[417:416] = 0;
assign c[419:418] = 0;
assign c[421:420] = a[141:140];
assign c[423:422] = 0;
assign c[425:424] = 0;
assign c[427:426] = a[143:142];
assign c[429:428] = 0;
assign c[431:430] = 0;
assign c[433:432] = {a[942], a[943]};
assign c[435:434] = 0;
assign c[437:436] = 0;
assign c[439:438] = {a[412], a[413]};
assign c[441:440] = 0;
assign c[443:442] = 0;
assign c[445:444] = {a[414], a[415]};
assign c[447:446] = 0;
assign c[449:448] = 0;
assign c[451:450] = a[683:682];
assign c[453:452] = 0;
assign c[455:454] = 0;
assign c[457:456] = a[685:684];
assign c[459:458] = 0;
assign c[461:460] = 0;
assign c[463:462] = a[687:686];
assign c[465:464] = 0;
assign c[467:466] = 0;
assign c[469:468] = a[157:156];
assign c[471:470] = 0;
assign c[473:472] = 0;
assign c[475:474] = a[159:158];
assign c[477:476] = 0;
assign c[479:478] = 0;
assign c[481:480] = {a[958], a[959]};
assign c[483:482] = 0;
assign c[485:484] = 0;
assign c[487:486] = {a[428], a[429]};
assign c[489:488] = 0;
assign c[491:490] = 0;
assign c[493:492] = {a[430], a[431]};
assign c[495:494] = 0;
assign c[497:496] = 0;
assign c[499:498] = a[699:698];
assign c[501:500] = 0;
assign c[503:502] = 0;
assign c[505:504] = a[701:700];
assign c[507:506] = 0;
assign c[509:508] = 0;
assign c[511:510] = a[703:702];
assign c[513:512] = 0;
assign c[515:514] = 0;
assign c[517:516] = a[173:172];
assign c[519:518] = 0;
assign c[521:520] = 0;
assign c[523:522] = a[175:174];
assign c[525:524] = 0;
assign c[527:526] = 0;
assign c[529:528] = {a[974], a[975]};
assign c[531:530] = 0;
assign c[533:532] = 0;
assign c[535:534] = {a[444], a[445]};
assign c[537:536] = 0;
assign c[539:538] = 0;
assign c[541:540] = {a[446], a[447]};
assign c[543:542] = 0;
assign c[545:544] = 0;
assign c[547:546] = a[715:714];
assign c[549:548] = 0;
assign c[551:550] = 0;
assign c[553:552] = a[717:716];
assign c[555:554] = 0;
assign c[557:556] = 0;
assign c[559:558] = a[719:718];
assign c[561:560] = 0;
assign c[563:562] = 0;
assign c[565:564] = a[189:188];
assign c[567:566] = 0;
assign c[569:568] = 0;
assign c[571:570] = a[191:190];
assign c[573:572] = 0;
assign c[575:574] = 0;
assign c[577:576] = {a[990], a[991]};
assign c[579:578] = 0;
assign c[581:580] = 0;
assign c[583:582] = {a[460], a[461]};
assign c[585:584] = 0;
assign c[587:586] = 0;
assign c[589:588] = {a[462], a[463]};
assign c[591:590] = 0;
assign c[593:592] = 0;
assign c[595:594] = a[731:730];
assign c[597:596] = 0;
assign c[599:598] = 0;
assign c[601:600] = a[733:732];
assign c[603:602] = 0;
assign c[605:604] = 0;
assign c[607:606] = a[735:734];
assign c[609:608] = 0;
assign c[611:610] = 0;
assign c[613:612] = a[205:204];
assign c[615:614] = 0;
assign c[617:616] = 0;
assign c[619:618] = a[207:206];
assign c[621:620] = 0;
assign c[623:622] = 0;
assign c[625:624] = 0;
assign c[627:626] = 0;
assign c[629:628] = 0;
assign c[631:630] = 0;
assign c[633:632] = 0;
assign c[635:634] = 0;
assign c[637:636] = 0;
assign c[639:638] = 0;
assign c[641:640] = 0;
assign c[643:642] = 0;
assign c[645:644] = 0;
assign c[647:646] = 0;
assign c[649:648] = 0;
assign c[651:650] = 0;
assign c[653:652] = 0;
assign c[655:654] = 0;
assign c[657:656] = 0;
assign c[659:658] = 0;
assign c[661:660] = 0;
assign c[663:662] = 0;
assign c[665:664] = 0;
assign c[667:666] = 0;
assign c[669:668] = 0;
assign c[671:670] = 0;
assign c[673:672] = 0;
assign c[675:674] = 0;
assign c[677:676] = 0;
assign c[679:678] = 0;
assign c[681:680] = 0;
assign c[683:682] = 0;
assign c[685:684] = 0;
assign c[687:686] = 0;
assign c[689:688] = 0;
assign c[691:690] = 0;
assign c[693:692] = 0;
assign c[695:694] = 0;
assign c[697:696] = 0;
assign c[699:698] = 0;
assign c[701:700] = 0;
assign c[703:702] = 0;
assign c[705:704] = 0;
assign c[707:706] = 0;
assign c[709:708] = 0;
assign c[711:710] = 0;
assign c[713:712] = 0;
assign c[715:714] = 0;
assign c[717:716] = 0;
assign c[719:718] = 0;
assign c[721:720] = 0;
assign c[723:722] = 0;
assign c[725:724] = 0;
assign c[727:726] = 0;
assign c[729:728] = 0;
assign c[731:730] = 0;
assign c[733:732] = 0;
assign c[735:734] = 0;
assign c[737:736] = 0;
assign c[739:738] = 0;
assign c[741:740] = 0;
assign c[743:742] = 0;
assign c[745:744] = 0;
assign c[747:746] = 0;
assign c[749:748] = 0;
assign c[751:750] = 0;
assign c[753:752] = 0;
assign c[755:754] = 0;
assign c[757:756] = 0;
assign c[759:758] = 0;
assign c[761:760] = 0;
assign c[763:762] = 0;
assign c[765:764] = 0;
assign c[767:766] = 0;
assign c[769:768] = 0;
assign c[771:770] = 0;
assign c[773:772] = 0;
assign c[775:774] = 0;
assign c[777:776] = 0;
assign c[779:778] = 0;
assign c[781:780] = 0;
assign c[783:782] = 0;
assign c[785:784] = 0;
assign c[787:786] = 0;
assign c[789:788] = 0;
assign c[791:790] = 0;
assign c[793:792] = 0;
assign c[795:794] = 0;
assign c[797:796] = 0;
assign c[799:798] = 0;
assign c[801:800] = 0;
assign c[803:802] = 0;
assign c[805:804] = 0;
assign c[807:806] = 0;
assign c[809:808] = 0;
assign c[811:810] = 0;
assign c[813:812] = 0;
assign c[815:814] = 0;
assign c[817:816] = 0;
assign c[819:818] = 0;
assign c[821:820] = 0;
assign c[823:822] = 0;
assign c[825:824] = 0;
assign c[827:826] = 0;
assign c[829:828] = 0;
assign c[831:830] = 0;
assign c[833:832] = 0;
assign c[835:834] = 0;
assign c[837:836] = 0;
assign c[839:838] = 0;
assign c[841:840] = 0;
assign c[843:842] = 0;
assign c[845:844] = 0;
assign c[847:846] = 0;
assign c[849:848] = 0;
assign c[851:850] = 0;
assign c[853:852] = 0;
assign c[855:854] = 0;
assign c[857:856] = 0;
assign c[859:858] = 0;
assign c[861:860] = 0;
assign c[863:862] = 0;
assign c[865:864] = 0;
assign c[867:866] = 0;
assign c[869:868] = 0;
assign c[871:870] = 0;
assign c[873:872] = 0;
assign c[875:874] = 0;
assign c[877:876] = 0;
assign c[879:878] = 0;
assign c[881:880] = 0;
assign c[883:882] = 0;
assign c[885:884] = 0;
assign c[887:886] = 0;
assign c[889:888] = 0;
assign c[891:890] = 0;
assign c[893:892] = 0;
assign c[895:894] = 0;
assign c[897:896] = 0;
assign c[899:898] = 0;
assign c[901:900] = 0;
assign c[903:902] = 0;
assign c[905:904] = 0;
assign c[907:906] = 0;
assign c[909:908] = 0;
assign c[911:910] = 0;
assign c[913:912] = 0;
assign c[915:914] = 0;
assign c[917:916] = 0;
assign c[919:918] = 0;
assign c[921:920] = 0;
assign c[923:922] = 0;
assign c[925:924] = 0;
assign c[927:926] = 0;
assign c[929:928] = 0;
assign c[931:930] = 0;
assign c[933:932] = 0;
assign c[935:934] = 0;
assign c[937:936] = 0;
assign c[939:938] = 0;
assign c[941:940] = 0;
assign c[943:942] = 0;
assign c[945:944] = 0;
assign c[947:946] = 0;
assign c[949:948] = 0;
assign c[951:950] = 0;
assign c[953:952] = 0;
assign c[955:954] = 0;
assign c[957:956] = 0;
assign c[959:958] = 0;
assign c[961:960] = 0;
assign c[963:962] = 0;
assign c[965:964] = 0;
assign c[967:966] = 0;
assign c[969:968] = 0;
assign c[971:970] = 0;
assign c[973:972] = 0;
assign c[975:974] = 0;
assign c[977:976] = 0;
assign c[979:978] = 0;
assign c[981:980] = 0;
assign c[983:982] = 0;
assign c[985:984] = 0;
assign c[987:986] = 0;
assign c[989:988] = 0;
assign c[991:990] = 0;
assign c[993:992] = 0;
assign c[995:994] = 0;
assign c[997:996] = 0;
assign c[999:998] = 0;
assign c[1001:1000] = 0;
assign c[1003:1002] = 0;
assign c[1005:1004] = 0;
endmodule
/trunk/group_size_is_697_bits/rtl/fsm.v
0,0 → 1,155
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
/* FSM: finite state machine
* halt if $ctrl == 0$
*/
module FSM(clk, reset, rom_addr, rom_q, ram_a_addr, ram_b_addr, ram_b_w, pe, done);
input clk;
input reset;
output reg [8:0] rom_addr; /* command id. extra bits? */
input [27:0] rom_q; /* command value */
output reg [5:0] ram_a_addr;
output reg [5:0] ram_b_addr;
output ram_b_w;
output reg [10:0] pe;
output reg done;
reg [4:0] state;
parameter START=0, READ_SRC1=1, READ_SRC2=2, CALC=4, WAIT=8, WRITE=16, DON=3;
wire [5:0] dest, src1, src2; wire [7:0] times; wire [1:0] op;
assign {dest, src1, op, times, src2} = rom_q;
 
reg [7:0] count;
always @ (posedge clk)
if (reset)
state<=START;
else
case (state)
START:
state<=READ_SRC1;
READ_SRC1:
state<=READ_SRC2;
READ_SRC2:
if (times==0) state<=DON; else state<=CALC;
CALC:
if (count==1) state<=WAIT;
WAIT:
state<=WRITE;
WRITE:
state<=READ_SRC1;
endcase
 
/* we support two loops */
parameter LOOP1_START = 9'd21,
LOOP1_END = 9'd116,
LOOP2_START = 9'd290,
LOOP2_END = 9'd303;
reg [249:0] loop1, loop2;
always @ (posedge clk)
if (reset) rom_addr<=0;
else if (state==WAIT)
begin
if(rom_addr == LOOP1_END && loop1[0])
rom_addr <= LOOP1_START;
else if(rom_addr == LOOP2_END && loop2[0])
rom_addr <= LOOP2_START;
else
rom_addr <= rom_addr + 1'd1;
end
always @ (posedge clk)
if (reset) loop1 <= ~0;
else if(state==WAIT && rom_addr==LOOP1_END)
loop1 <= loop1 >> 1;
always @ (posedge clk)
if (reset) loop2 <= ~0;
else if(state==WAIT && rom_addr==LOOP2_END)
loop2 <= loop2 >> 1;
 
always @ (posedge clk)
if (reset)
count <= 0;
else if (state==READ_SRC1)
count <= times;
else if (state==CALC)
count <= count - 1'd1;
always @ (posedge clk)
if (reset) done<=0;
else if (state==DON) done<=1;
else done<=0;
always @ (state, src1, src2)
case (state)
READ_SRC1: ram_a_addr=src1;
READ_SRC2: ram_a_addr=src2;
default: ram_a_addr=0;
endcase
parameter CMD_ADD=6'd4, CMD_SUB=6'd8, CMD_CUBIC=6'd16,
ADD=2'd0, SUB=2'd1, CUBIC=2'd2, MULT=2'd3;
 
always @ (posedge clk)
case (state)
READ_SRC1:
case (op)
ADD: pe<=11'b11001000000;
SUB: pe<=11'b11001000000;
CUBIC: pe<=11'b11111000000;
MULT: pe<=11'b11110000000;
default: pe<=0;
endcase
READ_SRC2:
case (op)
ADD: pe<=11'b00110000000;
SUB: pe<=11'b00110000000;
CUBIC: pe<=0;
MULT: pe<=11'b00001000000;
default: pe<=0;
endcase
CALC:
case (op)
ADD: pe<=11'b00000010001;
SUB: pe<=11'b00000010001;
CUBIC: pe<=11'b01010000001;
MULT: pe<=11'b00000111111;
default: pe<=0;
endcase
default:
pe<=0;
endcase
 
always @ (state, op, src2, dest)
case (state)
READ_SRC1:
case (op)
ADD: ram_b_addr=CMD_ADD;
SUB: ram_b_addr=CMD_SUB;
CUBIC: ram_b_addr=CMD_CUBIC;
default: ram_b_addr=0;
endcase
READ_SRC2: ram_b_addr=src2;
WRITE: ram_b_addr=dest;
default: ram_b_addr=0;
endcase
 
assign ram_b_w = (state==WRITE) ? 1'b1 : 1'b0;
endmodule
/trunk/group_size_is_697_bits/rtl/const.v
0,0 → 1,51
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
/*
* the module of constants
*
* addr out effective
* 1 0 1
* 2 1 1
* 4 + 1
* 8 - 1
* 16 cubic 1
* other 0 0
*/
module const_ (clk, addr, out, effective);
input clk;
input [5:0] addr;
output reg [`WIDTH_D0:0] out;
output reg effective; // active high if out is effective
always @ (posedge clk)
begin
effective <= 1;
case (addr)
1: out <= 0;
2: out <= 1;
4: out <= {6'b000101, 1002'd0};
8: out <= {6'b001001, 1002'd0};
16: out <= {6'b010101, 1002'd0};
default:
begin out <= 0; effective <= 0; end
endcase
end
endmodule
/trunk/group_size_is_697_bits/rtl/pairing.v
0,0 → 1,48
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
 
`define M 503 // M is the degree of the irreducible polynomial
`define WIDTH (2*`M-1) // width for a GF(3^M) element
`define WIDTH_D0 (1008-1)
 
module pairing(clk, reset, sel, addr, w, update, ready, i, o, done);
input clk;
input reset; // for the arithmethic core
input sel;
input [5:0] addr;
input w;
input update; // update reg_in & reg_out
input ready; // shift reg_in & reg_out
input i;
output o;
output done;
reg [`WIDTH_D0:0] reg_in, reg_out;
wire [`WIDTH_D0:0] out;
assign o = reg_out[0];
tiny
tiny0 (clk, reset, sel, addr, w, reg_in, out, done);
always @ (posedge clk) // write LSB firstly
if (update) reg_in <= 0;
else if (ready) reg_in <= {i,reg_in[`WIDTH_D0:1]};
always @ (posedge clk) // read LSB firstly
if (update) reg_out <= out;
else if (ready) reg_out <= reg_out>>1;
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.