OpenCores
URL https://opencores.org/ocsvn/tosnet/tosnet/trunk

Subversion Repositories tosnet

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    /tosnet
    from Rev 4 to Rev 5
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  •

Rev 4 → Rev 5

/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/netlist/network_register.ngc
0,0 → 1,3
XILINX-XDB 0.1 STUB 0.1 ASCII
XILINX-XDM V1.5e
$3c34d<,[o}e~g`n;"2*776&=$94#:!1!&:?56789:;<=:?;123456789:;<=>?0123456789:;<=>?0123456789:;<=>?0123456789:;<=>?0292*57338>1EC^ZT;CG@WG;9:0;2<:4158JJUSS2HNO^O2>3;2=55=62@D[YY4xe`>3>58682;1EC^ZT;uff96=87;97><5IORVP?BNI59:6=0>2:11>LHW]]0OEO2<1;2=56=4:3CE\XZ5dhla867=87;87><5OTVSQQ<CGH68=7>112906?IR\Y__6IAM<2394;723:81CXZ_UU8gkpre4:;1<3?>;58JJUSS2MC[M1=50?32?1<NFY__6IG_B=194;773=0BB][[:VGB86<768:087GAPTV9S@D;;3:5=?5;:HLSQQ<flmxi0>4?>0080?IR\Y__6IA_A=194;753=0DYY^ZT;FLTG:4294:;6:5OTVSQQ<ulhno~hml<283:44<>3CE\XZ5aefqe93=87o0:~bw17apc643%:;:754FNQWW>aoii5=1<3?<;98LQQVR\3ndyyo37;2=<>GCL[K7<374AEFQE977601JHI\N<03==>GCL[K7=?0m;@FGVD:6;3:556OKDSC?568?3HNO^L2>>99B@ATF4;437LJKR@>0:==FLMXJ0907;@FGVD:2611JHI\N<7<;?DBCZH6<255NDEPB8=8?3HNO^L26>99B@ATE49427LJKRC>24;?<IMNYN1?>>89B@ATE4885n6OKDS@?56<7601JHI\M<01=<>GCL[H7=364AEFQF94902KOH_L33?:8EABUJ5>546OKDS@?1;><IMNYN1818:CG@WD;?720MIJ]B=:=<>GCL[H753=4AMN0?GS502H^_RGAFN08G@753JBNOFQCIBGMW@YSQYO?7NBDA59@HND>3JEFADZ[EE37?FIUMVMNBH\NTHMM[LHAG>1H^HO[EEa8@DRFW^COXEQNc:FBPDYPAM^CSO84DHC?4;1<L@K7==08;EKB8479?2NBM1?=>69GMD:6;7=0HDO315<4?AOF48?5;6JFA=35:2=CAH6:;394DHC?5=803MCJ0<716:FJE979?2NBM1<?>69GMD:597=0HDO323<4?AOF4;95;6JFA=07:2=CAH699394DHC?63803MCJ0?917:FJE94?6>1OEL2=9?48@LG;:7=0HDO331<:?AOF4:;1<394DHC?74813MCJ0>09;EKB81813MCJ0809;EKB83813MCJ0:09;EKB8=813MCJ0409;EKA85803MCI0<>17:FJF9766>1OEO2>2?58@LD;9:4<7IGM<06=3>BNJ5;>2:5KIC>22;1<L@H7=:08;EKA84>9?2NBN1?6>79GMG:66>1OEO2=0?58@LD;:84<7IGM<30=3>BNJ5882:5KIC>10;1<L@H7>808;EKA8709?2NBN1<8>69GMG:507=0HDL328<5?AOE4;4<7IGM<22==>BNJ59:6=08;EKA8679>2NBN1=16:FJF929>2NBN1;16:FJF909>2NBN1916:FJF9>9>2NBN1717:FJTD:76>1OE]O31?58@LVF4;427IG_A=194;1<L@ZJ0>08;EKSF969?2NB\O2>>69GMUD;:730HD^M<283:2=CAYH7?384DNC?4;1<LFK7==08;EMB8479?2NDM1?=>69GKD:6;7=0HBO315<4?AIF48?5;6J@A=35:2=CGH6:;394DNC?5=803MEJ0<716:FLE979?2NDM1<?>69GKD:597=0HBO323<4?AIF4;95;6J@A=07:2=CGH699394DNC?63803MEJ0?917:FLE94?6>1OCL2=9?48@JG;:7=0HBO331<:?AIF4:;1<394DNC?74813MEJ0>09;EMB81813MEJ0809;EMB83813MEJ0:09;EMB8=813MEJ0408;EMB[WC@>2NDN1>17:FLF9776>1OCO2>1?58@JD;9;4<7IAM<01=3>BHJ5;?2:5KOC>21;1<LFH7=;08;EMA8419?2NDN1?7>69GKG:617<0HBL31?58@JD;:94<7IAM<33=3>BHJ5892:5KOC>17;1<LFH7>908;EMA8739?2NDN1<9>69GKG:5?7=0HBL329<4?AIE4;35:6J@B=0=3>BHJ59;245KOC>05?69?2NDN1=>>79GKG:46?1OCO2;>79GKG:26?1OCO29>79GKG:06?1OCO27>79GKG:>6>1OCOQ]EF58@JVF494<7IA_A=3=3>BHXH69245KOQC?7?69?2ND\L2<>69GKUD;87=0HB^M<0<4?AIWJ58556J@PC>0>5803ME[N1=13:GME6=BFKh0ICQ]SUPBIZGe3LDT^^Z]AL]A1>@FDZO:7J=4GOF;?LHN\YU;<55FNHVS[57?3@DBX]Q?299JJLRWW9937D@FTQ]30==NF@^[S=;7;HLJPUY7>11BBDZ__154?LHN\V:;;6GAIU]352=NF@^T<?94IOKW[5503@DBXR>;7:KMMQY7=>1BBDZP0758MKOSW9=<7D@FT^2;3>OIA]U;5:5FNHV\4D1<AGC_S=L8;HLJPZ6D?2CEEYQ?D69JJLRX8L=0ECG[_1D4?LHN\V;;;6GAIU]252=NF@^T=?94IOKW[4503@DBXR?;7:KMMQY6=>1BBDZP1758MKOSW8=<7D@FT^3;3>OIA]U:5:5FNHV\5D1<AGC_S<L8;HLJPZ7D?2CEEYQ>D69JJLRX9L=0ECG[_0D4?LHN\V8;;6GAIU]152=NF@^T>?94IOKW[7503@DBXR<;7:KMMQY5=>1BBDZP2758MKOSW;=<7D@FT^0;3>OIA]U95:5FNHV\6D1<AGC_S?L8;HLJPZ4D?2CEEYQ=D69JJLRX:L=0ECG[_3D4?LHN\V9;;6GAIU]052=NF@^T??94IOKW[6503@DBXR=;7:KMMQY4=>1BBDZP3758MKOSW:=<7D@FT^1;3>OIA]U85:5FNHV\7D1<AGC_S>L8;HLJPZ5D?2CEEYQ<D69JJLRX;L=0ECG[_2D5?LHN\VK=7D@FT^@:?LHN\VLB@H84LNCGAA1<DFMBOLBl;LcikwPbzzcdbn5BiomqR`ttafd97C?<;O330>H689>0B<>>3:L256=I9;90B<=<;O377>H6=:1E=;=4N050?K7?;2D:5?5A229M655<F;;87C<=3:L176=I:=90B?;<;O057>H5?:1E>5=4N3;0?K54;2D88>5A3418J6043G9<?6@<829M7<5<F=:87C:>3:L766=I<:90B9:<;O667>H3>:1E8:=4N5:0?K2>;2D><>5A5018J0443G?8?6@:429M105<F<<87C;83:L6<6=I=080B;=4N720?K06;2D=>>5A6218J3243G<>?6@9629M225<F?287C862:L47>H08:1E;<=4N600?K14;2D<8>5A7418J2043G=<?6@8829M3<4<F190B5><;O:27>H?::1E4>=4N960?K>2;2D3:>5A8618J=>43G22>6@63:L:46=I1890B4<<;O;07>H><:1E58=4N840?K?0;2D24>5A98d8JGYE]ZZBBR^]OQQ4?KCS_FX@86@@ND08KN7<X=1[M_Zn;QKM[GSTAMRi7]GA_CWPJDKBi2XJAO?9BVGQ2>TBOJOJ:6\JGBGA0>TT\H>0^^ZM7:PPPQ_WMl1Y_YQ_RHMQMQ_XIl1Y_YQ_RHMQMQ_XJ890_DCPCNNOMVOHFVICINEn;RKN[ACQAJO=7^AZRBG;?VVFZ]KE::5\RWCO[D1<[[\J@RL;;R[MG1=SQYO?j6[?/cnh[hcjWnoeio{os-ueioc&jy~"|nmmmlt^6Z&{kf"!|6^kmmq(uid%_^XKPDQ,SVLK60'xjal5ZSDP\EIOF[j1^_H\PVHQJFIC43_IH56XFEV]W]UC13^OJ0=09;VGB84813^OJ0?07;VGB86<76?1\IL2<>79TAG:76?1\IO2>>79TAG:5611\IO2<:1<5?RCE4:4i7Z\FTD]EMWUSk2]YEYKPMNFF[De<_[C_IRC@DD]A5a=_AECET VKB!2-5%US]K*;"<.NSBKJ2>^T\ECI;6V\T^EM@2=_[]U]ONl4X^ALV@YNFOE=7Ujm_Hfe?]boWYxba[k}shmm55=_ldUFmga}Vdppmjh682RoaRCfnnpUawungg;37Rmh/ogwsjtlW{ole~zjr/ldk==flmxj$='7;`fgvd.6!11jhi|n(3+;?dbczh"8%55ndepb,1/?3hno~l&:)99b`atf49437ljkr`>2:==flmxj0?07;`fgvd:4611jhi|n<5<b?dbczh6>6=07;`fgvd:2611jhi|m(1+;?dbczk":%55ndepa,7/?3hno~o&<)99b`ate49437ljkrc>2:==flmxi0?0n;`fgvg:429437ljkrc>0:7e<jeaTahcPgdl\r6Y4$)Rb`d`w BMQA%Abflxjxb|/10,70>ekch>0oaem7:famqcuz>1oeco'0(58`lhf 8#<7igaa)0*3>bnfh"8%:5kioc+0,1<l`dj$8'8;ekme-0.?2nbbl&8)69gmkg;87=0hd`n<0<4?aoii585;6jfn`>0:2=cagk78394dhlb80803mcem1819:fjjd:0294<7igaa=5=3>bnfk";%:5kio`+5,><l`di$<>&8:fjjg.69 20hd`m(00*<>bnfk":?$64dhla,42.02nbbo&>5(:8`lhe 8<"46jfnc*23,><l`di$<6&8:fjjg.61 =0hd`m(3+;?aoij!8;%55kio`+64/?3mcen%<=)99gmkd/::#37igab)07-==cagh#>8'7;ekmf-41!11oecl'26+;?aoij!83%55kio`+6</03mcen%=&8:fjjg.48 20hd`m(23*3>bnfk"?%:5kio`+1,1<l`di$;'8;ekmf-1.?2nbbo&7)69gmkd/1 =0hd`m<1<;?aoij5;;255kio`?548?3mcen1?=>99gmkd;9:437igab=37:==cagh7=807;ekmf971611oecl316<;?aoij5;3255kio`?5<803mcen1?18:fjjg:58720hd`m<33=<>bnfk69>364dhla875902nbbo2=4?:8`lhe4;?546jfnc>12;><l`di0?918:fjjg:50720hd`m<3;=3>bnfk69255kio`?758f3mcen1=>:1<;?aoij59:2:5kio`?7;1<l`di0908;ekmf939?2nbbo29>69gmkd;?7=0hd`m<9<4?aoij53546j`uuc+4,><lfm%?&8:flqqg/: 20hb{{a)1*<>bh}}k#8$64dnwwe-3.02ndyyo'6(:8`jssi!="46j`uuc?4;><lfm1?18:flqqg;:720hb{{a=1=<>bh}}k78364dnwwe93902ndyyo36?c8`jssi5=1<364dnwwe91902ndyyl'0(:8`jssj!;"56j`uu`+55/>3me~xo&>1(;8`jssj!;9%45kotva,45.12ndyyl'15+:?air|k":9$74dnwwf-71!01ocxzm(05*=>bh}}h#=5'6;emvpg.61 20hb{{b)0*=>bh}}h#>='6;emvpg.59 30hb{{b)01-<=cg|~i$?=&9:flqqd/:=#27iaztc*11,?<lfn%<9)89gkpre ;="56j`uu`+6=/>3me~xo&=9(:8`jssj!9"56j`uu`+75/>3me~xo&<1(:8`jssj!>"46j`uu`+1,><lfn%8&8:flqqd/? 20hb{{b):*<>bh}}h#5$64dnwwf96912ndyyl311<:?air|k6:=374dnwwf975601ocxzm<01==>bh}}h7=906;emvpg:6=730hb{{b=35:<=cg|~i0<919:flqqd;91427iaztc>2=;><lfn1?19:flqqd;:9427iaztc>15;?<lfn1<=>89gkpre4;9556j`uu`?618>3me~xo2=5?;8`jssj58=245kotva871912ndyyl329<:?air|k695364dnwwf94912ndyyl331<a?air|k68=7>19:flqqd;;8437iaztc>0:==cg|~i0907;emvpg:2611ocxzm<7<;?air|k6<255kotva8=8?3me~xo26>99f`l`5fnn87h`n3:gmfa=nfcohxilftdpq`>oibliog{esp24>hb|~eygR|jghqwaw4e3go{b|d_sgdmvrbz%hggRcjm^efjZp4W:&ECCK#NNLF7g><fl~|cePrdejwqcu$kf`S`kb_fgm[s5X;%qhSeo|_sgdg`d:8%iTdl}Prde`ad;7$jUfi`Q{yqg>6)eXzz~ym`Qm=1.`[wuszhgTm0>#c^pppZr~xl7XUCM#c^jbwZoiblii|20-a\twojW}s{i0?#c^kmmqdX~hf6<!mPrdcg[roc|aUi1><#c^pfeaYpam~cSl37,b]gmvgedlU|m`Pbit\gjjk59&hSd`ft^djh`Yiido6bbQlod]emicXdfkoii"l_vpjp`YjgmoTn0Y]IUG\BLTT\%iT{g{e^ol``Yf5^XBXHQIISQW(fYj}qU{e}kciog\wqg`mz7; nQgar]nahYh}}z~xR|jgr]a95*dWeejhRgaiu]emic:8%iTdl}Pmdo\kprw}}Uyij}Pa<2/gZqua}oThh~{h^`>53*dW~xbxhQkeqvk[d;1<%iTdl}Prrva95*dWakxS}{a<2/gZoia}kTzlb20-a\lduXe|rTcxzuu]qabuXj4:'oRfns^ov|Zir|ySkhs^c>4)eXimnymRyfduj>2)eXimnynRyfduj>0)eXllljyazPd`vb95*dW|ynShml=1.`[dj`g{cd`3>,b]gmvgedlU|m`Pbit\vdh`m4:'oRy}iug\slbs`Vh6??"l_vpjp`Ypam~cSl37,b]qadbXllzdRl217.`[gsmVybvh36,b]qadbXllzdRo265.`[vojWjeg`d}foo]`l`el5HFG nQlololjZekc4:'oRyja^uj`qn:9%iTdl}Peo`>4)eX`hyTico20-a\s`dX`nd0?#cnoskkci|Vdjah3aeuulvnYumncxxh|#c^wpaZd~|lU|io3?,b]vw`Yeq}oT{ho20-a\vvrXx{cd~dzv_c?@A)eXzz~T|g`rhvz[d;DM%iTy~kPdddbqirXlh~j1<"r269maqqhzbUyijg|tdp\fimXelgTkh`Pv2]0[}usW820bjmmuhngg>tcimnyinm'0(a8vagcl{oho%?&c:pgeabumji#>$m4recg`wcdk!9"o6|kaefqafe;87o0~iokdsg`g95=87<0~hile`48v`admk>0~~zn4:pppg1<{kci|9;vgb,5/?3~oj0=4?>79tad:76?1|io&?)99tag:7294=7zkm<1<~DEv5j01KLu?l6;D90?7|[=;1>5;53;306g3f?3898>ltn0a7>4=i9j?196*>c382fa=z[:l1>5;53;306g3f?3898>l4S013>7>b290:??l:a681615d3Z9m6?6j:18277d2i>09>9=k;e0;e?6=93;p_9?529797?74:k?j;7<=42`8rQ7f=3:1=7?561yP04<50<086<==b4c4>743;k1/=lh51238R4e42;q~=><51:w276<73t.:554>7:`1<d<72<o1?7;j{I3b`>\4i32p:79517826?7>2m0:47o5}%3be?4?i2.:o<4>de9j6<g=83.:5l4=9c9m5<?=821b>4j50;&2=d<51l1e=4750:9j5fe=83.:5l4>d39m5<?=821b=nl50;&2=d<6l;1e=4751:9j5fg=83.:5l4>d39m5<?=:21b=n750;&2=d<6l;1e=4753:9j5f>=83.:5l4>d39m5<?=<21b=n950;&2=d<6l;1e=4755:9j5a1=83.:5l4>dc9m5<?=821b=i850;&2=d<6lk1e=4751:9j5a3=83.:5l4>dc9m5<?=:21b=i:50;&2=d<6lk1e=4753:9l66g=83.:5l4=439m5<?=821d>>750;&2=d<5<;1e=4751:9l66>=83.:5l4=439m5<?=:21d>>950;&2=d<5<;1e=4753:9l660=83.:5l4=439m5<?=<21d>>;50;&2=d<5<;1e=4755:9l662=83.:5l4=439m5<?=>21d>>=50;&2=d<5<;1e=4757:9l60b=83.:5l4=7b9m5<?=821d>8m50;&2=d<5?j1e=4751:9l60g=83.:5l4=7b9m5<?=:21d>8750;&2=d<5?j1e=4753:9l60>=83.:5l4=7b9m5<?=<21d>8950;&2=d<5?j1e=4755:9l600=83.:5l4=7b9m5<?=>21d>8;50;&2=d<5?j1e=4757:9l602=83.:5l4=7b9m5<?=021d>8=50;&2=d<5?j1e=4759:9l604=83.:5l4=7b9m5<?=i21d>8?50;&2=d<5?j1e=475b:9l61`=83.:5l4=7b9m5<?=k21d>9k50;&2=d<5?j1e=475d:9l61b=83.:5l4=7b9m5<?=m21d>9m50;&2=d<5?j1e=475f:9l61d=83.:5l4=7b9m5<?=9910c?:n:18'5<g=:>i0b<76:038?j4313:1(<7n:35`?k7>13;976a=4983>!7>i38<o6`>98827>=h:==1<7*>9`813f=i9031=954o365>5<#90k1>:m4n0;:>43<3f8=?7>5$0;b>71d3g;257?9;:m127<72-;2m7<8c:l2=<<6?21d>;?50;&2=d<5?j1e=4751998k707290/=4o526a8j4?>28307b<:f;29 4?f2;=h7c?69;3b?>i5=l0;6)?6a;04g>h6100:n65`24`94?"61h09;n5a18;95f=<g;?;6=4+18c962e<f8326<j4;n071?6=,83j6?9l;o3:=?7b32e9894?:%3:e?40k2d:544>f:9j5ac=831b=ih50;9j5`>=83.:5l4>f19m5<?=821b=h950;&2=d<6n91e=4751:9j5`0=83.:5l4>f19m5<?=:21b=h;50;&2=d<6n91e=4753:9j5`2=83.:5l4>f19m5<?=<21b=h=50;&2=d<6n91e=4755:9j5`4=83.:5l4>f19m5<?=>21b=h?50;&2=d<6n91e=4757:9j65d=83.:5l4=2`9m5<?=821b>=o50;&2=d<5:h1e=4751:9j65>=83.:5l4=2`9m5<?=:21b>=950;&2=d<5:h1e=4753:9j650=83.:5l4=2`9m5<?=<21b>=;50;&2=d<5:h1e=4755:9j652=83.:5l4=2`9m5<?=>21b>==50;&2=d<5:h1e=4757:9j654=83.:5l4=2`9m5<?=021b>=?50;&2=d<5:h1e=4759:9j656=83.:5l4=2`9m5<?=i21b=kh50;&2=d<5:h1e=475b:9j5cb=83.:5l4=2`9m5<?=k21b=km50;&2=d<5:h1e=475d:9j5cd=83.:5l4=2`9m5<?=m21b=ko50;&2=d<5:h1e=475f:9j5c?=83.:5l4=2`9m5<?=9910e<h7:18'5<g=:;k0b<76:038?l7a?3:1(<7n:30b?k7>13;976g>f783>!7>i389m6`>98827>=n9o?1<7*>9`816d=i9031=954i0d7>5<#90k1>?o4n0;:>43<3`8:=7>5$0;b>74f3g;257?9;:k155<72-;2m7<=a:l2=<<6?21b>=h50;&2=d<5:h1e=4751998m76b290/=4o523c8j4?>28307d<?d;29 4?f2;8j7c?69;3b?>o58j0;6)?6a;01e>h6100:n65f21;94?"61h09>l5a18;95f=<a8ln6=4+18c967g<f8326<j4;h3e7?6=,83j6?<n;o3:=?7b32c:j?4?:%3:e?45i2d:544>f:9a5dc=83;1<7>tH0cg?!7fi3;ji6a>9683>>{em=0;6<4?:1yK5db<,8kj6h:4od194?=zj:31<78l:2854~N6im1Q?l4>2z36>3<028<1=?4>9;f95=<f2?0::7?7:6826?g=900o6<;5}%3be?4?l2.8o7<7b:&74?4?k2.:5>4>979j6=?=831d>4<50;&2=d<51=1e=4750:9l6<7=83.:5l4=959m5<?=921d>4>50;&2=d<51=1e=4752:9l6=`=83.:5l4=959m5<?=;21b>5850;9j6=1=831b>4;50;9j6<0=831b>4o50;&2=d<51k1e=4750:9j6<b=83.:5l4=9d9m5<?=821b=nm50;&2=d<6l;1e=4750:9j5fd=83.:5l4>d39m5<?=921b=no50;&2=d<6l;1e=4752:9j5f?=83.:5l4>d39m5<?=;21b=n650;&2=d<6l;1e=4754:9j5f1=83.:5l4>d39m5<?==21b=i950;&2=d<6lk1e=4750:9j5a0=83.:5l4>dc9m5<?=921b=i;50;&2=d<6lk1e=4752:9j5a2=83.:5l4>dc9m5<?=;21b>4950;9j6<>=831d>4750;9l66g=83.:5l4=439m5<?=821d>>750;&2=d<5<;1e=4751:9l66>=83.:5l4=439m5<?=:21d>>950;&2=d<5<;1e=4753:9l660=83.:5l4=439m5<?=<21d>>;50;&2=d<5<;1e=4755:9l662=83.:5l4=439m5<?=>21d>>=50;&2=d<5<;1e=4757:9l60b=83.:5l4=7b9m5<?=821d>8m50;&2=d<5?j1e=4751:9l60g=83.:5l4=7b9m5<?=:21d>8750;&2=d<5?j1e=4753:9l60>=83.:5l4=7b9m5<?=<21d>8950;&2=d<5?j1e=4755:9l600=83.:5l4=7b9m5<?=>21d>8;50;&2=d<5?j1e=4757:9l602=83.:5l4=7b9m5<?=021d>8=50;&2=d<5?j1e=4759:9l604=83.:5l4=7b9m5<?=i21d>8?50;&2=d<5?j1e=475b:9l61`=83.:5l4=7b9m5<?=k21d>9k50;&2=d<5?j1e=475d:9l61b=83.:5l4=7b9m5<?=m21d>9m50;&2=d<5?j1e=475f:9l61d=83.:5l4=7b9m5<?=9910c?:n:18'5<g=:>i0b<76:038?j4313:1(<7n:35`?k7>13;976a=4983>!7>i38<o6`>98827>=h:==1<7*>9`813f=i9031=954o365>5<#90k1>:m4n0;:>43<3f8=?7>5$0;b>71d3g;257?9;:m127<72-;2m7<8c:l2=<<6?21d>;?50;&2=d<5?j1e=4751998k707290/=4o526a8j4?>28307b<:f;29 4?f2;=h7c?69;3b?>i5=l0;6)?6a;04g>h6100:n65`24`94?"61h09;n5a18;95f=<g;?;6=4+18c962e<f8326<j4;n071?6=,83j6?9l;o3:=?7b32e9894?:%3:e?40k2d:544>f:9j5ac=831b=ih50;9j5`>=83.:5l4>f19m5<?=821b=h950;&2=d<6n91e=4751:9j5`0=83.:5l4>f19m5<?=:21b=h;50;&2=d<6n91e=4753:9j5`2=83.:5l4>f19m5<?=<21b=h=50;&2=d<6n91e=4755:9j5`4=83.:5l4>f19m5<?=>21b=h?50;&2=d<6n91e=4757:9j65d=83.:5l4=2`9m5<?=821b>=o50;&2=d<5:h1e=4751:9j65>=83.:5l4=2`9m5<?=:21b>=950;&2=d<5:h1e=4753:9j650=83.:5l4=2`9m5<?=<21b>=;50;&2=d<5:h1e=4755:9j652=83.:5l4=2`9m5<?=>21b>==50;&2=d<5:h1e=4757:9j654=83.:5l4=2`9m5<?=021b>=?50;&2=d<5:h1e=4759:9j656=83.:5l4=2`9m5<?=i21b=kh50;&2=d<5:h1e=475b:9j5cb=83.:5l4=2`9m5<?=k21b=km50;&2=d<5:h1e=475d:9j5cd=83.:5l4=2`9m5<?=m21b=ko50;&2=d<5:h1e=475f:9j5c?=83.:5l4=2`9m5<?=9910e<h7:18'5<g=:;k0b<76:038?l7a?3:1(<7n:30b?k7>13;976g>f783>!7>i389m6`>98827>=n9o?1<7*>9`816d=i9031=954i0d7>5<#90k1>?o4n0;:>43<3`8:=7>5$0;b>74f3g;257?9;:k155<72-;2m7<=a:l2=<<6?21b>=h50;&2=d<5:h1e=4751998m76b290/=4o523c8j4?>28307d<?d;29 4?f2;8j7c?69;3b?>o58j0;6)?6a;01e>h6100:n65f21;94?"61h09>l5a18;95f=<a8ln6=4+18c967g<f8326<j4;h3e7?6=,83j6?<n;o3:=?7b32c:j?4?:%3:e?45i2d:544>f:9j6=>=831d=h>50;9a5g`=83;1<7>t$0cb>`2<@8hn7E?nd:mf7?6=3th:o=4?:083>5}#9hk1=lk4H0`f?M7fl2e:5:4?::a5dd=83hh6=4?{%3be?7>j2B:nh5G1`f8^6g=kro1==4m:586><<6;3l1=94l:039<?{i<;027c:<:368jg7=82do?7>4$d29a7=#m80n>6*>a682?!c22;1/i;4=;%g4>7=#m1097)k6:39'ad<53-oi6?5+eb81?!cc2;1/ih4=;%ge>7=#n9097)h>:39'b7<53-l86?5+f581?!`22;1/j;4=;%d4>7=#n1097)h6:39'bd<53-li6?5+fb81?!`c2;1/jh4=;%de>7=#99:1>6*>0081?!77:380(<><:39'552=:2.:<84=;%332?4<,8:<6?5+11:96>"680097)??a;08 46e2;1/==m52:&24a<53-;;i7<4$02e>7=#98:1>6*>1081?!76:380(<?<:39'542=:2.:=84=;%322?4<,8;<6?5+10:96>"690097)?>a;08 47e2;1/=<m52:&25a<53-;:i7<4$03e>7=#9;:1>6*>2081?!75:380(<<<:39'572=:2.:>84=;%312?4<,88<6?5+13:96>"6:0097)?=a;08 44e2;1/=?m52:&26c<61<1/=l>51`;8 4g62:h0(<o=:2`8 4g42:20(<o;:0c5?!75l3;0(<<j:09'5gd=9kk0(<ll:0`b?!7f03;0e<7l:188m6b=831bhk4?::k2=c<722c8i7>5;h3:`?6=3`;2i7>5;hff>5<<a1k1<7*>9`8;=>h6100;76g78;29 4?f2130b<76:098m=1=83.:5l479:l2=<<532c3:7>5$0;b>=?<f8326>54i0`7>5<#90k1=o=4n0;:>5=<a8h96=4+18c95g5<f8326<54i0`2>5<#90k1=o=4n0;:>7=<a8h;6=4+18c95g5<f8326>54o`;94?"61h0j46`>9883?>if?3:1(<7n:`:8j4?>2810cl;50;&2=d<f02d:544=;:mb0?6=,83j6l64n0;:>6=<gh91<7*>9`8b<>h6100?76an2;29 4?f2h20b<76:498kd7=83.:5l4n8:l2=<<132ej<7>5$0;b>d><f8326:54o8d94?"61h0j46`>988;?>i>m3:1(<7n:`:8j4?>2010c4j50;&2=d<f02d:544n;:m:g?6=,83j6l64n0;:>g=<g0k1<7*>9`8b<>h6100h76a69;29 4?f2h20b<76:e98k<>=83.:5l4n8:l2=<<b32e2;7>5$0;b>d><f8326k54o8494?"61h0j46`>98824>=h1<0;6)?6a;c;?k7>13;:76a64;29 4?f2h20b<76:008?j?4290/=4o5a99m5<?=9:10c4<50;&2=d<f02d:544>4:9l=4<72-;2m7o7;o3:=?7232ei<7>5$0;b>d><f8326<84;nce>5<#90k1m55a18;952=<gho1<7*>9`8b<>h6100:465`ae83>!7>i3k37c?69;3:?>ifk3:1(<7n:`:8j4?>28k07bom:18'5<g=i11e=4751c98kdg=83.:5l4n8:l2=<<6k21dm;4?:%3:e?g?3g;257?k;:m:f?6=,83j6l64n0;:>4c<3f3;6=4+18c9e==i9031=k54i0d94?"61h0:i6`>9883?>o6l3:1(<7n:0g8j4?>2810e<m50;&2=d<6m2d:544=;:k2f?6=,83j6<k4n0;:>6=<a;21<7*>9`82a>h6100?76g=7;29 4?f28o0b<76:498m70=83.:5l4>e:l2=<<132c997>5$0;b>4c<f8326:54i3694?"61h0:i6`>988;?>o5;3:1(<7n:0g8j4?>2010e?<50;&2=d<6m2d:544n;:k15?6=,83j6<k4n0;:>g=<a;:1<7*>9`82a>h6100h76g>a;29 4?f28o0b<76:e98m7c=83.:5l4=d:l2=<<732c9o7>5$0;b>7b<f8326<54i3`94?"61h09h6`>9881?>o5i3:1(<7n:3f8j4?>2:10e>950;&2=d<5l2d:544;;:k02?6=,83j6?j4n0;:>0=<a:?1<7*>9`81`>h6100=76g<4;29 4?f2;n0b<76:698m65=83.:5l4=d:l2=<<?32c8>7>5$0;b>7b<f8326454i2394?"61h09h6`>988b?>o483:1(<7n:3f8j4?>2k10e?h50;&2=d<5l2d:544l;:k1=?6=,83j6?j4n0;:>a=<a>o1<7*>9`84`>h6100;76g8c;29 4?f2>n0b<76:098m2g=83.:5l48d:l2=<<532c<57>5$0;b>2b<f8326>54i6:94?"61h0<h6`>9887?>o0?3:1(<7n:6f8j4?>2<10e:850;&2=d<0l2d:5449;:k41?6=,83j6:j4n0;:>2=<a>>1<7*>9`84`>h6100376g83;29 4?f2>n0b<76:898m24=83.:5l48d:l2=<<f32c<=7>5$0;b>2b<f8326o54i7d94?"61h0<h6`>988`?>o1m3:1(<7n:6f8j4?>2m10e;j50;&2=d<0l2d:544j;:k5g?6=,83j6:j4n0;:>c=<a?h1<7*>9`84`>h6100:<65f6`83>!7>i3=o7c?69;32?>o113:1(<7n:6f8j4?>28807d87:18'5<g=?m1e=4751298m31=83.:5l48d:l2=<<6<21b:;4?:%3:e?1c3g;257?:;:k;1?6=,83j6:j4n0;:>40<3`2?6=4+18c93a=i9031=:54i9194?"61h0<h6`>9882<>=n0;0;6)?6a;5g?k7>13;276g71;29 4?f2>n0b<76:0c8?l>7290/=4o57e9m5<?=9k10e:h50;&2=d<0l2d:544>c:9j3g<72-;2m79k;o3:=?7c32c<<7>5$0;b>2b<f8326<k4;h46>5<#90k1;i5a18;95c=<gm21<7*>9`8g3>h6100;76ak6;29 4?f2m=0b<76:098ka3=83.:5l4k7:l2=<<532eo87>5$0;b>a1<f8326>54i9d94?"61h03i6`>9883?>o?l3:1(<7n:9g8j4?>2810e5m50;&2=d<?m2d:544=;:k;f?6=,83j65k4n0;:>6=<gmn1<7*>9`8gg>h6100;76akb;29 4?f2mi0b<76:098kag=83.:5l4kc:l2=<<532eo57>5$0;b>ae<f8326>54ob`94?"61h0hm6`>9883?>id13:1(<7n:bc8j4?>2810cn950;&2=d<di2d:544=;:m`2?6=,83j6no4n0;:>6=<gj?1<7*>9`8`e>h6100?76al4;29 4?f2jk0b<76:498kf5=83.:5l4la:l2=<<132eh>7>5$0;b>fg<f8326:54ob394?"61h0hm6`>988;?>id83:1(<7n:bc8j4?>2010coh50;&2=d<di2d:544n;:maa?6=,83j6no4n0;:>g=<gki1<7*>9`8`e>h6100h76amb;29 4?f2jk0b<76:e98kgg=83.:5l4la:l2=<<b32ei57>5$0;b>fg<f8326k54oc:94?"61h0hm6`>98824>=hj>0;6)?6a;ab?k7>13;:76am6;29 4?f2jk0b<76:008?jd2290/=4o5c`9m5<?=9:10co:50;&2=d<di2d:544>4:9lf6<72-;2m7mn;o3:=?7232eo>7>5$0;b>fg<f8326<84;nf2>5<#90k1ol5a18;952=<gm:1<7*>9`8`e>h6100:465`cg83>!7>i3ij7c?69;3:?>idm3:1(<7n:bc8j4?>28k07bmk:18'5<g=kh1e=4751c98kfe=83.:5l4la:l2=<<6k21do54?:%3:e?ef3g;257?k;:ma`?6=,83j6no4n0;:>4c<3fh96=4+18c9gd=i9031=k54i0`:>5<#90k1=o64n0;:>5=<a8h<6=4+18c95g><f8326<54i0`5>5<#90k1=o64n0;:>7=<a8h>6=4+18c95g><f8326>54i4f94?"61h0>o6`>9883?>o2j3:1(<7n:4a8j4?>2810e8750;&2=d<2k2d:544=;:k6<?6=,83j68m4n0;:>6=<a<=1<7*>9`86g>h6100?76g:6;29 4?f2<i0b<76:498m03=83.:5l4:c:l2=<<132c>87>5$0;b>0e<f8326:54i4194?"61h0>o6`>988;?>o2:3:1(<7n:4a8j4?>2010e8?50;&2=d<2k2d:544n;:k64?6=,83j68m4n0;:>g=<a=o1<7*>9`86g>h6100h76g;d;29 4?f2<i0b<76:e98m1e=83.:5l4:c:l2=<<b32c?n7>5$0;b>0e<f8326k54i5c94?"61h0>o6`>98824>=n<00;6)?6a;7`?k7>13;:76g;8;29 4?f2<i0b<76:008?l20290/=4o55b9m5<?=9:10e9850;&2=d<2k2d:544>4:9j00<72-;2m7;l;o3:=?7232c=87>5$0;b>0e<f8326<84;h40>5<#90k19n5a18;952=<a?81<7*>9`86g>h6100:465f6083>!7>i3?h7c?69;3:?>o183:1(<7n:4a8j4?>28k07d;i:18'5<g==j1e=4751c98m0c=83.:5l4:c:l2=<<6k21b9l4?:%3:e?3d3g;257?k;:k7b?6=,83j68m4n0;:>4c<3`>?6=4+18c91f=i9031=k54}r0:g?6==rT95l521``95g2<58ki6<l=;<3bf?7e927:mo4>b19~w4b42909wS?lc:?2eg<5?2wx=i?50;0xZ4ee34;jn7<9;|q2`5<72;qU=no4=0ca>73<uz;hj7>52z\2g<=:9hh1>95rs0af>5<5sW;h463>ac817>{t9jn1<7<t^0a4?87fj3897p}>f083>7}Y9l201<om:708yv7bn3:1>vP>e69>5dd=>81v<kj:181[7b>27:mo490:p5`b=838pR<k:;<3bf?3a3ty:in4?:3y]5`2<58ki68k4}r3ff?6=:rT:i>521``91d=z{8oj6=4={_3f6>;6ik0?j6s|1d;94?4|V8o:70?nb;67?xu51o0;68uQ28f894ge28h270?nb;3a3>;6ik0:n;521``95g3<uz;oo7>52z\2`2=:9hh1?;5rs0fb>5<5sW;o:63>ac801>{t9m31<7<t^0f6?87fj39?7p}>d983>7}Y9m>01<om:218yv45j3:1>vP=0c9>5dd=?l1v?<6:181[47i27:mo48c:p671=838pR?>7;<3bf?1f3ty9>;4?:3y]651<58ki6:74}r011?6=:rT9<;521``93==z{;8?6=4={_031>;6ik0<;6s|23194?4|V;:?70?nb;55?xu5:;0;6?uQ211894ge2>?0q~<=1;296~X58;16=ll5759~w7472909wS<?1:?2eg<0;2wx><h50;0xZ76734;jn79=;|q15`<72;qU=kh4=0ca>27<uz8:o7>52z\2ba=:9hh1:k5rs33a>5<5sW;mo63>ac85a>{t:8k1<7<t^0da?87fj3<o7p}=1883>7}Y9ok01<om:7a8yv4603:1>vP>f89>5dd=>k1v??8:181[7a027:mo49a:p640=838pR<h8;<3bf?0>3ty9=84?:3y]5c0<58ki6;64}r020?6=:rT:j8521``922=z{;;86=4={_3e0>;6ik0=:6s|22094?4|V;;:70?nb;:6?xu5;80;6?uQ202894ge21>0q~<<0;296~X58o16=ll5829~w74a2909wS<?e:?2eg<?:2wx>?k50;0xZ76c34;jn76>;|q16a<72;qU>=m4=0ca>=6<uz89o7>52z\14<=:9hh1;k5rs30;>5<5sW;mi63>ac84f>{t:8n1<7<t^0d0?87fj3=;7p}=1383>7}Y9o801<om:778yv7cm3:1>vP>dd9>5dd=;m1v<ji:181[7cn27:mo4<e:p615=838pR?=n;<3bf?gb3ty98<4?:3y]66?<58ki6lj4}r074?6=:rT9?5521``9ef=z{;9m6=4={_003>;6ik0jn6s|22g94?4|V;9=70?nb;cb?xu5;m0;6?uQ227894ge2h<0q~<<c;296~X5;=16=ll59c9~w75e2909wS<<3:?2eg<>82wx>:j50;0xZ73c34;jn7mm;|q13g<72;qU>8m4=0ca>f?<uz8<57>52z\11d=:9hh1o:5rs35;>5<5sW8>563>ac8`2>{t:>=1<7<t^37;?87fj3i>7p}=7783>7}Y:<=01<om:b68yv40=3:1>vP=579>5dd=k:1v?9;:181[42=27:mo4l2:p625=838pR?;;;<3bf?e63ty9;?4?:3y]605<58ki6n>4}r045?6=:rT99?521``9fc=z{;=;6=4={_065>;6ik0ii6s|27g94?4|V;>m70?nb;``?xu5>m0;6?uQ25g894ge2kh0q~<9c;296~X5<m16=ll5b`9~w70e2909wS<;c:?2eg<e12wx>;o50;0xZ72e34;jn7l7;|q12<<72;qU>9o4=0ca>g1<uz8=47>52z\10<=:9hh1n;5rs344>5<5sW8?463>ac8a1>{t:?<1<7<t^364?87fj3h?7p}=6483>7}Y:=<01<om:c18yv4?<3:1>vP=629>5dd=l;1v?6<:181[41:27:mo4k1:p6=4=838pR?8>;<3bf?b73ty94<4?:3y]636<58ki6nh4}r0;4?6=:rT99k521``9g`=z{;=m6=4={_06a>;6ik0hh6s|26g94?4|V;?i70?nb;a`?xu5?h0;6?uQ242894ge2j20q~<9f;296~X5<<16=ll5be9~w7032909wS<;4:?2eg<e:2wx>4=50;1a[4>:2T95<5Q2828Z7>a34;ij7k<;<3bf?7>k27:mo4>9g9>5dd=90n01<om:0;f?87fj32j70?nb;:;?87fj32<70?nb;:5?87fj3;m70?nb;3g?87fj3;h70?nb;3a?87fj38370?nb;02?87fj38;70?nb;3b?87fj38n70?nb;0`?87fj38i70?nb;0b?87fj39<70?nb;11?87fj39:70?nb;13?87fj38m70?nb;0:?87fj32m70?nb;:g?87fj32h70?nb;:a?87fj3?o70?nb;7a?87fj3?270?nb;7;?87fj3?<70?nb;75?87fj3?>70?nb;77?87fj3?870?nb;71?87fj3?:70?nb;73?87fj3>n70?nb;6g?87fj3>h70?nb;6a?87fj3>j70?nb;6:?87fj3>370?nb;64?87fj3>=70?nb;66?87fj3<?70?nb;40?xu6;=0;6>u21b295<1<58ki6ih4=0ca>ac<uty:hh4?:3y]5ac<5:31=ik4$0c`>4263ty95n4?:3y]6<g<5:31>4o4$0c`>4003ty:h>4?:3y]5fe<5:31=nm4$0c`>4153ty:h<4?:3y]5fd<5:31=nl4$0c`>41c3ty:h=4?:3y]5fg<5:31=no4$0c`>4>?3ty:ok4?:3y]5f?<5:31=n74$0c`>4523ty:oh4?:3y]5f><5:31=n64$0c`>45?3ty:oi4?:3y]5f1<5:31=n94$0c`>45>3ty:j<4?:3y]5`><5:31=h64$0c`>45f3ty:ik4?:3y]5`1<5:31=h94$0c`>45e3ty:ih4?:3y]5`0<5:31=h84$0c`>45d3ty:ii4?:3y]5`3<5:31=h;4$0c`>45c3ty:in4?:3y]5`2<5:31=h:4$0c`>45b3ty:io4?:3y]5`5<5:31=h=4$0c`>45a3ty:il4?:3y]5`4<5:31=h<4$0c`>4273ty:i44?:3y]5`7<5:31=h?4$0c`>4253ty98>4?:3y]66g<5:31>>o4$0c`>4243ty98<4?:3y]66?<5:31>>74$0c`>4233ty98=4?:3y]66><5:31>>64$0c`>4223ty9?k4?:3y]661<5:31>>94$0c`>4213ty9?h4?:3y]660<5:31>>84$0c`>4203ty9?i4?:3y]663<5:31>>;4$0c`>42?3ty9?n4?:3y]662<5:31>>:4$0c`>42>3ty9?o4?:3y]665<5:31>>=4$0c`>42f3ty:hk4?:3y]5a`<5:31=ih4$0c`>42e3ty95k4?:3y]6<b<5:31>4j4$0c`>42d3ty:hn4?:3y]5a1<5:31=i94$0c`>42c3ty:hl4?:3y]5a0<5:31=i84$0c`>42b3ty:h44?:3y]5a3<5:31=i;4$0c`>42a3ty:h54?:3y]5a2<5:31=i:4$0c`>4373ty9>o4?:3y]65d<5:31>=l4$0c`>4363ty9>44?:3y]65g<5:31>=o4$0c`>4353ty9>:4?:3y]65><5:31>=64$0c`>4343ty9>;4?:3y]651<5:31>=94$0c`>4333ty9>84?:3y]650<5:31>=84$0c`>4323ty9>94?:3y]653<5:31>=;4$0c`>4313ty9>>4?:3y]652<5:31>=:4$0c`>4303ty9>?4?:3y]655<5:31>==4$0c`>43?3ty9><4?:3y]654<5:31>=<4$0c`>43>3ty9>=4?:3y]657<5:31>=?4$0c`>43f3ty9=k4?:3y]656<5:31>=>4$0c`>43e3ty9=h4?:3y]5c`<5:31=kh4$0c`>43d3ty9=n4?:3y]5cb<5:31=kj4$0c`>43c3ty9=o4?:3y]5ce<5:31=km4$0c`>43b3ty9=l4?:3y]5cd<5:31=kl4$0c`>43a3ty9=44?:3y]5cg<5:31=ko4$0c`>4073ty9=54?:3y]5c?<5:31=k74$0c`>4063ty9=:4?:3y]5c><5:31=k64$0c`>4053ty9=;4?:3y]5c1<5:31=k94$0c`>4043ty9=84?:3y]5c0<5:31=k84$0c`>4033ty9=94?:3y]5c3<5:31=k;4$0c`>4023ty9=>4?:3y]5c2<5:31=k:4$0c`>4013ty9??4?:3y]647<5:31><?4$0c`>40?3ty9?<4?:3y]646<5:31><>4$0c`>40>3ty9?=4?:3y]65`<5:31>=h4$0c`>40f3ty9>k4?:3y]65c<5:31>=k4$0c`>40e3ty9>h4?:3y]65b<5:31>=j4$0c`>40d3ty9>i4?:3y]65e<5:31>=m4$0c`>40c3ty9>n4?:3y]65?<5:31>=74$0c`>40b3ty9>54?:3y]5cc<5:31=kk4$0c`>40a3ty9=i4?:3y]5c5<5:31=k=4$0c`>4173ty9=?4?:3y]5c4<5:31=k<4$0c`>4163ty9;i4?:3y]60b<5:31>8j4$0c`>4143ty9;o4?:3y]60e<5:31>8m4$0c`>4133ty9;44?:3y]60g<5:31>8o4$0c`>4123ty9;54?:3y]60?<5:31>874$0c`>4113ty9;:4?:3y]60><5:31>864$0c`>4103ty9;;4?:3y]601<5:31>894$0c`>41?3ty9;84?:3y]600<5:31>884$0c`>41>3ty9;94?:3y]603<5:31>8;4$0c`>41f3ty9;>4?:3y]602<5:31>8:4$0c`>41e3ty9;?4?:3y]605<5:31>8=4$0c`>41d3ty9;<4?:3y]604<5:31>8<4$0c`>41b3ty9;=4?:3y]607<5:31>8?4$0c`>41a3ty9:h4?:3y]61`<5:31>9h4$0c`>4>73ty9:i4?:3y]61c<5:31>9k4$0c`>4>63ty9:n4?:3y]61b<5:31>9j4$0c`>4>53ty9:o4?:3y]61e<5:31>9m4$0c`>4>43ty9:l4?:3y]61d<5:31>9l4$0c`>4>33ty9:44?:3y]61g<5:31>9o4$0c`>4>23ty9:54?:3y]61?<5:31>974$0c`>4>13ty9::4?:3y]61><5:31>964$0c`>4>03ty9:;4?:3y]611<5:31>994$0c`>4>>3ty9:84?:3y]610<5:31>984$0c`>4>f3ty9494?:3y]635<5:31>;=4$0c`>4>e3ty94>4?:3y]634<5:31>;<4$0c`>4>d3ty94?4?:3y]637<5:31>;?4$0c`>4>c3ty94<4?:3y]636<5:31>;>4$0c`>4>b3ty94=4?:3y]60`<5:31>8h4$0c`>4>a3ty9;k4?:3y]60c<5:31>8k4$0c`>4?73ty9;h4?:3y]60d<5:31>8l4$0c`>4?63ty9;l4?:3y]606<5:31>8>4$0c`>4?53ty9:k4?:3y]613<5:31>9;4$0c`>4513ty9:94?:3y]612<5:31>9:4$0c`>4503twe=kl50;0xL4gc3td:jn4?:3yK5db<ug;mh7>52zJ2ea=zf8ln6=4={I3b`>{i9ol1<7<tH0cg?xh5890;6?uG1`f8yk4793:1>vF>ae9~j7652909wE?nd:m655=838pD<ok;|l141<72;qC=lj4}o031?6=:rB:mi5rn325>5<5sA;jh6sa21594?4|@8ko7p`=0983>7}O9hn0qc<?9;296~N6im1vb?>n:181M7fl2we>=l50;0xL4gc3td9<n4?:3yK5db<ug8;h7>52zJ2ea=zf;:n6=4={I3b`>{i:9l1<7<tH0cg?xh5990;6?uG1`f8yk4693:1>vF>ae9~j7752909wE?nd:m645=838pD<ok;|l151<72;qC=lj4}o021?6=:rB:mi5rn335>5<5sA;jh6sa20594?4|@8ko7p`=1983>7}O9hn0qc<>9;296~N6im1vb??n:181M7fl2we><l50;0xL4gc3td9=n4?:3yK5db<ug8:h7>52zJ2ea=zf;;n6=4={I3b`>{i:8l1<7<tH0cg?xh5:90;6?uG1`f8yk4593:1>vF>ae9~j7452909wE?nd:m675=838pD<ok;|l161<72;qC=lj4}o011?6=:rB:mi5rn305>5<5sA;jh6sa23594?4|@8ko7p`=2983>7}O9hn0qc<=9;296~N6im1vb?<n:181M7fl2we>?l50;0xL4gc3td9>n4?:3yK5db<ug89h7>52zJ2ea=zf;8n6=4={I3b`>{i:;l1<7<tH0cg?xh5;90;6?uG1`f8yk4493:1>vF>ae9~j7552909wE?nd:m665=838pD<ok;|l171<72;qC=lj4}o001?6=:rB:mi5rn315>5<5sA;jh6sa22594?4|@8ko7p`=3983>7}O9hn0qc<<9;296~N6im1vb?=n:181M7fl2we>>l50;0xL4gc3td9?n4?:3yK5db<ug88h7>52zJ2ea=zf;9n6=4={I3b`>{i::l1<7<tH0cg?xh5<90;6?uG1`f8yk4393:1>vF>ae9~j7252909wE?nd:m615=838pD<ok;|l101<72;qC=lj4}o071?6=:rB:mi5rn365>5<5sA;jh6sa25594?4|@8ko7p`=4983>7}O9hn0qc<;9;296~N6im1vb?:n:181M7fl2we>9l50;0xL4gc3td98n4?:3yK5db<ug8?h7>52zJ2ea=zf;>n6=4={I3b`>{i:=l1<7<tH0cg?xh5=90;6?uG1`f8yk4293:1>vF>ae9~j7352909wE?nd:m605=838pD<ok;|l111<72;qC=lj4}o061?6=:rB:mi5rn375>5<5sA;jh6sa24594?4|@8ko7p`=5983>7}O9hn0qc?i9;295~N6im1vb<hn:182M7fl2wvqpNOCz0a=?e4?09j>=sO@Cy3yEFWstJK
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/netlist/readme_ip_xc6slx16_csg324.txt
0,0 → 1,67
These .ngc files are created by CoreGen for the following FPGA device:
 
Xilinx xc6slx16 CSG324
 
 
To generate ip-cores for other devices, use the following cores and settings:
 
network_register:
- Core: Block Memory Generator
- Memory Type: True Dual Port RAM
- Use Byte Write Enable: No
- Algorithm: Minimum Area
- Port A:
- Write Width: 8
- Write Depth: 64
- Operating Mode: Write First
- Enable: Always Enabled
- Port B:
- Write Width: 32
- Operating Mode: Write First
- Enable: Always Enabled
- Optional Output Registers: No
- Memory Initialization: Fill with 0
- Output Reset Pins: No
 
 
 
data_reg:
- Core: Block Memory Generator
- Memory Type: True Dual Port RAM
- Use Byte Write Enable: No
- Algorithm: Minimum Area
- Port A:
- Write Width: 8
- Write Depth: 8192
- Operating Mode: Write First
- Enable: Always Enabled
- Port B:
- Write Width: 32
- Operating Mode: Write First
- Enable: Always Enabled
- Optional Output Registers: No
- Memory Initialization: Fill with 0
- Output Reset Pins: No
 
 
 
async_fifo:
- Core: Fifo Generator
- FIFO Implementation: Independent Clocks / Block RAM
- Read Mode: First-Word Fall-Through
- Data Port Parameters:
- Write Width: 38
- Write Depth: 128
- Read Width: 38
- Optional Flags: No
- Write Port Handshaking: No
- Read Port Handshaking:
- Valid Flag: Yes / Active High
- Underflow Flag: No
- Initialization:
- Reset Pin: Yes
- Enable Reset Sync.: Yes
- Full Flags Reset Value: 0
- Use Dout Reset: Yes / Value: 0
- Programmable Flags: No
- Data Count Options: All off
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/netlist/async_fifo.ngc
0,0 → 1,3
XILINX-XDB 0.1 STUB 0.1 ASCII
XILINX-XDM V1.5e
$5654d<,[o}e~g`n;"2*776&=$94#:!1!&2?53<89:;<9>40123456789:;<=>?0123456789:;<=>?0123456789:;<=>?0123456789:;<=>?1193456789:2<=7?0127?5>AN81:?6?!00c856<NFY__6LJKR@UQEABU4881<3?n;019MKVR\3KOH_L]D@FGV975294:86?9:HLSQQ<CAHNB0<;50?37?40=AGZ^X7JFBEK?50<768?0=;4@UURVP?BHIME7=84?>07853<H]]Z^X7J@BEM?50<7681986<<3237?7<NFY__6IG_AEKS84<768>0>7GAPTV9@LVEL@Z7=7>11291>LHW]]0\ILYJL=394;743;0BB][[:VGAS@S;93:5=85=:NWWTPR=LFZJHB^31;2=50=52F__\XZ5DNRA@JV;93:5=?5<8;KMTPR=l`d7?:4?>0687=<H]]Z^X7j`uu>03?6992<?7;7660282<?11?<25;8668;56>0F<2<JML??;7CBEDGFIHKJMLONA995GFEDKJI:<68IF7DEBC0AN?<MJ;k46rn{53eto:8?!>?j;68JJUSS2yxdkRkbpu{\pmtb{a6=6=0=5:59MKVR\3zycjQjmqvz[qnumzbTm~}jru>5>585=2=1EC^ZT;rqkbYbey~rSyf}erj\j`af|l6=6=0>d:59MKVR\3zycjQiumn\pmtb{a6=6=0=4:59MKVR\3zycjQiumn\pmtb{aUj~k}t=494;433>0BB][[:qplcZ`rdeUdk|h^lfcdrb4?0;2<647;MVPUSS2mkmRm`uov?2?699k1<6B[[PTV9vaYci}kTob{at=494;7e3>0DYY^ZT;uq[agsiVidycz36;2=6>1A922:<66=0123<7E489:;O>??;9:16126992;>=:?1028<=23:;;:<5>;03225>?6823;5=769823=56710805;64974:2<?1:2K986O=F2g8EABUI^XJHI\30?d8EABUI^XJHI\311<e?DBCZH]YMIJ]<03=54=FLMXJ[_OKDS>26?69n2KOH_OXR@FGV9756l1JHI\NWSCG@W:66l1JHI\NWSCG@W:56l1JHI\NWSCG@W:46l1JHI\NWSCG@W:36l1JHI\NWSCG@W:26l1JHI\NWSCG@W:16l1JHI\NWSCG@W:06l1JHI\NWSCG@W:?6l1JHI\NWSCG@W:>6l1JHI\MRECG@W:76o1JHI\MRECG@W:687l0MIJ]BSFB@AT;984:=6OKDS@Q@DBCZ5;96=0i;@FGVGTCIMNY0<<1e:CG@WDULHNO^1?1e:CG@WDULHNO^1<1e:CG@WDULHNO^1=1e:CG@WDULHNO^1:1e:CG@WDULHNO^1;1e:CG@WDULHNO^181e:CG@WDULHNO^191e:CG@WDULHNO^161e:CG@WDULHNO^1712:CF7>GKD01J_T@L_SGD7>DR:11IY^QFNGM2?F><KJIH:NML2:AF57=D@LI@SAGLEOQF[Q_WM01H@FOXRBNH=>EKCKXOOAE<;BNQ=>EHEDC_XHJ>4:ALV@Y@MGOYMYG@N^KMBJ1<K[OJXHJ>;E68@1E3k2NJXLQXIEVK[De<LH^JSZGKTI]A<>BNIMC7<374DHCGM977601OELJF<03==>BNIMC7=?06;EKB@L:6;730HDOKI=37:g=CAHNB0<;50?;8@LGCA5;>255KI@FJ848?3MCJHD2=>99GMDBN4:437IGNDH>7:==CAHNB0807;EKB@L:1611OELJF<6<;?AOFL@63255KI@FJ8<8?3MCIHD2?>89GMGBN48:556JFBEK?548>3MCIHD2>2?;8@LDCA5;8245KICFJ8429j2NBNIG31483:<=CAKNB0<;18:FJFAO;9720HDLKI=0=<>BNJMC7?364DH@GM92902NBNIG35?:8@LDCA5<546JFBEK?3;><L@HOE1618:FJFAO;17k0HD^NDHR?4;e<L@ZJHD^31;2=e>BNXHNB\1?1a:FJTGBNX5:5o6JFPCFJT97=87k0HD^MDHR?5;><LFKOC1>19:FLEAI;99427IANDN>25;?<LFKOC1?=>89GKDBH489556J@AEM?518e3MEJHB2>5;2==>BHIME7=807;EMB@J:6611OCLJ@<3<;?AIFLF68255KO@FL818?3MEJHB2:>99GKDBH4?437IANDN>4:==CGHND0507;EMB@J:>6>1OCLQ]EF:8@JDCG5:556J@BEM?558>3MEIHB2>1?;8@JDCG5;9245KOCFL845912NDNIA315<a?AIELF6:97>19:FLFAI;9<437IAMDN>2:==CGKND0?07;EMA@J:4611OCOJ@<5<;?AIELF6>255KOCFL838?3MEIHB28>99GKGBH41437IAMDN>::2=CGKUYIJo4DNRB@JV;87i0HB^NDNR?5?69i2ND\LJ@P=3=e>BHXKND\1>1c:FLTGBHX5;1<3o4DNRA@JV;97=0ICOXRDL4?@HEZMOEn6KA_SQWVDKXIk1NBR\\TSCN[G4<NM90JIM;;GF@A6=ALY>0JI^J4:DGV@773OL3<5>7092;4=6?811MJKH:50724>@ANOLMJK6?0123457<O:1LBI?4I39J47=N9;1B>?5F339J07=N=11BBDZ__12;?LHN\YU;=55FNHVS[54?3@DBX]Q?389JJLRT\H^N;6GAIU]342=NF@^T<<94IOKW[5403@DBXR><7:KMMQY7<>1BBDZP0458MKOSW9<<7D@FT^243>OIA]U;4:5FNHV\4<1<AGC_S=O8;HLJPZ6E?2CEEYQ?C69JJLRX8M=0ECG[_1G4?LHN\V:M;6GAIU]242=NF@^T=<94IOKW[4403@DBXR?<7:KMMQY6<>1BBDZP1458MKOSW8<<7D@FT^343>OIA]U:4:5FNHV\5<1<AGC_S<O8;HLJPZ7E?2CEEYQ>C69JJLRX9M=0ECG[_0G4?LHN\V;M:6GAIU]B2>OIA]UI56GAIU]EMIC43@D]:6B@AEGG3>JHO@IJ@95CUU07?ISS;=1GYY:;;MWW11=K]]<>7@]HOOa8Idlhz_oydaac:OjjjtQm{ybcc:4N0230>H688>0B<>=4:L2462<F8:?86@>0468J461<2D:<::4N02;0>H68090B<?;;O3241=I98;?7C?>259M54533G;:895A1077?K76>=1E=<9;;O32<1=I98387C?=4:L2652<F88:86@>2368J444<2D:>9:4N0060>H6:?>0B<<84:L26=2<F882?6@>359M56633G;8=95A1207?K74;=1E=>:;;O30<6=I9=>0B<:?3:L216=I9?90B<9<;O3;7>H61:1E>==4N330?K45;2D9?>5A2518J7343G8=?6@=729M6=5<F;387C=?3:L056=I;;90B>=<;O177>H4=:1E?;=4N250?K5?;2D85>5A4118J1743G>9?6@;329M015<F=?87C:93:L736=I<190B97=;O70?K37:2D<>6@63:L:26=I1>90B46<;O;:b>HEWK_X\D@PPSMSW2=IM]]D^F:4NNLF5>I53FA:7]:4P@PWe>VNFVH^_DJWb:RJJZDR[GKFI45_K^JOQQHJ;2ZYI<5^1:P:?WGJJ1H\I_64R@O\IJBBi2XNMIQIISQW2>TBOJOJn6\JGBGAV@ADM=1Y_YO8;SQWFWUS?2XXXYW_Ed9QWQYWZ@EYEYWPAd9QWQYWZ@EYEYWPB29P@U743ZCFSNACLHQJKKYD@LI@:6]@USAF3>UU^HFTM:5\RWCO[G2<[PDH86Z]UD68P\VB:=1^<"i}f/pe+be&jf`t"Cwos]m4563Wqe7<3?=4:W3+bta&{l$knv!cmi{+H~hzVd;<=;Pxn>3:4433\:$kh!rg-dg}(ddbr$Aua}_o2343Yg5:5=?:4U1-dvc(un&mht#mcky-N|jtXf9:;;Rv`<1<261=R8&myj#|i/fa{*fjlp&GscQa012;[}i;87;986[?/fpe*w`(ojr%oaew/LzlvZh7893Ttb2?>007?P6(o{l%~k!hcy,`hn~(EqeySc>?49]{k9699;>0Y=!hrg,qb*adp'iggu!Bxnp\j5631Vrd0=0>259V4*aun'xm#jmw.bnh|*Kg{Ue<=;?_ym?4;75<2_;#j|i.sd,cf~)keas#@v`r^l3407Xpf6;2<<;;T2,cw`)zo%lou lljz,I}iuWg:;9?Qwo=2=572<]9%l~k }f.e`|+ekcq%Ftb|Pn1267Z~h494:=55Z0.eqb+ta'nis"nbdx.l3452602_;#j|i.sd,cf~)keas#c>?043;?P6(o{l%~k!hcy,`hn~(f9:;:<64U1-dvc(un&mht#mcky-m4560911^<"i}f/pe+be&jf`t"`?01:2<>S7'nxm"h gbz-gim'g:;<4?7;T2,cw`)zo%lou lljz,j564<830Y=!hrg,qb*adp'iggu!a011754><]9%l~k }f.e`|+ekcq%e<==:189V4*aun'xm#jmw.bnh|*h78:?:=55Z0.eqb+ta'nis"nbdx.l3460602_;#j|i.sd,cf~)keas#c>?363;?P6(o{l%~k!hcy,`hn~(f9:84<64U1-dvc(un&mht#mcky-m455>911^<"i}f/pe+be&jf`t"`?05:2<>S7'nxm"h gbz-gim'g:;84?7;T2,cw`)zo%lou lljz,j5628820Y=!hrg,qb*adp'iggu!a01725==R8&myj#|i/fa{*fjlp&d;<8<>8:W3+bta&{l$knv!cmi{+k67=:;37X> gsd-vc)`kq$h`fv n124<4?<]9%l~k }f.e`|+ekcq%e<=9710:8Q5)`zo$yj"ilx/aoo})i89=2=45Z0.eqb+ta'nis"nbdx.l342?6911^<"i}f/pe+be&jf`t"`?0922<>S7'nxm"h gbz-gim'g:;4<?7;T2,cw`)zo%lou lljz,j56?:820Y=!hrg,qb*adp'iggu!a01:064=R8&myj#|i/fa{*fjlp&xoS}`{r^`jj969:81^<"i}f/pe+be&jf`t"|k_qlwvZdnf5;5><5Z0.eqb+ta'nis"nbdx.pg[uhszVhbb1<1209V4*aun'xm#jmw.bnh|*tcWyd~Rlfn=1=64=R8&myj#|i/fa{*fjlp&xoS}`{r^`jj929:81^<"i}f/pe+be&jf`t"|k_qlwvZdnf5?5><5Z0.eqb+ta'nis"nbdx.pg[uhszVhbb181219V4*aun'xm#jmw.bnh|*tcWyd~Rlfn^214>S7'nxm"h gbz-gim'{nT|cz}_ckm[4473\:$kh!rg-dg}(ddbr$~iQnup\flhX:;:0Y=!hrg,qb*adp'iggu!}d^rmpwYeagU8>=5Z0.eqb+ta'nis"nbdx.pg[uhszVhbbR:=0:W3+bta&{l$knv!cmi{+wbXxg~ySoga_403?P6(o{l%~k!hcy,`hn~(zmU{by|Pbhl\276<]9%l~k }f.e`|+ekcq%yhR~ats]dg969:91^<"i}f/pe+be&jf`t"|k_qlwvZad4849<6[?/fpe*w`(ojr%oaew/sf\tkruWni7>3<?;T2,cw`)zo%lou lljz,vaYwf}xTkn2<>328Q5)`zo$yj"ilx/aoo})ulVzexQhc=6=65=R8&myj#|i/fa{*fjlp&xoS}`{r^e`808582_;#j|i.sd,cf~)keas#jPpovq[be;>7;m7X> gsd-vc)`kq$h`fv re]sjqtXojU;=k5Z0.eqb+ta'nis"nbdx.pg[uhszVmhS<?i;T2,cw`)zo%lou lljz,vaYwf}xTknQ=1g9V4*aun'xm#jmw.bnh|*tcWyd~Ril_23e?P6(o{l%~k!hcy,`hn~(zmU{by|Pgb]75c=R8&myj#|i/fa{*fjlp&xoS}`{r^e`[07a3\:$kh!rg-dg}(ddbr$~iQnup\cfY1:?1^<"i}f/pe+be&jf`t"|k_qlwvZadWhyyij2?>348Q5)`zo$yj"ilx/aoo})ulVzexQhc^cpv`a;978=7X> gsd-vc)`kq$h`fv re]sjqtXojUjkh<3<12>S7'nxm"h gbz-gim'{nT|cz}_fa\evtbo595>;5Z0.eqb+ta'nis"nbdx.pg[uhszVmhSl}}ef>7:70<]9%l~k }f.e`|+ekcq%yhR~ats]dgZgtzlm793<9;T2,cw`)zo%lou lljz,vaYwf}xTknQnssgd8385=2_;#j|i.sd,cf~)keas#jPpovq[beXizxnkR>=5:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZ75=2_;#j|i.sd,cf~)keas#jPpovq[beXizxnkR<=5:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZ55=2_;#j|i.sd,cf~)keas#jPpovq[beXizxnkR:=5:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZ35=2_;#j|i.sd,cf~)keas#jPpovq[beXizxnkR8=9:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZb6494956[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^f2848512_;#j|i.sd,cf~)keas#jPpovq[beXizxnkRj><3<1=>S7'nxm"h gbz-gim'{nT|cz}_fa\evtboVn:0>0=9:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZb64=4956[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^f2808512_;#j|i.sd,cf~)keas#jPpovq[beXizxnkRj><7<1<>S7'nxm"h gbz-gim'{nT|cz}_fa\evtboVn:S=<7;T2,cw`)zo%lou lljz,vaYwf}xTknQnssgd[a7X9;20Y=!hrg,qb*adp'iggu!}d^rmpwY`kVkx~hiPd0]16==R8&myj#|i/fa{*fjlp&xoS}`{r^e`[duumnUo=R==8:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZb6W=837X> gsd-vc)`kq$h`fv re]sjqtXojUjkh_e3\17><]9%l~k }f.e`|+ekcq%yhR~ats]dgZgtzlmTh<Q9299V4*aun'xm#jmw.bnh|*tbl|inSua}_062[}i;87;946[?/fpe*w`(ojr%oaew/sggqfcXpfxT=8?Pxn>3:44?3\:$kh!rg-dg}(ddbr$~hjzcd]{kwY6>8Usc1>11358Q5)`zo$yj"ilx/aoo})ummhiRv`r^345Z~h494946[?/fpe*w`(ojr%oaew/sggqfcXpfxT?=?Pxn>3:44?3\:$kh!rg-dg}(ddbr$~hjzcd]{kwY498Usc1>113:8Q5)`zo$yj"ilx/aoo})ummhiRv`r^115Z~h494:>:5Z0.eqb+ta'nis"nbdx.pf`pebWqeyS>=>_ym?4;463\:$kh!rg-dg}(ddbr${Qnup\flh;878:7X> gsd-vc)`kq$h`fv ws]sjqtXj`d7=3<>;T2,cw`)zo%lou lljz,swYwf}xTnd`32?02?P6(o{l%~k!hcy,`hn~({U{by|Pbhl?7;463\:$kh!rg-dg}(ddbr${Qnup\flh;<78:7X> gsd-vc)`kq$h`fv ws]sjqtXj`d793<>;T2,cw`)zo%lou lljz,swYwf}xTnd`36?03?P6(o{l%~k!hcy,`hn~({U{by|Pbhl\476<]9%l~k }f.e`|+ekcq%|~R~ats]amkY6:91^<"i}f/pe+be&jf`t"y}_qlwvZdnfV89<6[?/fpe*w`(ojr%oaew/vp\tkruWkceS><?;T2,cw`)zo%lou lljz,swYwf}xTnd`P4328Q5)`zo$yj"ilx/aoo})pzVzexQmio]665=R8&myj#|i/fa{*fjlp&}yS}`{r^`jjZ0582_;#j|i.sd,cf~)keas#z|Ppovq[be;878;7X> gsd-vc)`kq$h`fv ws]sjqtXoj6:2?>4U1-dvc(un&mht#mcky-tvZvi|{Ulo1<1219V4*aun'xm#jmw.bnh|*quWyd~Ril<2<14>S7'nxm"h gbz-gim'~xT|cz}_fa?0;473\:$kh!rg-dg}(ddbr${Qnup\cf:26;:0Y=!hrg,qb*adp'iggu!xr^rmpwY`k5<5=k5Z0.eqb+ta'nis"nbdx.uq[uhszVmhS=?i;T2,cw`)zo%lou lljz,swYwf}xTknQ>1g9V4*aun'xm#jmw.bnh|*quWyd~Ril_33e?P6(o{l%~k!hcy,`hn~({U{by|Pgb]05c=R8&myj#|i/fa{*fjlp&}yS}`{r^e`[17a3\:$kh!rg-dg}(ddbr${Qnup\cfY29o1^<"i}f/pe+be&jf`t"y}_qlwvZadW?8=7X> gsd-vc)`kq$h`fv ws]sjqtXojUjkh<1<12>S7'nxm"h gbz-gim'~xT|cz}_fa\evtbo5;5>;5Z0.eqb+ta'nis"nbdx.uq[uhszVmhSl}}ef>1:70<]9%l~k }f.e`|+ekcq%|~R~ats]dgZgtzlm7?3<9;T2,cw`)zo%lou lljz,swYwf}xTknQnssgd8185>2_;#j|i.sd,cf~)keas#z|Ppovq[beXizxnk1;1279V4*aun'xm#jmw.bnh|*quWyd~Ril_`qqab:16;?0Y=!hrg,qb*adp'iggu!xr^rmpwY`kVkx~hiP0378Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`aX9;?0Y=!hrg,qb*adp'iggu!xr^rmpwY`kVkx~hiP2378Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`aX;;?0Y=!hrg,qb*adp'iggu!xr^rmpwY`kVkx~hiP4378Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`aX=;?0Y=!hrg,qb*adp'iggu!xr^rmpwY`kVkx~hiP63;8Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`aXl86;2?74U1-dvc(un&mht#mcky-tvZvi|{UloRo|rde\`4:66;30Y=!hrg,qb*adp'iggu!xr^rmpwY`kVkx~hiPd0>1:7?<]9%l~k }f.e`|+ekcq%|~R~ats]dgZgtzlmTh<2<>3;8Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`aXl86?2?74U1-dvc(un&mht#mcky-tvZvi|{UloRo|rde\`4:26;30Y=!hrg,qb*adp'iggu!xr^rmpwY`kVkx~hiPd0>5:7><]9%l~k }f.e`|+ekcq%|~R~ats]dgZgtzlmTh<Q?299V4*aun'xm#jmw.bnh|*quWyd~Ril_`qqabYc9V;946[?/fpe*w`(ojr%oaew/vp\tkruWniTm~|jg^f2[74?3\:$kh!rg-dg}(ddbr${Qnup\cfYf{{olSi?P33:8Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`aXl8U?>55Z0.eqb+ta'nis"nbdx.uq[uhszVmhSl}}ef]g5Z3502_;#j|i.sd,cf~)keas#z|Ppovq[beXizxnkRj>_713?P6(o{l%~k!hl1,q`*au9'xm{kz Mlw{[WGJW[NTICQIWGV2571<]9%l~k }f.eo4+tc'nx:"hxfu-Nip~Xf9:>><?=9:W3+bta&{l$ka>!re-dv4(un~l#_OB_SGDKPRXMG;8?6[?/fpe*w`(oe:%~i!hr0,qbr`s'jy~Rhxfu]ppdrbWOYFSKHk1248Q5)`zo$yj"ic0/pg+bt6&{l|jy!lusp\br`sWz~jxhQISL]EBa7*Ag9<7X> gsd-vc)`d9$yh"i}1/pescr(k|xySkyit^qweqcXNZGTJKj>-Hl276=R8&myj#|i/fn3*wb(o{;%~kyit.avvwYao~Tyo{e^DPIZ@Al;9=7X> gsd-vc)`d9$yh"i}1/pescr(k|xySkyit^qweqcXNZGTJKj=-Hl03>S7'nxm"h gm2-va)`z8$yjzh{/bwqvZ`pn}Uxxlzj_GQN[C@c:$Ce=?64U1-dvc(un&mg<#|k/fp2*w`pn}%na}zv_guepZ`e:>1^<"i}f/pe+bj7&{n$k?!rguep*cjx}sTjzh{_h03?P6(o{l%~k!hl1,q`*au9'xm{kz n126673<]9%l~k }f.eo4+tc'nx:"hxfu-vw`tX~hfbh?>4U1-dvc(un&mg<#|k/fpbw+tt|z%e<=::229V4*aun'xm#jb?.sf,cwgt&{y"`?0572=2443\:$kh!rg-dh5(ul&mym~ }suq,j563=;;=>:5Z0.eqb+ta'nf;"j gscp*wus{&d;<9;=17]PS5443\:$kh!rg-dh5(ul&mym~ }suq,j563=;8<><5Z0.eqb+ta'nf;"j gscp*wus{&d;<9;;239V4*aun'xm#jb?.sf,cwgt&{y"`?0575177<]9%l~k }f.eo4+tc'nxj#||tr-m45221;80Y=!hrg,qb*ak8'xo#j|ns/pppv)i89>>5=<6;T2,cw`)zo%l`= }d.eqev(u{}y$~lcPelrw}Z`eW`887X> gsd-vc)`d9$yh"|nup,IhsWg:;><<>229V4*aun'xm#jb?.sf,vuhsz&GfyuQa010274443\:$kh!rg-dh5(ul&x{by| gb2-gjsi|5:5>>5Z0.eqb+ta'nf;"j rqlwv*ad8'idycz31?00?P6(o{l%~k!hl1,q`*twf}x$kn>!cnwmp949::1^<"i}f/pe+bj7&{n$~}`{r.e`4+eh}g~7?3<<;T2,cw`)zo%l`= }d.psjqt(oj:%ob{at=6=66=R8&myj#|i/fn3*wb(zyd~"il0/alqkr;=7887X> gsd-vc)`d9$yh"|nup,cf6)kfex181239V4*aun'xm#jb?.sf,vuhsz&mh<#m`uov\474<]9%l~k }f.eo4+tc'{zex!hc1,`kphsW8897X> gsd-vc)`d9$yh"|nup,cf6)kfexR<=2:W3+bta&{l$ka>!re-qtkru'ni;"naznu]067=R8&myj#|i/fn3*wb(zyd~"il0/alqkrX<;80Y=!hrg,qb*ak8'xo#~ats-dg5(dg|dS8<=;T2,cw`)zo%l`= }d.psjqt(oj:%ob{at^412>S7'nxm"h gm2-va)uxg~y#jm?.bmvjqYc95:5>;5Z0.eqb+ta'nf;"j rqlwv*ad8'idyczPd0>2:70<]9%l~k }f.eo4+tc'{zex!hc1,`kphsWm;7>3<9;T2,cw`)zo%l`= }d.psjqt(oj:%ob{at^f28685>2_;#j|i.sd,ci6)zm%y|cz}/fa3*firf}Uo=1:1279V4*aun'xm#jb?.sf,vuhsz&mh<#m`uov\`4:26;<0Y=!hrg,qb*ak8'xo#~ats-dg5(dg|dSi?36?06?P6(o{l%~k!hl1,q`*twf}x$kn>!cnwmpZb6W98>7X> gsd-vc)`d9$yh"|nup,cf6)kfexRj>_006?P6(o{l%~k!hl1,q`*twf}x$kn>!cnwmpZb6W;8>7X> gsd-vc)`d9$yh"|nup,cf6)kfexRj>_206?P6(o{l%~k!hl1,q`*twf}x$kn>!cnwmpZb6W=8>7X> gsd-vc)`d9$yh"|nup,cf6)kfexRj>_406?P6(o{l%~k!hl1,q`*twf}x$kn>!cnwmpZb6W?;m7X> gsd-vc)`d9$yh"|nup,j56595:5>;5Z0.eqb+ta'nf;"j rqlwv*h78;;7<3?PIOT\44`<]9%l~k }f.eo4+tc'{zex!a01028486n2_;#j|i.sd,ci6)zm%y|cz}/o2364:568l0Y=!hrg,qb*ak8'xo#~ats-m45464:49<6[?/fpe*w`(oe:%~i!}povq+k67:8682<?i;T2,cw`)zo%l`= }d.psjqt(f9:9=1:1219V4*aun'xm#jb?.sf,vuhsz&d;<??34?32b>S7'nxm"h gm2-va)uxg~y#c>?20>6:76<]9%l~k }f.eo4+tc'{zex!a010280869o1^<"i}f/pe+bj7&{n$~}`{r.l3477;>7887X> gsd-vc)`d9$yh"|nup,j56595<5S^Y?219V4*aun'xm#jb?.vp,crgt&~y"`?05717>S7'nxm"h gm2-sw)`hy%{~z|/o230074:;90Y=!hrg,qb*ak8'}y#jyns/uppv)i89>>=;7=3:W3+bta&{l$ka>!ws-dsdu)z~x#c>?443:075<]9%l~k }f.eo4+qu'n}j#y|tr-m4522:;=9>6[?/fpe*w`(oe:%{!hw`q-svrt'g:;88<;239V4*aun'xm#jb?.vp,crgt&~y"`?0577174<]9%l~k }f.eo4+qu'n}j#y|tr-m4522?1837X> gsd-vc)`d9$|~"ixar,twqu(zhgTjxbc_g`\m73<]9%l~k }f.eo4+qu'n}j#y|tr-qehYa}efTe<j4U1-dvc(un&mg<#y}/scn[rtXmgUb=?74U1-dvc(un&mg<#y}/vrmpw)Je|rTb=>=103\MKPX8;90Y=!hrg,qb*ak8'}y#z~ats-Nip~Xf9:9=??=3:W3+bta&{l$ka>!ws-ttkru'Dg~tR`?033057><]9%l~k }f.eo4+qu'~zex!hib2-cf6)kfex1>1299V4*aun'xm#jb?.vp,suhsz&mbo= hc1,`kphs484946[?/fpe*w`(oe:%{!xpovq+bod8'mh<#m`uov?6;4?3\:$kh!rg-dh5(pz&}{by| gha3*be7&je~by2<>3:8Q5)`zo$yj"ic0/uq+rvi|{%len>!gb2-gjsi|5>5>55Z0.eqb+ta'nf;"z| wqlwv*ank9$lo= lotlw808502_;#j|i.sd,ci6){%||cz}/fk`4+ad8'idycz36?04?P6(o{l%~k!hl1,tv*qwf}x$kdm?.fa3*firf}U;>:5Z0.eqb+ta'nf;"z| wqlwv*ank9$lo= lotlw[4403\:$kh!rg-dh5(pz&}{by| gha3*be7&je~byQ=269V4*aun'xm#jb?.vp,suhsz&mbo= hc1,`kphsW:8<7X> gsd-vc)`d9$|~"ynup,cle7&ni;"naznu]762=R8&myj#|i/fn3*rt(yd~"ifc1,dg5(dg|dS8<8;T2,cw`)zo%l`= xr.usjqt(o`i;"jm?.bmvjqY1:k1^<"i}f/pe+bj7&~x${}`{r.ejg5(`k9$hcx`{_e3?4;4e3\:$kh!rg-dh5(pz&}{by| gha3*be7&je~byQk1=3=6g=R8&myj#|i/fn3*rt(yd~"ifc1,dg5(dg|dSi?32?0a?P6(o{l%~k!hl1,tv*qwf}x$kdm?.fa3*firf}Uo=1=12c9V4*aun'xm#jb?.vp,suhsz&mbo= hc1,`kphsWm;783<m;T2,cw`)zo%l`= xr.usjqt(o`i;"jm?.bmvjqYc95?5>o5Z0.eqb+ta'nf;"z| wqlwv*ank9$lo= lotlw[a7;>78j7X> gsd-vc)`d9$|~"ynup,cle7&ni;"naznu]g5Z65i2_;#j|i.sd,ci6){%||cz}/fk`4+ad8'idyczPd0]26d=R8&myj#|i/fn3*rt(yd~"ifc1,dg5(dg|dSi?P23c8Q5)`zo$yj"ic0/uq+rvi|{%len>!gb2-gjsi|Vn:S><n;T2,cw`)zo%l`= xr.usjqt(o`i;"jm?.bmvjqYc9V>9m6[?/fpe*w`(oe:%{!xpovq+bod8'mh<#m`uov\`4Y2:h1^<"i}f/pe+bj7&~x${}`{r.ejg5(`k9$hcx`{_e3\27d<]9%l~k }f.eo4+qu'~zex!hib2-cf6)kfexRj=<1<1f>S7'nxm"h gm2-sw)pxg~y#jgl0/e`4+eh}g~Th?2>>3`8Q5)`zo$yj"ic0/uq+rvi|{%len>!gb2-gjsi|Vn90?0=b:W3+bta&{l$ka>!ws-ttkru'nch<#il0/alqkrXl;682?l4U1-dvc(un&mg<#y}/vrmpw)`aj:%kn>!cnwmpZb54=49n6[?/fpe*w`(oe:%{!xpovq+bod8'mh<#m`uov\`7:26;h0Y=!hrg,qb*ak8'}y#z~ats-dmf6)oj:%ob{at^f18385i2_;#j|i.sd,ci6){%||cz}/fk`4+ad8'idyczPd3]36d=R8&myj#|i/fn3*rt(yd~"ifc1,dg5(dg|dSi<P13c8Q5)`zo$yj"ic0/uq+rvi|{%len>!gb2-gjsi|Vn9S?<n;T2,cw`)zo%l`= xr.usjqt(o`i;"jm?.bmvjqYc:V99m6[?/fpe*w`(oe:%{!xpovq+bod8'mh<#m`uov\`7Y3:h1^<"i}f/pe+bj7&~x${}`{r.ejg5(`k9$hcx`{_e0\17g<]9%l~k }f.eo4+qu'~zex!hib2-cf6)kfexRj=_73e?P6(o{l%~k!hl1,tv*qwf}x$b=>=1=2=5c=R8&myj#|i/fn3*rt(yd~"`?033?5;7a3\:$kh!rg-dh5(pz&}{by| n12159499o1^<"i}f/pe+bj7&~x${}`{r.l3477;;78:7X> gsd-vc)`d9$|~"ynup,j5659595=<<?;T2,cw`)zo%l`= xr.usjqt(f9:9=1=12368Q5)`zo$yj"ic0/uq+rvi|{%e<=<><2<\fab79o1^<"i}f/pe+bj7&~x${}`{r.l3477;<78;7X> gsd-vc)`d9$|~"ynup,j56595>5=<h4U1-dvc(un&mg<#y}/vrmpw)i898:080=0:W3+bta&{l$ka>!ws-ttkru'g:;><2:>03e?P6(o{l%~k!hl1,tv*qwf}x$b=>=1=4=65=R8&myj#|i/fn3*rt(yd~"`?033?2;76?2_;#j|i.sd,i`k(lfSd2?>0:8Q5)`zo$yj"cjm.flqqYn48:5=55Z0.eqb+ta'dof#iazt^k?548602_;#j|i.sd,i`k(lfSd2>2?3;?P6(o{l%~k!bel-gkprXa5;82<64U1-dvc(un&gna"j`uu]j8429911^<"i}f/pe+hcj'me~xRg314<2<>S7'nxm"h mdo,`jssW`6::3?7;T2,cw`)zo%fi`!kotv\m9706820Y=!hrg,qb*kbe&ndyyQf<0:=5==R8&myj#|i/lgn+air|Vc7=40>7:W3+bta&{l$ahc dnww[l:66820Y=!hrg,qb*kbe&ndyyQf<32=5==R8&myj#|i/lgn+air|Vc7><0>8:W3+bta&{l$ahc dnww[l:5:7;37X> gsd-vc)jmd%ocxzPi=00:4><]9%l~k }f.ofi*bh}}Ub0?:1199V4*aun'xm#`kb/emvpZo;:<4:46[?/fpe*w`(elg$hb{{_h>12;7?3\:$kh!rg-nah)cg|~Te1<8>0:8Q5)`zo$yj"cjm.flqqYn4;25=55Z0.eqb+ta'dof#iazt^k?6<86?2_;#j|i.sd,i`k(lfSd2=>0:8Q5)`zo$yj"cjm.flqqYn4::5=55Z0.eqb+ta'dof#iazt^k?748602_;#j|i.sd,i`k(lfSd2<2?3;?P6(o{l%~k!bel-gkprXa5982<64U1-dvc(un&gna"j`uu]j8629911^<"i}f/pe+hcj'me~xRg334<2<>S7'nxm"h mdo,`jssW`68:3?7;T2,cw`)zo%fi`!kotv\m95068=0Y=!hrg,qb*kbe&ndyyQf<2<23>S7'nxm"h mdo,`jssW`6?2<94U1-dvc(un&gna"j`uu]j8086?2_;#j|i.sd,i`k(lfSd29>058Q5)`zo$yj"cjm.flqqYn4>4:;6[?/fpe*w`(elg$hb{{_h>;:41<]9%l~k }f.ofi*bh}}Ub040>6:W3+bta&{l$ahc dnww[lY79?1^<"i}f/pe+hcj'me~xRgP1058Q5)`zo$yj"cjm.flqqYnW8::;6[?/fpe*w`(elg$hb{{_h]2541<]9%l~k }f.ofi*bh}}UbS<<>7:W3+bta&{l$ahc dnww[lY6;8=0Y=!hrg,qb*kbe&ndyyQf_0623>S7'nxm"h mdo,`jssW`U:9<94U1-dvc(un&gna"j`uu]j[406?2_;#j|i.sd,i`k(lfSdQ>7058Q5)`zo$yj"cjm.flqqYnW82:;6[?/fpe*w`(elg$hb{{_h]2=40<]9%l~k }f.ofi*bh}}UbS??8;T2,cw`)zo%fi`!kotv\mZ479>1^<"i}f/pe+hcj'me~xRgP2034?P6(o{l%~k!bel-gkprXaV89=:5Z0.eqb+ta'dof#iazt^k\66703\:$kh!rg-nah)cg|~TeR<;169V4*aun'xm#`kb/emvpZoX:<;<7X> gsd-vc)jmd%ocxzPi^0552=R8&myj#|i/lgn+air|VcT>:?8;T2,cw`)zo%fi`!kotv\mZ4?9>1^<"i}f/pe+hcj'me~xRgP2835?P6(o{l%~k!bel-gkprXaV9:;6[?/fpe*w`(elg$hb{{_h]0441<]9%l~k }f.ofi*bh}}UbS>?>7:W3+bta&{l$ahc dnww[lY4:8=0Y=!hrg,qb*kbe&ndyyQf_2123>S7'nxm"h mdo,`jssW`U88<94U1-dvc(un&gna"j`uu]j[636?2_;#j|i.sd,i`k(lfSdQ<6058Q5)`zo$yj"cjm.flqqYnW:=::6[?/fpe*w`(elg$hb{{_h]753=R8&myj#|i/lgn+air|VcT9<84U1-dvc(un&gna"j`uu]j[3713\:$kh!rg-nah)cg|~TeR9>6:W3+bta&{l$ahc dnww[lY?9?1^<"i}f/pe+hcj'me~xRgP9518Q5)`zo$yj"cjm.eai+aeen$ln`in.oefgf(een%i`fQbel]dakcui}ey#iaztc]j8583<2_;#j|i.sd,i`k(okg%koch.f`ncd(iolih"och/cnh[hcjWnoeio{os-gkpreW`6:<3:;;T2,cw`)zo%fi`!hbl,dfha)okglm#`heba-fha(jeaTahcPgdlfvdrhz&ndyylPi=32:12<]9%l~k }f.ofi*aee'miaj hbleb*kabkj$iaj!mlj]nahY`mgoymya}/emvpgYn4885895Z0.eqb+ta'dof#jlb.f`nc+aeenk%bjklc/`nc*dkcVgnaRijndpbpjt(lfnRg312<70>S7'nxm"h mdo,cgk)okgl"jlbg`,mc`ed&kgl#obd_lgn[bcim{kc!kotva[l:6<7>?7X> gsd-vc)jmd%ln` hble-cgk`i'dlinm!ble,fimXelgTkh`jr`vlv*bh}}hTe1?:>568Q5)`zo$yj"cjm.eai+aeen$ln`in.oefgf(een%i`fQbel]dakcui}ey#iaztc]j8409<=1^<"i}f/pe+hcj'nhf"jlbg/eaibg)fnoho#lbg.`ooZkbeVmnbh|ntnp,`jssjVc7=:0;4:W3+bta&{l$ahc gco-cgk`&nhfkl agda`*gk`'kf`S`kb_fgmawgsg{%ocxzm_h>2<;233\:$kh!rg-nah)`jd$ln`i!gcode+h`mji%n`i bmi\i`kXoldn~lz`r.flqqdXa5;229=4U1-dvc(un&gna"imm/eaib(`jdmj"cijcb,aib)edbUfi`Qheogqeqiu'me~xoQf<0<70>S7'nxm"h mdo,cgk)okgl"jlbg`,mc`ed&kgl#obd_lgn[bcim{kc!kotva[l:587>?7X> gsd-vc)jmd%ln` hble-cgk`i'dlinm!ble,fimXelgTkh`jr`vlv*bh}}hTe1<>>568Q5)`zo$yj"cjm.eai+aeen$ln`in.oefgf(een%i`fQbel]dakcui}ey#iaztc]j8749<=1^<"i}f/pe+hcj'nhf"jlbg/eaibg)fnoho#lbg.`ooZkbeVmnbh|ntnp,`jssjVc7>>0;4:W3+bta&{l$ahc gco-cgk`&nhfkl agda`*gk`'kf`S`kb_fgmawgsg{%ocxzm_h>10;233\:$kh!rg-nah)`jd$ln`i!gcode+h`mji%n`i bmi\i`kXoldn~lz`r.flqqdXa58>29:4U1-dvc(un&gna"imm/eaib(`jdmj"cijcb,aib)edbUfi`Qheogqeqiu'me~xoQf<34=01=R8&myj#|i/lgn+bdj&nhfk#immfc-jbcdk'hfk"lck^ofiZabflxjxb| dnwwfZo;:>4?86[?/fpe*w`(elg$koc!gcod*bdjoh$ekhml.cod+gjlWdofSjkaescwkw)cg|~iSd2=8?67?P6(o{l%~k!bel-dfh(`jdm%kocha/ldafe)jdm$naePmdo\c`hbzh~d~"j`uu`\m94>6=90Y=!hrg,qb*kbe&mia#immf,dfhaf&gmnon mmf-ahnYjmdUlick}aumq+air|kUb0?0;4:W3+bta&{l$ahc gco-cgk`&nhfkl agda`*gk`'kf`S`kb_fgmawgsg{%ocxzm_h>04;233\:$kh!rg-nah)`jd$ln`i!gcode+h`mji%n`i bmi\i`kXoldn~lz`r.flqqdXa59:29:4U1-dvc(un&gna"imm/eaib(`jdmj"cijcb,aib)edbUfi`Qheogqeqiu'me~xoQf<20=01=R8&myj#|i/lgn+bdj&nhfk#immfc-jbcdk'hfk"lck^ofiZabflxjxb| dnwwfZo;;:4?86[?/fpe*w`(elg$koc!gcod*bdjoh$ekhml.cod+gjlWdofSjkaescwkw)cg|~iSd2<4?67?P6(o{l%~k!bel-dfh(`jdm%kocha/ldafe)jdm$naePmdo\c`hbzh~d~"j`uu`\m9526=>0Y=!hrg,qb*kbe&mia#immf,dfhaf&gmnon mmf-ahnYjmdUlick}aumq+air|kUb0>81459V4*aun'xm#`kb/f`n*bdjo'miajo!nfg`g+djo&hggRcjm^efj`tf|fx$hb{{b^k?7283;2_;#j|i.sd,i`k(okg%koch.f`ncd(iolih"och/cnh[hcjWnoeio{os-gkpreW`6829=4U1-dvc(un&gna"imm/eaib(`jdmj"cijcb,aib)edbUfi`Qheogqeqiu'me~xoQf<5<77>S7'nxm"h mdo,cgk)okgl"jlbg`,mc`ed&kgl#obd_lgn[bcim{kc!kotva[l:26=90Y=!hrg,qb*kbe&mia#immf,dfhaf&gmnon mmf-ahnYjmdUlick}aumq+air|kUb0;0;3:W3+bta&{l$ahc gco-cgk`&nhfkl agda`*gk`'kf`S`kb_fgmawgsg{%ocxzm_h>4:15<]9%l~k }f.ofi*aee'miaj hbleb*kabkj$iaj!mlj]nahY`mgoymya}/emvpgYn414??6[?/fpe*w`(elg$koc!gcod*bdjoh$ekhml.cod+gjlWdofSjkaescwkw)cg|~iSd26>678Q5)`zo$yj"cjm.eai+aeen$ln`in.oefgf(een%i`fQbel]dakcui}ey#{ocie,`wqt(zhggcb~T0\,qeh(u'z<Tbbgaiu,qeh)TLY$\EIKPPSKN=+tfe>?0Y=!hrg,qb*kbe&mia#immf,dfhaf&gmnon mmf-ahnYjmdUlick}aumq+sgkam$hy| r`ookjv\9T$ym` }/r4\jjoia}$ym`!\DQ,TMACXX[CF5#|nm0d8Q5)`zo$yj"cjm.eai+rjxVxjaR|k_dl14>S7'nxm"h mdo,cgk)|dzT~lcPre]fj4743\:$kh!rg-qehYulVoe=:5Z0.eqb+ta'{kfSkhotv\ak743\:$kh!rg-qehYpzVoe>n5Z0.eqb+ta'{ynae nfuq`wus&nxxx#|k_sqw[wc`4949o6[?/fpe*w`(zz~i`f!agvpgvvr)o{y"jPrrv\v`a;978h7X> gsd-vc)u{}hgg"`hwsfqwq(`zz~%~iQ}su]qab:56;h0Y=!hrg,qb*tt|kf`#cixreppp+au{}$yhR||t^pfcZ65j2_;#j|i.sd,vvredb%ekz|krrv-cwus&{nT~~zPrde\57d<]9%l~k }f.pppgjl'gm|~i||t/eqwq(ulVxxxR|jg^01g>S7'nxm"h rrvahn)io~xo~~z!gsqw*rtXzz~T~hi30?0`?P6(o{l%~k!}su`oo*h`{nyy hrrv-swYu{}Uyij2>>3`8Q5)`zo$yj"||tcnh+kapzmxxx#i}su,tvZtt|VxnkR>=b:W3+bta&{l$~~zmlj-mcrtczz~%k}{.vp\vvrXzlmT=<j4U1-dvc(un&xxxobd/sf\vvrXizxnk?>4U1-dvc(un&xxxobd/sf\vvrXizxnkRj>219V4*aun'xm#}{bmi,vaYu{}Ujkh_e02g>S7'nxm"h rrvahn)ulVxxxRm`mc3g?P6(o{l%~k!}su`oo*tcW{ySnabb03g?P6(o{l%~k!}su`oo*quW{ySl}}ef03?P6(o{l%~k!}su`oo*quW{ySl}}ef]g576<]9%l~k }f.pppgjl'~xT~~zParpfcZb59j1^<"i}f/pe+wusjea${Q}su]`khd6l2_;#j|i.sd,vvredb%|~R||t^alig7f3\YN^ROCI@Q`?PUBZV\B_DLCE29UGF?<^@O\SYW_E89TADQBD5:5n6YJAVGO84<7601\ILYJL=3==>QBJ^O^0=0m;VGAS@S;93:556YJBVGV848d3^XBXHQBOEG\Ef=PZ@^NS@AKE^@2`>^ND@DS!UJM 1,2$VRRJ):%=-O\CHK5?]USD@H<7U][_FLGf>^XKFXNSD@IO79[`gYNlo1SheQ_rhoUawungg;;7Ujb_LcikwPbzzcdb<>4Xeo\Ilhhz_oydaa2d9\[Z^KFDUTS=QP_T2,cw`)zo%l`= }d.psjqt(f9:9=1:11238[ZY_DGGTSR?P_^W3+bta&{l$ka>!re-qtkru'Dg~tR`?0331513<WVUS@CCP_^0\[ZS7'nxm"h gm2-va)`z8$yjzh{/bwqvZ`pn}Uxxlzj_GQN[C@c9$Ce=>?4_^][HKKXWV9TSR[?/fpe*w`(oe:%{!xpovq+HkrpVd;<??=1358[ZY_DGGTSR:P_^W3+bta&{l$knv!cmi{+k67?0;9;6QP_YNMIZYX=VUTY=!hrg,qb*adp'iggu!a0116560<WVUS@CCP_^4\[ZS7'nxm"h gbz-gim'{ooynkPxnp\757Xpf6;2<=9;^]\\IHJWVU<SRQZ0.eqb+ta'nis"nbdx.pf`pebWqeyS<;>_ym?4;75m2UTSUBAM^]\<ZYX]9%l~k }f.eo4+qu'~zex!a010281869;1Toj!nsxl`[coag'dlcn5nllmppZcjx}si7lbborv\bpjki2kxucmPfhdl6==f{pdhSkgio-djbjY`mgoymya}_w7\7)HHFL&ECCK<d`9bw|hdWocmc!hffn]dakcui}eyS{;P3-y`[mgtW`dSnbd=1.`[mgtWzxxx0>#c^pg[ctby4;'oRkaacnf[wusWzseo0?#c^jbwZtcWmkmRm`uov>4)eXl`dT{dj{h<1;(fYoizU|~Rjnt`]`kphs59&hSk{cl^doebuXzz~Tzlb20-a\mhvkmdoexlzfoo]w}uc::%iTy~kPel`f`accW{ol1="l_vp\bwcv58&hSx}j_emvpZtt|4;'oR{addpehjqXdf}6<!mPh`q\kscunee|1="l_qpfhjgcWekicmv=1.`[air|V}bhyf239.`[hu`ggU}ma3>,b]q`Zbbx}b6=?6#c^gqvjtXag`noyg`n^vzt`;7$jUcm~Qznegqbiip59&hSeo|_`nnkvrXn|fg1="l_icp[wus58&hSio{a^alqkrX`nd09#c^jbwZquWhi`1="l_tqf[`ed59&hSnabmnl\giidc4:'oRy}_`ah[iip59&hSjPpovq[roc|a7< nQzsd]escrXlh~jSnaznu?3(fYoizUj``a|t^gntq:8%iT~iQkauc\gjsi|V}bhyf27-a\kscunee|Saax=1.`[rtXxg~ySzgkti?4(fYwzfmTi`~{y^vzt`;7$jU|~Rjnt`]`kphsW~coxe38,b]sv`jhimUyij}21-a\`jssW{yS{oc=1.`[mgtWmkmRm`uov>4)eXx{elSk{cl^vkv`uoWgolmykPv`n>570+kV}ySikti?26=*dWyxdkRkbpu{\pmtb{aUeijo{e^tbh83+kVzycjQjmqvz[qnumzbTm~}jru]uei;3$jUcm~Qyamkg94*dWyxdkRhzlm]wlwct`Vkxh|{_wco9440$jef|b`jnu]mehc:izseoRhffn.`[sgkamUgcz3?,b]svlkXn`ldSywe<726}15$jU{~biPftno[qwm4:'oRcjmnpz[qwm4;'q?:4ar{mgZ`nnfUmekaPgdlfvdrhzV|>S>Qwsu]22>dfkb{h6lncjws[hguclx87nbdd:fbpdYdg|d$='k;ecweZeh}g~#=$j4d`vb[firf}"9%i5kauc\gjsi|!9"h6jnt`]`kphs =#o7io{a^alqkr/= n0hlzn_bmvjq.1!o1omyoPcnwmp90=87=0hog{esp5?aoi 9#=7iga(0+4?aoi 8:";6jfn)32-2=cag":>$94dhl+56/03mce$<:&7:fjj-72!>1oec&>6(58`lh/9>#<7iga(0:*3>bnf!;2%;5kio*1-2=cag"9<$94dhl+64/03mce$?<&7:fjj-44!>1oec&=4(58`lh/:<#<7iga(34*3>bnf!8<%:5kio*1<,1<l`d#>4'9;ekm,6/03mce$>>&7:fjj-56!>1oec&<2(58`lh/;:#<7iga(26*3>bnf!9>%:5kio*02,1<l`d#?:'9;ekm,1/13mce$8'9;ekm,3/13mce$:'9;ekm,=/13mce$4'9;ekm85803mce0<>17:fjj9766>1oec2>2?58`lh;9:4<7iga<06=3>bnf5;>2:5kio>22;1<l`d7=:08;ekm84>9?2nbb1?6>79gmk:66>1oec2=0?58`lh;:84<7iga<30=3>bnf5882:5kio>10;1<l`d7>808;ekm8709?2nbb1<8>69gmk:507=0hd`328<5?aoi4;4<7iga<22=3>bnf59:2:5kio>06;1<l`d7?>08;ekm8629?2nbb1=:>69gmk:4>730hd`33683:2=cag68;384dhl?7;0<l`d78384dhl?1;0<l`d7:384dhl?3;0<l`d74384dhl?=;1<lf$='8;emvp-7.02ndyy&>0(:8`jss 8;"46j`uu*26,><lf$<=&8:flqq.6< 20hb{{(07*<>bh}}"::$64dnww,41.02ndyy&>8(:8`jss 83";6j`uu*1-==cg|~#>='7;emvp-46!11ocxz'23+;?air|!88%55kotv+61/?3me~x%<:)99gkpr/:?#37iazt)04-==cg|~#>5'7;emvp-4>!>1ocxz'3(:8`jss ::"46j`uu*05,><lf$><&8:flqq.4; 20hb{{(26*<>bh}}"89$64dnww,60.02ndyy&<7(58`jss =#<7iazt)7*3>bh}}"=%:5kotv+3,1<lf$5'8;emvp-?.?2ndyy2?>99gkpr;99437iazt=32:==cg|~7=?07;emvp974611ocxz315<;?air|5;>255kotv?538?3me~x1?8>99gkpr;91437iazt=3::2=cg|~7=364dnww876902ndyy2=1?:8`jss4;8546j`uu>17;><lf0?:18:flqq:5=720hb{{<34=<>bh}}69;364dnww87>902ndyy2=9?58`jss4;437iazt=13:==cg|~7?<07;emvp955611ocxz332<;?air|59?255kotv?708?3me~x1=9>`9gkpr;;>0;255kotv?72803me~x1=17:flqq:36>1ocxz35?58`jss4?4<7iazt=5=3>bh}}632:5kotv?=;><mmcm>cik5:gntq5n2lbjbQheogqeqiuW?T?!.Wimkm|%EHZL*Lick}aumq$47)<=1myabk;hliafrcj`~n~j4iohfgquea}oy~:5fnu]`hn><fniiydbk8:muaw`kg~k0|ah_dosp|733yxdkRkbpu{\pmtb{a";%<:4psmd[`kw|pUdk|h)3*51=wzfmTi`~{y^vkv`uo ;#:86~}of]fiur~W}byi~f'3(37?uthoVof|ywPtipfwm.3!8>0|ah_dosp|Ys`{oxd%;&159svjaXmdzuRzgrdqk,3/6>2zycjQjmqvz[qnumzb7:7>11c9svjaXmdzuRzgrdqk[dutm{~#<$?m;qplcZcjx}sTxe|jsi]bwvcu|!;"=o5rne\ahvsqV~c~h}g_`qpawr/: ;i7}|`g^gntqX|axneQnsrgqp-5.9k1{~biPelrw}ZrozlycSl}|esv+0,7e3yxdkRkbpu{\pmtb{aUj~k}t)7*5g=wzfmTi`~{y^vkv`uoWhyxiz'6(3g?uthoVof|ywPtipfwmYf{zoyx1850?3a?uthoVof|ywPtipfwmYimnki%>&1c9svjaXmdzuRzgrdqk[kc`i}o#=$?m;qplcZcjx}sTxe|jsi]mabgsm!8"=o5rne\ahvsqV~c~h}g_ogdeqc/; ;i7}|`g^gntqX|axneQaefcwa-2.9k1{~biPelrw}ZrozlycSckhaug+1,7e3yxdkRkbpu{\pmtb{aUeijo{e)4*5a=wzfmTi`~{y^vkv`uoWgolmyk36;2==>vugnUmyab>3:rqkbYa}efTxe|jsi*3-45<x{elSk{cl^vkv`uo 8#:?6~}of]eqijX|axne&=)018twi`Wog`Rzgrdqk,6/6;2zycjQiumn\pmtb{a"?%<=4psmd[cskdV~c~h}g(4+27>vugnUmyabPtipfwm.1!8?0|ah_gwohZrozlyc0;4?>0c8twi`Wog`Rzgrdqk[dutm{~#<$?n;qplcZ`rdeUdk|h^cpw`ts 8#:m6~}of]eqijX|axneQnsrgqp-4.9h1{~biPftno[qnumzbTm~}jru*0-4g<x{elSk{cl^vkv`uoWhyxiz'4(3b?uthoVl~`aQ{hsgplZgt{lx$8'>a:rqkbYa}efTxe|jsi]bwvcu|!<"=n5rne\bpjkW}byi~fParqfvq:1294:m6~}of]eqijX|axneQaefcwa-6.9h1{~biPftno[qnumzbTbhintd*2-4g<x{elSk{cl^vkv`uoWgolmyk'2(3b?uthoVl~`aQ{hsgplZhboh~n$>'>a:rqkbYa}efTxe|jsi]mabgsm!>"=l5rne\bpjkW}byi~fPndebp`.2!8k0|ah_gwohZrozlycSckhaug+2,7d3yxdkRhzlm]wlwct`Vdnklzj<783:3=ulVigg<>4re]geqgXkfex%>&119q`Zbf|hUhcx`{(0+24>tcWmkmRm`uov+6,773{nThlzn_bmvjq.4!8:0~iQkauc\gjsi|!>"==5}d^fbpdYdg|d$8'>0:pg[agsiVidycz'6(31?wbXlh~jSnaznu>5>5823{nTic84re]qwq5<zz~<7~lftdpq0>uu{}30ycjjrgnls0=qieco:6y}_`ah2>quWjf`==5xr^fbpdYdg|d$='>0:uq[agsiVidycz'1(33?rtXlh~jSnaznu*1-46<{UomyoPcnwmp-5.991|~Rjnt`]`kphs =#:<6y}_ecweZeh}g~#9$??;vp\`drfWje~by&9)008swYci}kTob{at=494;3<{Unb;5xr^pppxFGx08i7MNw3509B?2=9rY>j7=jf;59564e=h=1>?;mezl072<63g9847;4$216>6563tY>h7=jf;59564e=h=1>?;me:Qe1?5a>3:1=><m5`59673em2Y>h7=i6;29564e=h=1>?;mf:f000<7280:w^;i:2ge>2<6;;h>m:4=24`f?sR6>j0;6<4>:005V3a2:om6:4>33`6e2<5:<hn7)==8;d5?S54>38pykj51:wea?6<u-;>57<?;c171?6===0868:tH205?_322;q:;7?9:|&234<4<<1/?>:53g38k15>2900e9=<:188m1232900c>h=:188k6`72900e9=m:188m1522900c>m>:18'50d=;l<0b<;n:198k6e7290/=8l53d48j43f2810c>li:18'50d=;l<0b<;n:398k6db290/=8l53d48j43f2:10c>lk:18'50d=;l<0b<;n:598k6dd290/=8l53d48j43f2<10c>lm:18'50d=;l<0b<;n:798k6df290/=8l53d48j43f2>10c>l7:18'50d=;l<0b<;n:998k6d0290/=8l53d48j43f2010c>l9:18'50d=;l<0b<;n:`98k6d2290/=8l53d48j43f2k10c>l;:18'50d=;l<0b<;n:b98k6d4290/=8l53d48j43f2m10c>l=:18'50d=;l<0b<;n:d98k6d6290/=8l53d48j43f2o10c>l?:18'50d=;l<0b<;n:028?j5fn3:1(<;m:2g5?k72i3;:76a<ae83>!72j39n:6`>5`826>=h;hi1<7*>5c80a3=i9<k1=>54o2ca>5<#9<h1?h84n07b>42<3f9jm7>5$07a>6c13g;>m7?:;:m0e<<72-;>n7=j6:l21d<6>21d?l650;&21g<4m?1e=8o51698k6g0290/=8l53d48j43f28207b=n6;29 43e2:o=7c?:a;3:?>i4i<0;6)?:b;1f2>h6=h0:m65`3`694?"6=k08i;5a14c95g=<g:i<6=4+14`97`0<f8?j6<m4;n1`2?6=,8?i6>k9;o36e?7c32e8o84?:%36f?5b>2d:9l4>e:9l7f2=83.:9o4<e79m50g=9o10c>m<:18'50d=;l<0b<;n:328?j5d:3:1(<;m:2g5?k72i38:76a<b883>!72j39n:6`>5`816>=h;ho1<7*>5c80a3=i9<k1>>54o2c0>5<#9<h1?h84n07b>72<3f9j>7>5$07a>6c13g;>m7<:;:k031<72-;>n7=69:l21d<732c8;>4?:%36f?5>12d:9l4>;:k037<72-;>n7=69:l21d<532c8;<4?:%36f?5>12d:9l4<;:k035<72-;>n7=69:l21d<332c8:k4?:%36f?5>12d:9l4:;:k02`<72-;>n7=69:l21d<132c8:i4?:%36f?5>12d:9l48;:k02g<72-;>n7=69:l21d<?32c8:l4?:%36f?5>12d:9l46;:k02<<72-;>n7=69:l21d<f32c8:54?:%36f?5>12d:9l4m;:k022<72-;>n7=69:l21d<d32c8:;4?:%36f?5>12d:9l4k;:k020<72-;>n7=69:l21d<b32c8:94?:%36f?5>12d:9l4i;:k026<72-;>n7=69:l21d<6821b?;<50;&21g<4101e=8o51098m607290/=8l538;8j43f28807d=:f;29 43e2:327c?:a;30?>o4=l0;6)?:b;1:=>h6=h0:865f34f94?"6=k08545a14c950=<a:?h6=4+14`97<?<f8?j6<84;h16f?6=,8?i6>76;o36e?7032c89l4?:%36f?5>12d:9l4>8:9j70?=83.:9o4<989m50g=9010e>;7:18'50d=;030b<;n:0c8?l52?3:1(<;m:2;:?k72i3;i76g<7`83>!72j39256`>5`82g>=n;>31<7*>5c80=<=i9<k1=i54i25;>5<#9<h1?474n07b>4c<3`9<;7>5$07a>6?>3g;>m7?i;:k033<72-;>n7=69:l21d<5821b?:;50;&21g<4101e=8o52098m60d290/=8l538;8j43f2;807d=91;29 43e2:327c?:a;00?>o4=?0;6)?:b;1:=>h6=h09865f34794?"6=k08545a14c960=<a=8j6=44b204>5<6290;wE==6:&234<4:>1d=8650;9~ff2=83;1<7>tH205?!7093i?7bm<:188yg33290j97j8:005M55>2P>97?9{30964<5;38<6?:524812?7028<1>54=9;35>77=:;09?7<;:37963<5?3;<6?65288~ 4162:>37);6:265?!3b2:><7)?:3;363>o38>0;6)?:b;63<>h6=h0;76g;0783>!72j3>;46`>5`82?>o38<0;6)?:b;63<>h6=h0976g;0583>!72j3>;46`>5`80?>o38:0;6)?:b;63<>h6=h0?76g;0383>!72j3>;46`>5`86?>o3880;6)?:b;63<>h6=h0=76g<f583>>o3;=0;66g;3683>>i3;00;66g<fg83>!72j3>;<6`>5`83?>o4nl0;6)?:b;634>h6=h0:76g<fe83>!72j3>;<6`>5`81?>o4nj0;6)?:b;634>h6=h0876g<fc83>!72j3>;<6`>5`87?>o4nh0;6)?:b;634>h6=h0>76g<f883>!72j3>;<6`>5`85?>o3;:0;66a<f683>>o38o0;6)?:b;624>h6=h0;76g;0d83>!72j3>:<6`>5`82?>o38m0;6)?:b;624>h6=h0976g;0b83>!72j3>:<6`>5`80?>o38k0;6)?:b;624>h6=h0?76g;0`83>!72j3>:<6`>5`86?>o3800;6)?:b;624>h6=h0=76a<4583>>i4=;0;6)?:b;167>h6=h0;76a<5083>!72j39>?6`>5`82?>i4=90;6)?:b;167>h6=h0976a<4g83>!72j39>?6`>5`80?>i4<l0;6)?:b;167>h6=h0?76a<4e83>!72j39>?6`>5`86?>i4<j0;6)?:b;167>h6=h0=76a;1083>>o3<=0;66g;1983>!72j3>:56`>5`83?>o39>0;6)?:b;62=>h6=h0:76g;1783>!72j3>:56`>5`81?>o39<0;6)?:b;62=>h6=h0876g;1583>!72j3>:56`>5`87?>o39:0;6)?:b;62=>h6=h0>76g;1383>!72j3>:56`>5`85?>i4n;0;66a<f183>>o3;k0;66g<4`83>>o3:90;6)?:b;615>h6=h0;76g;1g83>!72j3>9=6`>5`82?>o39l0;6)?:b;615>h6=h0976g;1e83>!72j3>9=6`>5`80?>o39j0;6)?:b;615>h6=h0?76g;1c83>!72j3>9=6`>5`86?>o39h0;6)?:b;615>h6=h0=76g;2983>!72j3>956`>5`83?>o3:>0;6)?:b;61=>h6=h0:76g;2783>!72j3>956`>5`81?>o3:<0;6)?:b;61=>h6=h0876g;2583>!72j3>956`>5`87?>o3::0;6)?:b;61=>h6=h0>76g;2383>!72j3>956`>5`85?>i4<:0;66g<f483>>o4<k0;66g;4483>>i3;?0;66a;3`83>>o3;<0;66a<c083>!72j39n:6`>5`83?>i4k90;6)?:b;1f2>h6=h0:76a<bg83>!72j39n:6`>5`81?>i4jl0;6)?:b;1f2>h6=h0876a<be83>!72j39n:6`>5`87?>i4jj0;6)?:b;1f2>h6=h0>76a<bc83>!72j39n:6`>5`85?>i4jh0;6)?:b;1f2>h6=h0<76a<b983>!72j39n:6`>5`8;?>i4j>0;6)?:b;1f2>h6=h0276a<b783>!72j39n:6`>5`8b?>i4j<0;6)?:b;1f2>h6=h0i76a<b583>!72j39n:6`>5`8`?>i4j:0;6)?:b;1f2>h6=h0o76a<b383>!72j39n:6`>5`8f?>i4j80;6)?:b;1f2>h6=h0m76a<b183>!72j39n:6`>5`824>=h;hl1<7*>5c80a3=i9<k1=<54o2cg>5<#9<h1?h84n07b>44<3f9jo7>5$07a>6c13g;>m7?<;:m0eg<72-;>n7=j6:l21d<6<21d?lo50;&21g<4m?1e=8o51498k6g>290/=8l53d48j43f28<07b=n8;29 43e2:o=7c?:a;34?>i4i>0;6)?:b;1f2>h6=h0:465`3`494?"6=k08i;5a14c95<=<g:k>6=4+14`97`0<f8?j6<o4;n1b0?6=,8?i6>k9;o36e?7e32e8o:4?:%36f?5b>2d:9l4>c:9l7f0=83.:9o4<e79m50g=9m10c>m::18'50d=;l<0b<;n:0g8?j5d<3:1(<;m:2g5?k72i3;m76a<c283>!72j39n:6`>5`814>=h;j81<7*>5c80a3=i9<k1><54o2`:>5<#9<h1?h84n07b>74<3f9ji7>5$07a>6c13g;>m7<<;:m0e6<72-;>n7=j6:l21d<5<21d?l<50;&21g<4m?1e=8o52498m613290/=8l538;8j43f2910e>9<:18'50d=;030b<;n:098m615290/=8l538;8j43f2;10e>9>:18'50d=;030b<;n:298m617290/=8l538;8j43f2=10e>8i:18'50d=;030b<;n:498m60b290/=8l538;8j43f2?10e>8k:18'50d=;030b<;n:698m60e290/=8l538;8j43f2110e>8n:18'50d=;030b<;n:898m60>290/=8l538;8j43f2h10e>87:18'50d=;030b<;n:c98m600290/=8l538;8j43f2j10e>89:18'50d=;030b<;n:e98m602290/=8l538;8j43f2l10e>8;:18'50d=;030b<;n:g98m604290/=8l538;8j43f28:07d=92;29 43e2:327c?:a;32?>o4>90;6)?:b;1:=>h6=h0:>65f34d94?"6=k08545a14c956=<a:?n6=4+14`97<?<f8?j6<:4;h16`?6=,8?i6>76;o36e?7232c89n4?:%36f?5>12d:9l4>6:9j70d=83.:9o4<989m50g=9>10e>;n:18'50d=;030b<;n:0:8?l5213:1(<;m:2;:?k72i3;276g<5983>!72j39256`>5`82e>=n;<=1<7*>5c80=<=i9<k1=o54i25b>5<#9<h1?474n07b>4e<3`9<57>5$07a>6?>3g;>m7?k;:k03=<72-;>n7=69:l21d<6m21b?:950;&21g<4101e=8o51g98m611290/=8l538;8j43f2;:07d=85;29 43e2:327c?:a;02?>o4>j0;6)?:b;1:=>h6=h09>65f37394?"6=k08545a14c966=<a:?=6=4+14`97<?<f8?j6?:4;h161?6=,8?i6>76;o36e?4232c8844?::m774<72-;>n7:<2:l21d<732e??=4?:%36f?24:2d:9l4>;:m76c<72-;>n7:<2:l21d<532e?>h4?:%36f?24:2d:9l4<;:m76a<72-;>n7:<2:l21d<332e?>n4?:%36f?24:2d:9l4:;:m76g<72-;>n7:<2:l21d<132e?8?4?:%36f?23;2d:9l4?;:m704<72-;>n7:;3:l21d<632e?8=4?:%36f?23;2d:9l4=;:m77c<72-;>n7:;3:l21d<432e??h4?:%36f?23;2d:9l4;;:m77a<72-;>n7:;3:l21d<232e??n4?:%36f?23;2d:9l49;:m0b=<722c8j>4?::m011<722c?>l4?::m77=<722h8?>4?:083>5}#9>;1o95G3208L6413fi86=44}c01<?6=<3:1<v*>708a`>N4;;1C??84$e292>o2>3:17d8?:188m43c2900c<;j:188yg42k3:187>50z&234<ej2B8??5G3348 a6=92c>:7>5;h7`>5<<a?:1<75`14g94?=zj;?i6=4;:183!7093hi7E=<2:J063=#l90:7d;9:188m0e=831b:=4?::m21`<722wi?<j50;194?6|,8=:6oo4H211?M55>2B>?6*ic;344>"c83;0e8850;9j25<722e:9h4?::a774=8391<7>t$052>gg<@:997E==6:J67>"ak3;<<6*k0;38m00=831b:=4?::m21`<722wi?<m50;194?6|,8=:6oo4H211?M55>2B>?6*ic;344>"c83;0e8850;9j25<722e:9h4?::a777=8391<7>t$052>gg<@:997E==6:J67>"ak3;<<6*k0;38m00=831b:=4?::m21`<722wi?<l50;794?6|,8=:6ok4H211?M55>2B>?6*ic;344>o2>3:17d;7:188m36=831b=8j50;9l50c=831vn>?9:187>5<7s-;<=7lk;I106>N4:?1/h=49;h75>5<<a?:1<75f14f94?=h9<o1<75rb236>5<3290;w)?81;`g?M54:2B8>;5+d185?l312900e;>50;9j50b=831d=8k50;9~f673290?6=4?{%345?dc3A98>6F<279'`5<13`?=6=44i7294?=n9<n1<75`14g94?=zj:8;6=4::183!7093hn7E=<2:J063=O=:1/jn4>719j13<722c>47>5;h43>5<<a8?o6=44o07f>5<<uk9:m7>54;294~"6?80ih6F<339K770<,m:1:6g:6;29?l072900e<;k:188k43b2900qo=>9;290?6=8r.:;<4md:J077=O;;<0(i>56:k62?6=3`<;6=44i07g>5<<g8?n6=44}c0g`?6==3:1<v*>708ab>N4;;1C??84$e295>o2>3:17d;7:188m36=831b=8h50;9l50c=831vn?jl:186>5<7s-;<=7li;I106>N4:?1/h=4>;h75>5<<a<21<75f6183>>o6=o0;66a>5d83>>{e:mh1<7;50;2x 4162kl0D>==;I112>"c83;0e8850;9j1=<722c=<7>5;h36b?6=3f;>i7>5;|`1`d<72<0;6=u+1639fc=O;:80D><9;%f3>4=n=?0;66g:8;29?l072900e<;i:188k43b2900qo<k9;291?6=8r.:;<4mf:J077=O;;<0(i>51:k62?6=3`?36=44i7294?=n9<l1<75`14g94?=zj;n36=4::183!7093hm7E=<2:J063=#l90:7d;9:188m0>=831b:=4?::k21c<722e:9h4?::a6a1=83?1<7>t$052>g`<@:997E==6:&g4?7<a<<1<75f5983>>o183:17d?:f;29?j72m3:17pl=d783>0<729q/=:?5bg9K764<@:8=7)j?:09j13<722c>47>5;h43>5<<a8?m6=44o07f>5<<uk8o87>55;294~"6?80ij6F<339K770<,m:1=6g:6;29?l3?2900e;>50;9j50`=831d=8k50;9~f7b4290>6=4?{%345?da3A98>6F<279'`5<63`?=6=44i4:94?=n>90;66g>5g83>>i6=l0;66sm2e094?3=83:p(<9>:cd8L6553A99:6*k0;38m00=831b954?::k54?6=3`;>j7>5;n36a?6=3th9h<4?:483>5}#9>;1nk5G3208L6413-n;6<5f5783>>o203:17d8?:188m43a2900c<;j:188yg4c83:197>50z&234<en2B8??5G3348 a6=92c>:7>5;h7;>5<<a?:1<75f14d94?=h9<o1<75rb3ae>5<2290;w)?81;`e?M54:2B8>;5+d182?l312900e8650;9j25<722c:9k4?::m21`<722wi>nk50;794?6|,8=:6oh4H211?M55>2.o<7?4i4494?=n=10;66g90;29?l72n3:17b?:e;29?xd5km0;684?:1y'527=jo1C?><4H205?!b7281b9;4?::k6<?6=3`<;6=44i07e>5<<g8?n6=44}c0`g?6==3:1<v*>708ab>N4;;1C??84$e295>o2>3:17d;7:188m36=831b=8h50;9l50c=831vn?mm:186>5<7s-;<=7li;I106>N4:?1/h=4>;h75>5<<a<21<75f6183>>o6=o0;66a>5d83>>{e:j31<7;50;2x 4162kl0D>==;I112>"c83;0e8850;9j1=<722c=<7>5;h36b?6=3f;>i7>5;|`1g=<72<0;6=u+1639fc=O;:80D><9;%f3>4=n=?0;66g:8;29?l072900e<;i:188k43b2900qo<l7;291?6=8r.:;<4mf:J077=O;;<0(i>51:k62?6=3`?36=44i7294?=n9<l1<75`14g94?=zj;i=6=4::183!7093hm7E=<2:J063=#l90:7d;9:188m0>=831b:=4?::k21c<722e:9h4?::a6f3=83?1<7>t$052>g`<@:997E==6:&g4?7<a<<1<75f5983>>o183:17d?:f;29?j72m3:17pl=c583>0<729q/=:?5bg9K764<@:8=7)j?:09j13<722c>47>5;h43>5<<a8?m6=44o07f>5<<uk8h?7>55;294~"6?80ij6F<339K770<,m:1=6g:6;29?l3?2900e;>50;9j50`=831d=8k50;9~f7e5290>6=4?{%345?da3A98>6F<279'`5<63`?=6=44i4:94?=n>90;66g>5g83>>i6=l0;66sm2b394?3=83:p(<9>:cd8L6553A99:6*k0;38m00=831b954?::k54?6=3`;>j7>5;n36a?6=3th9o=4?:483>5}#9>;1nk5G3208L6413-n;6<5f5783>>o203:17d8?:188m43a2900c<;j:188yg4b;3:197>50z&234<en2B8??5G3348 a6=92c>:7>5;h7;>5<<a?:1<75f14d94?=h9<o1<75rb3g1>5<2290;w)?81;`e?M54:2B8>;5+d182?l312900e8650;9j25<722c:9k4?::m21`<722wi>h?50;794?6|,8=:6oh4H211?M55>2.o<7?4i4494?=n=10;66g90;29?l72n3:17b?:e;29?xd5m90;684?:1y'527=jo1C?><4H205?!b7281b9;4?::k6<?6=3`<;6=44i07e>5<<g8?n6=44}c0gb?6==3:1<v*>708ab>N4;;1C??84$e295>o2>3:17d;7:188m36=831b=8h50;9l50c=831vn?jj:186>5<7s-;<=7li;I106>N4:?1/h=4>;h75>5<<a<21<75f6183>>o6=o0;66a>5d83>>{e:m?1<7;50;2x 4162kl0D>==;I112>"c83;0e8850;9j1=<722c=<7>5;h36b?6=3f;>i7>5;|`1gd<72<0;6=u+1639fc=O;:80D><9;%f3>4=n=?0;66g:8;29?l072900e<;i:188k43b2900qo<mf;291?6=8r.:;<4mf:J077=O;;<0(i>51:k62?6=3`?36=44i7294?=n9<l1<75`14g94?=zj;hn6=4::183!7093hm7E=<2:J063=#l90:7d;9:188m0>=831b:=4?::k21c<722e:9h4?::a610=83?1<7>t$052>ge<@:997E==6:&g4?7<a<<1<75f5983>>o2k3:17d8?:188k43b2900qo<;5;291?6=8r.:;<4mc:J077=O;;<0(i>51:k62?6=3`?36=44i4a94?=n>90;66a>5d83>>{e:=>1<7;50;2x 4162ki0D>==;I112>"c83;0e8850;9j1=<722c>o7>5;h43>5<<g8?n6=44}c077?6==3:1<v*>708ag>N4;;1C??84$e295>o2>3:17d;7:188m0e=831b:=4?::m21`<722wi>9<50;794?6|,8=:6om4H211?M55>2.o<7?4i4494?=n=10;66g:c;29?l072900c<;j:188yg4393:197>50z&234<ek2B8??5G3348 a6=92c>:7>5;h7;>5<<a<i1<75f6183>>i6=l0;66sm25294?3=83:p(<9>:ca8L6553A99:6*k0;38m00=831b954?::k6g?6=3`<;6=44o07f>5<<uk8847>55;294~"6?80io6F<339K770<,m:1=6g:6;29?l3?2900e8m50;9j25<722e:9h4?::a661=83?1<7>t$052>ge<@:997E==6:&g4?7<a<<1<75f5983>>o2k3:17d8?:188k43b2900qo<<6;291?6=8r.:;<4mc:J077=O;;<0(i>51:k62?6=3`?36=44i4a94?=n>90;66a>5d83>>{e::?1<7;50;2x 4162ki0D>==;I112>"c83;0e8850;9j1=<722c>o7>5;h43>5<<g8?n6=44}c000?6==3:1<v*>708ag>N4;;1C??84$e295>o2>3:17d;7:188m0e=831b:=4?::m21`<722wi>>=50;794?6|,8=:6om4H211?M55>2.o<7?4i4494?=n=10;66g:c;29?l072900c<;j:188yg44:3:197>50z&234<em2B8??5G3348 a6=>2c>:7>5;h7;>5<<a?:1<75f14f94?=h9<o1<75rb33;>5<3290;w)?81;`a?M54:2B8>;5+d182?l312900e8m50;9j25<722e:9h4?::a643=83>1<7>t$052>gd<@:997E==6:&g4?7<a<<1<75f5b83>>o183:17b?:e;29?xd59l0;694?:1y'527=jk1C?><4H205?!b7281b9;4?::k6g?6=3`<;6=44o07f>5<<uk8:o7>54;294~"6?80ih6F<339K770<,m:1:6g:6;29?l072900e<;k:188k43b2900qo<>b;290?6=8r.:;<4md:J077=O;;<0(i>56:k62?6=3`<;6=44i07g>5<<g8?n6=44}c0;e?6==3:1<v*>708ag>N4;;1C??84$e295>o2>3:17d;7:188m0e=831b:=4?::m21`<722wi>5750;794?6|,8=:6om4H211?M55>2.o<7?4i4494?=n=10;66g:c;29?l072900c<;j:188yg4?03:197>50z&234<ek2B8??5G3348 a6=92c>:7>5;h7;>5<<a<i1<75f6183>>i6=l0;66sm29594?3=83:p(<9>:ca8L6553A99:6*k0;38m00=831b954?::k6g?6=3`<;6=44o07f>5<<uk83:7>55;294~"6?80io6F<339K770<,m:1=6g:6;29?l3?2900e8m50;9j25<722e:9h4?::a6=3=83?1<7>t$052>ge<@:997E==6:&g4?7<a<<1<75f5983>>o2k3:17d8?:188k43b2900qo<74;291?6=8r.:;<4mc:J077=O;;<0(i>51:k62?6=3`?36=44i4a94?=n>90;66a>5d83>>{e:>i1<7;50;2x 4162ki0D>==;I112>"c83;0e8850;9j1=<722c>o7>5;h43>5<<g8?n6=44}c04f?6==3:1<v*>708ag>N4;;1C??84$e295>o2>3:17d;7:188m0e=831b:=4?::m21`<722wi>:o50;794?6|,8=:6om4H211?M55>2.o<7?4i4494?=n=10;66g:c;29?l072900c<;j:188yg4013:197>50z&234<ek2B8??5G3348 a6=92c>:7>5;h7;>5<<a<i1<75f6183>>i6=l0;66sm26:94?3=83:p(<9>:ca8L6553A99:6*k0;38m00=831b954?::k6g?6=3`<;6=44o07f>5<<uk8<;7>55;294~"6?80io6F<339K770<,m:1=6g:6;29?l3?2900e8m50;9j25<722e:9h4?::a620=83?1<7>t$052>gc<@:997E==6:&g4?0<a<<1<75f5983>>o183:17d?:d;29?j72m3:17pl=6d83>0<729q/=:?5bb9K764<@:8=7)j?:09j13<722c>47>5;h7`>5<<a?:1<75`14g94?=zj;<o6=4::183!7093hh7E=<2:J063=#l90:7d;9:188m0>=831b9n4?::k54?6=3f;>i7>5;|`12f<72<0;6=u+1639ff=O;:80D><9;%f3>4=n=?0;66g:8;29?l3d2900e;>50;9l50c=831vn?8m:186>5<7s-;<=7ll;I106>N4:?1/h=4>;h75>5<<a<21<75f5b83>>o183:17b?:e;29?xd5>h0;684?:1y'527=jj1C?><4H205?!b7281b9;4?::k6<?6=3`?h6=44i7294?=h9<o1<75rb34:>5<2290;w)?81;`f?M54:2B8>;5+d185?l312900e8650;9j25<722c:9i4?::m21`<722wi>;650;794?6|,8=:6om4H211?M55>2.o<7?4i4494?=n=10;66g:c;29?l072900c<;j:188yg7b?3:187>50z&234<ej2B8??5G3348 a6=92c>:7>5;h7`>5<<a?:1<75`14g94?=zj8o=6=4;:183!7093hi7E=<2:J063=#l90:7d;9:188m0e=831b:=4?::m21`<722wi=h;50;694?6|,8=:6ol4H211?M55>2.o<7?4i4494?=n=j0;66g90;29?j72m3:17pl>e583>1<729q/=:?5bc9K764<@:8=7)j?:09j13<722c>o7>5;h43>5<<g8?n6=44}c3f7?6=<3:1<v*>708af>N4;;1C??84$e295>o2>3:17d;l:188m36=831d=8k50;9~f4c5290?6=4?{%345?de3A98>6F<279'`5<63`?=6=44i4a94?=n>90;66a>5d83>>{e9l;1<7:50;2x 4162kh0D>==;I112>"c83;0e8850;9j1f<722c=<7>5;n36a?6=3th:m:4?:583>5}#9>;1no5G3208L6413-n;6<5f5783>>o2k3:17d8?:188k43b2900qo?n6;290?6=8r.:;<4mb:J077=O;;<0(i>51:k62?6=3`?h6=44i7294?=h9<o1<75rb0c6>5<3290;w)?81;`a?M54:2B8>;5+d182?l312900e8m50;9j25<722e:9h4?::a5d2=83>1<7>t$052>gd<@:997E==6:&g4?7<a<<1<75f5b83>>o183:17b?:e;29?xd6i:0;694?:1y'527=jk1C?><4H205?!b7281b9;4?::k6g?6=3`<;6=44o07f>5<<uk;j>7>54;294~"6?80in6F<339K770<,m:1=6g:6;29?l3d2900e;>50;9l50c=831vn<o>:187>5<7s-;<=7lm;I106>N4:?1/h=4>;h75>5<<a<i1<75f6183>>i6=l0;66sm20394?2=83:p(<9>:c`8L6553A99:6*k0;38m00=831b9n4?::k54?6=3f;>i7>5;|`155<72=0;6=u+1639fg=O;:80D><9;%f3>4=n=?0;66g:c;29?l072900c<;j:188yg47n3:187>50z&234<ej2B8??5G3348 a6=92c>:7>5;h7`>5<<a?:1<75`14g94?=zj;:n6=4;:183!7093hi7E=<2:J063=#l90:7d;9:188m0e=831b:=4?::m21`<722wi>=j50;694?6|,8=:6ol4H211?M55>2.o<7?4i4494?=n=j0;66g90;29?j72m3:17pl=0b83>1<729q/=:?5bc9K764<@:8=7)j?:09j13<722c>o7>5;h43>5<<g8?n6=44}c03f?6=<3:1<v*>708af>N4;;1C??84$e295>o2>3:17d;l:188m36=831d=8k50;9~f4b6290?6=4?{%345?de3A98>6F<279'`5<63`?=6=44i4a94?=n>90;66a>5d83>>{e9m:1<7:50;2x 4162kh0D>==;I112>"c83;0e8850;9j1f<722c=<7>5;n36a?6=3th:ok4?:583>5}#9>;1no5G3208L6413-n;6<5f5783>>o2k3:17d8?:188k43b2900qo?le;290?6=8r.:;<4mb:J077=O;;<0(i>51:k62?6=3`?h6=44i7294?=h9<o1<75rb0ag>5<3290;w)?81;`a?M54:2B8>;5+d182?l312900e8m50;9j25<722e:9h4?::a5fe=83>1<7>t$052>gd<@:997E==6:&g4?7<a<<1<75f5b83>>o183:17b?:e;29?xd6kk0;694?:1y'527=jk1C?><4H205?!b7281b9;4?::k6g?6=3`<;6=44o07f>5<<uk8;?7>54;294~"6?80in6F<339K770<@<90(km51628 a6=92c>:7>5;h7`>5<<a?:1<75`14g94?=zj;:96=4;:183!7093hi7E=<2:J063=O=:1/jn4>719'`5<63`?=6=44i4a94?=n>90;66a>5d83>>{e:9;1<7:50;2x 4162kh0D>==;I112>N2;2.mo7?80:&g4?7<a<<1<75f5b83>>o183:17b?:e;29?xd5890;694?:1y'527=jk1C?><4H205?M343-lh6<9?;%f3>4=n=?0;66g:c;29?l072900c<;j:188yg7an3:187>50z&234<ej2B8??5G3348L05<,oi1=:>4$e295>o2>3:17d;l:188m36=831d=8k50;9~f4`b290?6=4?{%345?de3A98>6F<279K16=#nj0:;=5+d182?l312900e8m50;9j25<722e:9h4?::a5cb=83>1<7>t$052>gd<@:997E==6:J67>"ak3;<<6*k0;38m00=831b9n4?::k54?6=3f;>i7>5;|`2g6<72=0;6=u+1639fg=O;:80D><9;I70?!`d28=;7)j?:09j13<722c>o7>5;h43>5<<g8?n6=44}c3`6?6=<3:1<v*>708af>N4;;1C??84H418 ce=9>:0(i>51:k62?6=3`?h6=44i7294?=h9<o1<75rb0a2>5<3290;w)?81;`a?M54:2B8>;5G529'bf<6?91/h=4>;h75>5<<a<i1<75f6183>>i6=l0;66sm1b294?2=83:p(<9>:c`8L6553A99:6F:3:&eg?7082.o<7?4i4494?=n=j0;66g90;29?j72m3:17pl>bg83>1<729q/=:?5bc9K764<@:8=7E;<;%d`>4173-n;6<5f5783>>o2k3:17d8?:188k43b2900qo?me;290?6=8r.:;<4mb:J077=O;;<0D8=4$ga9526<,m:1=6g:6;29?l3d2900e;>50;9l50c=831vn<lk:187>5<7s-;<=7lm;I106>N4:?1C9>5+fb8235=#l90:7d;9:188m0e=831b:=4?::m21`<722wi=o;50;694?6|,8=:6ol4H211?M55>2.o<7?4i4494?=n=j0;66g90;29?j72m3:17pl>b583>1<729q/=:?5bc9K764<@:8=7)j?:09j13<722c>o7>5;h43>5<<g8?n6=44}c3a7?6=<3:1<v*>708af>N4;;1C??84$e295>o2>3:17d;l:188m36=831d=8k50;9~f4d5290?6=4?{%345?de3A98>6F<279'`5<63`?=6=44i4a94?=n>90;66a>5d83>>{e9k;1<7:50;2x 4162kh0D>==;I112>"c83;0e8850;9j1f<722c=<7>5;n36a?6=3th:n=4?:583>5}#9>;1no5G3208L6413-n;6<5f5783>>o2k3:17d8?:188k43b2900qo?nf;290?6=8r.:;<4mb:J077=O;;<0(i>51:k62?6=3`?h6=44i7294?=h9<o1<75rb0d6>5<3290;w)?81;`a?M54:2B8>;5+d182?l312900e8m50;9j25<722e:9h4?::a5c2=83>1<7>t$052>gd<@:997E==6:&g4?7<a<<1<75f5b83>>o183:17b?:e;29?xd6n:0;694?:1y'527=jk1C?><4H205?!b7281b9;4?::k6g?6=3`<;6=44o07f>5<<uk;m>7>54;294~"6?80in6F<339K770<,m:1=6g:6;29?l3d2900e;>50;9l50c=831vn<h>:187>5<7s-;<=7lm;I106>N4:?1/h=4>;h75>5<<a<i1<75f6183>>i6=l0;66sm1g294?2=83:p(<9>:c`8L6553A99:6*k0;38m00=831b9n4?::k54?6=3f;>i7>5;|`2ac<72=0;6=u+1639fg=O;:80D><9;%f3>4=n=?0;66g:c;29?l072900c<;j:188yg42l3:1?7>50z&234<a?2B8??5G3348 a6=m2ch:7>5;ha4>5<<g8?=6=44}c12b?6=;3:1<v*>708e3>N4;;1C??84$e29a>od>3:17dm8:188k4312900qo==4;297?6=8r.:;<4i7:J077=O;;<0(i>5e:k`2?6=3`i<6=44o075>5<<uk8?o7>55;294~"6?80m56F<339K770<,m:1=n5+14a976?<aj<1<75fc683>>od03:17dm6:188k4312900qo<;e;292?6=8r.:;<4ia:J077=O;;<0(i>51d9'50e=;:30en850;9jg2<722ch47>5;ha:>5<<ajk1<75`14494?=zj;?;6=48:183!7093li7E=<2:J063=#l90:h6gl6;29?le02900en650;9jg<<722chm7>5;haa>5<<g8?=6=44}c01e?6=<3:1<v*>708e<>N4;;1C??84$e295g=#9<i1?>o4ib494?=nk>0;66gl8;29?j72>3:17pl=2883>6<729q/=:?5f69K764<@:8=7)j?:0:8 43d2:9j7dm9:188mf1=831d=8850;9~f77f290?6=4?{%345?`?3A98>6F<279'`5<292.:9n4<3c9jg3<722ch;7>5;ha;>5<<g8?=6=44}c023?6==3:1<v*>708e=>N4;;1C??84$e291>"6=j08?o5fc783>>od?3:17dm7:188mf?=831d=8850;9~f773290?6=4?{%345?`?3A98>6F<279'`5<4;2ch:7>5;ha4>5<<aj21<75`14494?=zj;;96=4::183!7093l27E=<2:J063=#l90m7dm9:188mf1=831bo54?::k`=?6=3f;>:7>5;|`156<72<0;6=u+1639b<=O;:80D><9;%f3>37<aj<1<75fc683>>od03:17dm6:188k4312900qo<7f;290?6=8r.:;<4i8:J077=O;;<0(i>52`9jg3<722ch;7>5;ha;>5<<g8?=6=44}c0:3?6=>3:1<v*>708ee>N4;;1C??84$e2912=nk?0;66gl7;29?le?2900en750;9jgd<722e:9;4?::a636=83>1<7>t$052>c><@:997E==6:&g4?7e3-;>o7=<c:k`2?6=3`i<6=44ib:94?=h9<<1<75rb37e>5<4290;w)?81;d4?M54:2B8>;5+d182<>"6=j08?n5fc783>>od?3:17b?:6;29?xd61:0;6>4?:1y'527=n>1C?><4H205?!b72820(<;l:21g?le12900en950;9l500=831vn<7::187>5<7s-;<=7h7;I106>N4:?1/h=4<1:&21f<4;m1bo;4?::k`3?6=3`i36=44o075>5<<uk;397>53;294~"6?80m;6F<339K770<,m:1=55+14a976c<aj<1<75fc683>>i6=?0;66sm19594?2=83:p(<9>:g:8L6553A99:6*k0;12?!72k398i6gl6;29?le02900en650;9l500=831vn<9=:180>5<7s-;<=7h8;I106>N4:?1/h=4>8:k`2?6=3`i<6=44o075>5<<uk;<97>53;294~"6?80m;6F<339K770<,m:1=55fc783>>od?3:17b?:6;29?xd6?:0;6>4?:1y'527=n>1C?><4H205?!b72820en850;9jg2<722e:9;4?::a522=8391<7>t$052>c1<@:997E==6:&g4?7?3`i=6=44ib594?=h9<<1<75rb05;>5<4290;w)?81;d4?M54:2B8>;5+d182<>od>3:17dm8:188k4312900qo?86;297?6=8r.:;<4i7:J077=O;;<0(i>5199jg3<722ch;7>5;n362?6=3th:;:4?:283>5}#9>;1j:5G3208L6413-n;6<64ib494?=nk>0;66a>5783>>{e9>h1<7=50;2x 4162o=0D>==;I112>"c83;37dm9:188mf1=831d=8850;9~f41>29086=4?{%345?`03A98>6F<279'`5<602ch:7>5;ha4>5<<g8?=6=44}c34e?6=;3:1<v*>708e3>N4;;1C??84$e295==nk?0;66gl7;29?j72>3:17pl>7b83>6<729q/=:?5f69K764<@:8=7)j?:0:8mf0=831bo:4?::m213<722wi=:j50;194?6|,8=:6k94H211?M55>2.o<7?7;ha5>5<<aj=1<75`14494?=zj8n<6=49:183!7093lj7E=<2:J063=#l908>6*>5b807c=nk?0;66gl7;29?le?2900en750;9jgd<722e:9;4?::a5a0=83?1<7>t$052>c?<@:997E==6:&g4?7>3-;>o7=<f:k`2?6=3`i<6=44ib:94?=nk00;66a>5783>>{e9m21<7950;2x 4162oh0D>==;I112>"c83;j7dm9:188mf1=831bo54?::k`=?6=3`ij6=44ib`94?=h9<<1<75rb0f7>5<0290;w)?81;da?M54:2B8>;5+d182e>od>3:17dm8:188mf>=831bo44?::k`e?6=3`ii6=44o075>5<<uk;o>7>55;294~"6?80m56F<339K770<,m:1=45+14a9716<aj<1<75fc683>>od03:17dm6:188k4312900qo?k3;292?6=8r.:;<4ia:J077=O;;<0(i>5339'50e=;=:0en850;9jg2<722ch47>5;ha:>5<<ajk1<75`14494?=zj8n26=48:183!7093li7E=<2:J063=#l90:m6gl6;29?le02900en650;9jg<<722chm7>5;haa>5<<g8?=6=44}c3g1?6=?3:1<v*>708ef>N4;;1C??84$e295d=nk?0;66gl7;29?le?2900en750;9jgd<722chn7>5;n362?6=3th99?4?:283>5}#9>;1j:5G3208L6413-n;6?l4ib494?=nk>0;66a>5783>>{e:<;1<7950;2x 4162oh0D>==;I112>"c83;o7dm9:188mf1=831bo54?::k`=?6=3`ij6=44ib`94?=h9<<1<75rb307>5<4290;w)?81;d4?M54:2B8>;5+d181b>od>3:17dm8:188k4312900qo<=6;291?6=8r.:;<4i9:J077=O;;<0(i>5359jg3<722ch;7>5;ha;>5<<aj31<75`14494?=zj;8>6=48:183!7093li7E=<2:J063=#l909o6gl6;29?le02900en650;9jg<<722chm7>5;haa>5<<g8?=6=44}c013?6=?3:1<v*>708ef>N4;;1C??84$e296a=nk?0;66gl7;29?le?2900en750;9jgd<722chn7>5;n362?6=3th9>=4?:683>5}#9>;1jo5G3208L6413-n;6?m4ib494?=nk>0;66gl8;29?le>2900eno50;9jgg<722e:9;4?::a60>=83=1<7>t$052>cd<@:997E==6:&g4?4d3`i=6=44ib594?=nk10;66gl9;29?lef2900enl50;9l500=831vn?;6:184>5<7s-;<=7hm;I106>N4:?1/h=4<0:k`2?6=3`i<6=44ib:94?=nk00;66gla;29?lee2900c<;9:188yg42i3:1;7>50z&234<aj2B8??5G3348 a6=:j1bo;4?::k`3?6=3`i36=44ib;94?=nkh0;66glb;29?j72>3:17pl=5583>2<729q/=:?5fc9K764<@:8=7)j?:59jg3<722ch;7>5;ha;>5<<aj31<75fc`83>>odj3:17b?:6;29?xd5=<0;6:4?:1y'527=nk1C?><4H205?!b72;o0en850;9jg2<722ch47>5;ha:>5<<ajk1<75fcc83>>i6=?0;66sm24494?1=83:p(<9>:g`8L6553A99:6*k0;0`?le12900en950;9jg=<722ch57>5;hab>5<<ajh1<75`14494?=zj;?<6=48:183!7093li7E=<2:J063=#l90h<6gl6;29?le02900en650;9jg<<722chm7>5;haa>5<<g8?=6=44}c016?6=?3:1<v*>708ef>N4;;1C??84$e295c=nk?0;66gl7;29?le?2900en750;9jgd<722chn7>5;n362?6=3th9><4?:683>5}#9>;1jo5G3208L6413-n;695fc783>>od?3:17dm7:188mf?=831bol4?::k`f?6=3f;>:7>5;|`166<72>0;6=u+1639bg=O;:80D><9;%f3>f4<aj<1<75fc683>>od03:17dm6:188mfg=831boo4?::m213<722wi>4>50;794?6|,8=:6k74H211?M55>2.o<7?l;%36g?5392ch:7>5;ha4>5<<aj21<75fc883>>i6=?0;66sm31f94?0=83:p(<9>:gc8L6553A99:6*k0;a2?le12900en950;9jg=<722ch57>5;hab>5<<g8?=6=44}c0:7?6=>3:1<v*>708ee>N4;;1C??84$e295`=#9<i1?9?4ib494?=nk>0;66gl8;29?le>2900eno50;9l500=831vn?7::184>5<7s-;<=7hm;I106>N4:?1/h=4>d:k`2?6=3`i<6=44ib:94?=nk00;66gla;29?lee2900c<;9:188yg4303:1>7>50z&234<a<2B8??5G3348mf3=831d=8850;9~f73b29096=4?{%345?`33A98>6F<279jg0<722e:9;4?::a75d=83<n6=4?{%345?7182B8??5G3348^03=kr;96n4>4;36>45=03;:6o4n:88g>46=ug<96?:4n71961=i1m0;7coi:19'f=<6?91/n44>719'53b=:2.ho7=4$bf97>"dm390(nh53:&g5?5<,m81?6*k3;18 a2=;2.o97=4$e497>"c?390(i653:&g=?5<,mk1?6*kb;18 ae=;2.oh7=4$eg97>"cn390(h>53:&f5?5<,l81?6*j3;18 `2=;2.n97=4$d497>"b?390(h653:&f=?5<,lk1?6*jb;18 `e=;2.nh7=4$dg97>"bn390(k>53:&e7?72=2.::<4>6`9'531=9?l0(<87:4:8 40>2<20(<8m:408 c7=:2.m>7<4$20e>4053-98<7?92:&22`<53`;=:7>5;h`4>5<<a8<86=44ic494?=n=h0;66g:b;29?l71<3:17d?95;29?l55j3:1(<;m:20b?k72i3:07d==9;29 43e2:8j7c?:a;38?j?4290/=8l5939m50g=821d5<4?:%36f??53g;>m7?4;n;3>5<#9<h15?5a14c96>=h0o0;6)?:b;;1?k72i3907b6j:18'50d=1;1e=8o54:9l<a<72-;>n77=;o36e?3<3f3h6=4+14`9=7=i9<k1:65`9c83>!72j3397c?:a;58?j?f290/=8l5939m50g=021d544?:%36f??53g;>m774;n;;>5<#9<h15?5a14c9e>=h1>0;6)?:b;;1?k72i3h07b79:18'50d=1;1e=8o5c:9l=0<72-;>n77=;o36e?b<3f3?6=4+14`9=7=i9<k1i65`8b83>!72j3397c?:a;d8?jd5290/=8l5b09m50g=821dn=4?:%36f?d63g;>m7?4;n`6>5<#9<h1n95a14c94>=hj:0;6)?:b;`7?k72i3;07d==e;29 43e2:8o7c?:a;28?l55k3:1(<;m:20g?k72i3;07d=6:18'50d=;11e=8o50:9j72<72-;>n7=7;o36e?7<3`9=6=4+14`97==i9<k1>65f4383>!72j3937c?:a;18?l26290/=8l5399m50g=<21b8=4?:%36f?5?3g;>m7;4;h1e>5<#9<h1?55a14c92>=n;l0;6)?:b;1;?k72i3=07d=k:18'50d=;11e=8o58:9j7f<72-;>n7=7;o36e??<3`9i6=4+14`97==i9<k1m65f3`83>!72j3937c?:a;`8?l52290/=8l5399m50g=k21b4o4?:%36f?>f3g;>m7>4;h::>5<#9<h14l5a14c95>=n?j0;6)?:b;5a?k72i3:07d9n:18'50d=?k1e=8o51:9j3<<72-;>n79m;o36e?4<3`=36=4+14`93g=i9<k1?65f7683>!72j3=i7c?:a;68?l11290/=8l57c9m50g==21b484?:%36f?1e3g;>m784;h:7>5<#9<h1;o5a14c93>=n0:0;6)?:b;5a?k72i3207d6=:18'50d=?k1e=8o59:9j<4<72-;>n79m;o36e?g<3`2;6=4+14`93g=i9<k1n65f7g83>!72j3=i7c?:a;a8?l1b290/=8l57c9m50g=l21b;i4?:%36f?1e3g;>m7k4;h56>5<#9<h1;o5a14c9b>=n>k0;6)?:b;4b?k72i3:07d86:18'50d=>h1e=8o51:9j2=<72-;>n78n;o36e?4<3`<<6=4+14`92d=i9<k1?65f6783>!72j3<j7c?:a;68?l02290/=8l56`9m50g==21b;94?:%36f?0f3g;>m784;h50>5<#9<h1:l5a14c93>=n?;0;6)?:b;4b?k72i3207d9>:18'50d=>h1e=8o59:9j35<72-;>n78n;o36e?g<3`<m6=4+14`92d=i9<k1n65f6d83>!72j3<j7c?:a;a8?l0c290/=8l56`9m50g=l21b:n4?:%36f?0f3g;>m7k4;h47>5<#9<h1:l5a14c9b>=n<>0;6)?:b;65?k72i3:07d:::18'50d=<?1e=8o51:9j01<72-;>n7:9;o36e?4<3`?;6=4+14`903=i9<k1?65f4g83>!72j3>=7c?:a;68?l2b290/=8l5479m50g==21b8i4?:%36f?213g;>m784;h6`>5<#9<h18;5a14c93>=n<k0;6)?:b;65?k72i3207d:n:18'50d=<?1e=8o59:9j0<<72-;>n7:9;o36e?g<3`>36=4+14`903=i9<k1n65f4283>!72j3>=7c?:a;a8?jg2290/=8l5a59m50g=821dm>4?:%36f?g33g;>m7?4;nc1>5<#9<h1m95a14c96>=hi80;6)?:b;c7?k72i3907bo?:18'50d=i=1e=8o54:9l=c<72-;>n7o;;o36e?3<3fkn6=4+14`9e1=i9<k1:65`ae83>!72j3k?7c?:a;58?jgd290/=8l5a59m50g=021dmo4?:%36f?g33g;>m774;ncb>5<#9<h1m95a14c9e>=hi00;6)?:b;c7?k72i3h07bo7:18'50d=i=1e=8o5c:9le2<72-;>n7o;;o36e?b<3fk=6=4+14`9e1=i9<k1i65`9d83>!72j3k?7c?:a;d8?l>?290/=8l5869m50g=821b4;4?:%36f?>03g;>m7?4;|`04d<72?o1<7>t$052>4073A98>6F<279Y10<ds881o7?;:07956<?28;1n7o59;f955<zf?81>95a62810>h>l3:0blh50:&a<?7082.i57?80:&22a<53-ih6>5+ce80?!eb2:1/ok4<;%f2>6=#l;087)j<:29'`1<43-n>6>5+d780?!b02:1/h54<;%f:>6=#lh087)jm:29'`f<43-no6>5+dd80?!ba2:1/i=4<;%g2>6=#m;087)k<:29'a1<43-o>6>5+e780?!c02:1/i54<;%g:>6=#mh087)km:29'af<43-oo6>5+ed80?!ca2:1/j=4<;%d0>4323-;==7?9a:&222<6>o1/=;65599'53?==11/=;l5539'b4<53-l96?5+33d9534<,:9;6<8=;%35a?4<a8<=6=44ic594?=n9?91<75fb783>>o2i3:17d;m:188m4032900e<8::188m64e290/=8l533c8j43f2910e><6:18'50d=;;k0b<;n:098k<5=83.:9o462:l21d<732e2=7>5$07a><4<f8?j6<54o8294?"6=k02>6`>5`81?>i?n3:1(<;m:808j43f2:10c5k50;&21g<>:2d:9l4;;:m;`?6=,8?i64<4n07b>0=<g0i1<7*>5c8:6>h6=h0=76a6b;29 43e2080b<;n:698k<g=83.:9o462:l21d<?32e257>5$07a><4<f8?j6454o8:94?"6=k02>6`>5`8b?>i>?3:1(<;m:808j43f2k10c4850;&21g<>:2d:9l4l;:m:1?6=,8?i64<4n07b>a=<g0>1<7*>5c8:6>h6=h0n76a7c;29 43e2080b<;n:g98kg4=83.:9o4m1:l21d<732ei<7>5$07a>g7<f8?j6<54oc794?"6=k0i86`>5`83?>ie;3:1(<;m:c68j43f2810e><j:18'50d=;;n0b<;n:198m64d290/=8l533f8j43f2810e>750;&21g<402d:9l4?;:k03?6=,8?i6>64n07b>4=<a:<1<7*>5c80<>h6=h0976g;2;29 43e2:20b<;n:298m17=83.:9o4<8:l21d<332c?<7>5$07a>6><f8?j6854i2d94?"6=k0846`>5`85?>o4m3:1(<;m:2:8j43f2>10e>j50;&21g<402d:9l47;:k0g?6=,8?i6>64n07b><=<a:h1<7*>5c80<>h6=h0j76g<a;29 43e2:20b<;n:c98m63=83.:9o4<8:l21d<d32c3n7>5$07a>=g<f8?j6=54i9;94?"6=k03m6`>5`82?>o0k3:1(<;m:6`8j43f2910e:o50;&21g<0j2d:9l4>;:k4=?6=,8?i6:l4n07b>7=<a>21<7*>5c84f>h6=h0876g87;29 43e2>h0b<;n:598m20=83.:9o48b:l21d<232c397>5$07a>2d<f8?j6;54i9694?"6=k0<n6`>5`84?>o?;3:1(<;m:6`8j43f2110e5<50;&21g<0j2d:9l46;:k;5?6=,8?i6:l4n07b>d=<a1:1<7*>5c84f>h6=h0i76g8f;29 43e2>h0b<;n:b98m2c=83.:9o48b:l21d<c32c<h7>5$07a>2d<f8?j6h54i6794?"6=k0<n6`>5`8e?>o1j3:1(<;m:7c8j43f2910e;750;&21g<1i2d:9l4>;:k5<?6=,8?i6;o4n07b>7=<a?=1<7*>5c85e>h6=h0876g96;29 43e2?k0b<;n:598m33=83.:9o49a:l21d<232c<87>5$07a>3g<f8?j6;54i6194?"6=k0=m6`>5`84?>o0:3:1(<;m:7c8j43f2110e:?50;&21g<1i2d:9l46;:k44?6=,8?i6;o4n07b>d=<a?l1<7*>5c85e>h6=h0i76g9e;29 43e2?k0b<;n:b98m3b=83.:9o49a:l21d<c32c=o7>5$07a>3g<f8?j6h54i7694?"6=k0=m6`>5`8e?>o3?3:1(<;m:548j43f2910e9;50;&21g<3>2d:9l4>;:k70?6=,8?i6984n07b>7=<a<:1<7*>5c872>h6=h0876g;f;29 43e2=<0b<;n:598m1c=83.:9o4;6:l21d<232c?h7>5$07a>10<f8?j6;54i5a94?"6=k0?:6`>5`84?>o3j3:1(<;m:548j43f2110e9o50;&21g<3>2d:9l46;:k7=?6=,8?i6984n07b>d=<a=21<7*>5c872>h6=h0i76g;3;29 43e2=<0b<;n:b98kd3=83.:9o4n4:l21d<732ej?7>5$07a>d2<f8?j6<54o`094?"6=k0j86`>5`81?>if93:1(<;m:`68j43f2:10cl>50;&21g<f<2d:9l4;;:m:b?6=,8?i6l:4n07b>0=<gho1<7*>5c8b0>h6=h0=76and;29 43e2h>0b<;n:698kde=83.:9o4n4:l21d<?32ejn7>5$07a>d2<f8?j6454o`c94?"6=k0j86`>5`8b?>if13:1(<;m:`68j43f2k10cl650;&21g<f<2d:9l4l;:mb3?6=,8?i6l:4n07b>a=<gh<1<7*>5c8b0>h6=h0n76a6e;29 43e2h>0b<;n:g98m=>=83.:9o477:l21d<732c3:7>5$07a>=1<f8?j6<54}r1:e?6=:rT8;95231`930=z{:336=4={_147>;48k0=86s|38594?4|V:=970=?a;:a?xu41?0;6?uQ3638966f2>i0q~=65;296~X4?916?=o57`9~w6?32909wS=9f:?04d<012wx?4=50;0xZ60b349;m797;|q0=7<72;qU?;j4=22b>21<uz92<7>52z\02g=:;9k1;;5rs2:e>5<5sW9=m63<0`8;1>{t;1o1<7<t^24:?857i32?7p}<8e83>7}Y;?201>>n:9;8yv5?k3:1>vP<669>75g=0:1v>6m:181[51>278<l472:p7=g=838pR>8:;<13e?>63ty8444?:3y]732<5::j65>4}r1;<?6=:rT8:>5231c93c=z{:2<6=4={_156>;48h0<i6s|39794?4|V:<;70=?a;5g?xu40=0;6?uQ34d8966f2>?0q~=73;296~X4=l16?=o5899~w6>52909wS=:d:?04d<1j2wx?5?50;0xZ63d349;m786;|q0<5<72;qU?8l4=22b>3><uz9<j7>52z\01d=:;9k1::5rs25f>5<5sW9>563<0`852>{t;>n1<7<t^27;?857i3<>7p}<7b83>7}Y;<=01>>n:668yv5f93:1>vP<7`9>75g=?:1v>o?:181[501278<l476:p7<`=838pR>97;<13e?153ty85h4?:3y]721<5::j6:?4}r1:`?6=:rT8;;5231c935=z{:3h6=4={_141>;48h0=j6s|38`94?4|V:<h70=?a;4f?xu4180;6?uQ3738966f2?n0q~=76;296~X4=?16?=o56b9~w61e2909wS=:5:?04d<1<2wx8?o50;7e[25i279>54:6:?05a<2>278=n4:6:?05g<2>278=;4:6:?050<2>278=94:6:?1`a<2>279hn4:6:?1`g<2>279hl4:6:?1`<<2>279h54:6:?1`2<2>279h;4:6:?1`1<2>279h>4:6:?1`7<2>279h<4:6:?1`5<2>279ok4:6:?1g`<2>279oi4:6:?1gf<2>279oo4:6:?1g<<2>279o54:6:?1g2<2>279o;4:6:?1g0<2>279o94:6:?1g6<2>279o?4:6:?1g4<2>279o=4:6:?1a6<2>279i?4:6:?1a4<2>279i=4:6:?1`c<2>279hh4:6:?1`0<2>279ol4:6:?1fc<2>279nh4:6:?103<2>279884:6:?101<2>2798>4:6:?107<2>2798<4:6:?105<2>279?54:6:?172<2>279?;4:6:?170<2>279?94:6:?176<2>279??4:6:?15=<2>279=84:6:?15`<2>279=n4:6:?15g<2>27:i:4:6:?2a3<2>27:i84:6:?2a1<2>27:i>4:6:?2a7<2>27:i<4:6:?154<2>279==4:6:?14c<2>279<h4:6:?14a<2>279<n4:6:?14g<2>279<>4:6:?147<2>279<<4:6:?145<2>27:jk4:6:?2b`<2>27:ji4:6:?2f0<2>27:n94:6:?2f6<2>27:n?4:6:?2f4<2>27:n=4:6:?2ec<2>278<o4:b:?04d<2j2wx8>=50;5xZ154348:m7m7;<023?e?348:87m7;<026?e1348:?7m6;<13`?e>3ty??84?:2y]063<5:;i6<;k;<114?72l2wx8>l50;1a[24j2799n4:6:?11g<2>278>?4:6:?064<2>278>=4:6:?05d<2>278=44:6:?1<d<2>279444:6:?1<=<2>2794:4:6:?1<3<2>279484:6:?1<1<2>279;n4:6:?13g<2>279;l4:6:?13<<2>279;54:6:?132<2>279;;4:6:?12`<2>279:i4:6:?12f<2>279:o4:6:?12d<2>279:44:6:?12=<2>27:m:4:6:?2e3<2>27:m84:6:?2e1<2>27:m>4:6:?2e7<2>27:m<4:6:?2`4<2>27:h=4:6:?2gc<2>27:oh4:6:?2ga<2>27:on4:6:?2gg<2>27:o>4:6:?2g7<2>27:o<4:6:?2g5<2>27:nk4:6:?2f`<2>27:ni4:6:?2b0<2>27:j94:6:?2b6<2>27:j?4:6:?2b4<2>27:j=4:6:?2ac<2>278<o4:a:?04d<2i2wx89:50;1xZ123348>h7m9;<060?ef3ty8994?:74xZ6353W9>=6P<519]71`<V:>n7S=;d:\00f=Y<:;0R9=?;_61b>X3:l1U8?j4^50`?[25j2T?8?5Q4538Z1273W>8j6P;3d9]06b<V=9h7S=;3:\001=Y;o=0R>h7;_625>X3;11U8>o4^515?[52<278?>4l3:?05g<18278=;490:?050<18278=9490:?065<18278=l490:?05<<18278<o4>629>75d=9?>01>>m:046?857j39270=?b;1g?857j39h70=?b;1a?857j39j70=?b;16?857j32i70=?b;::?857j3=h70=?b;5b?857j3=270=?b;5;?857j3=<70=?b;55?857j32>70=?b;:7?857j32870=?b;:1?857j32:70=?b;:3?857j3=m70=?b;5f?857j3=o70=?b;4a?857j3<270=?b;4;?857j3<<70=?b;45?857j3<>70=?b;57?857j3=870=?b;51?857j3=:70=?b;53?857j3<m70=?b;4f?857j3<o70=?b;4`?857j3><70=?b;6a?857j3>j70=?b;6:?857j3>370=?b;60?857j32370=?b;:5?857i3;=?63<0`8221=:;9k1=;;4=22b>6?<5::j6>j4=22b>6e<5::j6>l4=22b>6g<5::j6>;4=22b>11<5::j69l4=22b>1g<5::j6974=22b>1><5::j69=4}r0a2?6=:rT8o<522ef950c<uz8i97>52z\0g5=::mi1=8k4}r0a0?6=:rT8nk522e`950c<uz8i?7>52z\0f`=::mk1=8k4}r0a6?6=:rT8ni522e;950c<uz8i=7>52z\0ff=::m21=8k4}r0a4?6=:rT8no522e5950c<uz8jj7>52z\0fd=::m<1=8k4}r0b`?6=:rT8n5522e6950c<uz8jo7>52z\0f2=::m91=8k4}r0bf?6=:rT8n;522e0950c<uz8jm7>52z\0f0=::m;1=8k4}r0b=?6=:rT8n9522e2950c<uz8j47>52z\0f6=::jl1=8k4}r0b3?6=:rT8n?522bg950c<uz8j:7>52z\0f4=::jn1=8k4}r0b1?6=:rT8n=522ba950c<uz8j87>52z\0ec=::jh1=8k4}r0b6?6=:rT8mi522b;950c<uz8j=7>52z\0ef=::j21=8k4}r0b4?6=:rT8mo522b5950c<uz82j7>52z\0ed=::j<1=8k4}r0:a?6=:rT8m4522b7950c<uz82h7>52z\0e==::j>1=8k4}r0:g?6=:rT8m:522b1950c<uz82n7>52z\0e3=::j81=8k4}r0:e?6=:rT8m8522b3950c<uz8257>52z\0e1=::j:1=8k4}r0a`?6=:rT8o:522d1950c<uz8io7>52z\0g3=::l81=8k4}r0af?6=:rT8o8522d3950c<uz8im7>52z\0g1=::l:1=8k4}r0a=?6=:rT8o>522ed950c<uz8i47>52z\0g7=::mo1=8k4}r0a3?6=:rT8n4522e7950c<uz8ji7>52z\0e`=::jk1=8k4}r0b7?6=:rT8m>522cd950c<uz8247>52z\0e7=::ko1=8k4}r02g?6=:rT8j=5220a950c<uz8>o7>52z\0b7=::<i1=8k4}r02a?6=:rT??45220g950c<uz8:j7>52z?16=<18279>>4>579~w674290:9v3=29821a=:;8<1=8k4=365>0e<5;>>68m4=367>0e<5;>868m4=361>0e<5;>:68m4=363>0e<5;9368m4=314>0e<5;9=68m4=316>0e<5;9?68m4=310>0e<5;996<;k;<02<?3d348:97;l;<02a?3d348:o7?:d:?15g<6=m1v?<7:18784503;>i63=168`=>;59;0h;63<0e8`2>{t;821<7?7{<06g?3d348>n7;l;<12e?72m2794l4:c:?1<<<2k279454:c:?1<2<2k2794;4:c:?1<0<2k279494:c:?13f<2k279;o4:c:?13d<2k279;44:c:?13=<2k279;:4:c:?133<6=m16>;k55b9>63b==j16>;m55b9>63d==j16>;o55b9>63?=9<n01?87:4a8yv42;3:1?v3=5b854>;5=k0=<63=568213=z{;?i6=4<{<06f?72m2799i4l7:?111<dj2wx?<m50;1x967c2?:01>?l:07f?856j3?37p}<1e83>7}:;8n1=8k4=23e>f1<uz99=7>53z?067<18278><4>5d9>776==11v><=:181855:3;>i63<258`3>{t;8h1<7=t=23`>36<5:;i6<;j;<12b?e13ty8>=4?:2y>777=>916??>514g896432j<0q~=>e;290~;49?0:9i52307950b<5:;?6<;k;<12b?72>2wx?<<50;3g856=3;>i63>e686g>;6m?0>o63>e486g>;6m=0>o63>e286g>;6m;0>o63>e086g>;5980>o63=1186g>;58o0>o63=0d86g>;58m0>o63=0b86g>;58k0>o63=0286g>;58;0>o63=0086g>;5890>o63>fg86g>;6nl0>o63>fe86g>;6j<0>o63>b586g>;6j:0>o63>b386g>;6j80>o63>b186g>;6io0>o6s|30394?4fs49:87?:e:?1`a<6=o16>im514d897be28?m70<ka;36b>;5l00:9k522e:950`<5;n<6<;i;<0g2?72n279h94>5g9>6a5=9<l01?j=:07e?84c93;>j63=d1821c=::jl1=8h4=3af>43a348hh7?:f:?1gf<6=o16>nl514d897e>28?m70<l8;36b>;5k>0:9k522b4950`<5;i>6<;i;<0`0?72n279o>4>5g9>6f4=9<l01?m>:07e?84d83;>j63=e2821c=::l81=8h4=3g2>43a348n<7?:f:?1`c<6=o16>ik514d897b228?m70<la;36b>;5jo0:9k522cg950`<5::o6no4=22a>401349;m7?96:p775=839p1>?n:07g?85613;>h63<258213=z{:;<6=4>dz?05<<6=l16=l955b9>5d0==j16=l;55b9>5d2==j16=l=55b9>5d4==j16=l?55b9>5a7==j16=i>55b9>5f`==j16=nk55b9>5fb==j16=nm55b9>5fd==j16=n=55b9>5f4==j16=n?55b9>5f6==j16=oh55b9>5gc==j16=oj55b9>5c3==j16=k:55b9>5c5==j16=k<55b9>5c7==j16=k>55b9>5``==j1v>>i:1813~;5lm0>463=db86<>;5lk0>463=d`86<>;5l00>463=d986<>;5l>0>463=d786<>;5l=0>463=d286<>;5l;0>463=d086<>;5l90>463=cg86<>;5kl0>463=ce86<>;5kj0>463=cc86<>;5k00>463=c986<>;5k>0>463=c786<>;5k<0>463=c586<>;5k:0>463=c386<>;5k80>463=c186<>;5m:0>463=e386<>;5m80>463=e186<>;5lo0>463=dd86<>;5l<0>463=c`86<>;5jo0>463=bd86<>;59=0:9;5rs221>5<5s48oh78?;<13f??b3ty8<<4?:3y>6ae=>916?=l58b9~w6672909w0<kb;43?857i3h>7p}=fg83>7}::mk1:=5231c9e0=z{;ln6=4={<0g=?07349;m7o<;|q1ba<72;q6>i65619>75g=i;1v?hl:18184c?3<;70=?a;c2?xu5nk0;6?u22e4925=:;9k1m=5rs3d:>5<5s48o878?;<13e??a3ty9j54?:3y>6a5=>916?=o5ad9~w7`02909w0<k2;43?857i3ko7p}=f783>7}::m;1:=5231c9f6=z{;l>6=4={<0g4?07349;m7ol;|q1b1<72;q6>nh5619>75g=ik1v?h<:18184dm3<;70=?a;cb?xu5n;0;6?u22bf925=:;9k1m45rs3d2>5<5s48ho78?;<13e?g?3ty9j=4?:3y>6fd=>916?=o5a69~w7cb2909w0<l9;43?857i3k=7p}=ee83>7}::j21:=5231c9=`=z{;oh6=4={<0`3?07349;m7l=;|q1ag<72;q6>n85619>75g=1:1v?kn:18184d=3<;70=?a;;2?xu5m00;6?u22b6925=:;9k15=5rs3g;>5<5s48h?78?;<13e?>a3ty9i:4?:3y>6f4=>916?=o58d9~w7c12909w0<l1;43?857i32o7p}=e483>7}::j:1:=5231c9=f=z{::26=4={<0f7?07349;m77m;|q04=<72;q6>h<5619>75g=j91v>>8:18184b93<;70=?a;;b?xu48?0;6?u22d2925=:;9k1545rs226>5<5s48oj78?;<13e???3ty8<94?:3y>6ac=>916?=o5969~w6642909w0<k5;43?857i33=7p}=f`83>7}::jk1:=5231c9=0=z{;om6=4={<0ab?07349;m77;;|q1a1<72;q6>ok5619>75g=0j1v>>j:1824~;5<?0>463=4486<>;5<=0>463=4286<>;5<;0>463=4086<>;5<90>463=3986<>;5;>0>463=3786<>;5;<0>463=3586<>;5;:0>463=3386<>;59;0:9;522319g==z{;9:6=4;{<072?07348847?:e:?114<d>279>:4l9:p66`=83<p1?:9:07f?87e=3<;70?88;a4?84593i<70=?b;66?857i3>>7p}=3183>0}::=?1:=52225950c<5;?;6n84=372>f?<5;8<6no4}r00a?6=>r79884>5d9>52>=k?16=:75c69>677=k016?=l5459>75g=<=1v?<i:185843<3<;70<<6;36a>;5<l0h;63=518`=>;5=80hm63=258`2>{t::n1<78t=367>43b34;<57m9;<34e?e03489<7mn;<13f?37349;m7;?;|q16`<72>q6>9=5619>663=9<o01?:l:b48972b2j<01?;?:b5897352j<01?<::bc8yv44k3:1;v3=42821`=:9>h1o:5216c9g3=::;:1oo522309gd=:;9h18k5231c90c=z{;8o6=47{<076?07348887?:e:?10f<d12798h4la:?115<dj279>l4l6:?114<d?279>84l7:p66d=83<p1?:=:07f?870j3i=70?8c;a4?84583i<70=?b;6f?857i3>n7p}=2b83>d}::=;1:=52221950c<5;>h6n64=36f>f?<5;?;6no4=30b>f><5;826n94=372>f><5;8=6n64=306>fd<uz88m7>56z?104<6=l16=:m5c79>52b=k>16>?<5c69>75d=<m16?=o54e9~w74e290iw0<;0;43?844:3;>i63=4b8`3>;5<l0h463=518`<>;5:h0h;63=288`2>;5=;0h;63=278`=>;5:>0hn63=498`1>{t::31<7;t=363>43b34;<h7m9;<016?e?349;n7:l;<13e?2d3ty99<4?:3y>66>=>916>8?51448yv43n3:1>v3=36854>;5=90:9;5rs36g>5<5s488:78?;<07a?72>2wx>9l50;0x97522?:01?:l:075?xu5<h0;6?u2226925=::;k1=884}r07=?6=:r79?>490:?16<<6=?1v?:8:181844:3<;70<;8;362>{t:831<7=t=33;>36<5;;n6;>4=33b>4313ty9=54?:6y>64>=9<o01??n:b5897702j=01??;:b5897752j201??<:b:8966c2j20q~<>6;296~;59<0=<63=168213=z{;;>6=48{<021?72m279=l4l6:?152<d>279=94l6:?157<d1279=>4l6:?04a<d?2wx><j50;1x977d2?:01??m:728977428?=7p}=1c83>7}::8h1=8k4=330>f1<uz9:<7>521y>6=g==116>575599>6=>==116>595599>6=0==116>5;5599>6=2==116>:m5599>62d==116>:o5599>62?==116>:65599>621==116>:85599>63c==116>;j5599>63e==116>;l5599>63g==116>;75599>63>==116>8j51448966e2k<01>>m:20a?857j399563<0c806`=:;9h1??m4=22b>g0<5::j6><m;<13e?551278<l4<2d9>75g=;;i0q~<85;297~;50h0=<63=7b821`=::<21o45rs3:0>5<2s483m7?:e:?2b0<1827:;?4l7:?04g<4?278<l4<7:p622=839p1?66:728971e28?n70<:8;a4?xu50;0;68u229;950c<58=96n84=050>f1<5::i6>84=22b>60<uz8<?7>53z?1<=<18279;l4>5d9>60g=kh1v?6>:18684?03;>i63>728`2>;6?=0h;63<0c876>;48h0?>6s|26094?2|5;2<6;>4=35:>43b348>57mn;<06e?e13ty94=4?:4y>6=1=9<o01<9::b5894132j<01>>m:538966f2=;0q~<81;297~;50?0=<63=79821`=::<k1o:5rs35e>5<2s483:7?:e:?230<d>27:;;4l7:?04g<38278<l4;0:p626=839p1?6::728971028?n70<:9;a5?xu5?l0;68u2297950c<58==6n84=054>f1<5::i6>h4=22b>6`<uz8=j7>54z?1<1<18279;;4>5d9>60>=kk16>875cc9~w71c290?w0<74;36a>;6?>0h:63<0c80a>;48h08i6s|27594?2|5;=h6;>4=34f>43b3482;7m8;<062?e>3ty9:;4?:4y>62d=>916>;j514g897?02j<01?;9:b5897?22j<0q~<95;292~;5?h0=<63=6b821`=::0=1o4522469g==::091o:522879gg=z{;<?6=48{<04=?07348=n7?:e:?1=2<d0279984l9:?1=5<d>2795>4la:?1=0<d?2wx>;=50;:x971?2?:01?8n:07f?84?n3i370<90;a5?842<3i=70<60;a:?84>;3i270<65;ab?xu5>;0;64u2265925=::?31=8k4=3:e>f1<5;<;6n64=37e>f0<5;?>6no4=3;3>f><5;386n64=3;6>f?<uz8==7>5bz?133<18279:54>5d9>6=`=k?16>;>5c69>60`=k>16>8;5cc9>600=kk16>4>5c69>6<5=k?16>4;5c99>60c=k<1v?79:181841m3<;70<67;362>{t:0>1<7<t=34g>36<5;3>6<;9;|q1=7<72;q6>;m5619>6<5=9<<0q~<7e;296~;5>k0=<63=918213=z{;2o6=4={<05e?07348=<7?:6:p6=e=838p1?86:728973a28?=7p}=8c83>7}::?21:=5224g9500<uz8;m7>57z?2a2<18279=<4>5d9>5=3=k>16=595c99>5a2=kk16=i<5c89>5a5=kh1v<k?:18087b?3;>i63=268`3>;5:80h:6s|19694?5|58o=6;>4=0:6>43134;o97mm;|q2`c<72:q6=h8514g897402j<01?<>:b:8yv7?>3:1>v3>e4854>;60>0:9;5rs0ff>5<4s4;n97?:e:?161<d?279>=4l9:p5=>=838p1<k;:72894b528?=7p}>de83>1}:9l>1=8k4=306>f?<5;8;6n84=301>fd<uz;357>52z?2a6<1827:h>4>579~w4bd2908w0?j3;36a>;5:<0h463=218`<>{t91k1<7<t=0g1>36<58n?6<;9;|q2`g<72=q6=h<514g897412j=01?<::b4897452j<0q~?7b;296~;6m80=<63>d48213=z{8nj6=4;{<3f5?72m279>;4l6:?162<d0279>?4l9:p5fg=83=p1<o8:72894b628?n70?63;a4?87>=3i<70?k7;ab?87c>3i270?k8;aa?xu6i90;6>u21`5950c<5;?36no4=375>fg<uz;2>7>53z?2e3<1827:5>4>579>5a?=kk1v<7i:18087f>3;>i63=598`<>;5=?0h46s|18694?4|58k>6;>4=0;6>4313ty:5h4?:2y>5d3=9<o01?;n:b;897332j30q~?66;296~;6i=0=<63>d78213=z{83o6=4;{<3b0?72m279944l8:?11d<dj279984l6:p5<1=838p1<o<:72894b028?=7p}>9b83>6}:9h91=8k4=37b>f><5;??6n94}r3:<?6=:r7:m?490:?2`=<6=?1v<7m:18087f:3;>i63=588`3>;5=<0h;6s|18;94?4|58k:6;>4=0f:>4313ty:5l4?:4y>5d7=9<o01?;7:b48973>2j301?;::b:897312j<0q~?ic;296~;5980=<63=02821`=z{8li6=4={<024?07348;>7?:e:p65?=83<p1???:07f?87?=3i=70?77;a4?87c<3ij70?k2;a;?87c;3i27p}>f`83>7}::9l1:=52213950c<uz8;47>56z?14c<6=l16=595c79>5a2=k016=i<5c69>5a5=k116=i;5c99~w4`>2909w0<?e;43?84783;>i6s|21594?3|5;:n6<;j;<3g0?e?34;o>7m9;<3g7?e034;o97m6;|q2b=<72;q6>=j5619>5c`=9<o0q~<?6;290~;58m0:9h521e69g2=:9m91o;521e79g3=z{8l<6=4={<03g?0734;mi7?:e:p653=839p1?>l:07f?87c<3i=70?k5;a4?xu6n?0;6?u221`925=:9on1=8k4}r030?6=:r79<o4>5d9>5a3=kh1v<ll:18187c93<;70?l3;36a>{t9kh1<7<t=0f3>36<58i96<;j;|q2g<<72?q6=i>514g894?42j<01<7::b4894b02j301<j9:b:894b?2jk0q~?ma;296~;6ko0=<63>c0821`=z{8i36=49{<3`b?72m27:584l8:?2`2<d027:h;4l7:?2`=<d127:h44l8:p5g?=838p1<mj:72894e728?n7p}>c683>0}:9jo1=8k4=0f4>f1<58n=6n84=0f;>f><58n26n74}r3a<?6=:r7:oi490:?2fc<6=l1v<m9:18787dl3;>i63>d68`2>;6l10h;63>d88`2>{t9k=1<7<t=0a`>36<58hn6<;j;|q2g0<72:q6=nm514g894b?2j<01<j6:b58yv7e>3:1>v3>cc854>;6jm0:9h5rs0a7>5<5s4;hn7?:e:?2`<<di2wx=hk50;0x97642?:01<h::07f?xu6mm0;6?u2210925=:9o>1=8k4}r3fg?6=:r79<<490:?2b6<6=l1v<km:18184783<;70?i2;36a>{t9lk1<7<t=0de>36<58l:6<;j;|q2a<<72;q6=kk5619>5c6=9<o0q~?j8;296~;6nm0=<63>eg821`=z{8kn6=4={<3`7?0734;i97?:e:p5db=838p1<m=:72894d328?n7p}>ab83>7}:9j;1:=521c1950c<uz;jn7>52z?2g5<1827:n?4>5d9~w4gf2909w0?mf;43?87e93;>i6s|1`;94?4|58hn6;>4=0`3>43b3ty:m54?:3y>5gb=>916=lh514g8yv7?k3:1>v3>b5854>;6?10:9;5rs0:g>5<5s4;i?78?;<34=?72>2wx=5k50;0x94d52?:01<9n:075?xu60o0;6?u21c3925=:9>h1=884}r3:4?6=:r7:n=490:?23f<6=?1v<7>:18187fn3<;70?8d;362>{t9>o1<7<t=0d7>36<58=96<;9;|q23c<72;q6=k=5619>525=9<<0q~?70;296~;6n;0=<63>758213=z{82:6=4={<3e5?0734;<97?:6:p5=4=838p1<h?:728941128?=7p}>8283>7}:9ll1:=521659500<uz82=7>52z?1<c<6=?16>495c`9~w4562909w0<:2;362>;5=80hn6s|23694?4|5;8?6<;9;<017?e03ty9>;4?:3y>670=9<<01?<<:b48yv45=3:1>v3=248213=::;91o45rs304>5<5s489;7?:6:?166<di2wx>?>50;0x974728?=70<=1;ab?xu5=10;6?u224:9500<5;?<6n84}r06=?6=:r79944>579>601=k>1v?;n:181842i3;>:63=568`<>{t:<>1<7<t=377>431348>;7m6;|q110<72;q6>8;5144897302jk0q~<:6;296~;5=?0:9;522459gg=z{8986=4={<016?72>279><4lb:p677=838p1?<>:075?845;3ii7p}<0b83>6}:;9n1=884=22a>g1<5::j6o94}|q770<72;qU8>;4=469063<,:8>6<:m;|q77g<72;qU8>l4=46906d<,:8>6<:k;|q76d<72;qU8?o4=46907g<,:8>6<:j;|q0=d<72;qU?::4=469722<,:8>6<>6;|q0==<72;qU?:=4=469725<,:8>6<?;;|q0=2<72;qU?:<4=469724<,:8>6<?i;|q0=3<72;qU?:?4=469727<,:8>6<<9;|q0=0<72;qU?:>4=469726<,:8>6<<7;|q0=1<72;qU?;h4=46973`<,:8>6<<6;|q0=6<72;qU?;k4=46973c<,:8>6<<n;|q0=7<72;qU?;j4=46973b<,:8>6<<m;|q0=5<72;qU?;l4=46973d<,:8>6<<l;|q0<c<72;qU?;o4=46973g<,:8>6<<k;|q0<`<72;qU?;74=46973?<,:8>6<<j;|q0<a<72;qU?;64=46973><,:8>6<<i;|q0<f<72;qU?;94=469731<,:8>6<=?;|q0<g<72;qU?;84=469730<,:8>6<=>;|q0<d<72;qU?;;4=469733<,:8>6<==;|q0<<<72;qU?;:4=469732<,:8>6<=<;|q0<=<72;qU?;=4=469735<,:8>6<=;;|q0<2<72;qU?;<4=469734<,:8>6<=:;|q0<0<72;qU?;>4=469736<,:8>6<=9;|q0<1<72;qU?8h4=46970`<,:8>6<=8;|q0<6<72;qU?8k4=46970c<,:8>6<=7;|q0<7<72;qU?8j4=46970b<,:8>6<=6;|q0<4<72;qU?8m4=46970e<,:8>6<=n;|q0<5<72;qU?8l4=46970d<,:8>6<=m;|q03c<72;qU?8o4=46970g<,:8>6<=l;|q03`<72;qU?874=46970?<,:8>6<=k;|q03a<72;qU?864=46970><,:8>6<=j;|q03f<72;qU?894=469701<,:8>6<=i;|q0e4<72;qU?:o4=46972g<,:8>6<:?;|q0e5<72;qU?:74=46972?<,:8>6<:>;|q0=c<72;qU?:64=46972><,:8>6<:=;|q0=`<72;qU?:94=469721<,:8>6<:<;|q0=a<72;qU?:84=469720<,:8>6<:;;|q0=f<72;qU?:;4=469723<,:8>6<::;|q0=g<72;qU?;m4=46973e<,:8>6<:9;|q0=4<72;qU?;?4=469737<,:8>6<:8;|q0<3<72;qU?884=469700<,:8>6<:7;|q03g<72;qU?8;4=469703<,:8>6<:6;|q701<72;qU89:4=469012<,:8>6<:n;|q776<72;qU8>=4=469065<,:8>6<:l;|q0a2<72;qU?n?4=4697f7<,:8>6<:i;|q0a0<72;qU?n>4=4697f6<,:8>6<;?;|q0a1<72;qU?oh4=4697g`<,:8>6<;>;|q0a6<72;qU?ok4=4697gc<,:8>6<;=;|q0a7<72;qU?oj4=4697gb<,:8>6kh4}r1f5?6=:rT8nn525580ff=#;;?1==>4}r1f4?6=:rT8no525580fg=#;;?1==?4}r1gb?6=:rT8nl525580fd=#;;?1==<4}r1g`?6=:rT8n5525580f==#;;?1===4}r1gg?6=:rT8n:525580f2=#;;?1==:4}r1gf?6=:rT8n;525580f3=#;;?1==;4}r1ge?6=:rT8n8525580f0=#;;?1==84}r1g=?6=:rT8n9525580f1=#;;?1==94}r1g<?6=:rT8n>525580f6=#;;?1==64}r1g3?6=:rT8n?525580f7=#;;?1==o4}r1g2?6=:rT8n<525580f4=#;;?1==l4}r1g1?6=:rT8n=525580f5=#;;?1==m4}r1g0?6=:rT8mk525580ec=#;;?1==j4}r1g6?6=:rT8mi525580ea=#;;?1==k4}r1g5?6=:rT8mn525580ef=#;;?1==h4}r1g4?6=:rT8mo525580eg=#;;?1=<>4}r1`b?6=:rT8ml525580ed=#;;?1=<?4}r1`a?6=:rT8m4525580e<=#;;?1=<<4}r1``?6=:rT8m5525580e==#;;?1=<=4}r1`g?6=:rT8m:525580e2=#;;?1=<;4}r1`f?6=:rT8m;525580e3=#;;?1=<84}r1`e?6=:rT8m8525580e0=#;;?1=<94}r1`=?6=:rT8m9525580e1=#;;?1=<64}r1fa?6=:rT8o:525580g2=#;;?1=<74}r1f`?6=:rT8o;525580g3=#;;?1=<o4}r1fg?6=:rT8o8525580g0=#;;?1=<l4}r1ff?6=:rT8o9525580g1=#;;?1=<m4}r1fe?6=:rT8o>525580g6=#;;?1=<j4}r1f=?6=:rT8o?525580g7=#;;?1=<k4}r1f<?6=:rT8n4525580f<=#;;?1=?>4}r1ga?6=:rT8mh525580e`=#;;?1=??4}r1g7?6=:rT8m>525580e6=#;;?1=?<4}r1`<?6=:rT8m?525580e7=#;;?1=?=4}r1e6?6=:rT8j?525580b7=#;;?1=?:4}r1e4?6=:rT8j=525580b5=#;;?1=?;4}r60=?6=:rT??45255877<=#;;?1=?94}|l4f4<72;qC??84}o5a6?6=:rB8>;5rn6`0>5<5sA99:6sa7c694?4|@:8=7p`8b483>7}O;;<0qc9m6;296~N4:?1vb:l8:181M55>2we;o650;0xL6413td<n44?:3yK770<ug=im7>52zJ063=zf>hi6=4={I112>{i?ki1<7<tH205?xh0jm0;6?uG3348yk1em3:1>vF<279~j2da2909wE==6:m3f6=838pD><9;|l4g4<72;qC??84}o5`6?6=:rB8>;5rn6a0>5<5sA99:6sa7b694?4|@:8=7p`8c483>7}O;;<0qc9l6;296~N4:?1vb:m8:181M55>2we;n650;0xL6413td<o44?:3yK770<ug=hm7>52zJ063=zf>ii6=4={I112>{i?ji1<7<tH205?xh0km0;6?uG3348yk1dm3:1>vF<279~j2ea2909wE==6:m3a6=838pD><9;|l4`4<72;qC??84}o5g6?6=:rB8>;5rn6f0>5<5sA99:6sa7e694?4|@:8=7p`8d483>7}O;;<0qc9k6;296~N4:?1vb:j8:181M55>2we;i650;0xL6413td<h44?:3yK770<ug=om7>52zJ063=zf>ni6=4={I112>{i?mi1<7<tH205?xh0lm0;6?uG3348yk1cm3:1>vF<279~j2ba2909wE==6:m3`6=838pD><9;|l4a4<72;qC??84}o5f6?6=:rB8>;5rn6g0>5<5sA99:6sa7d694?4|@:8=7p`8e483>7}O;;<0qc9j6;296~N4:?1vb:k8:181M55>2we;h650;0xL6413td<i44?:3yK770<ug=nm7>52zJ063=zf>oi6=4={I112>{i?li1<7<tH205?xh0mm0;6?uG3348yk1bm3:1>vF<279~j2ca2909wE==6:m3c6=838pD><9;|l4b4<72;qC??84}o5e6?6=:rB8>;5rn6d0>5<5sA99:6sa7g694?4|@:8=7p`8f483>7}O;;<0qc9i6;296~N4:?1vb:h8:181M55>2we;k650;0xL6413td<j44?:3yK770<ug=mm7>52zJ063=zf>li6=4={I112>{i?oi1<7<tH205?xh0nm0;6?uG3348yk1am3:1>vF<279~j2`a2909wE==6:m<56=838pD><9;|l;44<72;qC??84}o:36?6=:rB8>;5rn920>5<5sA99:6sa81694?4|@:8=7p`9b783>4}O;;<0qc8j0;295~N4:?1vb;k>:182M55>2we:h<50;3xL6413td=i>4?:0yK770<ug<n87>51zJ063=zf?o>6=4>{I112>{i>l<1<7?tH205?xh1m>0;6<uG3348yk0b03:1=vF<279~j3c>290:wE==6:m2`g=83;pD><9;|l5ag<728qC??84}o4fg?6=9rB8>;5rn7gg>5<6sA99:6sa6dg94?7|@:8=7p`9eg83>4}O;;<0qc8i0;295~N4:?1vb;h>:182M55>2we:k<50;3xL6413td=j>4?:0yK770<ug<m87>51zJ063=zf?l>6=4>{I112>{i>o<1<7?tH205?xh1n>0;6<uG3348yk0a03:1=vF<279~j3`>290:wE==6:m2cg=83;pD><9;|l5bg<728qC??84}o4eg?6=9rB8>;5rn7dg>5<6sA99:6sa6gg94?7|@:8=7p`9fg83>4}O;;<0qc9?0;295~N4:?1vb:>>:182M55>2we;=<50;3xL6413td<<>4?:0yK770<ug=;87>51zJ063=zf>:>6=4>{I112>{i?9<1<7?tH205?xh08>0;6<uG3348yk1703:1=vF<279~j26>290:wE==6:m35g=83;pD><9;|l44g<728qC??84}o53g?6=9rB8>;5rn62g>5<6sA99:6sa71g94?7|@:8=7p`80g83>4}O;;<0qc9>0;295~N4:?1vb:?>:182M55>2we;<<50;3xL6413td<=>4?:0yK770<ug=:87>51zJ063=zf>;>6=4>{I112>{i?8<1<7?tH205?xh09>0;6<uG3348yk1603:1=vF<279~j27>290:wE==6:m34g=83;pD><9;|l45g<728qC??84}o52g?6=9rB8>;5rn63g>5<6sA99:6sa70g94?7|@:8=7p`81g83>4}O;;<0qc9=0;295~N4:?1vb:<>:182M55>2we;?<50;3xL6413td<>>4?:0yK770<ug=987>51zJ063=zf>8>6=4>{I112>{i?;<1<7?tH205?xh0:>0;6<uG3348yk1503:1=vF<279~j24>290:wE==6:m37g=83;pD><9;|l46g<728qC??84}o51g?6=9rB8>;5rn60g>5<6sA99:6sa73g94?7|@:8=7p`82g83>4}O;;<0qc9<0;295~N4:?1vb:=>:182M55>2we;><50;3xL6413td<?>4?:0yK770<ug=887>51zJ063=zf>9>6=4>{I112>{i?:<1<7?tH205?xh0;>0;6<uG3348yk1403:1=vF<279~j25>290:wE==6:m36g=83;pD><9;|l47g<728qC??84}o50g?6=9rB8>;5rn61g>5<6sA99:6sa72g94?7|@:8=7p`83g83>4}O;;<0qc9;0;295~N4:?1vb::>:182M55>2we;9<50;3xL6413td<8>4?:0yK770<ug=?87>51zJ063=zf>>>6=4>{I112>{i?=<1<7?tH205?xh0<>0;6<uG3348yk1303:1=vF<279~j22>290:wE==6:m31g=83;pD><9;|l40g<728qC??84}o57g?6=9rB8>;5rn66g>5<6sA99:6sa75g94?7|@:8=7p`84g83>4}O;;<0qc9:0;295~N4:?1vb:;>:182M55>2we;8<50;3xL6413td<9>4?:0yK770<ug=>87>51zJ063=zf>?>6=4>{I112>{i?<<1<7?tH205?xh0=>0;6<uG3348yk1203:1=vF<279~j23>290:wE==6:m30g=83;pD><9;|l41g<728qC??84}o56g?6=9rB8>;5rn67g>5<6sA99:6sa74g94?7|@:8=7p`85g83>4}O;;<0qc990;295~N4:?1vb:8>:182M55>2we;;<50;3xL6413td<:>4?:0yK770<ug==87>51zJ063=zf><>6=4>{I112>{i??<1<7?tH205?xh0>>0;6<uG3348yk1103:1=vF<279~j20>290:wE==6:m33g=83;pD><9;|l42g<728qC??84}o55g?6=9rB8>;5rn64g>5<6sA99:6sa77g94?7|@:8=7p`86g83>4}O;;<0qc980;295~N4:?1vb:9>:182M55>2we;:<50;3xL6413td<;>4?:0yK770<ug=<87>51zJ063=zf>=>6=4>{I112>{i?><1<7?tH205?xh0?>0;6<uG3348yk1003:1=vF<279~j21>290:wE==6:m32g=83;pD><9;|l43g<728qC??84}o54g?6=9rB8>;5rn65g>5<6sA99:6sa76g94?7|@:8=7p`87g83>4}O;;<0qc970;295~N4:?1vb:6>:182M55>2we;5<50;3xL6413td<4>4?:0yK770<ug=387>51zJ063=zf>2>6=4>{I112>{i?1<1<7?tH205?xh00>0;6<uG3348yk1?03:1=vF<279~j2>>290:wE==6:m3=g=83;pD><9;|l4<g<728qC??84}o5;g?6=9rB8>;5rn6:g>5<6sA99:6sa79g94?7|@:8=7p`88g83>4}O;;<0qc960;295~N4:?1vb:7>:182M55>2we;4<50;3xL6413td<5>4?:0yK770<ug=287>51zJ063=zf>3>6=4>{I112>{i?0<1<7?tH205?xh01>0;6<uG3348yk1>03:1=vF<279~j2?>290:wE==6:m3<g=83;pD><9;|l4=g<728qC??84}o5:g?6=9rB8>;5rn6;g>5<6sA99:6sa78g94?7|@:8=7p`89g83>4}O;;<0qc9n0;295~N4:?1vb:o>:182M55>2we;l<50;3xL6413td<m>4?:0yK770<ug=j87>51zJ063=zf>k>6=4>{I112>{i?h<1<7?tH205?xh0i>0;6<uG3348yk1f03:1=vF<279~j2g>290:wE==6:m3dg=83;pD><9;|l4eg<728qC??84}o5bg?6=9rB8>;5rn6cg>5<6sA99:6sa7`g94?7|@:8=7p`8ag83>4}O;;<0qc9m0;295~N4:?1vqpsO@By:6g<e9?<hhhsO@Cy3yEFWstJK
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/netlist/data_reg.ngc
0,0 → 1,3
XILINX-XDB 0.1 STUB 0.1 ASCII
XILINX-XDM V1.5e
$3f74d<,[o}e~g`n;"2*776&=$94#:!1!&:?56789:;<=:?;123456789:;<=>?0123456789:;<=>?0123456789:;<=>?0123456789:;<=>?0292*57338;1EC^ZT;cg`wd;990;2<74108LQQVR\3xomij}eba?55<768>0=>4FNQWW>dbczh6:>7>115920?OIX\^1MIJ]A=30>586<2;?6D@_UU8B@ATE4891<3??;08JJUSS2~oj0=4?>0285?OIX\^1{hl30;2=57=4:3CE\XZ5DHC?74<76880??4FNQWW>AOE4:;1<3?<;209MKVR\3nbbo2<1;2=56=4:3E^X][[:EMB867=87;87><5OTVSQQ<CGK68=7>114906?IR\Y__6iaztc>05?69981?6D@_UU8GMUG;;3:5=<5;:HLSQQ<CAYH7?7>11197>LHW]]0\IL2<:1<24>2=AGZ^X7YJB=194;753=0DYY^ZT;FLTD:4294:>6:5OTVSQQ<CGYH7?7>1e:4ph}71kzm8>9#<109;>LHW]]0oeco37;2=56=?2F__\XZ5dnwwe91=8720MIJ]A=2==>GCL[K7==06;@FGVD:69730MIJ]A=31:g=FLMXJ0<=50?;8EABUI5;8255NDEPB848?3HNO^L2=>99B@ATF4:437LJKR@>7:==FLMXJ0807;@FGVD:1611JHI\N<6<;?DBCZH63255NDEPB8<8?3HNO^O2?>89B@ATE48:556OKDS@?548>3HNO^O2>2?`8EABUJ5;86=06;@FGVG:6;720MIJ]B=3=<>GCL[H7>364AEFQF95902KOH_L34?:8EABUJ5?546OKDS@?2;><IMNYN1918:CG@WD;0720MIJ]B=;=7>GKD:1IY?64BTQ\MK@H:2IN=?5LHDAH[IODMGYNSYW_E59@HNG33JF@N45LOLOJPQCC9=1HC_KPGDLFVDRNGGUBBKA8;BPFEQCCk2NJXLQXIEVK[De<LH^JSZGKTI]A2>BNI5:5;6JFA=33:2=CAH6:=394DHC?57803MCJ0<=17:FJE9736>1OEL2>5?58@LG;9?4<7IGN<05=3>BNI5;32:5KI@>2=;0<L@K7=394DHC?65803MCJ0??17:FJE9456>1OEL2=3?58@LG;:=4<7IGN<37=3>BNI58=2:5KI@>13;1<L@K7>508;EKB87?9>2NBM1<17:FJE957601OEL2<1;2=3>BNI59:2;5KI@>0:3=CAH6?2;5KI@>6:3=CAH6=2;5KI@>4:3=CAH632;5KI@>::3=CAK6;2:5KIC>24;1<L@H7=<08;EKA8449?2NBN1?<>69GMG:6<7=0HDL314<4?AOE48<5;6JFB=34:2=CAK6:4394DH@?5<813MCI0<08;EKA8769?2NBN1<>>69GMG:5:7=0HDL322<4?AOE4;>5;6JFB=06:2=CAK69:394DH@?62803MCI0?617:FJF94>6?1OEO2=>69GMG:48730HDL33083:2=CAK68=384DH@?7;0<L@H78384DH@?1;0<L@H7:384DH@?3;0<L@H74384DH@?=;1<L@ZJ0=08;EKSE979?2NB\L2=>89GMUG;;3:5;6JFP@>0:2=CAYH7<394DHRA84803MC[N1<19:FJTG:4294<7IG_B=1=2>BHI5:5;6J@A=33:2=CGH6:=394DNC?57803MEJ0<=17:FLE9736>1OCL2>5?58@JG;9?4<7IAN<05=3>BHI5;32:5KO@>2=;0<LFK7=394DNC?65803MEJ0??17:FLE9456>1OCL2=3?58@JG;:=4<7IAN<37=3>BHI58=2:5KO@>13;1<LFK7>508;EMB87?9>2NDM1<17:FLE957601OCL2<1;2=3>BHI59:2;5KO@>0:3=CGH6?2;5KO@>6:3=CGH6=2;5KO@>4:3=CGH632;5KO@>::2=CGHUYIJ84DN@?4;1<LFH7==08;EMA8479?2NDN1?=>69GKG:6;7=0HBL315<4?AIE48?5;6J@B=35:2=CGK6:;394DN@?5=803MEI0<716:FLF979?2NDN1<?>69GKG:597=0HBL323<4?AIE4;95;6J@B=07:2=CGK699394DN@?63803MEI0?917:FLF94?6>1OCO2=9?48@JD;:7=0HBL331<:?AIE4:;1<394DN@?74813MEI0>09;EMA81813MEI0809;EMA83813MEI0:09;EMA8=813MEI0408;EMA[WC@?2ND\L2?>69GKUG;97=0HB^N<3<:?AIWI591<394DNRB86803ME[N1>17:FLTG:66>1OC]L32?;8@JVE4:0;2:5KOQ@?7;5<MGK87H@Mb:GM[WUSZHGTMo5JN^PPPWGJWK?0JLB\E09D7>AIL11BBDZ__12;?LHN\YU;=55FNHVS[54?3@DBX]Q?399JJLRWW9>37D@FTQ]31==NF@^[S=87;HLJPUY7?>1BBDZP0158MKOSW9;<7D@FT^213>OIA]U;?:5FNHV\411<AGC_S=;8;HLJPZ61?2CEEYQ?769JJLRX81=0ECG[_1;4?LHN\V:J;6GAIU]3F2=NF@^T<N94IOKW[5B03@DBXR>J7:KMMQY7N>1BBDZP1158MKOSW8;<7D@FT^313>OIA]U:?:5FNHV\511<AGC_S<;8;HLJPZ71?2CEEYQ>769JJLRX91=0ECG[_0;4?LHN\V;J;6GAIU]2F2=NF@^T=N94IOKW[4B03@DBXR?J7:KMMQY6N>1BBDZP2158MKOSW;;<7D@FT^013>OIA]U9?:5FNHV\611<AGC_S?;8;HLJPZ41?2CEEYQ=769JJLRX:1=0ECG[_3;4?LHN\V8J;6GAIU]1F2=NF@^T>N94IOKW[7B03@DBXR<J7:KMMQY5N>1BBDZP3158MKOSW:;<7D@FT^113>OIA]U8?:5FNHV\711<AGC_S>;8;HLJPZ51?2CEEYQ<769JJLRX;1=0ECG[_2;4?LHN\V9J;6GAIU]0F2=NF@^T?N94IOKW[6B03@DBXR=J7:KMMQY4N?1BBDZPA79JJLRXJ01BBDZPFHNF2>JHIMOO;6B@GHABHf=JiceyZh||inl`?Hoig{\n~~g`n39M56=I99>0B<>?4:L2442<F8:986@>0268J463<2D:<8:4N0250>H68>>0B<>74:L24<5<F8;?7C?>059M54733G;:>95A1017?K76<=1E=<;<;O317>H6;:1E=9=4N070?K71;2D:;>5A1918J4?53G887C<?3:L156=I:;90B?=<;O077>H5=:1E>;=4N350?K4?;2D95>5A3118J6743G99?6@<329M715<F:?87C=93:L746=I<890B9<<;O607>H3<:1E88=4N540?K20;2D?4>5A4818J0643G?:?6@:229M165<F<>87C;:3:L626=I=>90B86<;O7:6>H1;2D=<>5A6018J3443G<8?6@9429M205<F?<87C883:L5<6=I>080B:=4N620?K16;2D<>>5A7218J2243G=>?6@8629M325<F>287C962:L;7>H?8:1E4<=4N900?K>4;2D38>5A8418J=043G2<?6@7829M<<4<F090B4><;O;27>H>::1E5>=4N860?K?2;2D2:>5A9618J<>43G32j6@M_CWPTLHXX[E[_:5AEUULVN2<FFDN>6AD1:R7?UGU\h1[ECQMURKG\g=WAGUIY^@NMDc8VDKE9?H\I_84RDE@AD0<ZLMHIO:4RRVB0>TT\K=0^^Z[YQGf?WUSWYXBC_G[Y^Cf?WUSWYXBC_G[Y^@27>UNEVID@AG\INL\GMCDCh1XE@QKEWK@A3=TG\XHI55\P@PWEK003ZX]MAQN7:QQRDJXJ=1XUCM;;U[SA1`<]9%i`fQbel]dakcui}ey#{ocie,`wqt(zhggcb~T0\,qeh(u'z<Tecg{.scn+QTRMVN["]\FM0:-vdk3n2_;#obd_lgn[bcim{kc!yamkg*fusz&xjaaa`pZ3^*wgj&{%x:Rgaiu,qeh)SZ\OTH] _RHO2<+tfe=l0Y=!mlj]nahY`mgoymya}/wcoma(d{}x$~lcconrX6X(uid$y#~8Piokw*wgj']X^IRJ_.QPJI4>)zhg?j6[?/cnh[hcjWnoeio{os-ueioc&jy~"|nmmmlt^5Z&{kf"!|6^kmmq(uid%_^XKPDQ,SVLK60'xjal5ZSDP\EIOF[j1^_H\PVHQJFIC43_IH56XFEV]W]UC13^OJ0=09;VGB84813^OJ0?07;VGB86<76?1\IL2<>79TAG:76?1\IO2>>79TAG:5611\IO2<:1<5?RCE4:4i7Z\FTD]EMWUSk2]YEYKPMNFF[De<_[C_IRC@DD]A5a=_AECET VKB!2-5%US]K*;"<.NSBKJ2>^T\ECI;6V\T^EM@2=_[]U]ONl4X^ALV@YNFOE=7Ujm_Hfe?]boWYxba[k}shmm55=_ldUFmga}Vdppmjh682RoaRCfnnpUawungg;;7Rmh/ecweZtbo'dlc55ndepb,5/?3hno~l&>)89b`atf 8:"56okdsc+54/>3hno~l&>2(:8eabui!8"46okdsc+7,><imnym%:&8:cg`wg/= 20mij}a)4*<>gcl{k#;$64aefqe->.02koho'9(:8eabui5:556okdsc?558>3hno~l2>1?`8eabui5;96=06;`fgvd:6:720mij}a=3=<>gcl{k7>364aefqe95902koho34?:8eabui5?546okdsc?2;><imnym1918:cg`wg;0720mij}a=;=<>gcl{h#<$64aefqf-7.12kohl'11+;?dbczk"9%55ndepa,6/?3hno~o&;)99b`ate <#37ljkrc*5-==flmxi$:'7;`fgvg.?!11jhi|m(8+;?dbczk6;2o5ndepa846=8730mij}b=33:==flmxi0<07;`fgvg:5611jhi|m<2<;?dbczk6?255ndepa808?3hno~o29>99b`ate4>437ljkrc>;:==flmxi040=c:`ooZkbeVmnbRx<_2.#\ljnfq*HC_K/Gdlfvdrhz);:"9:4cmib0>ekck20hlzn_sgd66=ci}kT~hi#bmi\i`kXoldTz>Q<,OMMA)HHFL9i>6jnt`]qab*edbUfi`Qheo]u7Z5+sjUcm~Q}efaff86+kVbjR|jgbgb95*dWdofSywe<0/gZtt|{kfSo3?,b]qwqtfeVk6<!mPrrv\p|vb5ZSEO!mPh`q\mklbk}oy~0>#c^rqmhYsqyo6=!mPiokwfZpfd4:'oR|jae]tmaroWk78>!mPrdcg[roc|aUj15"l_ekpegjbW~kybRlgv^alhi;7$jUbbdzPfhnf[kgjm4ddSnaj_gkoaZjhimoo nQxrhvf[hicmVh6[_G[E^DJVVR+kV}yeykPmnff[d;PZ@^NSKG]SU.`[hsWyc{iagae^qwebct59&hSeo|_lgn[jssx|~T~hi|_c?3(fYkghnTecg{_gkoa86+kVbjRcjm^mvpussW{olRo20-a\swosmVnn|yfPb<030=*dW~xbxhQkeqvk[d;?908'oRfns^pppg;7$jUcm~Q}suc>4)eXagcmRxnl<2/gZnf{Vg~tRaztqww[wc`{Vh6<!mPh`q\ip~Xg|~{yyQ}efq\e86+kVkohoPwhfwl874$jUjhi|m_vkgpm;69%iThhhnumv\`drf59&hSx}j_da`95*dWhflcg{hl?2(fYcazki`hQxasl\fmpXzhdli0>#c^uqmqcX`ndRl233.`[rtn|lU|eizg_`?;(fYumhnThh~{h^`>652?$jUiuykPshxf9<*dW{ojhRjjpuj\e8>61;&hS~gb_bmohlunggUhdhmd=@NO(fYdgdgdbRmck<2/gZqbiV}bhyf21-a\lduXmgh6<!mPh`q\akg:8%iT{hlPwhfwl87+kfg{cckat^lbi`;ci}kT~hi#c^wpaZd~|lU|io3?,b]vw`Yeq}oT{ho20-a\vvrXx{cd~dzv_c?@A)eXzz~T|g`rhvz[d;DM%iTy~kPdddbqirXlh~j1<"r1g9geqgXzlmTnaePmdo\c`hX~:U8Su}{_058`gosm{x<7igaa)2*3>bnfh":%:5kioc+6,1<l`dj$>'8;ekme-2.?2nbbl&:)69gmkg/> =0hd`n(6+4?aoii5:5;6jfn`>2:2=cagk7>394dhlb86803mcem1:17:fjjd:26>1oeco36?;8`lhf4>0;2:5kioc?3;1<l`di$='8;ekmf-7.02nbbo&>0(:8`lhe 8;"46jfnc*26,><l`di$<=&8:fjjg.6< 20hd`m(07*<>bnfk"::$64dhla,41.02nbbo&>8(:8`lhe 83";6jfnc*1-==cagh#>='7;ekmf-46!11oecl'23+;?aoij!88%55kio`+61/?3mcen%<:)99gmkd/:?#37igab)04-==cagh#>5'7;ekmf-4>!>1oecl'3(:8`lhe ::"46jfnc*05,1<l`di$9'8;ekmf-3.?2nbbo&9)69gmkd/? =0hd`m(9+4?aoij!3";6jfnc>3:==cagh7==07;ekmf976611oecl313<;?aoij5;8255kio`?518?3mcen1?:>99gmkd;9?437igab=34:==cagh7=507;ekmf97>6>1oecl31?:8`lhe4;:546jfnc>15;><l`di0?<18:fjjg:5;720hd`m<36=<>bnfk699364dhla870902nbbo2=7?:8`lhe4;2546jfnc>1=;1<l`di0?07;ekmf9576h1oecl33083:==cagh7?<08;ekmf959?2nbbo2;>69gmkd;=7=0hd`m<7<4?aoij5=5;6jfnc>;:2=cagh75364dnwwe-6.02ndyyo'1(:8`jssi!8"46j`uuc+7,><lfm%:&8:flqqg/= 20hb{{a)4*<>bh}}k#;$64dnwwe96902ndyyo31?:8`jssi58546j`uuc?7;><lfm1:18:flqqg;=720hb{{a=4=e>bh}}k7;7>18:flqqg;?720hb{{b)2*<>bh}}h#=$74dnwwf-77!01ocxzm(03*=>bh}}h#=?'6;emvpg.6; 30hb{{b)37-<=cg|~i$<;&9:flqqd/9?#27iaztc*23,?<lfn%?7)89gkpre 83"46j`uu`+6,?<lfn%<?)89gkpre ;;"56j`uu`+67/>3me~xo&=3(;8`jssj!8?%45kotva,73.12ndyyl'27+:?air|k"9;$74dnwwf-4?!01ocxzm(3;*<>bh}}h#?$74dnwwf-57!01ocxzm(23*<>bh}}h#8$64dnwwf-3.02ndyyl'6(:8`jssj!="46j`uu`+<,><lfn%7&8:flqqd;8730hb{{b=33:<=cg|~i0<?19:flqqd;9;427iaztc>27;?<lfn1?;>89gkpre48?556j`uu`?538>3me~xo2>7?;8`jssj5;3245kotva84?902ndyyl31?;8`jssj58;245kotva877912ndyyl323<:?air|k69?374dnwwf943601ocxzm<37==>bh}}h7>;06;emvpg:5?730hb{{b=0;:<=cg|~i0?718:flqqd;:730hb{{b=13:g=cg|~i0>?50?;8`jssj59:255kotva868?3me~xo2;>99gkpre4<437iaztc>5:==cg|~i0:07;emvpg:?611ocxzm<8<;?`bnn;dlh>5jn`18akdc3`dainzkbhvfvwb<ag`noy}miugqv==iojh~eajl;sfb`atbkj";%n5}d`fgv`ed 8#o7jndepfgf.68 i0~iokdsg`g-4.k2xomij}eba+7,e<zmkohklc)6*g>tcimnyinm'5(a8vagcl{oho%8&c:pgeabumji#;$m4recg`wcdk!2"o6|kaefqafe/1 i0~iokdsg`g969n2xomij}eba?55<76?1yijmja79qabebj=1yyo;;sqwf2=tj`~n~84wdc+4,><lk7<7>16:ufe969>2}nn%>&8:uff96=87<0{hl30?CDu34l2JKt<j8:G87>4}T<809n;4<:011f0g02;8>:>ua1e795>h6l?0>7)?k3;3`a>{T;o09n;4<:011f0g02;8>:>5\12296gd=83;8>o;n7;01132<[:l1>ol50;306g3f?3899;;4d32g>5<628qX8<4=b780>455j<k<6?<:629uP4d4290:6<49ezQ75?4e>391=><m5`596731;2.:o=4>309U5a2=:r:??4>;t307?6<u-;j:7?8;c03`?6=>j086;mtH0`f?_5f21q26l49:582=?772821h7s+1c:965b<,8n96?>n;h0`a?6=,8k36?mi;o3b3?6<3`8o=7>5$0c;>7b53g;j;7>4;h3gg?6=,8k36<k7;o3b3?6<3`;on7>5$0c;>4c?3g;j;7?4;h3ge?6=,8k36<k7;o3b3?4<3`;n87>5$0c;>4c?3g;j;7=4;h3f7?6=,8k36<k7;o3b3?2<3`;n>7>5$0c;>4c?3g;j;7;4;h3f5?6=,8k36<k7;o3b3?0<3`;n<7>5$0c;>4c?3g;j;794;h3gb?6=,8k36<k7;o3b3?><3`;oi7>5$0c;>4c?3g;j;774;h3g`?6=,8k36<k7;o3b3?g<3`;o57>5$0c;>4c?3g;j;7l4;h3g<?6=,8k36<k7;o3b3?e<3`;m97>5$0c;>4`a3g;j;7>4;h3e`?6=,8k36<hi;o3b3?7<3`;mo7>5$0c;>4`a3g;j;7<4;h3ef?6=,8k36<hi;o3b3?5<3`;mm7>5$0c;>4`a3g;j;7:4;h3e=?6=,8k36<hi;o3b3?3<3`;m47>5$0c;>4`a3g;j;784;h3e3?6=,8k36<hi;o3b3?1<3`;m:7>5$0c;>4`a3g;j;764;h3e0?6=,8k36<hi;o3b3??<3`;m?7>5$0c;>4`a3g;j;7o4;n05f?6=,8k36?9<;o3b3?6<3f8=m7>5$0c;>7143g;j;7?4;n05=?6=,8k36?9<;o3b3?4<3f8=47>5$0c;>7143g;j;7=4;n053?6=,8k36?9<;o3b3?2<3f8=:7>5$0c;>7143g;j;7;4;n051?6=,8k36?9<;o3b3?0<3f8=87>5$0c;>7143g;j;794;n0;a?6=,8k36?ok;o3b3?6<3f83h7>5$0c;>7gc3g;j;7?4;n0;f?6=,8k36?ok;o3b3?4<3f83m7>5$0c;>7gc3g;j;7=4;n0;=?6=,8k36?ok;o3b3?2<3f8347>5$0c;>7gc3g;j;7;4;n0;3?6=,8k36?ok;o3b3?0<3f83:7>5$0c;>7gc3g;j;794;n0;1?6=,8k36?ok;o3b3?><3f8387>5$0c;>7gc3g;j;774;n0;7?6=,8k36?ok;o3b3?g<3f83>7>5$0c;>7gc3g;j;7l4;n0;4?6=,8k36?ok;o3b3?e<3f8<j7>5$0c;>7gc3g;j;7j4;n04a?6=,8k36?ok;o3b3?c<3f8<h7>5$0c;>7gc3g;j;7h4;n04g?6=,8k36?ok;o3b3?7732e9;o4?:%3b<?4fl2d:m:4>1:9l62g=83.:m54=ae9m5d1=9;10c?96:18'5d>=:hn0b<o8:018?j4003:1(<o7:3cg?k7f?3;?76a=7683>!7f038jh6`>a6821>=h:0>1<7*>a981ea=i9h=1=;54o3;0>5<#9h21>lj4n0c4>41<3f82>7>5$0c;>7gc3g;j;7?7;:m1=4<72-;j47<nd:l2e2<6121d>4>50;&2e=<5im1e=l951`98k7>a290/=l652`f8j4g028h07b<7c;29 4g?2;ko7c?n7;3`?>i5080;6)?n8;0b`>h6i>0:h65`26494?"6i109mi5a1`595`=<g;=>6=4+1`:96db<f8k<6<h4;h03f?6=3`8;o7>5;h02=?6=,8k36?<>;o3b3?6<3`8:47>5$0c;>7463g;j;7?4;h023?6=,8k36?<>;o3b3?4<3`8::7>5$0c;>7463g;j;7=4;h021?6=,8k36?<>;o3b3?2<3`8:87>5$0c;>7463g;j;7;4;h027?6=,8k36?<>;o3b3?0<3`8:>7>5$0c;>7463g;j;794;h00g?6=,8k36?;m;o3b3?6<3`88n7>5$0c;>73e3g;j;7?4;h00=?6=,8k36?;m;o3b3?4<3`8847>5$0c;>73e3g;j;7=4;h003?6=,8k36?;m;o3b3?2<3`88:7>5$0c;>73e3g;j;7;4;h001?6=,8k36?;m;o3b3?0<3`8887>5$0c;>73e3g;j;794;h007?6=,8k36?;m;o3b3?><3`88>7>5$0c;>73e3g;j;774;h005?6=,8k36?;m;o3b3?g<3`88<7>5$0c;>73e3g;j;7l4;h01a?6=,8k36?;m;o3b3?e<3`89h7>5$0c;>73e3g;j;7j4;h01g?6=,8k36?;m;o3b3?c<3`89n7>5$0c;>73e3g;j;7h4;h01e?6=,8k36?;m;o3b3?7732c9>44?:%3b<?42j2d:m:4>1:9j67>=83.:m54=5c9m5d1=9;10e?<8:18'5d>=:<h0b<o8:018?l45>3:1(<o7:37a?k7f?3;?76g=2483>!7f038>n6`>a6821>=n:=81<7*>a9811g=i9h=1=;54i362>5<#9h21>8l4n0c4>41<3`8?<7>5$0c;>73e3g;j;7?7;:k17c<72-;j47<:b:l2e2<6121b>>k50;&2e=<5=k1e=l951`98m75c290/=l6524`8j4g028h07d<<a;29 4g?2;?i7c?n7;3`?>o5:o0;6)?n8;06f>h6i>0:h65f23694?"6i1099o5a1`595`=<a;886=4+1`:960d<f8k<6<h4;c3ab?6=93:1<vF>bd9'5g>=9kl0c<o::188ygc3290:6=4?{I3aa>"6j10n86aj3;29?xd413:14<49:7gxL4db3S9j6<<t5;;9e?0=<3;26<>5198g><<12821m7:5d;3:>46==3w/=o652028 6e=:9o0(9>521d8 4g628k?7d<ma;29?j4em3:1(<o7:3a;?k7f?3:07b<l6;29 4g?2;i37c?n7;38?j4d=3:1(<o7:3a;?k7f?3807b<l4;29 4g?2;i37c?n7;18?j4d;3:1(<o7:3a;?k7f?3>07b<l2;29 4g?2;i37c?n7;78?j4d93:1(<o7:3a;?k7f?3<07b<l0;29 4g?2;i37c?n7;58?j4en3:1(<o7:3a;?k7f?3207b<md;29 4g?2;i37c?n7;;8?j4ek3:1(<o7:3a;?k7f?3k07d<m7;29?l4e03:17d<l9;29?l4di3:17d<le;29 4g?2;im7c?n7;28?l4c93:1(<o7:3f1?k7f?3:07d?kc;29 4g?28o37c?n7;28?l7cj3:1(<o7:0g;?k7f?3;07d?ka;29 4g?28o37c?n7;08?l7b<3:1(<o7:0g;?k7f?3907d?j3;29 4g?28o37c?n7;68?l7b:3:1(<o7:0g;?k7f?3?07d?j1;29 4g?28o37c?n7;48?l7b83:1(<o7:0g;?k7f?3=07d?kf;29 4g?28o37c?n7;:8?l7cm3:1(<o7:0g;?k7f?3307d?kd;29 4g?28o37c?n7;c8?l7c13:1(<o7:0g;?k7f?3h07d?k8;29 4g?28o37c?n7;a8?l7a=3:1(<o7:0de?k7f?3:07d?id;29 4g?28lm7c?n7;38?l7ak3:1(<o7:0de?k7f?3807d?ib;29 4g?28lm7c?n7;18?l7ai3:1(<o7:0de?k7f?3>07d?i9;29 4g?28lm7c?n7;78?l7a03:1(<o7:0de?k7f?3<07d?i7;29 4g?28lm7c?n7;58?l7a>3:1(<o7:0de?k7f?3207d?i4;29 4g?28lm7c?n7;;8?l7a;3:1(<o7:0de?k7f?3k07d<lb;29?l4dk3:17b<ld;29?j41j3:1(<o7:350?k7f?3:07b<9a;29 4g?2;=87c?n7;38?j4113:1(<o7:350?k7f?3807b<98;29 4g?2;=87c?n7;18?j41?3:1(<o7:350?k7f?3>07b<96;29 4g?2;=87c?n7;78?j41=3:1(<o7:350?k7f?3<07b<94;29 4g?2;=87c?n7;58?j4?m3:1(<o7:3cg?k7f?3:07b<7d;29 4g?2;ko7c?n7;38?j4?j3:1(<o7:3cg?k7f?3807b<7a;29 4g?2;ko7c?n7;18?j4?13:1(<o7:3cg?k7f?3>07b<78;29 4g?2;ko7c?n7;78?j4??3:1(<o7:3cg?k7f?3<07b<76;29 4g?2;ko7c?n7;58?j4?=3:1(<o7:3cg?k7f?3207b<74;29 4g?2;ko7c?n7;;8?j4?;3:1(<o7:3cg?k7f?3k07b<72;29 4g?2;ko7c?n7;`8?j4?83:1(<o7:3cg?k7f?3i07b<8f;29 4g?2;ko7c?n7;f8?j40m3:1(<o7:3cg?k7f?3o07b<8d;29 4g?2;ko7c?n7;d8?j40k3:1(<o7:3cg?k7f?3;;76a=7c83>!7f038jh6`>a6825>=h:>k1<7*>a981ea=i9h=1=?54o35:>5<#9h21>lj4n0c4>45<3f8<47>5$0c;>7gc3g;j;7?;;:m132<72-;j47<nd:l2e2<6=21d>4:50;&2e=<5im1e=l951798k7?4290/=l652`f8j4g028=07b<62;29 4g?2;ko7c?n7;3;?>i5180;6)?n8;0b`>h6i>0:565`28294?"6i109mi5a1`595d=<g;2m6=4+1`:96db<f8k<6<l4;n0;g?6=,8k36?ok;o3b3?7d32e94<4?:%3b<?4fl2d:m:4>d:9l620=83.:m54=ae9m5d1=9l10c?9::18'5d>=:hn0b<o8:0d8?l47j3:17d<?c;29?l4613:1(<o7:302?k7f?3:07d<>8;29 4g?2;8:7c?n7;38?l46?3:1(<o7:302?k7f?3807d<>6;29 4g?2;8:7c?n7;18?l46=3:1(<o7:302?k7f?3>07d<>4;29 4g?2;8:7c?n7;78?l46;3:1(<o7:302?k7f?3<07d<>2;29 4g?2;8:7c?n7;58?l44k3:1(<o7:37a?k7f?3:07d<<b;29 4g?2;?i7c?n7;38?l4413:1(<o7:37a?k7f?3807d<<8;29 4g?2;?i7c?n7;18?l44?3:1(<o7:37a?k7f?3>07d<<6;29 4g?2;?i7c?n7;78?l44=3:1(<o7:37a?k7f?3<07d<<4;29 4g?2;?i7c?n7;58?l44;3:1(<o7:37a?k7f?3207d<<2;29 4g?2;?i7c?n7;;8?l4493:1(<o7:37a?k7f?3k07d<<0;29 4g?2;?i7c?n7;`8?l45m3:1(<o7:37a?k7f?3i07d<=d;29 4g?2;?i7c?n7;f8?l45k3:1(<o7:37a?k7f?3o07d<=b;29 4g?2;?i7c?n7;d8?l45i3:1(<o7:37a?k7f?3;;76g=2883>!7f038>n6`>a6825>=n:;21<7*>a9811g=i9h=1=?54i304>5<#9h21>8l4n0c4>45<3`89:7>5$0c;>73e3g;j;7?;;:k160<72-;j47<:b:l2e2<6=21b>9<50;&2e=<5=k1e=l951798m726290/=l6524`8j4g028=07d<;0;29 4g?2;?i7c?n7;3;?>o5;o0;6)?n8;06f>h6i>0:565f22g94?"6i1099o5a1`595d=<a;9o6=4+1`:960d<f8k<6<l4;h00e?6=,8k36?;m;o3b3?7d32c9>k4?:%3b<?42j2d:m:4>d:9j672=83.:m54=5c9m5d1=9l10e?<<:18'5d>=:<h0b<o8:0d8?l4e13:17b<>1;29?g7c83:1=7>50z&2f=<b<2B:ok5G1cg8k`5=831vn<j>:182>5<7s-;i47?mf:J2gc=O9ko0c<o::188yg7e13:1nn4?:1y'5g>=9h30D<mi;I3aa>\4i3ip=<4>3;g93?>=k3;>6<<5178e>42=j3we8?4=;o60><=ij80;7cj<:19'a5<b:2.n=7k=;%3a1?7<,l?1>6*j6;08 `1=:2.n47<4$d;96>"bi380(hl52:&fg?4<,ln1>6*je;08 ``=:2.m<7<4$g396>"a:380(k=52:&e0?4<,o?1>6*i6;08 c1=:2.m47<4$g;96>"ai380(kl52:&eg?4<,on1>6*ie;08 c`=:2.:<=4=;%335?4<,8:96?5+11196>"68=097)??5;08 4612;1/==952:&24=<53-;;57<4$02b>7=#99h1>6*>0b81?!77l380(<>j:39'55`=:2.:==4=;%325?4<,8;96?5+10196>"69=097)?>5;08 4712;1/=<952:&25=<53-;:57<4$03b>7=#98h1>6*>1b81?!76l380(<?j:39'54`=:2.:>=4=;%315?4<,8896?5+13196>"6:=097)?=5;08 4412;1/=?952:&26=<53-;957<4$00b>7=#9;h1>6*>2b81?!75n3;j?6*>ad82f2=#9hl1?o5+1c297g=#9k;1?55+1c095g2<,88o6<5+13g95>"6kj0:oo5+1bf95fd<,8h=6<5f1`c94?=n;m0;66gkf;29?l7fl3:17d=j:188m4ge2900e<ol:188mac=831b4l4?:%3b<?>>3g;j;7>4;h:;>5<#9h21445a1`595>=n0>0;6)?n8;::?k7f?3807d69:18'5d>=001e=l953:9j5f3=83.:m54>c59m5d1=821b=n=50;&2e=<6k=1e=l951:9j5f4=83.:m54>c59m5d1=:21b=n?50;&2e=<6k=1e=l953:9le<<72-;j47o7;o3b3?6<3fk<6=4+1`:9e==i9h=1=65`a483>!7f03k37c?n7;08?jg3290/=l65a99m5d1=;21dm>4?:%3b<?g?3g;j;7:4;nc1>5<#9h21m55a1`591>=hi80;6)?n8;c;?k7f?3<07bo?:18'5d>=i11e=l957:9l=c<72-;j47o7;o3b3?><3f3n6=4+1`:9e==i9h=1565`9e83>!7f03k37c?n7;c8?j?d290/=l65a99m5d1=j21d5l4?:%3b<?g?3g;j;7m4;n;:>5<#9h21m55a1`59`>=h110;6)?n8;c;?k7f?3o07b78:18'5d>=i11e=l95f:9l=3<72-;j47o7;o3b3?7732e297>5$0c;>d><f8k<6<?4;n;7>5<#9h21m55a1`5957=<g091<7*>a98b<>h6i>0:?65`9383>!7f03k37c?n7;37?>i>93:1(<o7:`:8j4g028?07bl?:18'5d>=i11e=l951798kd`=83.:m54n8:l2e2<6?21dmh4?:%3b<?g?3g;j;7?7;:mb`?6=,8k36l64n0c4>4?<3fkh6=4+1`:9e==i9h=1=l54o``94?"6i10j46`>a682f>=hih0;6)?n8;c;?k7f?3;h76an6;29 4g?2h20b<o8:0f8?j?e290/=l65a99m5d1=9l10c4>50;&2e=<f02d:m:4>f:9j5c<72-;j47?j;o3b3?6<3`;o6=4+1`:95`=i9h=1=65f1b83>!7f03;n7c?n7;08?l7e290/=l651d9m5d1=;21b>54?:%3b<?7b3g;j;7:4;h04>5<#9h21=h5a1`591>=n:?0;6)?n8;3f?k7f?3<07d<::18'5d>=9l1e=l957:9j61<72-;j47?j;o3b3?><3`886=4+1`:95`=i9h=1565f2383>!7f03;n7c?n7;c8?l46290/=l651d9m5d1=j21b>=4?:%3b<?7b3g;j;7m4;h3b>5<#9h21=h5a1`59`>=n:l0;6)?n8;0g?k7f?3:07d<l:18'5d>=:m1e=l951:9j6g<72-;j47<k;o3b3?4<3`8j6=4+1`:96a=i9h=1?65f3683>!7f038o7c?n7;68?l51290/=l652e9m5d1==21b?84?:%3b<?4c3g;j;784;h17>5<#9h21>i5a1`593>=n;:0;6)?n8;0g?k7f?3207d==:18'5d>=:m1e=l959:9j74<72-;j47<k;o3b3?g<3`9;6=4+1`:96a=i9h=1n65f2g83>!7f038o7c?n7;a8?l4>290/=l652e9m5d1=l21b;h4?:%3b<?1c3g;j;7>4;h5`>5<#9h21;i5a1`595>=n?h0;6)?n8;5g?k7f?3807d96:18'5d>=?m1e=l953:9j3=<72-;j479k;o3b3?2<3`=<6=4+1`:93a=i9h=1965f7783>!7f03=o7c?n7;48?l12290/=l657e9m5d1=?21b;94?:%3b<?1c3g;j;764;h50>5<#9h21;i5a1`59=>=n?;0;6)?n8;5g?k7f?3k07d9>:18'5d>=?m1e=l95b:9j2c<72-;j479k;o3b3?e<3`<n6=4+1`:93a=i9h=1h65f6e83>!7f03=o7c?n7;g8?l0d290/=l657e9m5d1=n21b:o4?:%3b<?1c3g;j;7??;:k5e?6=,8k36:j4n0c4>47<3`<26=4+1`:93a=i9h=1=?54i7:94?"6i10<h6`>a6827>=n>>0;6)?n8;5g?k7f?3;?76g96;29 4g?2>n0b<o8:078?l>2290/=l657e9m5d1=9?10e5:50;&2e=<0l2d:m:4>7:9j<6<72-;j479k;o3b3?7?32c3>7>5$0c;>2b<f8k<6<74;h:2>5<#9h21;i5a1`595d=<a1:1<7*>a984`>h6i>0:n65f7g83>!7f03=o7c?n7;3`?>o0j3:1(<o7:6f8j4g028n07d9?:18'5d>=?m1e=l951d98m33=83.:m548d:l2e2<6n21dh54?:%3b<?b03g;j;7>4;nf5>5<#9h21h:5a1`595>=hl<0;6)?n8;f4?k7f?3807bj;:18'5d>=l>1e=l953:9j<c<72-;j476j;o3b3?6<3`2o6=4+1`:9<`=i9h=1=65f8b83>!7f032n7c?n7;08?l>e290/=l658d9m5d1=;21dhi4?:%3b<?bd3g;j;7>4;nfa>5<#9h21hn5a1`595>=hlh0;6)?n8;f`?k7f?3807bj6:18'5d>=lj1e=l953:9lgg<72-;j47mn;o3b3?6<3fi26=4+1`:9gd=i9h=1=65`c683>!7f03ij7c?n7;08?je1290/=l65c`9m5d1=;21do84?:%3b<?ef3g;j;7:4;na7>5<#9h21ol5a1`591>=hk:0;6)?n8;ab?k7f?3<07bm=:18'5d>=kh1e=l957:9lg4<72-;j47mn;o3b3?><3fi;6=4+1`:9gd=i9h=1565`bg83>!7f03ij7c?n7;c8?jdb290/=l65c`9m5d1=j21dnn4?:%3b<?ef3g;j;7m4;n`a>5<#9h21ol5a1`59`>=hjh0;6)?n8;ab?k7f?3o07bl6:18'5d>=kh1e=l95f:9lf=<72-;j47mn;o3b3?7732ei;7>5$0c;>fg<f8k<6<?4;n`5>5<#9h21ol5a1`5957=<gk?1<7*>a98`e>h6i>0:?65`b583>!7f03ij7c?n7;37?>ie;3:1(<o7:bc8j4g028?07bj=:18'5d>=kh1e=l951798ka7=83.:m54la:l2e2<6?21dh=4?:%3b<?ef3g;j;7?7;:m`b?6=,8k36no4n0c4>4?<3fin6=4+1`:9gd=i9h=1=l54obf94?"6i10hm6`>a682f>=hkj0;6)?n8;ab?k7f?3;h76al8;29 4g?2jk0b<o8:0f8?jdc290/=l65c`9m5d1=9l10co<50;&2e=<di2d:m:4>f:9j5fg=83.:m54>c89m5d1=821b=n650;&2e=<6k01e=l951:9j5f1=83.:m54>c89m5d1=:21b=n850;&2e=<6k01e=l953:9j1a<72-;j47;l;o3b3?6<3`?i6=4+1`:91f=i9h=1=65f5883>!7f03?h7c?n7;08?l3?290/=l655b9m5d1=;21b9:4?:%3b<?3d3g;j;7:4;h75>5<#9h219n5a1`591>=n=<0;6)?n8;7`?k7f?3<07d;;:18'5d>==j1e=l957:9j16<72-;j47;l;o3b3?><3`?96=4+1`:91f=i9h=1565f5083>!7f03?h7c?n7;c8?l37290/=l655b9m5d1=j21b8h4?:%3b<?3d3g;j;7m4;h6g>5<#9h219n5a1`59`>=n<j0;6)?n8;7`?k7f?3o07d:m:18'5d>==j1e=l95f:9j0d<72-;j47;l;o3b3?7732c?57>5$0c;>0e<f8k<6<?4;h6;>5<#9h219n5a1`5957=<a==1<7*>a986g>h6i>0:?65f4783>!7f03?h7c?n7;37?>o3=3:1(<o7:4a8j4g028?07d8;:18'5d>==j1e=l951798m35=83.:m54:c:l2e2<6?21b:?4?:%3b<?3d3g;j;7?7;:k55?6=,8k368m4n0c4>4?<3`<;6=4+1`:91f=i9h=1=l54i4d94?"6i10>o6`>a682f>=n=l0;6)?n8;7`?k7f?3;h76g:a;29 4g?2<i0b<o8:0f8?l2a290/=l655b9m5d1=9l10e9:50;&2e=<2k2d:m:4>f:9~f4df290io7>50z&2f=<6i01C=nh4H0`f?_5f2jq:=7?<:d84>=<d28?1=?4>6;d951<e2td?>7<4n519=>he93:0bi=50:&f4?c53-o:6h<4$0`6>4=#m<097)k9:39'a2<53-o36?5+e881?!cf2;1/io4=;%g`>7=#mm097)kj:39'ac<53-l;6?5+f081?!`52;1/j>4=;%d7>7=#n<097)h9:39'b2<53-l36?5+f881?!`f2;1/jo4=;%d`>7=#nm097)hj:39'bc<53-;;<7<4$022>7=#9981>6*>0281?!77<380(<>::39'550=:2.:<:4=;%33<?4<,8:26?5+11c96>"68k097)??c;08 46c2;1/==k52:&24c<53-;:<7<4$032>7=#9881>6*>1281?!76<380(<?::39'540=:2.:=:4=;%32<?4<,8;26?5+10c96>"69k097)?>c;08 47c2;1/=<k52:&25c<53-;9<7<4$002>7=#9;81>6*>2281?!75<380(<<::39'570=:2.:>:4=;%31<?4<,8826?5+13c96>"6:k097)?=c;08 44a28k87)?ne;3a3>"6io08n6*>b180f>"6j80846*>b382f1=#9;n1=6*>2d82?!7dk3;hn6*>ce82gg=#9k<1=6g>a`83>>o4l3:17dji:188m4gc2900e>k50;9j5dd=831b=lm50;9j``<722c3m7>5$0c;>=?<f8k<6=54i9:94?"6i10356`>a682?>o??3:1(<o7:9;8j4g02;10e5850;&2e=<?12d:m:4<;:k2g0<72-;j47?l4:l2e2<732c:o>4?:%3b<?7d<2d:m:4>;:k2g7<72-;j47?l4:l2e2<532c:o<4?:%3b<?7d<2d:m:4<;:mb=?6=,8k36l64n0c4>5=<gh=1<7*>a98b<>h6i>0:76an5;29 4g?2h20b<o8:398kd2=83.:m54n8:l2e2<432ej?7>5$0c;>d><f8k<6954o`094?"6i10j46`>a686?>if93:1(<o7:`:8j4g02?10cl>50;&2e=<f02d:m:48;:m:b?6=,8k36l64n0c4>==<g0o1<7*>a98b<>h6i>0276a6d;29 4g?2h20b<o8:`98k<e=83.:m54n8:l2e2<e32e2m7>5$0c;>d><f8k<6n54o8;94?"6i10j46`>a68g?>i>03:1(<o7:`:8j4g02l10c4950;&2e=<f02d:m:4i;:m:2?6=,8k36l64n0c4>46<3f3>6=4+1`:9e==i9h=1=<54o8694?"6i10j46`>a6826>=h1:0;6)?n8;c;?k7f?3;876a62;29 4g?2h20b<o8:068?j?6290/=l65a99m5d1=9<10co>50;&2e=<f02d:m:4>6:9lec<72-;j47o7;o3b3?7032eji7>5$0c;>d><f8k<6<64;ncg>5<#9h21m55a1`595<=<ghi1<7*>a98b<>h6i>0:m65`ac83>!7f03k37c?n7;3a?>ifi3:1(<o7:`:8j4g028i07bo9:18'5d>=i11e=l951e98k<d=83.:m54n8:l2e2<6m21d5=4?:%3b<?g?3g;j;7?i;:k2b?6=,8k36<k4n0c4>5=<a8n1<7*>a982a>h6i>0:76g>c;29 4g?28o0b<o8:398m4d=83.:m54>e:l2e2<432c947>5$0c;>4c<f8k<6954i3594?"6i10:i6`>a686?>o5>3:1(<o7:0g8j4g02?10e?;50;&2e=<6m2d:m:48;:k10?6=,8k36<k4n0c4>==<a;91<7*>a982a>h6i>0276g=2;29 4g?28o0b<o8:`98m77=83.:m54>e:l2e2<e32c9<7>5$0c;>4c<f8k<6n54i0c94?"6i10:i6`>a68g?>o5m3:1(<o7:3f8j4g02910e?m50;&2e=<5l2d:m:4>;:k1f?6=,8k36?j4n0c4>7=<a;k1<7*>a981`>h6i>0876g<7;29 4g?2;n0b<o8:598m60=83.:m54=d:l2e2<232c897>5$0c;>7b<f8k<6;54i2694?"6i109h6`>a684?>o4;3:1(<o7:3f8j4g02110e><50;&2e=<5l2d:m:46;:k05?6=,8k36?j4n0c4>d=<a::1<7*>a981`>h6i>0i76g=f;29 4g?2;n0b<o8:b98m7?=83.:m54=d:l2e2<c32c<i7>5$0c;>2b<f8k<6=54i6a94?"6i10<h6`>a682?>o0i3:1(<o7:6f8j4g02;10e:750;&2e=<0l2d:m:4<;:k4<?6=,8k36:j4n0c4>1=<a>=1<7*>a984`>h6i>0>76g86;29 4g?2>n0b<o8:798m23=83.:m548d:l2e2<032c<87>5$0c;>2b<f8k<6554i6194?"6i10<h6`>a68:?>o0:3:1(<o7:6f8j4g02h10e:?50;&2e=<0l2d:m:4m;:k5b?6=,8k36:j4n0c4>f=<a?o1<7*>a984`>h6i>0o76g9d;29 4g?2>n0b<o8:d98m3e=83.:m548d:l2e2<a32c=n7>5$0c;>2b<f8k<6<>4;h4b>5<#9h21;i5a1`5954=<a?31<7*>a984`>h6i>0:>65f6983>!7f03=o7c?n7;30?>o1?3:1(<o7:6f8j4g028>07d89:18'5d>=?m1e=l951498m=3=83.:m548d:l2e2<6>21b494?:%3b<?1c3g;j;7?8;:k;7?6=,8k36:j4n0c4>4><3`296=4+1`:93a=i9h=1=454i9394?"6i10<h6`>a682e>=n090;6)?n8;5g?k7f?3;i76g8f;29 4g?2>n0b<o8:0a8?l1e290/=l657e9m5d1=9m10e:>50;&2e=<0l2d:m:4>e:9j20<72-;j479k;o3b3?7a32eo47>5$0c;>a1<f8k<6=54oe494?"6i10o;6`>a682?>ic=3:1(<o7:e58j4g02;10ci:50;&2e=<c?2d:m:4<;:k;b?6=,8k365k4n0c4>5=<a1n1<7*>a98;a>h6i>0:76g7c;29 4g?21o0b<o8:398m=d=83.:m547e:l2e2<432eoh7>5$0c;>ae<f8k<6=54oe`94?"6i10oo6`>a682?>ici3:1(<o7:ea8j4g02;10ci750;&2e=<ck2d:m:4<;:m`f?6=,8k36no4n0c4>5=<gj31<7*>a98`e>h6i>0:76al7;29 4g?2jk0b<o8:398kf0=83.:m54la:l2e2<432eh97>5$0c;>fg<f8k<6954ob694?"6i10hm6`>a686?>id;3:1(<o7:bc8j4g02?10cn<50;&2e=<di2d:m:48;:m`5?6=,8k36no4n0c4>==<gj:1<7*>a98`e>h6i>0276amf;29 4g?2jk0b<o8:`98kgc=83.:m54la:l2e2<e32eio7>5$0c;>fg<f8k<6n54oc`94?"6i10hm6`>a68g?>iei3:1(<o7:bc8j4g02l10co750;&2e=<di2d:m:4i;:ma<?6=,8k36no4n0c4>46<3fh<6=4+1`:9gd=i9h=1=<54oc494?"6i10hm6`>a6826>=hj<0;6)?n8;ab?k7f?3;876am4;29 4g?2jk0b<o8:068?jd4290/=l65c`9m5d1=9<10ci<50;&2e=<di2d:m:4>6:9l`4<72-;j47mn;o3b3?7032eo<7>5$0c;>fg<f8k<6<64;nae>5<#9h21ol5a1`595<=<gjo1<7*>a98`e>h6i>0:m65`ce83>!7f03ij7c?n7;3a?>idk3:1(<o7:bc8j4g028i07bm7:18'5d>=kh1e=l951e98kgb=83.:m54la:l2e2<6m21dn?4?:%3b<?ef3g;j;7?i;:k2gd<72-;j47?l9:l2e2<732c:o54?:%3b<?7d12d:m:4>;:k2g2<72-;j47?l9:l2e2<532c:o;4?:%3b<?7d12d:m:4<;:k6`?6=,8k368m4n0c4>5=<a<h1<7*>a986g>h6i>0:76g:9;29 4g?2<i0b<o8:398m0>=83.:m54:c:l2e2<432c>;7>5$0c;>0e<f8k<6954i4494?"6i10>o6`>a686?>o2=3:1(<o7:4a8j4g02?10e8:50;&2e=<2k2d:m:48;:k67?6=,8k368m4n0c4>==<a<81<7*>a986g>h6i>0276g:1;29 4g?2<i0b<o8:`98m06=83.:m54:c:l2e2<e32c?i7>5$0c;>0e<f8k<6n54i5f94?"6i10>o6`>a68g?>o3k3:1(<o7:4a8j4g02l10e9l50;&2e=<2k2d:m:4i;:k7e?6=,8k368m4n0c4>46<3`>26=4+1`:91f=i9h=1=<54i5:94?"6i10>o6`>a6826>=n<>0;6)?n8;7`?k7f?3;876g;6;29 4g?2<i0b<o8:068?l22290/=l655b9m5d1=9<10e;:50;&2e=<2k2d:m:4>6:9j26<72-;j47;l;o3b3?7032c=>7>5$0c;>0e<f8k<6<64;h42>5<#9h219n5a1`595<=<a?:1<7*>a986g>h6i>0:m65f5g83>!7f03?h7c?n7;3a?>o2m3:1(<o7:4a8j4g028i07d;n:18'5d>==j1e=l951e98m1`=83.:m54:c:l2e2<6m21b894?:%3b<?3d3g;j;7?i;:a5gd=83hh6=4?{%3a<?7f12B:ok5G1cg8^6g=kr;:6<=5e;59<?e=9<0:>7?9:g820?d=ug>96?5a428:?kd6291eh>4?;%g3>`4<,l;1i?5+1c795>"b=380(h852:&f3?4<,l21>6*j9;08 `g=:2.nn7<4$da96>"bl380(hk52:&fb?4<,o:1>6*i1;08 c4=:2.m?7<4$g696>"a=380(k852:&e3?4<,o21>6*i9;08 cg=:2.mn7<4$ga96>"al380(kk52:&eb?4<,8:;6?5+11396>"68;097)??3;08 4632;1/==;52:&243<53-;;;7<4$02;>7=#9931>6*>0`81?!77j380(<>l:39'55b=:2.:<h4=;%33b?4<,8;;6?5+10396>"69;097)?>3;08 4732;1/=<;52:&253<53-;:;7<4$03;>7=#9831>6*>1`81?!76j380(<?l:39'54b=:2.:=h4=;%32b?4<,88;6?5+13396>"6:;097)?=3;08 4432;1/=?;52:&263<53-;9;7<4$00;>7=#9;31>6*>2`81?!75j380(<<l:39'57`=9h90(<oj:0`4?!7fn39i7)?m0;1a?!7e93937)?m2;3a0>"6:m0:7)?=e;38 4ed28ii7)?ld;3`f>"6j?0:7d?na;29?l5c2900eih50;9j5db=831b?h4?::k2eg<722c:mn4?::kga?6=3`2j6=4+1`:9<<=i9h=1<65f8983>!7f03227c?n7;38?l>0290/=l65889m5d1=:21b4;4?:%3b<?>>3g;j;7=4;h3`1?6=,8k36<m;;o3b3?6<3`;h?7>5$0c;>4e33g;j;7?4;h3`6?6=,8k36<m;;o3b3?4<3`;h=7>5$0c;>4e33g;j;7=4;nc:>5<#9h21m55a1`594>=hi>0;6)?n8;c;?k7f?3;07bo::18'5d>=i11e=l952:9le1<72-;j47o7;o3b3?5<3fk86=4+1`:9e==i9h=1865`a383>!7f03k37c?n7;78?jg6290/=l65a99m5d1=>21dm=4?:%3b<?g?3g;j;794;n;e>5<#9h21m55a1`59<>=h1l0;6)?n8;c;?k7f?3307b7k:18'5d>=i11e=l95a:9l=f<72-;j47o7;o3b3?d<3f3j6=4+1`:9e==i9h=1o65`9883>!7f03k37c?n7;f8?j??290/=l65a99m5d1=m21d5:4?:%3b<?g?3g;j;7h4;n;5>5<#9h21m55a1`5955=<g0?1<7*>a98b<>h6i>0:=65`9583>!7f03k37c?n7;31?>i>;3:1(<o7:`:8j4g028907b7=:18'5d>=i11e=l951598k<7=83.:m54n8:l2e2<6=21dn=4?:%3b<?g?3g;j;7?9;:mbb?6=,8k36l64n0c4>41<3fkn6=4+1`:9e==i9h=1=554o`f94?"6i10j46`>a682=>=hij0;6)?n8;c;?k7f?3;j76anb;29 4g?2h20b<o8:0`8?jgf290/=l65a99m5d1=9j10cl850;&2e=<f02d:m:4>d:9l=g<72-;j47o7;o3b3?7b32e2<7>5$0c;>d><f8k<6<h4;h3e>5<#9h21=h5a1`594>=n9m0;6)?n8;3f?k7f?3;07d?l:18'5d>=9l1e=l952:9j5g<72-;j47?j;o3b3?5<3`836=4+1`:95`=i9h=1865f2683>!7f03;n7c?n7;78?l41290/=l651d9m5d1=>21b>84?:%3b<?7b3g;j;794;h07>5<#9h21=h5a1`59<>=n::0;6)?n8;3f?k7f?3307d<=:18'5d>=9l1e=l95a:9j64<72-;j47?j;o3b3?d<3`8;6=4+1`:95`=i9h=1o65f1`83>!7f03;n7c?n7;f8?l4b290/=l652e9m5d1=821b>n4?:%3b<?4c3g;j;7?4;h0a>5<#9h21>i5a1`596>=n:h0;6)?n8;0g?k7f?3907d=8:18'5d>=:m1e=l954:9j73<72-;j47<k;o3b3?3<3`9>6=4+1`:96a=i9h=1:65f3583>!7f038o7c?n7;58?l54290/=l652e9m5d1=021b??4?:%3b<?4c3g;j;774;h12>5<#9h21>i5a1`59e>=n;90;6)?n8;0g?k7f?3h07d<i:18'5d>=:m1e=l95c:9j6<<72-;j47<k;o3b3?b<3`=n6=4+1`:93a=i9h=1<65f7b83>!7f03=o7c?n7;38?l1f290/=l657e9m5d1=:21b;44?:%3b<?1c3g;j;7=4;h5;>5<#9h21;i5a1`590>=n?>0;6)?n8;5g?k7f?3?07d99:18'5d>=?m1e=l956:9j30<72-;j479k;o3b3?1<3`=?6=4+1`:93a=i9h=1465f7283>!7f03=o7c?n7;;8?l15290/=l657e9m5d1=i21b;<4?:%3b<?1c3g;j;7l4;h4e>5<#9h21;i5a1`59g>=n>l0;6)?n8;5g?k7f?3n07d8k:18'5d>=?m1e=l95e:9j2f<72-;j479k;o3b3?`<3`<i6=4+1`:93a=i9h=1==54i7c94?"6i10<h6`>a6825>=n>00;6)?n8;5g?k7f?3;976g98;29 4g?2>n0b<o8:018?l00290/=l657e9m5d1=9=10e;850;&2e=<0l2d:m:4>5:9j<0<72-;j479k;o3b3?7132c387>5$0c;>2b<f8k<6<94;h:0>5<#9h21;i5a1`595==<a181<7*>a984`>h6i>0:565f8083>!7f03=o7c?n7;3b?>o?83:1(<o7:6f8j4g028h07d9i:18'5d>=?m1e=l951b98m2d=83.:m548d:l2e2<6l21b;=4?:%3b<?1c3g;j;7?j;:k51?6=,8k36:j4n0c4>4`<3fn36=4+1`:9`2=i9h=1<65`d783>!7f03n<7c?n7;38?jb2290/=l65d69m5d1=:21dh94?:%3b<?b03g;j;7=4;h:e>5<#9h214h5a1`594>=n0m0;6)?n8;:f?k7f?3;07d6l:18'5d>=0l1e=l952:9j<g<72-;j476j;o3b3?5<3fno6=4+1`:9`f=i9h=1<65`dc83>!7f03nh7c?n7;38?jbf290/=l65db9m5d1=:21dh44?:%3b<?bd3g;j;7=4;naa>5<#9h21ol5a1`594>=hk00;6)?n8;ab?k7f?3;07bm8:18'5d>=kh1e=l952:9lg3<72-;j47mn;o3b3?5<3fi>6=4+1`:9gd=i9h=1865`c583>!7f03ij7c?n7;78?je4290/=l65c`9m5d1=>21do?4?:%3b<?ef3g;j;794;na2>5<#9h21ol5a1`59<>=hk90;6)?n8;ab?k7f?3307bli:18'5d>=kh1e=l95a:9lf`<72-;j47mn;o3b3?d<3fhh6=4+1`:9gd=i9h=1o65`bc83>!7f03ij7c?n7;f8?jdf290/=l65c`9m5d1=m21dn44?:%3b<?ef3g;j;7h4;n`;>5<#9h21ol5a1`5955=<gk=1<7*>a98`e>h6i>0:=65`b783>!7f03ij7c?n7;31?>ie=3:1(<o7:bc8j4g028907bl;:18'5d>=kh1e=l951598kg5=83.:m54la:l2e2<6=21dh?4?:%3b<?ef3g;j;7?9;:mg5?6=,8k36no4n0c4>41<3fn;6=4+1`:9gd=i9h=1=554obd94?"6i10hm6`>a682=>=hkl0;6)?n8;ab?k7f?3;j76ald;29 4g?2jk0b<o8:0`8?jed290/=l65c`9m5d1=9j10cn650;&2e=<di2d:m:4>d:9lfa<72-;j47mn;o3b3?7b32ei>7>5$0c;>fg<f8k<6<h4;h3`e?6=,8k36<m6;o3b3?6<3`;h47>5$0c;>4e>3g;j;7?4;h3`3?6=,8k36<m6;o3b3?4<3`;h:7>5$0c;>4e>3g;j;7=4;h7g>5<#9h219n5a1`594>=n=k0;6)?n8;7`?k7f?3;07d;6:18'5d>==j1e=l952:9j1=<72-;j47;l;o3b3?5<3`?<6=4+1`:91f=i9h=1865f5783>!7f03?h7c?n7;78?l32290/=l655b9m5d1=>21b994?:%3b<?3d3g;j;794;h70>5<#9h219n5a1`59<>=n=;0;6)?n8;7`?k7f?3307d;>:18'5d>==j1e=l95a:9j15<72-;j47;l;o3b3?d<3`>n6=4+1`:91f=i9h=1o65f4e83>!7f03?h7c?n7;f8?l2d290/=l655b9m5d1=m21b8o4?:%3b<?3d3g;j;7h4;h6b>5<#9h219n5a1`5955=<a=31<7*>a986g>h6i>0:=65f4983>!7f03?h7c?n7;31?>o3?3:1(<o7:4a8j4g028907d:9:18'5d>==j1e=l951598m13=83.:m54:c:l2e2<6=21b:94?:%3b<?3d3g;j;7?9;:k57?6=,8k368m4n0c4>41<3`<96=4+1`:91f=i9h=1=554i7394?"6i10>o6`>a682=>=n>90;6)?n8;7`?k7f?3;j76g:f;29 4g?2<i0b<o8:0`8?l3b290/=l655b9m5d1=9j10e8o50;&2e=<2k2d:m:4>d:9j0c<72-;j47;l;o3b3?7b32c?87>5$0c;>0e<f8k<6<h4;|`2ff<72ki1<7>t$0`;>4g>3A;hj6F>bd9Y7d<ds8;1=>4j:68;>f<6=3;96<85f;37>g<zf=81>6`;3;;8jg7=82do?7>4$d29a7=#m80n>6*>b482?!c22;1/i;4=;%g4>7=#m1097)k6:39'ad<53-oi6?5+eb81?!cc2;1/ih4=;%ge>7=#n9097)h>:39'b7<53-l86?5+f581?!`22;1/j;4=;%d4>7=#n1097)h6:39'bd<53-li6?5+fb81?!`c2;1/jh4=;%de>7=#99:1>6*>0081?!77:380(<><:39'552=:2.:<84=;%332?4<,8:<6?5+11:96>"680097)??a;08 46e2;1/==m52:&24a<53-;;i7<4$02e>7=#98:1>6*>1081?!76:380(<?<:39'542=:2.:=84=;%322?4<,8;<6?5+10:96>"690097)?>a;08 47e2;1/=<m52:&25a<53-;:i7<4$03e>7=#9;:1>6*>2081?!75:380(<<<:39'572=:2.:>84=;%312?4<,88<6?5+13:96>"6:0097)?=a;08 44e2;1/=?m52:&26c<6i:1/=lk51c58 4ga2:h0(<l?:2`8 4d62:20(<l=:0`7?!75l3;0(<<j:09'5fe=9jh0(<mk:0aa?!7e>3;0e<on:188m6b=831bhk4?::k2ea<722c8i7>5;h3bf?6=3`;jo7>5;hff>5<<a1k1<7*>a98;=>h6i>0;76g78;29 4g?2130b<o8:098m=1=83.:m5479:l2e2<532c3:7>5$0c;>=?<f8k<6>54i0a6>5<#9h21=n:4n0c4>5=<a8i86=4+1`:95f2<f8k<6<54i0a1>5<#9h21=n:4n0c4>7=<a8i:6=4+1`:95f2<f8k<6>54o`;94?"6i10j46`>a683?>if?3:1(<o7:`:8j4g02810cl;50;&2e=<f02d:m:4=;:mb0?6=,8k36l64n0c4>6=<gh91<7*>a98b<>h6i>0?76an2;29 4g?2h20b<o8:498kd7=83.:m54n8:l2e2<132ej<7>5$0c;>d><f8k<6:54o8d94?"6i10j46`>a68;?>i>m3:1(<o7:`:8j4g02010c4j50;&2e=<f02d:m:4n;:m:g?6=,8k36l64n0c4>g=<g0k1<7*>a98b<>h6i>0h76a69;29 4g?2h20b<o8:e98k<>=83.:m54n8:l2e2<b32e2;7>5$0c;>d><f8k<6k54o8494?"6i10j46`>a6824>=h1<0;6)?n8;c;?k7f?3;:76a64;29 4g?2h20b<o8:008?j?4290/=l65a99m5d1=9:10c4<50;&2e=<f02d:m:4>4:9l=4<72-;j47o7;o3b3?7232ei<7>5$0c;>d><f8k<6<84;nce>5<#9h21m55a1`5952=<gho1<7*>a98b<>h6i>0:465`ae83>!7f03k37c?n7;3:?>ifk3:1(<o7:`:8j4g028k07bom:18'5d>=i11e=l951c98kdg=83.:m54n8:l2e2<6k21dm;4?:%3b<?g?3g;j;7?k;:m:f?6=,8k36l64n0c4>4c<3f3;6=4+1`:9e==i9h=1=k54i0d94?"6i10:i6`>a683?>o6l3:1(<o7:0g8j4g02810e<m50;&2e=<6m2d:m:4=;:k2f?6=,8k36<k4n0c4>6=<a;21<7*>a982a>h6i>0?76g=7;29 4g?28o0b<o8:498m70=83.:m54>e:l2e2<132c997>5$0c;>4c<f8k<6:54i3694?"6i10:i6`>a68;?>o5;3:1(<o7:0g8j4g02010e?<50;&2e=<6m2d:m:4n;:k15?6=,8k36<k4n0c4>g=<a;:1<7*>a982a>h6i>0h76g>a;29 4g?28o0b<o8:e98m7c=83.:m54=d:l2e2<732c9o7>5$0c;>7b<f8k<6<54i3`94?"6i109h6`>a681?>o5i3:1(<o7:3f8j4g02:10e>950;&2e=<5l2d:m:4;;:k02?6=,8k36?j4n0c4>0=<a:?1<7*>a981`>h6i>0=76g<4;29 4g?2;n0b<o8:698m65=83.:m54=d:l2e2<?32c8>7>5$0c;>7b<f8k<6454i2394?"6i109h6`>a68b?>o483:1(<o7:3f8j4g02k10e?h50;&2e=<5l2d:m:4l;:k1=?6=,8k36?j4n0c4>a=<a>o1<7*>a984`>h6i>0;76g8c;29 4g?2>n0b<o8:098m2g=83.:m548d:l2e2<532c<57>5$0c;>2b<f8k<6>54i6:94?"6i10<h6`>a687?>o0?3:1(<o7:6f8j4g02<10e:850;&2e=<0l2d:m:49;:k41?6=,8k36:j4n0c4>2=<a>>1<7*>a984`>h6i>0376g83;29 4g?2>n0b<o8:898m24=83.:m548d:l2e2<f32c<=7>5$0c;>2b<f8k<6o54i7d94?"6i10<h6`>a68`?>o1m3:1(<o7:6f8j4g02m10e;j50;&2e=<0l2d:m:4j;:k5g?6=,8k36:j4n0c4>c=<a?h1<7*>a984`>h6i>0:<65f6`83>!7f03=o7c?n7;32?>o113:1(<o7:6f8j4g028807d87:18'5d>=?m1e=l951298m31=83.:m548d:l2e2<6<21b:;4?:%3b<?1c3g;j;7?:;:k;1?6=,8k36:j4n0c4>40<3`2?6=4+1`:93a=i9h=1=:54i9194?"6i10<h6`>a682<>=n0;0;6)?n8;5g?k7f?3;276g71;29 4g?2>n0b<o8:0c8?l>7290/=l657e9m5d1=9k10e:h50;&2e=<0l2d:m:4>c:9j3g<72-;j479k;o3b3?7c32c<<7>5$0c;>2b<f8k<6<k4;h46>5<#9h21;i5a1`595c=<gm21<7*>a98g3>h6i>0;76ak6;29 4g?2m=0b<o8:098ka3=83.:m54k7:l2e2<532eo87>5$0c;>a1<f8k<6>54i9d94?"6i103i6`>a683?>o?l3:1(<o7:9g8j4g02810e5m50;&2e=<?m2d:m:4=;:k;f?6=,8k365k4n0c4>6=<gmn1<7*>a98gg>h6i>0;76akb;29 4g?2mi0b<o8:098kag=83.:m54kc:l2e2<532eo57>5$0c;>ae<f8k<6>54ob`94?"6i10hm6`>a683?>id13:1(<o7:bc8j4g02810cn950;&2e=<di2d:m:4=;:m`2?6=,8k36no4n0c4>6=<gj?1<7*>a98`e>h6i>0?76al4;29 4g?2jk0b<o8:498kf5=83.:m54la:l2e2<132eh>7>5$0c;>fg<f8k<6:54ob394?"6i10hm6`>a68;?>id83:1(<o7:bc8j4g02010coh50;&2e=<di2d:m:4n;:maa?6=,8k36no4n0c4>g=<gki1<7*>a98`e>h6i>0h76amb;29 4g?2jk0b<o8:e98kgg=83.:m54la:l2e2<b32ei57>5$0c;>fg<f8k<6k54oc:94?"6i10hm6`>a6824>=hj>0;6)?n8;ab?k7f?3;:76am6;29 4g?2jk0b<o8:008?jd2290/=l65c`9m5d1=9:10co:50;&2e=<di2d:m:4>4:9lf6<72-;j47mn;o3b3?7232eo>7>5$0c;>fg<f8k<6<84;nf2>5<#9h21ol5a1`5952=<gm:1<7*>a98`e>h6i>0:465`cg83>!7f03ij7c?n7;3:?>idm3:1(<o7:bc8j4g028k07bmk:18'5d>=kh1e=l951c98kfe=83.:m54la:l2e2<6k21do54?:%3b<?ef3g;j;7?k;:ma`?6=,8k36no4n0c4>4c<3fh96=4+1`:9gd=i9h=1=k54i0ab>5<#9h21=n74n0c4>5=<a8i36=4+1`:95f?<f8k<6<54i0a4>5<#9h21=n74n0c4>7=<a8i=6=4+1`:95f?<f8k<6>54i4f94?"6i10>o6`>a683?>o2j3:1(<o7:4a8j4g02810e8750;&2e=<2k2d:m:4=;:k6<?6=,8k368m4n0c4>6=<a<=1<7*>a986g>h6i>0?76g:6;29 4g?2<i0b<o8:498m03=83.:m54:c:l2e2<132c>87>5$0c;>0e<f8k<6:54i4194?"6i10>o6`>a68;?>o2:3:1(<o7:4a8j4g02010e8?50;&2e=<2k2d:m:4n;:k64?6=,8k368m4n0c4>g=<a=o1<7*>a986g>h6i>0h76g;d;29 4g?2<i0b<o8:e98m1e=83.:m54:c:l2e2<b32c?n7>5$0c;>0e<f8k<6k54i5c94?"6i10>o6`>a6824>=n<00;6)?n8;7`?k7f?3;:76g;8;29 4g?2<i0b<o8:008?l20290/=l655b9m5d1=9:10e9850;&2e=<2k2d:m:4>4:9j00<72-;j47;l;o3b3?7232c=87>5$0c;>0e<f8k<6<84;h40>5<#9h219n5a1`5952=<a?81<7*>a986g>h6i>0:465f6083>!7f03?h7c?n7;3:?>o183:1(<o7:4a8j4g028k07d;i:18'5d>==j1e=l951c98m0c=83.:m54:c:l2e2<6k21b9l4?:%3b<?3d3g;j;7?k;:k7b?6=,8k368m4n0c4>4c<3`>?6=4+1`:91f=i9h=1=k54}r0g4?6=98qU>nk4=0`:>4e234;i57?l3:?2f<<6k;16=o751b3894df28i>70?ma;3`7>;6jh0:o?521cc95f7<58hi6<m:;<3af?7d;27:no4>c39>5gd=9j;01<ll:0a6?87ek3;h?63>bb82g7=:9ki1=n?4}r3f=?6==rT:hn521c;95c=:9kk1=k521c`95c=:9ki1=k5rs0g4>5<2sW;on63>b882`>;6jh0:h63>bc82`>;6jj0:h6s|1d494?3|V8nj70?m9;3`?87ei3;h70?mb;3`?87ek3;h7p}>f383>0}Y9l>01<l6:0`894df28h01<lm:0`894dd28h0q~?i1;291~X6m:16=o75299>5gg=:116=ol5299>5ge=:11v<h?:186[7b:27:n44=7:?2fd<5?27:no4=7:?2ff<5?2wx=hh50;7xZ4c634;i57<9;<3ae?4134;in7<9;<3ag?413ty:ih4?:4y]5`6<58h26?;4=0`b>73<58hi6?;4=0``>73<uz;nh7>55z\2`c=:9k31>9521cc961=:9kh1>9521ca961=z{8oh6=4:{_3ga>;6j009?63>b`817>;6jk09?63>bb817>{t9lh1<7;t^0fg?87e138970?ma;01?87ej38970?mc;01?xu6mh0;68uQ1e;894d>2;;01<ln:33894de2;;01<ll:338yv7b=3:19vP>d99>5g?=:916=oo5219>5gd=:916=om5219~w7452909wS<>9:?2ff<3n2wx>?>50;0xZ77?34;io7:;;|q15c<72;qU><94=0`a>1`<uz8:i7>52z\153=:9kh1895rs33g>5<5sW8:963>b`87b>{t:8i1<7<t^337?87ei3>?7p}=1c83>7}Y:8901<l6:5d8yv46i3:1>vP=139>5g?=<=1v?j<:1825~X5l816=o751bc894d>28i370?m9;3`3>;6j00:o;521cc95fg<58hj6<m7;<3ae?7d?27:nl4>c79>5gd=9jk01<lm:0a;?87ej3;h;63>bc82g3=:9ki1=no4=0``>4e?34;io7?l7:?2ff<6k?1v?>?:186[7a=27:n44=e:?2fd<5m27:no4=e:?2ff<5m2wx>=750;7xZ4`c34;i57<l;<3ae?4d34;in7<l;<3ag?4d3ty9<54?:4y]5ce<58h26?l4=0`b>7d<58hi6?l4=0``>7d<uz8;;7>55z\2bg=:9k31>l521cc96d=:9kh1>l521ca96d=z{;:=6=4:{_3ee>;6j008;63>b`803>;6jk08;63>bb803>{t:9?1<7;t^0d:?87e139=70?ma;15?87ej39=70?mc;15?xu58=0;68uQ1g:894d>2:?01<ln:27894de2:?01<ll:278yv47;3:19vP>f69>5g?=;=16=oo5359>5gd=;=16=om5359~w765290>wS?i6:?2f<<4;27:nl4<3:?2fg<4;27:nn4<3:p657=83?pR<h;;<3a=?5534;im7==;<3af?5534;io7==;|q2b`<72<qU=k=4=0`:>67<58hj6>?4=0`a>67<58hh6>?4}r06g?6=:rT9?n521ca9<6=z{;?j6=4={_00f>;6jj03>6s|24:94?4|V;9270?mb;:0?xu5=>0;6?uQ22:894de2180q~<:6;296~X5;>16=oo5829~w7322909wS<<6:?2fd<?:2wx>8:50;0xZ75234;i576<;|q116<72;qU>>:4=0`:>=4<uz8>>7>52z\176=:9ki14<5rs372>5<5sW88>63>bb8;4>{t:<:1<7<t^312?87ej32:7p}=4g83>7}Y:::01<lm:928yv43l3:1>vP=2d9>5gg=081v?:l:181[45l27:nl470:p61d=838pR?<l;<3a=?>63ty98l4?:3y]67d<58h265>4}r07=?6=:rT9>l521ca93c=z{;>36=4={_01=>;6jj0<n6s|25594?4|V;8370?mb;5e?xu5<?0;6?uQ235894de2>h0q~<;5;296~X5:?16=oo57g9~w7232909wS<=5:?2fd<0j2wx>;=50;0xZ72534;i579i;|q127<72;qU>9?4=0`:>2d<uz8==7>52z\105=:9ki1;=5rs343>5<5sW88j63>bb851>{t:<l1<7<t^31f?87ej3=;7p}=5d83>7}Y::n01<lm:778yv42l3:1>vP=3`9>5gg=?91v?;6:181[45n27:nl495:p61c=838pR?<;;<3a=?173ty98>4?:3y]675<58h26;;4}r03f?6==rT9<o521c;97a=:9kk1?i521c`97a=:9ki1?i5rs32`>5<2sW8;o63>b880a>;6jh08i63>bc80a>;6jj08i6s|26694?4|V;<i70?mc;;a?xu5?;0;6?uQ27c894dd20:0q~<81;296~X5>016=ol59c9~w7172909wS<98:?2fg<>82wx>;h50;0xZ70034;im77m;|q12`<72;qU>;84=0`b><6<uz8=h7>52z\120=:9k315o5rs34`>5<5sW8=863>b88:4>{t:ho1<7<t^3:f?87ek3n;7p}=ab83>7}Y:1n01<ll:bd8yv4fi3:1>vP=8c9>5gd=l91v?o6:181[4?i27:no4lf:p6d>=838pR?66;<3ae?b73ty9m:4?:3y]6=><58hj6nh4}r0b2?6=:rT94:521c;9`5=z{;k>6=4={_0;2>;6j00hj6s|2`694?4|V;2>70?mc;af?xu5i:0;6?uQ296894dd2jn0q~<n2;296~X50:16=ol5cd9~w7g62909wS<72:?2fg<dl2wx>4h50;0xZ7>734;im7mj;|q1=`<72;qU>:h4=0`b>fb<uz82h7>52z\13`=:9k31oh5rs3;`>5<5sW8<h63>b88``>{t:0h1<7<t^35`?87ek3ih7p}=9`83>7}Y:>h01<ll:b:8yv4>13:1>vP=7`9>5gd=kj1v?77:181[40127:no4l8:p6<1=838pR?97;<3ae?ed3ty95;4?:3y]621<58hj6n64}r0a1?6=:rT959521c;9gf=z{;h?6=4={_0:7>;6j00h46s|2c194?4|V;3970?mc;`g?xu5j;0;6?uQ283894dd2k80q~<m1;296~X51916=ol5be9~w7d72909wS<7f:?2fg<e:2wx>lh50;0xZ7>d34;im7lk;|q1eg<72;qU>5?4=0`b>g4<uz8j<7>52z\133=:9k31ni5rs3;6>5<5sW8<963>b88a6>{t:j=1<7?=4z\1f`=Y:j<0R?m:;_0`0>X5k:1U>n<4^3a2?[4d82T9nk5Q2cf8Z7dd34;o<7k<;<3a=?7fi27:n44>ae9>5g?=9hh01<l6:0c`?87e132j70?m9;:;?87e132<70?m9;:5?87e13;j70?m9;13?87e138m70?m9;0:?87e13=n70?m9;5`?87e13=j70?m9;5:?87e13=370?m9;54?87e13==70?m9;56?87e13=?70?m9;50?87e13=970?m9;52?87e13<m70?m9;4f?87e13<o70?m9;4`?87e13<i70?m9;4b?87e13<270?m9;4;?87e13<<70?m9;45?87e132>70?m9;:7?87e132m70?m9;:g?87e132h70?m9;:a?87e13?o70?m9;7a?87e13?270?m9;7;?87e13?<70?m9;75?87e13?>70?m9;77?87e13?870?m9;71?87e13?:70?m9;73?87e13>n70?m9;6g?87e13>h70?m9;6a?87e13>j70?m9;6:?87e13>370?m9;64?87e13>=70?m9;66?87e13<?70?m9;40?87e13<970?m9;42?87e13<;70?m9;7e?87e13?n70?m9;7b?87ei3;jm63>b`82ea=:9kk1=ll4=0`b>4gd34;im76n;<3ae?>?34;im768;<3ae?>134;im7?n;<3ae?5734;im7<i;<3ae?4>34;im79j;<3ae?1d34;im79n;<3ae?1>34;im797;<3ae?1034;im799;<3ae?1234;im79;;<3ae?1434;im79=;<3ae?1634;im78i;<3ae?0b34;im78k;<3ae?0d34;im78m;<3ae?0f34;im786;<3ae?0?34;im788;<3ae?0134;im76:;<3ae?>334;im76i;<3ae?>c34;im76l;<3ae?>e34;im7;k;<3ae?3e34;im7;6;<3ae?3?34;im7;8;<3ae?3134;im7;:;<3ae?3334;im7;<;<3ae?3534;im7;>;<3ae?3734;im7:j;<3ae?2c34;im7:l;<3ae?2e34;im7:n;<3ae?2>34;im7:7;<3ae?2034;im7:9;<3ae?2234;im78;;<3ae?0434;im78=;<3ae?0634;im78?;<3ae?3a34;im7;j;<3ae?3f34;in7?na:?2fg<6im16=ol51``894de28kh70?mb;:b?87ej32370?mb;:4?87ej32=70?mb;3b?87ej39;70?mb;0e?87ej38270?mb;5f?87ej3=h70?mb;5b?87ej3=270?mb;5;?87ej3=<70?mb;55?87ej3=>70?mb;57?87ej3=870?mb;51?87ej3=:70?mb;4e?87ej3<n70?mb;4g?87ej3<h70?mb;4a?87ej3<j70?mb;4:?87ej3<370?mb;44?87ej3<=70?mb;:6?87ej32?70?mb;:e?87ej32o70?mb;:`?87ej32i70?mb;7g?87ej3?i70?mb;7:?87ej3?370?mb;74?87ej3?=70?mb;76?87ej3??70?mb;70?87ej3?970?mb;72?87ej3?;70?mb;6f?87ej3>o70?mb;6`?87ej3>i70?mb;6b?87ej3>270?mb;6;?87ej3><70?mb;65?87ej3>>70?mb;47?87ej3<870?mb;41?87ej3<:70?mb;43?87ej3?m70?mb;7f?87ej3?j70?mc;3be>;6jj0:mi521ca95dd<58hh6<ol;<3ag?>f34;io767;<3ag?>034;io769;<3ag?7f34;io7=?;<3ag?4a34;io7<6;<3ag?1b34;io79l;<3ag?1f34;io796;<3ag?1?34;io798;<3ag?1134;io79:;<3ag?1334;io79<;<3ag?1534;io79>;<3ag?0a34;io78j;<3ag?0c34;io78l;<3ag?0e34;io78n;<3ag?0>34;io787;<3ag?0034;io789;<3ag?>234;io76;;<3ag?>a34;io76k;<3ag?>d34;io76m;<3ag?3c34;io7;m;<3ag?3>34;io7;7;<3ag?3034;io7;9;<3ag?3234;io7;;;<3ag?3434;io7;=;<3ag?3634;io7;?;<3ag?2b34;io7:k;<3ag?2d34;io7:m;<3ag?2f34;io7:6;<3ag?2?34;io7:8;<3ag?2134;io7::;<3ag?0334;io78<;<3ag?0534;io78>;<3ag?0734;io7;i;<3ag?3b34;io7;n;|q271<720q6=i?51`7894d>2ml01<l6:eg894df2ml01<ln:eg894de2ml01<lm:eg894dd2ml01<ll:eg8yxu58k0;6?uQ21`896?=:9h0(<lk:06e?xu5l90;6?uQ2bg896?=:jo0(<lk:056?xu6m00;6?uQ1ea896?=9mi0(<lk:0:3?xu6m>0;6?uQ1e`896?=9mh0(<lk:0:a?xu6m?0;6?uQ1ec896?=9mk0(<lk:0;5?xu6n;0;6?uQ1d6896?=9l>0(<lk:016?xu6n80;6?uQ1d1896?=9l90(<lk:063?xu6n90;6?uQ1d0896?=9l80(<lk:064?xu6mo0;6?uQ1d3896?=9l;0(<lk:06;?xu6ml0;6?uQ1d2896?=9l:0(<lk:06:?xu6mm0;6?uQ1ed896?=9ml0(<lk:06b?xu6mj0;6?uQ1eg896?=9mo0(<lk:06a?xu6mk0;6?uQ1ef896?=9mn0(<lk:06`?xu6mh0;6?uQ1e;896?=9m30(<lk:06g?xu6m<0;6?uQ1e:896?=9m20(<lk:06f?xu5:;0;6?uQ20;896?=:830(<lk:073?xu5:90;6?uQ20:896?=:820(<lk:072?xu59o0;6?uQ205896?=:8=0(<lk:071?xu59l0;6?uQ204896?=:8<0(<lk:070?xu59m0;6?uQ207896?=:8?0(<lk:077?xu59j0;6?uQ206896?=:8>0(<lk:076?xu59k0;6?uQ201896?=:890(<lk:075?xu59h0;6?uQ200896?=:880(<lk:074?xu5?=0;6?uQ27`896?=:?h0(<lk:07;?xu5?;0;6?uQ27c896?=:?k0(<lk:07:?xu5?80;6?uQ27;896?=:?30(<lk:07b?xu5?90;6?uQ27:896?=:?20(<lk:07a?xu5>o0;6?uQ275896?=:?=0(<lk:07`?xu5>l0;6?uQ274896?=:?<0(<lk:07g?xu5>m0;6?uQ277896?=:??0(<lk:07f?xu5>j0;6?uQ276896?=:?>0(<lk:07e?xu58j0;6?uQ21a896?=:9i0(<lk:043?xu5l:0;6?uQ2e3896?=:m;0(<lk:042?xu5890;6?uQ1g7896?=9o?0(<lk:041?xu5800;6?uQ1gf896?=9on0(<lk:040?xu5810;6?uQ1ga896?=9oi0(<lk:047?xu58>0;6?uQ1g`896?=9oh0(<lk:046?xu58?0;6?uQ1gc896?=9ok0(<lk:045?xu58<0;6?uQ1g;896?=9o30(<lk:044?xu58=0;6?uQ1g:896?=9o20(<lk:04;?xu58:0;6?uQ1g5896?=9o=0(<lk:04:?xu58;0;6?uQ1g4896?=9o<0(<lk:04b?xu5880;6?uQ1g6896?=9o>0(<lk:04a?xu6nl0;6?uQ1g1896?=9o90(<lk:04`?xu5=j0;6?uQ22a896?=::i0(<lk:04g?xu5=h0;6?uQ22`896?=::h0(<lk:04f?xu5=10;6?uQ22;896?=::30(<lk:04e?xu5=>0;6?uQ22:896?=::20(<lk:053?xu5=?0;6?uQ225896?=::=0(<lk:052?xu5=<0;6?uQ224896?=::<0(<lk:051?xu5==0;6?uQ227896?=::?0(<lk:050?xu5=:0;6?uQ226896?=::>0(<lk:057?xu5=;0;6?uQ221896?=::90(<lk:055?xu5=80;6?uQ220896?=::80(<lk:054?xu5=90;6?uQ223896?=::;0(<lk:05;?xu5<o0;6?uQ222896?=:::0(<lk:05:?xu5<m0;6?uQ23g896?=:;o0(<lk:05b?xu5<j0;6?uQ23f896?=:;n0(<lk:05a?xu5<k0;6?uQ23a896?=:;i0(<lk:05`?xu5<h0;6?uQ23`896?=:;h0(<lk:05g?xu5<00;6?uQ23c896?=:;k0(<lk:05f?xu5<10;6?uQ23;896?=:;30(<lk:05e?xu5<>0;6?uQ23:896?=:;20(<lk:0:2?xu5<?0;6?uQ235896?=:;=0(<lk:0:1?xu5<<0;6?uQ234896?=:;<0(<lk:0:0?xu5<=0;6?uQ237896?=:;?0(<lk:0:7?xu5>:0;6?uQ250896?=:=80(<lk:0:6?xu5>;0;6?uQ253896?=:=;0(<lk:0:5?xu5>80;6?uQ252896?=:=:0(<lk:0:4?xu5>90;6?uQ22d896?=::l0(<lk:0:;?xu5=o0;6?uQ22g896?=::o0(<lk:0::?xu5=l0;6?uQ22f896?=::n0(<lk:0:b?xu5=m0;6?uQ22c896?=::k0(<lk:0:`?xu5=00;6?uQ23d896?=:;l0(<lk:0:g?xu5<l0;6?uQ236896?=:;>0(<lk:0:f?xu5<:0;6?uQ231896?=:;90(<lk:0:e?xu5il0;6?uQ29g896?=:1o0(<lk:0;3?xu5ij0;6?uQ29f896?=:1n0(<lk:0;2?xu5ih0;6?uQ29`896?=:1h0(<lk:0;1?xu5i00;6?uQ29c896?=:1k0(<lk:0;0?xu5i10;6?uQ29;896?=:130(<lk:0;7?xu5i>0;6?uQ29:896?=:120(<lk:0;6?xu5i?0;6?uQ295896?=:1=0(<lk:0;4?xu5i<0;6?uQ294896?=:1<0(<lk:0;;?xu5i=0;6?uQ297896?=:1?0(<lk:0;:?xu5i:0;6?uQ296896?=:1>0(<lk:0;b?xu5i;0;6?uQ291896?=:190(<lk:0;a?xu5i80;6?uQ290896?=:180(<lk:0;`?xu51o0;6?uQ292896?=:1:0(<lk:0;g?xu51l0;6?uQ26d896?=:>l0(<lk:0;f?xu51m0;6?uQ26g896?=:>o0(<lk:0;e?xu51j0;6?uQ26f896?=:>n0(<lk:0c3?xu51k0;6?uQ26a896?=:>i0(<lk:015?xu51h0;6?uQ26`896?=:>h0(<lk:014?xu5100;6?uQ26c896?=:>k0(<lk:01;?xu5110;6?uQ26;896?=:>30(<lk:01:?xu51>0;6?uQ26:896?=:>20(<lk:01b?xu51?0;6?uQ265896?=:>=0(<lk:01a?xu5j<0;6?uQ286896?=:0>0(<lk:01`?xu5j=0;6?uQ281896?=:090(<lk:01g?xu5j:0;6?uQ280896?=:080(<lk:01f?xu5j;0;6?uQ283896?=:0;0(<lk:01e?xu5j80;6?uQ282896?=:0:0(<lk:062?xu5j90;6?uQ29d896?=:1l0(<lk:061?xu5io0;6?uQ29a896?=:1i0(<lk:060?xu5ik0;6?uQ293896?=:1;0(<lk:067?xu5i90;6?uQ264896?=:><0(<lk:066?xu51<0;6?uQ267896?=:>?0(<lk:065?x{i<?91<7<tH0`f?xh3>=0;6?uG1cg8yk21=3:1>vF>bd9~j1012909wE?me:m031=838pD<lj;|l72=<72;qC=ok4}o65=?6=:rB:nh5rn54b>5<5sA;ii6sa47`94?4|@8hn7p`;6b83>7}O9ko0qc:9d;296~N6jl1vb98j:181M7em2we8;h50;0xL4db3td?;=4?:3yK5gc<ug><=7>52zJ2f`=zf==96=4={I3aa>{i<>91<7<tH0`f?xh3?=0;6?uG1cg8yk20=3:1>vF>bd9~j1112909wE?me:m021=838pD<lj;|l73=<72;qC=ok4}o64=?6=:rB:nh5rn55b>5<5sA;ii6sa46`94?4|@8hn7p`;7b83>7}O9ko0qc:8d;296~N6jl1vb99j:181M7em2we8:h50;0xL4db3td?4=4?:3yK5gc<ug>3=7>52zJ2f`=zf=296=4={I3aa>{i<191<7<tH0`f?xh30=0;6?uG1cg8yk2?=3:1>vF>bd9~j1>12909wE?me:m0=1=838pD<lj;|l7<=<72;qC=ok4}o6;=?6=:rB:nh5rn5:b>5<5sA;ii6sa49`94?4|@8hn7p`;8b83>7}O9ko0qc:7d;296~N6jl1vb96j:181M7em2we85h50;0xL4db3td?5=4?:3yK5gc<ug>2=7>52zJ2f`=zf=396=4={I3aa>{i<091<7<tH0`f?xh31=0;6?uG1cg8yk2>=3:1>vF>bd9~j1?12909wE?me:m0<1=838pD<lj;|l7==<72;qC=ok4}o6:=?6=:rB:nh5rn5;b>5<5sA;ii6sa48`94?4|@8hn7p`;9b83>7}O9ko0qc:6d;296~N6jl1vb97j:181M7em2we84h50;0xL4db3td?m=4?:3yK5gc<ug>j=7>52zJ2f`=zf=k96=4={I3aa>{i<h91<7<tH0`f?xh3i=0;6?uG1cg8yk2f=3:1>vF>bd9~j1g12909wE?me:m0d1=838pD<lj;|l7e=<72;qC=ok4}o6b=?6=:rB:nh5rn5cb>5<5sA;ii6sa4``94?4|@8hn7p`;ab83>7}O9ko0qc:nd;296~N6jl1vb9oj:181M7em2we8lh50;0xL4db3td?n=4?:3yK5gc<ug>i=7>52zJ2f`=zf=h96=4={I3aa>{i<k91<7<tH0`f?xh3j=0;6?uG1cg8yk2e=3:1>vF>bd9~j1d12909wE?me:m0g1=838pD<lj;|l7f=<72;qC=ok4}o6a=?6=:rB:nh5rn5`b>5<5sA;ii6sa4c`94?4|@8hn7p`;bb83>7}O9ko0qc:md;296~N6jl1vb9lj:181M7em2we8oh50;0xL4db3td?o=4?:3yK5gc<ug>h=7>52zJ2f`=zf=i96=4={I3aa>{i<j91<7<tH0`f?xh3k=0;6?uG1cg8yk2d=3:1>vF>bd9~j1e12909wE?me:m0f1=838pD<lj;|l7g=<72;qC=ok4}o6`=?6=:rB:nh5rn5ab>5<5sA;ii6sa4b`94?4|@8hn7p`;cb83>7}O9ko0qc:ld;296~N6jl1vb9mj:181M7em2we8;?50;3xL4db3td?:?4?:0yK5gc<utwvLMMt52f9eg0e<9==qMNM{1CDU}zHI
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/enc_8b10b.vhd
0,0 → 1,320
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 11/5/2010
-- Design Name: 8b/10b encoder
-- Module Name: enc_8b10b - Behavioral
-- File Name: enc_8b10b.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: An 8b/10b encoder. The complete 8b/10b encoding is not
-- implemented though (only the control symbols K.28.1 and
-- K.28.5 are available, all others will just encode as K.28.1).
-- This is done to simplify and minimize the code, and as the
-- other control codes aren't used by the TosNet physical layer
-- anyways.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
entity enc_8b10b is
port ( clk : in STD_LOGIC;
ce : in STD_LOGIC;
din : in STD_LOGIC_VECTOR(7 downto 0);
dout : out STD_LOGIC_VECTOR(9 downto 0);
kin : in STD_LOGIC);
end enc_8b10b;
 
architecture Behavioral of enc_8b10b is
 
signal rd : STD_LOGIC := '0';
signal next_rd : STD_LOGIC;
signal temp_rd_s0 : STD_LOGIC; --Stage 0
signal temp_rd_k0 : STD_LOGIC; --Stage 1, k=0
signal dxA : STD_LOGIC;
signal EDCBA : STD_LOGIC_VECTOR(4 downto 0) := (others => '0');
signal HGF : STD_LOGIC_VECTOR(2 downto 0) := (others => '0');
signal iedcba : STD_LOGIC_VECTOR(5 downto 0) := (others => '0');
signal jhgf : STD_LOGIC_VECTOR(3 downto 0) := (others => '0');
begin
 
process(jhgf, iedcba, kin, rd, temp_rd_k0, EDCBA, HGF)
begin
if(kin = '0') then
dout <= jhgf & iedcba;
next_rd <= temp_rd_k0;
else
next_rd <= not rd;
if(HGF = "101" and EDCBA = "11100") then
if(rd = '0') then
dout <= "0101111100";
else
dout <= "1010000011";
end if;
else --Transmit K.28.1 => QUIET
if(rd = '0') then
dout <= "1001111100";
else
dout <= "0110000011";
end if;
end if;
end if;
end process;
 
process(clk)
begin
if(clk = '1' and clk'event) then
if(ce = '1') then
EDCBA <= din(4 downto 0);
HGF <= din(7 downto 5);
rd <= next_rd;
end if;
end if;
end process;
process(EDCBA, rd)
begin
case EDCBA is
when "00000" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "111001";
else
iedcba <= "000110";
end if;
when "00001" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "101110";
else
iedcba <= "010001";
end if;
when "00010" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "101101";
else
iedcba <= "010010";
end if;
when "00011" =>
temp_rd_s0 <= rd;
iedcba <= "100011";
when "00100" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "101011";
else
iedcba <= "010100";
end if;
when "00101" =>
temp_rd_s0 <= rd;
iedcba <= "100101";
when "00110" =>
temp_rd_s0 <= rd;
iedcba <= "100110";
when "00111" =>
temp_rd_s0 <= rd;
if(rd = '0') then
iedcba <= "000111";
else
iedcba <= "111000";
end if;
when "01000" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "100111";
else
iedcba <= "011000";
end if;
when "01001" =>
temp_rd_s0 <= rd;
iedcba <= "101001";
when "01010" =>
temp_rd_s0 <= rd;
iedcba <= "101010";
when "01011" =>
temp_rd_s0 <= rd;
iedcba <= "001011";
when "01100" =>
temp_rd_s0 <= rd;
iedcba <= "101100";
when "01101" =>
temp_rd_s0 <= rd;
iedcba <= "001101";
when "01110" =>
temp_rd_s0 <= rd;
iedcba <= "001110";
when "01111" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "111010";
else
iedcba <= "000101";
end if;
when "10000" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "110110";
else
iedcba <= "001001";
end if;
when "10001" =>
temp_rd_s0 <= rd;
iedcba <= "110001";
when "10010" =>
temp_rd_s0 <= rd;
iedcba <= "110010";
when "10011" =>
temp_rd_s0 <= rd;
iedcba <= "010011";
when "10100" =>
temp_rd_s0 <= rd;
iedcba <= "110100";
when "10101" =>
temp_rd_s0 <= rd;
iedcba <= "010101";
when "10110" =>
temp_rd_s0 <= rd;
iedcba <= "010110";
when "10111" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "010111";
else
iedcba <= "101000";
end if;
when "11000" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "110011";
else
iedcba <= "001100";
end if;
when "11001" =>
temp_rd_s0 <= rd;
iedcba <= "011001";
when "11010" =>
temp_rd_s0 <= rd;
iedcba <= "011010";
when "11011" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "011011";
else
iedcba <= "100100";
end if;
when "11100" =>
temp_rd_s0 <= rd;
iedcba <= "011100";
when "11101" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "011101";
else
iedcba <= "100010";
end if;
when "11110" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "011110";
else
iedcba <= "100001";
end if;
when "11111" =>
temp_rd_s0 <= not rd;
if(rd = '0') then
iedcba <= "110101";
else
iedcba <= "001010";
end if;
when others =>
end case;
end process;
dxA <= '1' when (((EDCBA = 17 or EDCBA = 18 or EDCBA = 20) and temp_rd_s0 = '0') or
((EDCBA = 11 or EDCBA = 13 or EDCBA = 14) and temp_rd_s0 = '1'))
else '0';
 
process(HGF, EDCBA, dxA, temp_rd_s0)
begin
case HGF is
when "000" =>
temp_rd_k0 <= not temp_rd_s0;
if(temp_rd_s0 = '0') then
jhgf <= "1101";
else
jhgf <= "0010";
end if;
when "001" =>
temp_rd_k0 <= temp_rd_s0;
jhgf <= "1001";
when "010" =>
temp_rd_k0 <= temp_rd_s0;
jhgf <= "1010";
when "011" =>
temp_rd_k0 <= not temp_rd_s0;
if(temp_rd_s0 = '0') then
jhgf <= "0011";
else
jhgf <= "1100";
end if;
when "100" =>
temp_rd_k0 <= not temp_rd_s0;
if(temp_rd_s0 = '0') then
jhgf <= "1011";
else
jhgf <= "0100";
end if;
when "101" =>
temp_rd_k0 <= temp_rd_s0;
jhgf <= "0101";
when "110" =>
temp_rd_k0 <= temp_rd_s0;
jhgf <= "0110";
when "111" =>
temp_rd_k0 <= not temp_rd_s0;
if(dxA = '0') then
if(temp_rd_s0 = '0') then
jhgf <= "0111";
else
jhgf <= "1000";
end if;
else
if(temp_rd_s0 = '0') then
jhgf <= "1110";
else
jhgf <= "0001";
end if;
end if;
when others =>
end case;
end process;
 
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/crcgen.vhd
0,0 → 1,127
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 1/4/2010
-- Design Name 8bit CRC generator
-- Module Name: crcgen - Behavioral
-- File Name: crcgen.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: Adapted from "Parallel CRC Realization", by Guiseppe
 
-- Transactions on Computers, Vol.52, No.10, October 2003.
-- Adjustments have been made to the layout, the reset has been
-- converted to a synchronous reset instead of the asynchronous
-- reset from the original paper, and a clock enable has been
-- added.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use work.crcpack.all;
 
 
entity crcgen is
Port ( reset : in STD_LOGIC;
clk : in STD_LOGIC;
clk_en : in STD_LOGIC;
Din : in STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
Xout : out STD_LOGIC_VECTOR(CRCDIM - 1 downto 0));
end crcgen;
 
 
architecture rtl of crcgen is
signal X : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
signal X1 : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
signal X2 : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
signal Dins : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
begin
 
process(Din)
variable Dinv : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
begin
Dinv := (others => '0');
Dinv(DATA_WIDTH - 1 downto 0) := Din; --LFSR:
Dins <= Dinv;
end process;
 
X2 <= X ; --LFSR
 
process(clk)
begin
if(clk = '1' and clk'EVENT) then
if(reset = '1') then
X <= (others => '0');
elsif(clk_en = '1') then
X <= X1 xor Dins ; --LFSR
end if;
end if;
end process;
 
Xout <= X;
 
--This process builds matrix M=F^w
process(X2)
variable Xtemp : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
variable vect : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
variable vect2 : STD_LOGIC_VECTOR(CRCDIM - 1 downto 0);
variable M : matrix;
variable F : matrix;
begin
--Matrix F
F(0) := CRC(CRCDIM - 1 downto 0);
for i in 0 to CRCDIM - 2 loop
vect := (others => '0');
vect(CRCDIM - i - 1) := '1';
F(i+1) := vect;
end loop;
--Matrix M=F?w
M(DATA_WIDTH - 1) := CRC(CRCDIM - 1 downto 0);
for k in 2 to DATA_WIDTH loop
vect2 := M(DATA_WIDTH - k + 1 );
vect := (others => '0');
for i in 0 to CRCDIM - 1 loop
if(vect2(CRCDIM - 1 - i) = '1') then
vect := vect xor F(i);
end if;
end loop;
M(DATA_WIDTH - k) := vect;
end loop;
for k in DATA_WIDTH - 1 to CRCDIM - 1 loop
M(k) := F(k - DATA_WIDTH + 1);
end loop;
 
--Combinatorial logic equations : X1 = M ( x ) X
 
Xtemp := (others => '0');
for i in 0 to CRCDIM - 1 loop
vect := M(i);
for j in 0 to CRCDIM - 1 loop
if(vect(j) = '1') then
Xtemp(j) := Xtemp(j) xor X2(CRCDIM - 1 - i);
end if;
end loop;
end loop;
X1 <= Xtemp;
end process;
end rtl;
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tal_top.vhd
0,0 → 1,1192
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 17/3/2008
-- Design Name TosNet
-- Module Name: tal_top - Behavioral
-- File Name: tal_top.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The TosNet application layer handles the shared memory block,
-- and keeps it updated. It also handles the FIFO buffers used
-- for the asynchronous communication.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.NUMERIC_STD.ALL;
 
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
 
entity tal_top is
Generic(disable_master : in STD_LOGIC := '0';
disable_slave : in STD_LOGIC := '1';
disable_async : in STD_LOGIC := '1');
Port ( node_id : in STD_LOGIC_VECTOR(3 downto 0);
max_skipped_writes : in STD_LOGIC_VECTOR(15 downto 0);
max_skipped_reads : in STD_LOGIC_VECTOR(15 downto 0);
data_in : in STD_LOGIC_VECTOR(7 downto 0);
data_in_strobe : in STD_LOGIC;
data_in_enable : in STD_LOGIC;
data_out : out STD_LOGIC_VECTOR(7 downto 0);
data_out_strobe : out STD_LOGIC;
data_out_enable : out STD_LOGIC;
buffer_full : in STD_LOGIC;
packet_error : in STD_LOGIC;
force_packet_error : out STD_LOGIC;
sync_strobe : in STD_LOGIC;
network_reg_addr : out STD_LOGIC_VECTOR(3 downto 0);
network_reg_data : in STD_LOGIC_VECTOR(31 downto 0);
network_reg_clk : out STD_LOGIC;
data_reg_addr : in STD_LOGIC_VECTOR(9 downto 0);
data_reg_data_in : in STD_LOGIC_VECTOR(31 downto 0);
data_reg_data_out : out STD_LOGIC_VECTOR(31 downto 0);
data_reg_clk : in STD_LOGIC;
data_reg_we : in STD_LOGIC_VECTOR(0 downto 0);
data_reg_commit_write : in STD_LOGIC;
data_reg_commit_read : in STD_LOGIC;
skip_count_write : out STD_LOGIC_VECTOR(15 downto 0);
skip_count_read : out STD_LOGIC_VECTOR(15 downto 0);
current_buffer_index : out STD_LOGIC_VECTOR(3 downto 0);
node_address : in STD_LOGIC_VECTOR(3 downto 0);
is_master : in STD_LOGIC;
clk_50M : in STD_LOGIC;
pause : in STD_LOGIC;
pause_ack : out STD_LOGIC;
reset : in STD_LOGIC;
system_halt : out STD_LOGIC;
reset_counter : out STD_LOGIC_VECTOR(31 downto 0);
packet_counter : out STD_LOGIC_VECTOR(31 downto 0);
error_counter : out STD_LOGIC_VECTOR(31 downto 0);
async_in_data : in STD_LOGIC_VECTOR(37 downto 0);
async_out_data : out STD_LOGIC_VECTOR(37 downto 0);
async_in_clk : in STD_LOGIC;
async_out_clk : in STD_LOGIC;
async_in_full : out STD_LOGIC;
async_out_empty : out STD_LOGIC;
async_in_wr_en : in STD_LOGIC;
async_out_rd_en : in STD_LOGIC;
async_out_valid : out STD_LOGIC);
end tal_top;
 
architecture Behavioral of tal_top is
constant ASYNC_M2S_VALID : STD_LOGIC_VECTOR := "1001";
constant ASYNC_S2M_VALID : STD_LOGIC_VECTOR := "1010";
constant ASYNC_M2S_INVALID : STD_LOGIC_VECTOR := "0001";
constant ASYNC_S2M_INVALID : STD_LOGIC_VECTOR := "0010";
 
type SLV_STATES is (IDLE, ADDR_1, ADDR_2, ADDR_3, DATA, ASYNC_CTL_HEAD, ASYNC, ASYNC_CTL_TAIL);
type MST_TRN_STATES is (IDLE, ADDR_1, ADDR_2, ADDR_3, DATA, ASYNC_CTL_HEAD, ASYNC, ASYNC_CTL_TAIL, WAIT_STATE);
type MST_REC_STATES is (IDLE, ADDR_1, ADDR_2, ADDR_3, DATA, ASYNC_CTL_HEAD, ASYNC, ASYNC_CTL_TAIL);
signal slv_state : SLV_STATES := IDLE;
signal next_slv_state : SLV_STATES := IDLE;
signal mst_trn_state : MST_TRN_STATES := IDLE;
signal next_mst_trn_state : MST_TRN_STATES := IDLE;
 
signal mst_rec_state : MST_REC_STATES := IDLE;
signal next_mst_rec_state : MST_REC_STATES := IDLE;
signal slave_reset : STD_LOGIC;
signal master_reset : STD_LOGIC;
signal last_data_in_strobe : STD_LOGIC := '0';
 
signal current_user_reg_write : STD_LOGIC := '0';
signal current_sys_reg_write : STD_LOGIC := '1';
 
signal current_user_reg_read : STD_LOGIC := '0';
signal current_sys_reg_read : STD_LOGIC := '1';
signal skip_counter_write : STD_LOGIC_VECTOR(15 downto 0) := "0000000000000000";
signal skip_counter_read : STD_LOGIC_VECTOR(15 downto 0) := "0000000000000000";
signal write_commited : STD_LOGIC := '0';
signal read_commited : STD_LOGIC := '0';
signal last_commit_write : STD_LOGIC;
signal last_commit_read : STD_LOGIC;
signal data_reg_addr_user : STD_LOGIC_VECTOR(10 downto 0) := "00000000000";
signal sync_ok : STD_LOGIC := '1';
signal last_sync_strobe : STD_LOGIC := '0';
 
signal slv_current_node : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal slv_current_reg : STD_LOGIC_VECTOR(2 downto 0) := "000";
signal slv_current_rw : STD_LOGIC := '0'; --Read: '0', Write: '1'
signal slv_current_var : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal slv_current_reg_ok : STD_LOGIC;
signal slv_current_node_address : STD_LOGIC_VECTOR(3 downto 0);
signal slv_current_node_id : STD_LOGIC_VECTOR(3 downto 0);
signal slv_current_node_read_reg_enable : STD_LOGIC_VECTOR(7 downto 0);
signal slv_current_node_write_reg_enable : STD_LOGIC_VECTOR(7 downto 0);
 
signal mst_trn_current_node : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal mst_trn_current_reg : STD_LOGIC_VECTOR(2 downto 0) := "000";
signal mst_trn_current_rw : STD_LOGIC := '0'; --Read: '0', Write: '1'
signal mst_trn_current_var : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal mst_trn_current_reg_ok : STD_LOGIC;
signal mst_trn_current_node_address : STD_LOGIC_VECTOR(3 downto 0);
signal mst_trn_current_node_id : STD_LOGIC_VECTOR(3 downto 0);
signal mst_trn_current_node_read_reg_enable : STD_LOGIC_VECTOR(7 downto 0);
signal mst_trn_current_node_write_reg_enable: STD_LOGIC_VECTOR(7 downto 0);
 
signal mst_rec_current_node : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal mst_rec_current_reg : STD_LOGIC_VECTOR(2 downto 0) := "000";
signal mst_rec_current_rw : STD_LOGIC := '0'; --Read: '0', Write: '1'
signal mst_rec_current_var : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal mst_rec_current_reg_ok : STD_LOGIC;
signal mst_rec_current_node_address : STD_LOGIC_VECTOR(3 downto 0);
signal mst_rec_current_node_id : STD_LOGIC_VECTOR(3 downto 0);
signal mst_rec_current_node_read_reg_enable : STD_LOGIC_VECTOR(7 downto 0);
signal mst_rec_current_node_write_reg_enable: STD_LOGIC_VECTOR(7 downto 0);
 
signal data_in_buffer : STD_LOGIC_VECTOR(7 downto 0);
signal waiting_for_trn : STD_LOGIC;
 
signal data_reg_internal_clk : STD_LOGIC;
signal data_reg_internal_data_in : STD_LOGIC_VECTOR(7 downto 0);
signal data_reg_internal_addr : STD_LOGIC_VECTOR(12 downto 0);
signal data_reg_internal_data_out : STD_LOGIC_VECTOR(7 downto 0);
signal data_reg_internal_we : STD_LOGIC_VECTOR(0 downto 0);
 
signal async_rd_en : STD_LOGIC;
signal async_wr_en : STD_LOGIC;
signal async_rd_data : STD_LOGIC_VECTOR(37 downto 0);
signal async_wr_data : STD_LOGIC_VECTOR(37 downto 0);
signal async_full : STD_LOGIC;
signal async_empty : STD_LOGIC;
signal async_valid : STD_LOGIC;
signal async_buffer : STD_LOGIC_VECTOR(95 downto 0);
signal async_trn_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_trn_valid_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_rec_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_rec_valid_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_trn_target : STD_LOGIC_VECTOR(3 downto 0);
signal async_rec_target : STD_LOGIC_VECTOR(3 downto 0);
signal async_trn_done : STD_LOGIC;
signal async_wr_be : STD_LOGIC_VECTOR(1 downto 0);
signal async_rec_valid : STD_LOGIC;
 
signal async_slv_buffer : STD_LOGIC_VECTOR(95 downto 0);
signal async_slv_trn_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_slv_trn_valid_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_slv_rec_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_slv_rec_valid_byte_count : STD_LOGIC_VECTOR(3 downto 0);
signal async_slv_trn_target : STD_LOGIC_VECTOR(3 downto 0);
signal async_slv_rec_target : STD_LOGIC_VECTOR(3 downto 0);
signal async_slv_trn_done : STD_LOGIC;
signal async_slv_wr_be : STD_LOGIC_VECTOR(1 downto 0);
signal async_slv_valid : STD_LOGIC;
signal async_slv_broadcast : STD_LOGIC;
 
 
signal read_done : STD_LOGIC;
signal read_progress : STD_LOGIC_VECTOR(1 downto 0);
signal write_done : STD_LOGIC;
signal write_progress : STD_LOGIC_VECTOR(1 downto 0);
signal slv_progress : STD_LOGIC_VECTOR(1 downto 0);
signal rw_arbiter : STD_LOGIC;
 
signal reset_counter_int : STD_LOGIC_VECTOR(31 downto 0) := "00000000000000000000000000000000";
signal packet_counter_int : STD_LOGIC_VECTOR(31 downto 0) := "00000000000000000000000000000000";
signal error_counter_int : STD_LOGIC_VECTOR(31 downto 0) := "00000000000000000000000000000000";
 
signal reset_counted : STD_LOGIC := '0';
 
component data_reg is
Port ( clka : in STD_LOGIC;
dina : in STD_LOGIC_VECTOR(7 downto 0);
addra : in STD_LOGIC_VECTOR(12 downto 0);
wea : in STD_LOGIC_VECTOR(0 downto 0);
douta : out STD_LOGIC_VECTOR(7 downto 0);
clkb : in STD_LOGIC;
dinb : in STD_LOGIC_VECTOR(31 downto 0);
addrb : in STD_LOGIC_VECTOR(10 downto 0);
web : in STD_LOGIC_VECTOR(0 downto 0);
doutb : out STD_LOGIC_VECTOR(31 downto 0));
end component;
 
component async_fifo is
Port ( rst : in STD_LOGIC;
wr_clk : in STD_LOGIC;
rd_clk : in STD_LOGIC;
din : in STD_LOGIC_VECTOR(37 downto 0);
wr_en : in STD_LOGIC;
rd_en : in STD_LOGIC;
dout : out STD_LOGIC_VECTOR(37 downto 0);
full : out STD_LOGIC;
empty : out STD_LOGIC;
valid : out STD_LOGIC);
end component;
 
begin
 
data_reg_inst : data_reg
Port map ( clka => data_reg_internal_clk,
dina => data_reg_internal_data_in,
addra => data_reg_internal_addr,
wea => data_reg_internal_we,
douta => data_reg_internal_data_out,
clkb => data_reg_clk,
dinb => data_reg_data_in,
addrb => data_reg_addr_user,
web => data_reg_we,
doutb => data_reg_data_out);
async_enabled:
if(disable_async = '0') generate
in_fifo : async_fifo
Port map ( rst => reset,
wr_clk => async_in_clk,
rd_clk => clk_50M,
din => async_in_data,
wr_en => async_in_wr_en,
rd_en => async_rd_en,
dout => async_rd_data,
full => async_in_full,
empty => async_empty,
valid => async_valid);
 
out_fifo : async_fifo
Port map ( rst => reset,
wr_clk => clk_50M,
rd_clk => async_out_clk,
din => async_wr_data,
wr_en => async_wr_en,
rd_en => async_out_rd_en,
dout => async_out_data,
full => async_full,
empty => async_out_empty,
valid => async_out_valid);
end generate;
 
async_disabled:
if(disable_async = '1') generate
async_rd_data <= (others => '0');
async_in_full <= '1';
async_empty <= '1';
async_valid <= '0';
async_out_data <= (others => '0');
async_full <= '1';
async_out_empty <= '1';
async_out_valid <= '0';
end generate;
data_reg_addr_user <= current_user_reg_write & data_reg_addr when --Create the address for the data register depending on the current buffer selection...
(((data_reg_addr(9 downto 6) = node_id) and data_reg_addr(2) = '0') or
(not(data_reg_addr(9 downto 6) = node_id) and data_reg_addr(2) = '1')) else
current_user_reg_read & data_reg_addr;
 
slave_reset <= (reset or is_master) or disable_slave; --The disable switches work by simply making sure that the slave- or master-reset is '1' always
master_reset <= (reset or not is_master) or disable_master; --XST will thus be able to optimize most of the slave- or master-functionality away...:)
 
error_counter <= error_counter_int;
packet_counter <= packet_counter_int;
reset_counter <= reset_counter_int;
 
skip_count_write <= skip_counter_write;
skip_count_read <= skip_counter_read;
current_buffer_index <= current_user_reg_write & current_user_reg_read & current_sys_reg_write & current_sys_reg_read;
 
force_packet_error <= (packet_error and not is_master) and not reset; --If we are forwarding a packet (slave only), and the current packet has an error, make sure that the packet is poisoned...
 
process(clk_50M)
begin
if(clk_50M = '1' and clk_50M'EVENT) then
if(reset = '1') then
write_commited <= '0';
read_commited <= '0';
skip_counter_write <= "0000000000000000";
skip_counter_read <= "0000000000000000";
system_halt <= '0';
sync_ok <= '1'; --Make sure that the system starts automagically when it exits reset
pause_ack <= '0';
if(reset_counted = '0') then
reset_counter_int <= reset_counter_int + 1;
reset_counted <= '1';
end if;
else
reset_counted <= '0';
end if;
if(data_reg_commit_write = '1' and last_commit_write = '0') then
write_commited <= '1';
end if;
 
if(data_reg_commit_read = '1' and last_commit_read = '0') then
read_commited <= '1';
end if;
 
if((sync_strobe = '1') and (last_sync_strobe = '0')) then
if(write_commited = '1' and packet_error = '0') then --Handle the doublebuffering for the write buffers
if(current_user_reg_write = '1') then
current_user_reg_write <= '0';
else
current_user_reg_write <= '1';
end if;
if(current_sys_reg_write = '1') then
current_sys_reg_write <= '0';
else
current_sys_reg_write <= '1';
end if;
write_commited <= '0';
skip_counter_write <= "0000000000000000";
else
skip_counter_write <= skip_counter_write + 1;
end if;
 
if(read_commited = '1' and packet_error = '0') then --Handle the doublebuffering for the read buffers
if(current_user_reg_read = '1') then
current_user_reg_read <= '0';
else
current_user_reg_read <= '1';
end if;
if(current_sys_reg_read = '1') then
current_sys_reg_read <= '0';
else
current_sys_reg_read <= '1';
end if;
read_commited <= '0';
skip_counter_read <= "0000000000000000";
else
skip_counter_read <= skip_counter_read + 1;
end if;
sync_ok <= '1';
packet_counter_int <= packet_counter_int + 1;
if(packet_error = '1') then
error_counter_int <= error_counter_int + 1;
end if;
 
if(pause = '1' and is_master = '1') then --Handle pause functionality
pause_ack <= '1';
else
pause_ack <= '0';
end if;
end if;
if(((skip_counter_write > max_skipped_writes) and not(max_skipped_writes = 0)) or --The system only uses the skip counters if they're different from 0. If 0, an unlimited number of skips are allowed...
((skip_counter_read > max_skipped_reads) and not (max_skipped_reads = 0))) then
system_halt <= '1';
end if;
async_wr_en <= '0';
------------------------------------------------------------------------
-- Slave synchronous part
------------------------------------------------------------------------
if(slave_reset = '1') then
slv_state <= IDLE;
slv_current_node <= "0000";
slv_current_rw <= '0';
slv_current_var <= "0000";
async_slv_buffer <= (others => '0');
async_slv_trn_byte_count <= (others => '0');
async_slv_trn_valid_byte_count <= (others => '0');
async_slv_rec_byte_count <= (others => '0');
async_slv_rec_valid_byte_count <= (others => '0');
async_slv_trn_target <= (others => '0');
async_slv_rec_target <= (others => '0');
async_slv_trn_done <= '0';
async_slv_wr_be <= (others => '0');
async_slv_valid <= '0';
async_slv_broadcast <= '0';
slv_progress <= "00";
else
slv_state <= next_slv_state;
case slv_state is
when IDLE =>
slv_current_node <= "0000";
slv_current_rw <= '0';
slv_current_var <= "0000";
data_out_strobe <= '0';
data_out_enable <= '0';
async_slv_buffer <= (others => '0');
async_slv_trn_byte_count <= (others => '0');
async_slv_trn_valid_byte_count <= (others => '0');
async_slv_rec_byte_count <= (others => '0');
async_slv_rec_valid_byte_count <= (others => '0');
async_slv_trn_target <= (others => '0');
async_slv_rec_target <= (others => '0');
async_slv_trn_done <= '0';
async_slv_wr_be <= (others => '0');
async_slv_valid <= '0';
async_slv_broadcast <= '0';
slv_progress <= "00";
when ADDR_1 => --Retreive network register entry for node
network_reg_addr <= slv_current_node;
network_reg_clk <= '0';
sync_ok <= '0';
when ADDR_2 =>
network_reg_clk <= '1';
when ADDR_3 =>
network_reg_clk <= '0';
slv_current_node_address <= network_reg_data(7 downto 4);
slv_current_node_id <= network_reg_data(3 downto 0);
slv_current_node_read_reg_enable <= network_reg_data(15 downto 8);
slv_current_node_write_reg_enable <= network_reg_data(23 downto 16);
slv_current_rw <= '0';
slv_current_var <= "0000";
when DATA => --Receive, store, and forward packet
data_out_enable <= '1';
if(slv_current_reg_ok = '0') then --No more registers for this part
if(slv_current_rw = '0') then --If read registers are currently selected,
slv_current_rw <= '1'; --then switch to write
else --else the node is done,
slv_current_rw <= '0';
slv_current_node <= slv_current_node + 1; --so go to the next node...
slv_current_var <= "0000";
end if;
else
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
if(slv_current_node = node_address) then
if(slv_current_rw = '1') then --Ignore the Read registers from this node, we're only interested in the write registers...
data_reg_internal_addr <= current_sys_reg_read & slv_current_node_id & slv_current_reg & '1' & slv_current_var;
data_reg_internal_data_in <= data_in;
data_reg_internal_we <= "1";
data_reg_internal_clk <= '0';
data_out <= data_reg_internal_data_out;
data_out_strobe <= '1';
else
data_out <= data_in;
data_out_strobe <= '1';
end if;
else
data_reg_internal_addr <= current_sys_reg_read & slv_current_node_id & slv_current_reg & slv_current_rw & slv_current_var;
data_reg_internal_data_in <= data_in;
data_reg_internal_we <= "1";
data_reg_internal_clk <= '0';
data_out <= data_in;
data_out_strobe <= '1';
end if;
elsif(data_in_strobe = '0' and last_data_in_strobe = '1') then
if(not((slv_current_node = node_address) and (slv_current_rw = '0'))) then
data_reg_internal_clk <= '1';
end if;
data_out_strobe <= '0';
if(slv_current_var = "1111") then --All vars for this register read, set the reg_enable bit for this register to 0 to go to the next register
if(slv_current_rw = '0') then
slv_current_node_read_reg_enable(conv_integer(slv_current_reg)) <= '0';
else
slv_current_node_write_reg_enable(conv_integer(slv_current_reg)) <= '0';
end if;
end if;
slv_current_var <= slv_current_var + 1;
elsif((data_reg_internal_clk = '1') and (data_reg_internal_we = "1") and (data_in_strobe = '0')) then
data_reg_internal_clk <= '0';
data_reg_internal_addr <= current_sys_reg_write & slv_current_node_id & slv_current_reg & '0' & slv_current_var;
data_reg_internal_we <= "0";
elsif((data_reg_internal_clk = '0') and (data_reg_internal_we = "0") and (data_in_strobe = '0')) then
data_reg_internal_clk <= '1';
else
data_reg_internal_clk <= '0';
data_reg_internal_we <= "1";
end if;
end if;
when ASYNC_CTL_HEAD =>
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
if(data_in = ASYNC_M2S_VALID & NODE_ID) then --Data for this node only received
async_slv_valid <= '1';
if(async_valid = '1') then
data_out <= ASYNC_S2M_VALID & NODE_ID;
else
data_out <= ASYNC_S2M_INVALID & NODE_ID;
end if;
elsif(data_in = ASYNC_M2S_VALID & "0000") then --Broadcast received
data_out <= data_in;
async_slv_valid <= '1';
async_trn_done <= '1';
async_slv_broadcast <= '1';
else --Nothing of interest for this node
async_slv_valid <= '0';
data_out <= data_in;
end if;
 
data_out_strobe <= '1';
end if;
when ASYNC =>
data_out_strobe <= '0';
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
if(async_slv_valid = '0') then
data_out <= data_in;
data_out_strobe <= '1';
else
async_slv_buffer <= async_slv_buffer(87 downto 0) & data_in;
async_slv_rec_byte_count <= async_slv_rec_byte_count + 1;
if(async_valid = '1') then
if(async_slv_trn_byte_count = 0) then
async_slv_trn_target <= async_rd_data(35 downto 32);
end if;
else
async_slv_trn_done <= '1';
end if;
slv_progress <= "01";
end if;
elsif(slv_progress = "01") then --We'll only increase slv_progress if async_slv_valid is true, thus no need for a (redundant) check for validity here...
if(async_slv_trn_done = '0' and async_slv_trn_target = async_rd_data(35 downto 32)) then
case async_slv_trn_byte_count(1 downto 0) is
when "00" =>
data_out <= async_rd_data(31 downto 24);
if(async_rd_data(37 downto 36) = "00") then
async_slv_trn_done <= '1';
end if;
when "01" =>
data_out <= async_rd_data(23 downto 16);
if(async_rd_data(37 downto 36) = "01") then
async_slv_trn_done <= '1';
end if;
when "10" =>
data_out <= async_rd_data(15 downto 8);
if(async_rd_data(37 downto 36) = "10") then
async_slv_trn_done <= '1';
end if;
when "11" =>
data_out <= async_rd_data(7 downto 0);
when others =>
end case;
async_slv_trn_valid_byte_count <= async_slv_trn_valid_byte_count + 1;
else
data_out <= data_in;
async_slv_trn_done <= '1';
end if;
data_out_strobe <= '1';
async_slv_trn_byte_count <= async_slv_trn_byte_count + 1;
slv_progress <= "10";
elsif(slv_progress = "10") then
slv_progress <= "00";
end if;
when ASYNC_CTL_TAIL =>
data_out_strobe <= '0';
if(data_in_strobe = '1' and last_data_in_strobe = '0' and slv_progress = "00") then
if(async_slv_broadcast = '1') then
data_out <= data_in;
else
data_out <= async_slv_trn_valid_byte_count & NODE_ID;
end if;
data_out_strobe <= '1';
async_slv_rec_valid_byte_count <= data_in(7 downto 4) - 4;
async_slv_rec_target <= data_in(3 downto 0);
slv_progress <= "01";
if(data_in(7 downto 4) > 3) then
async_slv_wr_be <= "11";
else
async_slv_wr_be <= data_in(5 downto 4) - 1;
end if;
elsif(slv_progress = "01") then
data_out_strobe <= '0';
if((async_slv_rec_valid_byte_count > 8) and (async_slv_rec_valid_byte_count < 13)) then
slv_progress <= "11"; --Done
else
slv_progress <= "10"; --Delay one clock (we've got lots), to make sure we jump out if no data has been received (8 < async_rec_valid_byte_count < 13)
end if;
async_wr_en <= '0';
elsif(slv_progress = "10") then
async_wr_data <= async_slv_wr_be & async_slv_rec_target & async_slv_buffer(95 downto 64);
async_wr_en <= '1';
async_slv_buffer(95 downto 32) <= async_slv_buffer(63 downto 0);
async_slv_rec_valid_byte_count <= async_slv_rec_valid_byte_count - 4;
if(async_slv_rec_valid_byte_count > 3) then
async_slv_wr_be <= "11";
else
async_slv_wr_be <= async_slv_rec_valid_byte_count(1 downto 0) - 1;
end if;
slv_progress <= "01";
end if;
end case;
end if;
------------------------------------------------------------------------
-- Master TRN synchronous part
------------------------------------------------------------------------
if(master_reset = '1') then
mst_trn_state <= IDLE;
mst_trn_current_node <= "0000";
mst_trn_current_rw <= '0';
mst_trn_current_var <= "0000";
read_progress <= "00";
read_done <= '1';
async_trn_byte_count <= (others => '0');
async_trn_valid_byte_count <= (others => '0');
async_trn_done <= '0';
async_trn_target <= (others => '0');
else
mst_trn_state <= next_mst_trn_state;
case mst_trn_state is
when IDLE =>
mst_trn_current_node <= "0000";
mst_trn_current_rw <= '0';
mst_trn_current_var <= "0000";
data_out_strobe <= '0';
data_out_enable <= '0';
read_progress <= "00";
read_done <= '1';
async_trn_byte_count <= (others => '0');
async_trn_valid_byte_count <= (others => '0');
async_trn_done <= '0';
async_trn_target <= (others => '0');
when ADDR_1 => --Retreive network register entry for node
network_reg_addr <= mst_trn_current_node;
network_reg_clk <= '0';
sync_ok <= '0';
pause_ack <= '0';
when ADDR_2 =>
network_reg_clk <= '1';
when ADDR_3 =>
network_reg_clk <= '0';
mst_trn_current_node_address <= network_reg_data(7 downto 4);
mst_trn_current_node_id <= network_reg_data(3 downto 0);
mst_trn_current_node_read_reg_enable <= network_reg_data(15 downto 8);
mst_trn_current_node_write_reg_enable <= network_reg_data(23 downto 16);
mst_trn_current_rw <= '0';
mst_trn_current_var <= "0000";
when DATA => --Receive, store, and forward packet
data_out_enable <= '1';
if(mst_trn_current_reg_ok = '0') then --No more registers for this part
if(mst_trn_current_rw = '0') then --If read registers are currently selected,
mst_trn_current_rw <= '1'; --then switch to write
else --else the node is done,
mst_trn_current_rw <= '0';
mst_trn_current_node <= mst_trn_current_node + 1; --so go to the next node...
mst_trn_current_var <= "0000";
end if;
else
if(read_progress = "00" and write_done = '1' and buffer_full = '0' and rw_arbiter = '0') then
if(mst_trn_current_rw = '0' and not(mst_trn_current_node = node_address)) then
data_reg_internal_addr <= current_sys_reg_read & mst_trn_current_node_id & mst_trn_current_reg & mst_trn_current_rw & mst_trn_current_var;
else
data_reg_internal_addr <= current_sys_reg_write & mst_trn_current_node_id & mst_trn_current_reg & mst_trn_current_rw & mst_trn_current_var;
end if;
data_reg_internal_we <= "0";
data_reg_internal_clk <= '0';
read_progress <= "01";
read_done <= '0';
elsif(read_progress = "01") then
data_reg_internal_clk <= '1';
read_progress <= "10";
elsif(read_progress = "10") then
data_reg_internal_clk <= '0';
data_out <= data_reg_internal_data_out;
data_out_strobe <= '1';
read_progress <= "11";
read_done <= '1';
elsif(read_progress = "11") then
data_out_strobe <= '0';
read_progress <= "00";
 
if(mst_trn_current_var = "1111") then --All vars for this register read, set the reg_enable bit for this register to 0 to go to the next register
if(mst_trn_current_rw = '0') then
mst_trn_current_node_read_reg_enable(conv_integer(mst_trn_current_reg)) <= '0';
else
mst_trn_current_node_write_reg_enable(conv_integer(mst_trn_current_reg)) <= '0';
end if;
end if;
mst_trn_current_var <= mst_trn_current_var + 1;
end if;
end if;
when ASYNC_CTL_HEAD =>
if(buffer_full = '0' and read_progress <= "00") then
if(async_valid = '1') then
async_trn_target <= async_rd_data(35 downto 32);
data_out <= ASYNC_M2S_VALID & async_rd_data(35 downto 32);
else
data_out <= ASYNC_M2S_INVALID & "0000";
async_trn_done <= '1';
end if;
data_out_strobe <= '1';
read_progress <= "01";
else
data_out_strobe <= '0';
end if;
when ASYNC =>
data_out_strobe <= '0';
if(read_progress = "00") then
read_progress <= "01";
elsif(read_progress = "01" and buffer_full = '0') then
if(async_valid = '0') then
async_trn_done <= '1';
end if;
read_progress <= "10";
elsif(read_progress = "10") then
if(async_trn_done = '0' and async_trn_target = async_rd_data(35 downto 32)) then
case async_trn_byte_count(1 downto 0) is
when "00" =>
data_out <= async_rd_data(31 downto 24);
if(async_rd_data(37 downto 36) = "00") then
async_trn_done <= '1';
end if;
when "01" =>
data_out <= async_rd_data(23 downto 16);
if(async_rd_data(37 downto 36) = "01") then
async_trn_done <= '1';
end if;
when "10" =>
data_out <= async_rd_data(15 downto 8);
if(async_rd_data(37 downto 36) = "10") then
async_trn_done <= '1';
end if;
when "11" =>
data_out <= async_rd_data(7 downto 0);
when others =>
end case;
async_trn_valid_byte_count <= async_trn_valid_byte_count + 1;
else
data_out <= (others => '0');
async_trn_done <= '1';
end if;
data_out_strobe <= '1';
async_trn_byte_count <= async_trn_byte_count + 1;
read_progress <= "11";
elsif(read_progress = "11") then
data_out_strobe <= '0';
read_progress <= "00";
end if;
when ASYNC_CTL_TAIL =>
if(read_progress = "00" and buffer_full = '0') then
data_out <= async_trn_valid_byte_count & async_trn_target;
data_out_strobe <= '1';
read_progress <= "01";
elsif(read_progress = "01") then
data_out_strobe <= '0';
read_progress <= "00";
end if;
when WAIT_STATE =>
--Just do nothing...
end case;
end if;
 
------------------------------------------------------------------------
-- Master REC synchronous part
------------------------------------------------------------------------
if(master_reset = '1') then
mst_rec_state <= IDLE;
mst_rec_current_node <= "0000";
mst_rec_current_rw <= '0';
mst_rec_current_var <= "0000";
write_progress <= "00";
write_done <= '1';
async_rec_byte_count <= (others => '0');
async_rec_valid_byte_count <= (others => '0');
async_rec_target <= (others => '0');
async_wr_be <= "00";
async_rec_valid <= '0';
else
mst_rec_state <= next_mst_rec_state;
case mst_rec_state is
when IDLE =>
mst_rec_current_node <= "0000";
mst_rec_current_rw <= '0';
mst_rec_current_var <= "0000";
write_progress <= "00";
write_done <= '1';
async_rec_byte_count <= (others => '0');
async_rec_valid_byte_count <= (others => '0');
async_rec_target <= (others => '0');
async_wr_be <= "00";
async_rec_valid <= '0';
when ADDR_1 => --Retreive network register entry for node
network_reg_addr <= mst_rec_current_node;
network_reg_clk <= '0';
sync_ok <= '0';
when ADDR_2 =>
network_reg_clk <= '1';
when ADDR_3 =>
network_reg_clk <= '0';
mst_rec_current_node_address <= network_reg_data(7 downto 4);
mst_rec_current_node_id <= network_reg_data(3 downto 0);
mst_rec_current_node_read_reg_enable <= network_reg_data(15 downto 8);
mst_rec_current_node_write_reg_enable <= network_reg_data(23 downto 16);
mst_rec_current_rw <= '0';
mst_rec_current_var <= "0000";
when DATA => --Receive, store, and forward packet
if(mst_rec_current_reg_ok = '0') then --No more registers for this part
if(waiting_for_trn = '0') then
if(mst_rec_current_rw = '0') then --If read registers are currently selected,
mst_rec_current_rw <= '1'; --then switch to write
else --else the node is done,
mst_rec_current_rw <= '0';
mst_rec_current_node <= mst_rec_current_node + 1; --so go to the next node...
mst_rec_current_var <= "0000";
end if;
end if;
else
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
if((mst_rec_current_rw = '1') and not(mst_rec_current_node = node_address)) then --Ignore the Read registers for the nodes, we're only interested in the write registers, which hold the newest data...
data_in_buffer <= data_in;
write_progress <= "01";
end if;
elsif(data_in_strobe = '0' and last_data_in_strobe = '1') then
if(mst_rec_current_var = "1111") then --All vars for this register read, set the reg_enable bit for this register to 0 to go to the next register
if(mst_rec_current_rw = '0') then
mst_rec_current_node_read_reg_enable(conv_integer(mst_rec_current_reg)) <= '0';
else
mst_rec_current_node_write_reg_enable(conv_integer(mst_rec_current_reg)) <= '0';
end if;
end if;
mst_rec_current_var <= mst_rec_current_var + 1;
elsif(write_progress = "01" and write_done = '1' and read_done = '1' and rw_arbiter = '1') then
data_reg_internal_addr <= current_sys_reg_read & mst_rec_current_node_id & mst_rec_current_reg & '0' & mst_rec_current_var;
data_reg_internal_data_in <= data_in_buffer;
data_reg_internal_we <= "1";
data_reg_internal_clk <= '0';
write_done <= '0';
write_progress <= "10";
elsif(write_progress = "10" and write_done = '0') then
data_reg_internal_clk <= '1';
write_progress <= "11";
elsif(write_progress = "11" and write_done = '0') then
data_reg_internal_clk <= '0';
data_reg_internal_we <= "0";
write_done <= '1';
write_progress <= "00";
end if;
end if;
when ASYNC_CTL_HEAD =>
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
if(data_in(7 downto 4) = ASYNC_S2M_VALID) then
async_rec_valid <= '1';
else
async_rec_valid <= '0';
end if;
end if;
when ASYNC =>
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
async_buffer <= async_buffer(87 downto 0) & data_in;
async_rec_byte_count <= async_rec_byte_count + 1;
end if;
when ASYNC_CTL_TAIL =>
if(data_in_strobe = '1' and last_data_in_strobe = '0' and write_progress = "00") then
async_rec_valid_byte_count <= data_in(7 downto 4) - 4;
async_rec_target <= data_in(3 downto 0);
write_progress <= "01";
if(data_in(7 downto 4) > 3) then
async_wr_be <= "11";
else
async_wr_be <= data_in(5 downto 4) - 1;
end if;
elsif(write_progress = "01") then
write_progress <= "10"; --Delay one clock (we've got lots), to make sure we jump out if no data has been received (async_rec_valid_byte_count > 8)
async_wr_en <= '0';
elsif(write_progress = "10") then
async_wr_data <= async_wr_be & async_rec_target & async_buffer(95 downto 64);
async_wr_en <= '1';
async_buffer(95 downto 32) <= async_buffer(63 downto 0);
async_rec_valid_byte_count <= async_rec_valid_byte_count - 4;
if(async_rec_valid_byte_count > 3) then
async_wr_be <= "11";
else
async_wr_be <= async_rec_valid_byte_count(1 downto 0) - 1;
end if;
write_progress <= "01";
end if;
end case;
end if;
 
------------------------------------------------------------------------
last_data_in_strobe <= data_in_strobe;
last_sync_strobe <= sync_strobe;
last_commit_write <= data_reg_commit_write;
last_commit_read <= data_reg_commit_read;
if(rw_arbiter = '0') then
rw_arbiter <= '1';
else
rw_arbiter <= '0';
end if;
end if;
end process;
 
------------------------------------------------------------------------
-- Slave combinatorial next-state logic
------------------------------------------------------------------------
process(slv_state, data_in_enable, slv_current_reg_ok, slv_current_rw, slv_current_node, network_reg_data(7 downto 4), slv_progress, async_slv_trn_byte_count, async_slv_rec_valid_byte_count, data_in_strobe, last_data_in_strobe)
begin
case slv_state is
when IDLE =>
if(data_in_enable = '1') then
next_slv_state <= ADDR_1;
else
next_slv_state <= IDLE;
end if;
when ADDR_1 =>
next_slv_state <= ADDR_2;
when ADDR_2 =>
next_slv_state <= ADDR_3;
when ADDR_3 =>
if(slv_current_node = network_reg_data(7 downto 4)) then
next_slv_state <= DATA;
else
next_slv_state <= ASYNC_CTL_HEAD;
end if;
when DATA =>
if(data_in_enable = '0') then
next_slv_state <= IDLE;
elsif(slv_current_reg_ok = '0' and slv_current_rw = '1') then
next_slv_state <= ADDR_1;
else
next_slv_state <= DATA;
end if;
when ASYNC_CTL_HEAD =>
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
next_slv_state <= ASYNC;
else
next_slv_state <= ASYNC_CTL_HEAD;
end if;
when ASYNC =>
if(data_in_enable = '0') then
next_slv_state <= IDLE;
elsif(slv_progress = "00" and async_slv_trn_byte_count = 12) then
next_slv_state <= ASYNC_CTL_TAIL;
else
next_slv_state <= ASYNC;
end if;
when ASYNC_CTL_TAIL =>
if(data_in_enable = '0') then
next_slv_state <= IDLE;
else
next_slv_state <= ASYNC_CTL_TAIL;
end if;
end case;
end process;
 
------------------------------------------------------------------------
-- Master TRN combinatorial next-state logic
------------------------------------------------------------------------
process(mst_trn_state, mst_rec_state, sync_ok, data_in_enable, mst_trn_current_reg_ok, mst_trn_current_rw, mst_trn_current_node, network_reg_data(7 downto 4), pause, read_progress, async_trn_byte_count)
begin
case mst_trn_state is
when IDLE =>
if(mst_rec_state = IDLE and sync_ok = '1' and pause = '0') then --Make sure that we're done receiving and sync'ing before sending out the next packet (for synchronization, buffering and a couple of other reasons...)
next_mst_trn_state <= WAIT_STATE;
else
next_mst_trn_state <= IDLE;
end if;
when ADDR_1 =>
next_mst_trn_state <= ADDR_2;
when ADDR_2 =>
next_mst_trn_state <= ADDR_3;
when ADDR_3 =>
if(mst_trn_current_node = network_reg_data(7 downto 4)) then
next_mst_trn_state <= DATA;
else
next_mst_trn_state <= ASYNC_CTL_HEAD;
end if;
when DATA =>
if(mst_trn_current_reg_ok = '0' and mst_trn_current_rw = '1') then
next_mst_trn_state <= WAIT_STATE;
else
next_mst_trn_state <= DATA;
end if;
when ASYNC_CTL_HEAD =>
if(read_progress = "01") then
next_mst_trn_state <= ASYNC;
else
next_mst_trn_state <= ASYNC_CTL_HEAD;
end if;
when ASYNC =>
if(read_progress = "11" and async_trn_byte_count = 12) then
next_mst_trn_state <= ASYNC_CTL_TAIL;
else
next_mst_trn_state <= ASYNC;
end if;
when ASYNC_CTL_TAIL =>
if(read_progress = "01") then
next_mst_trn_state <= IDLE;
else
next_mst_trn_state <= ASYNC_CTL_TAIL;
end if;
when WAIT_STATE =>
if(mst_rec_state = DATA or mst_rec_state = IDLE) then
next_mst_trn_state <= ADDR_1;
else
next_mst_trn_state <= WAIT_STATE;
end if;
end case;
end process;
------------------------------------------------------------------------
-- Master REC combinatorial next-state logic
------------------------------------------------------------------------
process(mst_rec_state, mst_trn_state, data_in_enable, mst_rec_current_reg_ok, mst_rec_current_rw, mst_rec_current_node, network_reg_data(7 downto 4), async_rec_byte_count, async_rec_valid_byte_count, async_rec_valid, data_in_strobe, last_data_in_strobe)
begin
waiting_for_trn <= '0';
case mst_rec_state is
when IDLE =>
if(data_in_enable = '1' and (mst_trn_state = DATA or mst_trn_state = IDLE or mst_trn_state = ASYNC_CTL_HEAD or mst_trn_state = ASYNC or mst_trn_state = ASYNC_CTL_TAIL)) then
next_mst_rec_state <= ADDR_1;
else
next_mst_rec_state <= IDLE;
end if;
when ADDR_1 =>
next_mst_rec_state <= ADDR_2;
when ADDR_2 =>
next_mst_rec_state <= ADDR_3;
when ADDR_3 =>
if(mst_rec_current_node = network_reg_data(7 downto 4)) then
next_mst_rec_state <= DATA;
else
next_mst_rec_state <= ASYNC_CTL_HEAD;
end if;
when DATA =>
if(data_in_enable = '0') then
next_mst_rec_state <= IDLE;
elsif(mst_rec_current_reg_ok = '0' and mst_rec_current_rw = '1' and (mst_trn_state = DATA or mst_trn_state = IDLE or mst_trn_state = ASYNC_CTL_HEAD or mst_trn_state = ASYNC or mst_trn_state = ASYNC_CTL_TAIL)) then
next_mst_rec_state <= ADDR_1;
elsif(mst_rec_current_reg_ok = '0' and mst_rec_current_rw = '1') then
waiting_for_trn <= '1';
next_mst_rec_state <= DATA;
else
next_mst_rec_state <= DATA;
end if;
when ASYNC_CTL_HEAD =>
if(data_in_strobe = '1' and last_data_in_strobe = '0') then
next_mst_rec_state <= ASYNC;
else
next_mst_rec_state <= ASYNC_CTL_HEAD;
end if;
when ASYNC =>
if(async_rec_byte_count = 12) then
next_mst_rec_state <= ASYNC_CTL_TAIL;
else
next_mst_rec_state <= ASYNC;
end if;
when ASYNC_CTL_TAIL =>
if(((async_rec_valid_byte_count > 8) and (async_rec_valid_byte_count < 13)) or async_rec_valid <= '0') then
next_mst_rec_state <= IDLE;
else
next_mst_rec_state <= ASYNC_CTL_TAIL;
end if;
end case;
end process;
------------------------------------------------------------------------
-- Combinatorial logic for address generation
------------------------------------------------------------------------
async_rd_en <= '1' when (((mst_trn_state = ASYNC) and (read_progress = "11") and (async_trn_done = '0') and (async_trn_byte_count(1 downto 0) = "00")) or
((mst_trn_state = ASYNC_CTL_TAIL) and (read_progress = "01") and not (async_trn_valid_byte_count(1 downto 0) = "00")) or
((slv_state = ASYNC) and (slv_progress = "10") and (async_slv_trn_done = '0') and (async_slv_trn_byte_count(1 downto 0) = "00")) or
((slv_state = ASYNC_CTL_TAIL) and (data_in_strobe = '1') and (last_data_in_strobe = '0') and (slv_progress = "00") and not (async_slv_trn_valid_byte_count(1 downto 0) = "00"))) else '0';
 
slv_current_reg <= "111" when (slv_current_node_read_reg_enable(7) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(7) = '1' and slv_current_rw = '1') else
"110" when (slv_current_node_read_reg_enable(6) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(6) = '1' and slv_current_rw = '1') else
"101" when (slv_current_node_read_reg_enable(5) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(5) = '1' and slv_current_rw = '1') else
"100" when (slv_current_node_read_reg_enable(4) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(4) = '1' and slv_current_rw = '1') else
"011" when (slv_current_node_read_reg_enable(3) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(3) = '1' and slv_current_rw = '1') else
"010" when (slv_current_node_read_reg_enable(2) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(2) = '1' and slv_current_rw = '1') else
"001" when (slv_current_node_read_reg_enable(1) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(1) = '1' and slv_current_rw = '1') else
"000";
slv_current_reg_ok <= '0' when slv_current_reg = "000" and not ((slv_current_node_read_reg_enable(0) = '1' and slv_current_rw = '0') or
(slv_current_node_write_reg_enable(0) = '1' and slv_current_rw = '1')) else
'1';
 
 
mst_trn_current_reg <= "111" when (mst_trn_current_node_read_reg_enable(7) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(7) = '1' and mst_trn_current_rw = '1') else
"110" when (mst_trn_current_node_read_reg_enable(6) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(6) = '1' and mst_trn_current_rw = '1') else
"101" when (mst_trn_current_node_read_reg_enable(5) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(5) = '1' and mst_trn_current_rw = '1') else
"100" when (mst_trn_current_node_read_reg_enable(4) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(4) = '1' and mst_trn_current_rw = '1') else
"011" when (mst_trn_current_node_read_reg_enable(3) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(3) = '1' and mst_trn_current_rw = '1') else
"010" when (mst_trn_current_node_read_reg_enable(2) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(2) = '1' and mst_trn_current_rw = '1') else
"001" when (mst_trn_current_node_read_reg_enable(1) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(1) = '1' and mst_trn_current_rw = '1') else
"000";
mst_trn_current_reg_ok <= '0' when mst_trn_current_reg = "000" and not ((mst_trn_current_node_read_reg_enable(0) = '1' and mst_trn_current_rw = '0') or
(mst_trn_current_node_write_reg_enable(0) = '1' and mst_trn_current_rw = '1')) else
'1';
 
 
mst_rec_current_reg <= "111" when (mst_rec_current_node_read_reg_enable(7) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(7) = '1' and mst_rec_current_rw = '1') else
"110" when (mst_rec_current_node_read_reg_enable(6) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(6) = '1' and mst_rec_current_rw = '1') else
"101" when (mst_rec_current_node_read_reg_enable(5) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(5) = '1' and mst_rec_current_rw = '1') else
"100" when (mst_rec_current_node_read_reg_enable(4) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(4) = '1' and mst_rec_current_rw = '1') else
"011" when (mst_rec_current_node_read_reg_enable(3) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(3) = '1' and mst_rec_current_rw = '1') else
"010" when (mst_rec_current_node_read_reg_enable(2) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(2) = '1' and mst_rec_current_rw = '1') else
"001" when (mst_rec_current_node_read_reg_enable(1) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(1) = '1' and mst_rec_current_rw = '1') else
"000";
mst_rec_current_reg_ok <= '0' when mst_rec_current_reg = "000" and not ((mst_rec_current_node_read_reg_enable(0) = '1' and mst_rec_current_rw = '0') or
(mst_rec_current_node_write_reg_enable(0) = '1' and mst_rec_current_rw = '1')) else
'1';
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tdl_top.vhd
0,0 → 1,948
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 7/3/2010
-- Design Name: TosNet
-- Module Name: tdl_top - Behavioral
-- File Name: tdl_top.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The datalink layer implementation and physical layer wrapper
-- for the TosNet stack.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
--------------------------------------------------------------------------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.crcpack.all;
use work.commandpack.all;
 
entity tdl_top is
Port( node_id : in STD_LOGIC_VECTOR(3 downto 0);
reg_enable : in STD_LOGIC_VECTOR(7 downto 0);
watchdog_threshold : in STD_LOGIC_VECTOR(17 downto 0);
data_out_ext : out STD_LOGIC_VECTOR(7 downto 0);
data_out_strobe_ext : out STD_LOGIC;
data_out_enable_ext : out STD_LOGIC;
data_in_ext : in STD_LOGIC_VECTOR(7 downto 0);
data_in_strobe_ext : in STD_LOGIC;
data_in_enable_ext : in STD_LOGIC;
buffer_full : inout STD_LOGIC;
packet_error : inout STD_LOGIC;
force_packet_error : inout STD_LOGIC;
sync_strobe : inout STD_LOGIC;
online : out STD_LOGIC;
network_reg_addr : in STD_LOGIC_VECTOR(3 downto 0);
network_reg_data : out STD_LOGIC_VECTOR(31 downto 0);
network_reg_clk : in STD_LOGIC;
node_is_master : out STD_LOGIC;
node_address : out STD_LOGIC_VECTOR(3 downto 0);
clk_50M : in STD_LOGIC;
reset : in STD_LOGIC;
sig_in : in STD_LOGIC;
sig_out : inout STD_LOGIC);
end tdl_top;
 
architecture Behavioral of tdl_top is
attribute buffer_type: string;
attribute buffer_type of network_reg_clk: signal is "none"; --Make sure that the network register clock doesn't use a GCLK
 
type MAIN_STATES is (IDLE, MASTER_DSC, NET_DSC, REG_DSC, SYNC_DSC, DATA, ERROR);
type TX_STATES is (IDLE, DATA_CMD, DATA, CRC, ERROR);
type RX_STATES is (IDLE, CMD, DATA, CRC, ERROR);
 
signal main_state : MAIN_STATES := IDLE;
signal next_main_state : MAIN_STATES := IDLE;
signal tx_state : TX_STATES := IDLE;
signal next_tx_state : TX_STATES := IDLE;
signal rx_state : RX_STATES := IDLE;
signal next_rx_state : RX_STATES := IDLE;
signal tx_data : STD_LOGIC_VECTOR(7 downto 0);
signal tx_clk_en : STD_LOGIC;
signal tx_enable : STD_LOGIC;
signal tx_clk_div_reset : STD_LOGIC;
signal tx_clk_div_reset_ack : STD_LOGIC;
signal rx_data : STD_LOGIC_VECTOR(7 downto 0);
signal rx_error : STD_LOGIC;
signal rx_valid : STD_LOGIC;
signal rx_clk : STD_LOGIC;
signal rx_cmd_valid : STD_LOGIC;
signal rx_cmd_valid_buffer_1: STD_LOGIC;
signal rx_cmd_valid_buffer_2: STD_LOGIC;
 
signal main_counter : STD_LOGIC_VECTOR(7 downto 0) := "00000000";
signal last_tx_clk_en : STD_LOGIC;
signal last_rx_clk : STD_LOGIC;
signal last_data_in_strobe : STD_LOGIC;
signal input_buffer : STD_LOGIC_VECTOR(7 downto 0);
signal data_buffer : STD_LOGIC_VECTOR(7 downto 0) := (others => '0');
signal data_out_buffer_1 : STD_LOGIC_VECTOR(7 downto 0);
signal data_out_buffer_2 : STD_LOGIC_VECTOR(7 downto 0);
signal data_out_enable_buffer_1 : STD_LOGIC;
signal data_out_enable_buffer_2 : STD_LOGIC;
signal crcgen_rx_output_buffer : STD_LOGIC_VECTOR(7 downto 0);
signal data_buffer_counter : STD_LOGIC := '0';
signal input_available : STD_LOGIC;
signal internal_reset : STD_LOGIC := '0';
signal do_internal_reset : STD_LOGIC := '0';
signal watchdog_counter : STD_LOGIC_VECTOR(17 downto 0) := "000000000000000000";
signal master_dsc_enable : STD_LOGIC;
signal master_dsc_done : STD_LOGIC;
signal master_dsc_reset : STD_LOGIC;
signal is_master : STD_LOGIC;
signal net_dsc_enable : STD_LOGIC;
signal net_dsc_done : STD_LOGIC;
signal net_dsc_reset : STD_LOGIC;
signal node_count : STD_LOGIC_VECTOR(3 downto 0);
signal address : STD_LOGIC_VECTOR(3 downto 0);
signal reg_dsc_enable : STD_LOGIC;
signal reg_dsc_done : STD_LOGIC;
signal reg_dsc_reset : STD_LOGIC;
signal sync_dsc_enable : STD_LOGIC;
signal sync_dsc_done : STD_LOGIC;
signal sync_dsc_reset : STD_LOGIC;
signal data_enable : STD_LOGIC;
signal network_reg_internal_clk : STD_LOGIC;
signal network_reg_internal_write_data : STD_LOGIC_VECTOR(7 downto 0);
signal network_reg_internal_addr : STD_LOGIC_VECTOR(5 downto 0);
signal network_reg_internal_we : STD_LOGIC_VECTOR(0 downto 0);
signal network_reg_internal_read_data : STD_LOGIC_VECTOR(7 downto 0);
 
signal network_reg_internal_clk_net : STD_LOGIC;
signal network_reg_internal_write_data_net : STD_LOGIC_VECTOR(7 downto 0);
signal network_reg_internal_addr_net : STD_LOGIC_VECTOR(5 downto 0);
signal network_reg_internal_we_net : STD_LOGIC_VECTOR(0 downto 0);
 
signal network_reg_internal_clk_reg : STD_LOGIC;
signal network_reg_internal_write_data_reg : STD_LOGIC_VECTOR(7 downto 0);
signal network_reg_internal_addr_reg : STD_LOGIC_VECTOR(5 downto 0);
signal network_reg_internal_we_reg : STD_LOGIC_VECTOR(0 downto 0);
 
signal data_out : STD_LOGIC_VECTOR(7 downto 0);
signal data_out_strobe : STD_LOGIC;
signal data_out_enable : STD_LOGIC;
signal data_in : STD_LOGIC_VECTOR(7 downto 0);
signal data_in_master : STD_LOGIC_VECTOR(7 downto 0);
signal data_in_net : STD_LOGIC_VECTOR(7 downto 0);
signal data_in_reg : STD_LOGIC_VECTOR(7 downto 0);
signal data_in_sync : STD_LOGIC_VECTOR(7 downto 0);
signal data_in_strobe : STD_LOGIC;
signal data_in_strobe_master : STD_LOGIC;
signal data_in_strobe_net : STD_LOGIC;
signal data_in_strobe_reg : STD_LOGIC;
signal data_in_strobe_sync : STD_LOGIC;
 
signal data_in_enable : STD_LOGIC;
signal data_in_enable_master : STD_LOGIC;
signal data_in_enable_net : STD_LOGIC;
signal data_in_enable_reg : STD_LOGIC;
signal data_in_enable_sync : STD_LOGIC;
 
signal crcgen_tx_input : STD_LOGIC_VECTOR(7 downto 0);
signal crcgen_tx_output : STD_LOGIC_VECTOR(7 downto 0);
signal crcgen_tx_reset : STD_LOGIC;
signal crcgen_tx_clk : STD_LOGIC := '0';
signal crcgen_tx_clk_en : STD_LOGIC := '0';
signal crcgen_tx_clk_en_buffer : STD_LOGIC := '0';
signal crc_tx_done : STD_LOGIC := '0';
 
signal crcgen_rx_input : STD_LOGIC_VECTOR(7 downto 0);
signal crcgen_rx_output : STD_LOGIC_VECTOR(7 downto 0);
signal crcgen_rx_reset : STD_LOGIC;
signal crcgen_rx_clk : STD_LOGIC;
signal crcgen_rx_clk_en : STD_LOGIC;
signal tpl_reset : STD_LOGIC;
component tpl_tx is
Port ( data : in STD_LOGIC_VECTOR(7 downto 0);
clk_50M : in STD_LOGIC;
clk_data_en : out STD_LOGIC;
enable : in STD_LOGIC;
reset : in STD_LOGIC;
sig_out : out STD_LOGIC;
clk_div_reset : in STD_LOGIC;
clk_div_reset_ack : out STD_LOGIC);
end component;
 
component tpl_rx is
Port ( data : out STD_LOGIC_VECTOR(7 downto 0);
valid : out STD_LOGIC;
error : out STD_LOGIC;
clk_data : out STD_LOGIC;
clk_50M : in STD_LOGIC;
reset : in STD_LOGIC;
sig_in : in STD_LOGIC);
end component;
 
component tdl_app_master is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : in STD_LOGIC;
app_is_master : out STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end component;
component tdl_app_net is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : in STD_LOGIC;
app_is_master : in STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_network_reg_clk : out STD_LOGIC;
app_network_reg_addr : out STD_LOGIC_VECTOR(5 downto 0);
app_network_reg_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_we : inout STD_LOGIC_VECTOR(0 downto 0);
app_node_count : out STD_LOGIC_VECTOR(3 downto 0);
app_node_address : out STD_LOGIC_VECTOR(3 downto 0);
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end component;
component tdl_app_reg is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : in STD_LOGIC;
app_is_master : in STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_network_reg_clk : out STD_LOGIC;
app_network_reg_addr : out STD_LOGIC_VECTOR(5 downto 0);
app_network_reg_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_we : inout STD_LOGIC_VECTOR(0 downto 0);
app_node_count : in STD_LOGIC_VECTOR(3 downto 0);
app_node_address : in STD_LOGIC_VECTOR(3 downto 0);
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_reg_enable : in STD_LOGIC_VECTOR(7 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end component;
component tdl_app_sync is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_in_enable : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : out STD_LOGIC;
app_is_master : in STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_node_count : in STD_LOGIC_VECTOR(3 downto 0);
app_node_address : in STD_LOGIC_VECTOR(3 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end component;
component crcgen is
Port( reset : in STD_LOGIC;
clk : in STD_LOGIC;
clk_en : in STD_LOGIC;
Din : in STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
Xout : out STD_LOGIC_VECTOR(CRCDIM - 1 downto 0));
end component;
 
component network_register is
Port ( clka : in STD_LOGIC;
dina : in STD_LOGIC_VECTOR(7 downto 0);
addra : in STD_LOGIC_VECTOR(5 downto 0);
douta : out STD_LOGIC_VECTOR(7 downto 0);
wea : in STD_LOGIC_VECTOR(0 downto 0);
clkb : in STD_LOGIC;
dinb : in STD_LOGIC_VECTOR(31 downto 0);
addrb : in STD_LOGIC_VECTOR(3 downto 0);
web : in STD_LOGIC_VECTOR(0 downto 0);
doutb : out STD_LOGIC_VECTOR(31 downto 0));
end component;
 
begin
tpl_tx_inst : tpl_tx
Port map ( data => tx_data,
enable => tx_enable,
clk_50M => clk_50M,
clk_data_en => tx_clk_en,
reset => tpl_reset,
sig_out => sig_out,
clk_div_reset => tx_clk_div_reset,
clk_div_reset_ack => tx_clk_div_reset_ack);
tpl_rx_inst : tpl_rx
Port map ( data => rx_data,
valid => rx_valid,
error => rx_error,
clk_data => rx_clk,
clk_50M => clk_50M,
reset => tpl_reset,
sig_in => sig_in);
app_master_inst : tdl_app_master
Port map ( app_enable => master_dsc_enable,
app_data_in => data_out,
app_data_in_strobe => data_out_strobe,
app_data_out => data_in_master,
app_data_out_strobe => data_in_strobe_master,
app_data_out_enable => data_in_enable_master,
app_buffer_full => buffer_full,
app_packet_error => packet_error,
app_cmd_valid => rx_cmd_valid,
app_sync_strobe => sync_strobe,
app_is_master => is_master,
app_dsc_done => master_dsc_done,
app_node_id => node_id,
app_clk => clk_50M,
app_reset => master_dsc_reset);
 
app_net_inst : tdl_app_net
Port map ( app_enable => net_dsc_enable,
app_data_in => data_out,
app_data_in_strobe => data_out_strobe,
app_data_out => data_in_net,
app_data_out_strobe => data_in_strobe_net,
app_data_out_enable => data_in_enable_net,
app_buffer_full => buffer_full,
app_packet_error => packet_error,
app_cmd_valid => rx_cmd_valid,
app_sync_strobe => sync_strobe,
app_is_master => is_master,
app_dsc_done => net_dsc_done,
app_network_reg_clk => network_reg_internal_clk_net,
app_network_reg_data_in => network_reg_internal_read_data,
app_network_reg_data_out => network_reg_internal_write_data_net,
app_network_reg_addr => network_reg_internal_addr_net,
app_network_reg_we => network_reg_internal_we_net,
app_node_count => node_count,
app_node_address => address,
app_node_id => node_id,
app_clk => clk_50M,
app_reset => net_dsc_reset);
 
app_reg_inst : tdl_app_reg
Port map ( app_enable => reg_dsc_enable,
app_data_in => data_out,
app_data_in_strobe => data_out_strobe,
app_data_out => data_in_reg,
app_data_out_strobe => data_in_strobe_reg,
app_data_out_enable => data_in_enable_reg,
app_buffer_full => buffer_full,
app_packet_error => packet_error,
app_cmd_valid => rx_cmd_valid,
app_sync_strobe => sync_strobe,
app_is_master => is_master,
app_dsc_done => reg_dsc_done,
app_network_reg_clk => network_reg_internal_clk_reg,
app_network_reg_data_in => network_reg_internal_read_data,
app_network_reg_data_out => network_reg_internal_write_data_reg,
app_network_reg_addr => network_reg_internal_addr_reg,
app_network_reg_we => network_reg_internal_we_reg,
app_node_count => node_count,
app_node_address => address,
app_node_id => node_id,
app_reg_enable => reg_enable,
app_clk => clk_50M,
app_reset => reg_dsc_reset);
 
app_sync_inst : tdl_app_sync
Port map( app_enable => sync_dsc_enable,
app_data_in => data_out,
app_data_in_strobe => data_out_strobe,
app_data_in_enable => data_out_enable,
app_data_out => data_in_sync,
app_data_out_strobe => data_in_strobe_sync,
app_data_out_enable => data_in_enable_sync,
app_buffer_full => buffer_full,
app_packet_error => packet_error,
app_cmd_valid => rx_cmd_valid,
app_sync_strobe => sync_strobe,
app_is_master => is_master,
app_dsc_done => sync_dsc_done,
app_node_id => node_id,
app_node_count => node_count,
app_node_address => address,
app_clk => clk_50M,
app_reset => sync_dsc_reset);
crcgen_tx_inst : crcgen
Port map ( reset => crcgen_tx_reset,
clk => crcgen_tx_clk,
clk_en => crcgen_tx_clk_en,
Din => crcgen_tx_input,
Xout => crcgen_tx_output);
 
crcgen_rx_inst : crcgen
Port map ( reset => crcgen_rx_reset,
clk => crcgen_rx_clk,
clk_en => crcgen_rx_clk_en,
Din => crcgen_rx_input,
Xout => crcgen_rx_output);
 
crcgen_rx_clk <= clk_50M;
crcgen_rx_clk_en <= '1' when ((rx_clk = '1') and (last_rx_clk = '0')) else '0';
crcgen_rx_reset <= not rx_valid;
crcgen_rx_input <= rx_data;
 
crcgen_tx_clk <= clk_50M;
 
network_register_inst : network_register
Port map ( clka => network_reg_internal_clk,
dina => network_reg_internal_write_data,
addra => network_reg_internal_addr,
wea => network_reg_internal_we,
douta => network_reg_internal_read_data,
clkb => network_reg_clk,
dinb => "00000000000000000000000000000000",
addrb => network_reg_addr,
web => "0",
doutb => network_reg_data);
 
node_is_master <= is_master;
node_address <= address;
online <= data_enable;
process(clk_50M)
begin
if(clk_50M = '1' and clk_50M'EVENT) then
if(reset = '1') then
main_state <= IDLE;
tx_state <= IDLE;
rx_state <= IDLE;
watchdog_counter <= (others => '0');
else
main_state <= next_main_state;
if(data_in_strobe = '1' and last_data_in_strobe = '0' and data_in_enable = '1') then --The initial 8 bit input buffer
input_buffer <= data_in;
input_available <= '1';
end if;
if(tx_clk_en = '0' and input_available = '1') then --The main 8 bit input data buffer
if(data_buffer_counter = '0') then
data_buffer <= input_buffer;
data_buffer_counter <= '1';
input_available <= '0';
end if;
end if;
 
last_tx_clk_en <= tx_clk_en;
last_rx_clk <= rx_clk;
last_data_in_strobe <= data_in_strobe;
end if;
 
if(main_state = next_main_state) then
main_counter <= main_counter + 1;
else
main_counter <= "00000000";
end if;
 
case main_state is --Main state machine
when IDLE =>
master_dsc_enable <= '0';
net_dsc_enable <= '0';
reg_dsc_enable <= '0';
sync_dsc_enable <= '0';
data_enable <= '0';
master_dsc_reset <= '1';
net_dsc_reset <= '1';
reg_dsc_reset <= '1';
sync_dsc_reset <= '1';
input_buffer <= "00000000";
input_available <= '0';
data_buffer <= (others => '0');
data_buffer_counter <= '0';
watchdog_counter <= (others => '0');
internal_reset <= '0';
do_internal_reset <= '0';
if(main_counter < 42) then
tpl_reset <= '1';
else
tpl_reset <= '0';
end if;
when MASTER_DSC =>
master_dsc_enable <= '1';
net_dsc_enable <= '0';
reg_dsc_enable <= '0';
sync_dsc_enable <= '0';
data_enable <= '0';
master_dsc_reset <= '0';
net_dsc_reset <= '0';
reg_dsc_reset <= '0';
sync_dsc_reset <= '0';
internal_reset <= '0';
do_internal_reset <= '0';
when NET_DSC =>
master_dsc_enable <= '0';
net_dsc_enable <= '1';
reg_dsc_enable <= '0';
sync_dsc_enable <= '0';
data_enable <= '0';
when REG_DSC =>
master_dsc_enable <= '0';
net_dsc_enable <= '0';
reg_dsc_enable <= '1';
sync_dsc_enable <= '0';
data_enable <= '0';
when SYNC_DSC =>
master_dsc_enable <= '0';
net_dsc_enable <= '0';
reg_dsc_enable <= '0';
sync_dsc_enable <= '1';
data_enable <= '0';
when DATA =>
master_dsc_enable <= '0';
net_dsc_enable <= '0';
reg_dsc_enable <= '0';
sync_dsc_enable <= '1'; --Keep app_sync enabled to maintain the sync signal during operation
data_enable <= '1';
when ERROR =>
end case;
 
if(do_internal_reset = '1') then --Perform reset if requested internally...
internal_reset <= '1';
end if;
 
if(reset = '1' or internal_reset = '1') then
tx_state <= IDLE;
rx_state <= IDLE;
else
tx_state <= next_tx_state;
rx_state <= next_rx_state;
end if;
 
crcgen_tx_clk_en_buffer <= tx_clk_en;
crcgen_tx_clk_en <= crcgen_tx_clk_en_buffer;
 
if(tx_state = IDLE) then --This is used to optimize the jitter performance, by restarting the clock enable generation of the physical transmission layer, thus creating a better synchronization with the upper layers. Without, you risk waiting for tx_clk_en for a full 1.25 MHz clock cycle (800 ns) - by resetting the clock generation you wait 0 to 4 50 MHz clock cycles (max 80 ns) instead.
tx_clk_div_reset <= '0';
else
tx_clk_div_reset <= '1';
end if;
 
case tx_state is --Transmission state machine, this part needs to run on clk_50M to avoid multisourcing data_buffer
when IDLE =>
tx_data <= "00000000";
tx_enable <= '0';
crcgen_tx_reset <= '1';
crc_tx_done <= '0';
when DATA_CMD => --Transmit first nibble of DATA command
if(tx_clk_en = '1' and tx_clk_div_reset_ack = '1') then
tx_data <= CMD_DATA & "0000";
tx_enable <= '1';
crcgen_tx_reset <= '0';
crcgen_tx_input <= CMD_DATA & "0000";
end if;
when DATA => --Transmit contents of data buffer
if(tx_clk_en = '1' and tx_clk_div_reset_ack = '1') then
if(not(data_buffer_counter = '0')) then
tx_data <= data_buffer;
data_buffer_counter <= '0';
tx_enable <= '1';
 
crcgen_tx_reset <= '0'; --Load the transmitted byte into the CRC module
crcgen_tx_input <= data_buffer;
else --AARRG... Buffer underrun... do.. erm... something...
tx_enable <= '0';
end if;
elsif((data_in_enable = '0') and (data_buffer_counter = '0') and (crcgen_tx_clk_en = '1')) then --When data has been transmitted, load a byte containing all zeros into the CRC module
crcgen_tx_input <= "00000000";
crcgen_tx_clk_en_buffer <= '1';
crc_tx_done <= '1';
end if;
when CRC => --Transmit CRC checksum
if(tx_clk_en = '1') then
if(force_packet_error = '1') then
tx_data <= not crcgen_tx_output(7 downto 0); --Flip the CRC byte to make sure this packet produces a CRC error at the receiver... Of course you can neven be completely sure with a CRC check, but the probability is quite good;)
else
tx_data <= crcgen_tx_output(7 downto 0);
end if;
tx_enable <= '1';
end if;
when ERROR =>
end case;
 
 
if(rx_clk = '0' and last_rx_clk = '1') then
data_out <= data_out_buffer_2;
data_out_buffer_2 <= data_out_buffer_1;
data_out_enable <= data_out_enable_buffer_2;
data_out_enable_buffer_2 <= data_out_enable_buffer_1;
rx_cmd_valid <= rx_cmd_valid_buffer_2;
rx_cmd_valid_buffer_2 <= rx_cmd_valid_buffer_1;
end if;
 
case rx_state is
when IDLE =>
data_out_buffer_1 <= (others => '0');
data_out_buffer_2 <= (others => '0');
data_out_enable_buffer_1 <= '0';
data_out_enable_buffer_2 <= '0';
rx_cmd_valid_buffer_1 <= '0';
rx_cmd_valid_buffer_2 <= '0';
when CMD =>
watchdog_counter <= (others => '0'); --We are receiving something => The network is alive (in some way at least) => Reset the watchdog
if(rx_clk = '1' and last_rx_clk = '0') then
data_out_buffer_1 <= rx_data;
 
rx_cmd_valid_buffer_1 <= '0';
case main_state is
when IDLE =>
when MASTER_DSC =>
data_out_enable_buffer_1 <= '1';
case rx_data(7 downto 4) is --Check for a valid command
when CMD_MASTER_DSC =>
rx_cmd_valid_buffer_1 <= '1';
when CMD_MASTER_SET =>
rx_cmd_valid_buffer_1 <= '1';
when others =>
end case;
 
when NET_DSC =>
data_out_enable_buffer_1 <= '1';
 
case rx_data(7 downto 4) is --Check for a valid command
when CMD_MASTER_DSC => --If we receive master discovery packets, the network is being reset, so do the same here
do_internal_reset <= '1';
when CMD_NET_DSC =>
rx_cmd_valid_buffer_1 <= '1';
when CMD_NET_SET =>
rx_cmd_valid_buffer_1 <= '1';
when others =>
end case;
 
when REG_DSC =>
data_out_enable_buffer_1 <= '1';
 
case rx_data(7 downto 4) is --As above
when CMD_MASTER_DSC =>
do_internal_reset <= '1';
when CMD_REG_DSC =>
rx_cmd_valid_buffer_1 <= '1';
when CMD_REG_SET =>
rx_cmd_valid_buffer_1 <= '1';
when others =>
end case;
 
when SYNC_DSC =>
data_out_enable_buffer_1 <= '1';
 
case rx_data(7 downto 4) is --As above (this is actually a leftover from an early sync_dsc implementation, where the delay was measured at startup - currently a fixed delay is used instead, but it's nice to keep this around (also to be able to react to network resets during the sync_dsc state quickly))
when CMD_MASTER_DSC =>
do_internal_reset <= '1';
when CMD_SYNC_DSC =>
rx_cmd_valid_buffer_1 <= '1';
when CMD_SYNC_SET =>
rx_cmd_valid_buffer_1 <= '1';
when others =>
end case;
 
when DATA =>
data_out_enable_buffer_1 <= '0';
 
case rx_data(7 downto 4) is --As above
when CMD_MASTER_DSC =>
do_internal_reset <= '1';
when CMD_DATA =>
rx_cmd_valid_buffer_1 <= '1';
when others =>
end case;
 
when ERROR =>
end case;
end if;
when DATA =>
watchdog_counter <= (others => '0');
if(rx_clk = '1' and last_rx_clk = '0') then
data_out_enable_buffer_1 <= '1';
data_out_buffer_1 <= rx_data;
end if;
crcgen_rx_output_buffer <= crcgen_rx_output;
when CRC =>
data_out_enable_buffer_1 <= '0';
data_out_enable_buffer_2 <= '0';
if(crcgen_rx_output_buffer = "00000000") then
packet_error <= '0';
else
packet_error <= '1';
end if;
when ERROR =>
end case;
 
if(tx_clk_en = '0' and last_tx_clk_en = '1') then
watchdog_counter <= watchdog_counter + 1; --Increment the watchdog
if(watchdog_counter = watchdog_threshold) then --If the watchdog timer crosses the threshold, perform an internal reset
do_internal_reset <= '1';
end if;
end if;
end if;
end process;
data_out_strobe <= rx_clk and data_out_enable;
process(main_state, main_counter, master_dsc_done, net_dsc_done, reg_dsc_done, sync_dsc_done, data_buffer_counter, internal_reset)
begin
case main_state is
when IDLE =>
if(main_counter = 100 and data_buffer_counter = '0') then
next_main_state <= MASTER_DSC;
else
next_main_state <= IDLE;
end if;
when MASTER_DSC =>
if(internal_reset = '1') then
next_main_state <= IDLE;
elsif(master_dsc_done = '1' and data_buffer_counter = '0') then
next_main_state <= NET_DSC;
else
next_main_state <= MASTER_DSC;
end if;
when NET_DSC =>
if(internal_reset = '1') then
next_main_state <= IDLE;
elsif(net_dsc_done = '1' and data_buffer_counter = '0') then
next_main_state <= REG_DSC;
else
next_main_state <= NET_DSC;
end if;
when REG_DSC =>
if(internal_reset = '1') then
next_main_state <= IDLE;
elsif(reg_dsc_done = '1' and data_buffer_counter = '0') then
next_main_state <= SYNC_DSC;
else
next_main_state <= REG_DSC;
end if;
when SYNC_DSC =>
if(internal_reset = '1') then
next_main_state <= IDLE;
elsif(sync_dsc_done = '1' and data_buffer_counter = '0') then
next_main_state <= DATA;
else
next_main_state <= SYNC_DSC;
end if;
when DATA =>
if(internal_reset = '1') then
next_main_state <= IDLE;
else
next_main_state <= DATA;
end if;
when ERROR =>
if(internal_reset = '1') then
next_main_state <= IDLE;
else
next_main_state <= ERROR;
end if;
when others =>
next_main_state <= ERROR;
end case;
end process;
 
process(tx_state, data_in_enable, data_buffer_counter, main_state, crc_tx_done, tx_clk_en, tx_enable)
begin
case tx_state is
when IDLE =>
if(data_buffer_counter = '0') then
next_tx_state <= IDLE;
else
if(main_state = DATA) then
next_tx_state <= DATA_CMD;
else
next_tx_state <= DATA;
end if;
end if;
when DATA_CMD =>
if(tx_enable = '1') then
next_tx_state <= DATA;
else
next_tx_state <= DATA_CMD;
end if;
when DATA =>
if(crc_tx_done = '1') then
next_tx_state <= CRC;
else
next_tx_state <= DATA;
end if;
when CRC =>
if(crc_tx_done = '1' and tx_clk_en = '1') then
next_tx_state <= IDLE;
else
next_tx_state <= CRC;
end if;
when ERROR =>
next_tx_state <= IDLE;
end case;
end process;
 
 
process(rx_state, rx_valid, rx_data, rx_error, rx_clk, last_rx_clk) --Receive state machine
begin
case rx_state is
when IDLE =>
if(rx_valid = '1') then
if(rx_error = '1') then
next_rx_state <= ERROR;
else
next_rx_state <= CMD;
end if;
else
next_rx_state <= IDLE;
end if;
when CMD =>
if(rx_clk = '1' and last_rx_clk = '0') then
if(rx_valid = '1') then
if(rx_error = '1') then
next_rx_state <= ERROR;
else
next_rx_state <= DATA;
end if;
else
next_rx_state <= CRC;
end if;
else
next_rx_state <= CMD;
end if;
when DATA =>
if(rx_clk = '1' and last_rx_clk = '0') then
if(rx_valid = '1') then
if(rx_error = '1') then
next_rx_state <= ERROR;
else
next_rx_state <= DATA;
end if;
else
next_rx_state <= CRC;
end if;
else
next_rx_state <= DATA;
end if;
when CRC =>
next_rx_state <= IDLE;
when ERROR =>
next_rx_state <= IDLE;
end case;
end process;
 
 
 
buffer_full <= '1' when (data_buffer_counter = '1') or (input_available = '1') else '0';
 
--TosNet protocol interface input multiplexing
data_in <= data_in_master when master_dsc_enable = '1' else
data_in_net when net_dsc_enable = '1' else
data_in_reg when reg_dsc_enable = '1' else
data_in_ext when data_enable = '1' else
data_in_sync when sync_dsc_enable = '1' else --Sync needs to be last (or at least just after ext), as it will be kept enabled during operation... Same goes for the other two signals...
"00000000";
data_in_strobe <= data_in_strobe_master when master_dsc_enable = '1' else
data_in_strobe_net when net_dsc_enable = '1' else
data_in_strobe_reg when reg_dsc_enable = '1' else
data_in_strobe_ext when data_enable = '1' else
data_in_strobe_sync when sync_dsc_enable = '1' else
'0';
data_in_enable <= data_in_enable_master when master_dsc_enable = '1' else
data_in_enable_net when net_dsc_enable = '1' else
data_in_enable_reg when reg_dsc_enable = '1' else
data_in_enable_ext when data_enable = '1' else
data_in_enable_sync when sync_dsc_enable = '1' else
'0';
 
--Network register interface multiplexing
network_reg_internal_clk <= network_reg_internal_clk_net when net_dsc_enable = '1' else
network_reg_internal_clk_reg when reg_dsc_enable = '1' else
'0';
network_reg_internal_write_data <= network_reg_internal_write_data_net when net_dsc_enable = '1' else
network_reg_internal_write_data_reg when reg_dsc_enable = '1' else
"00000000";
network_reg_internal_addr <= network_reg_internal_addr_net when net_dsc_enable = '1' else
network_reg_internal_addr_reg when reg_dsc_enable = '1' else
"000000";
network_reg_internal_we <= network_reg_internal_we_net when net_dsc_enable = '1' else
network_reg_internal_we_reg when reg_dsc_enable = '1' else
"0";
 
--TosNet protocol interface output gating
data_out_ext <= data_out when data_enable = '1' else "00000000";
data_out_enable_ext <= data_out_enable when data_enable = '1' else '0';
data_out_strobe_ext <= data_out_strobe when data_enable = '1' else '0';
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/lfsr.vhd
0,0 → 1,79
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 9/6/2008
-- Design Name: Linear Feedback Shift Register
-- Module Name: lfsr - Behavioral
-- File Name: lfsr.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The LFSR is used to create pseudo-random sequences that are
-- used for scrambling outgoing data. With a similarly seeded
-- LFSR on the receiving side, the data can be de-scrambled.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.NUMERIC_STD.ALL;
 
 
entity lfsr is
generic (
lfsr_length : STD_LOGIC_VECTOR(7 downto 0);
lfsr_out_length : STD_LOGIC_VECTOR(7 downto 0);
lfsr_allow_zero : STD_LOGIC);
port (
lfsr_out : out STD_LOGIC_VECTOR((conv_integer(lfsr_out_length) - 1) downto 0);
lfsr_seed : in STD_LOGIC_VECTOR((conv_integer(lfsr_length) - 1) downto 0);
lfsr_reset : in STD_LOGIC;
lfsr_clk : in STD_LOGIC;
lfsr_clk_en : in STD_LOGIC);
end lfsr;
 
architecture Behavioral of lfsr is
 
signal value : STD_LOGIC_VECTOR((conv_integer(lfsr_length) - 1) downto 0);
 
begin
 
process(lfsr_clk)
begin
if(lfsr_clk = '1' and lfsr_clk'EVENT) then
if(lfsr_reset = '1') then
value <= lfsr_seed;
lfsr_out <= (others => '0');
elsif(lfsr_clk_en = '1') then
value((conv_integer(lfsr_length) - 2) downto 0) <= value((conv_integer(lfsr_length) - 1) downto 1);
value((conv_integer(lfsr_length) - 1)) <= value(1) xor value(0);
if(lfsr_allow_zero = '0' and value((conv_integer(lfsr_length) - 1) downto (conv_integer(lfsr_length) - conv_integer(lfsr_out_length))) = 0) then
lfsr_out <= (others => '1');
else
lfsr_out <= value((conv_integer(lfsr_length) - 1) downto (conv_integer(lfsr_length) - conv_integer(lfsr_out_length)));
end if;
end if;
end if;
end process;
 
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/crcpack.vhd
0,0 → 1,38
----------------------------------------------------------------------------------
-- Company: SDU, Robolab, Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 15:49:43 04/01/2008
-- Design Name:
-- Module Name: crcpack - Behavioral
-- Project Name: TosNet Datalink Layer
-- Target Devices: Xilinx Spartan3
-- Tool versions: ISE 9.2.04i
-- Description:
-- Adapted from "Parallel CRC Realization", by Guiseppe Campobello, Guiseppe
 
-- October 2003.
-- Adjustments have been made to the layout, and the reset has been converted
-- to a synchronous reset instead of the asynchronous reset from the original
-- paper.
--
-- Dependencies:
-- crcgen.vhd (Contains implementation)
--
-- Revision:
-- Revision 1.00 - Working!
-- Additional Comments:
--
----------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
 
package crcpack is
constant CRC16 : std_logic_vector(16 downto 0) := "11000000000000101";
constant CRCXA6 : std_logic_vector(8 downto 0) := "101100101";
constant CRCDIM : integer := 8;
constant CRC : std_logic_vector(CRCDIM downto 0) := CRCXA6;
constant DATA_WIDTH : integer range 1 to CRCDIM := 8;
type matrix is array (CRCDIM - 1 downto 0) of std_logic_vector (CRCDIM - 1 downto 0);
end crcpack ;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tpl_rx.vhd
0,0 → 1,260
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 19/3/2009
-- Design Name: TosNet
-- Module Name: tpl_rx - Behavioral
-- File Name: tpl_rx.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The receive part of the TosNet physical layer.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
entity tpl_rx is
Port ( data : out STD_LOGIC_VECTOR(7 downto 0);
valid : out STD_LOGIC;
error : out STD_LOGIC;
clk_data : out STD_LOGIC;
clk_50M : in STD_LOGIC;
reset : in STD_LOGIC;
sig_in : in STD_LOGIC);
end tpl_rx;
 
architecture Behavioral of tpl_rx is
 
type STATES is (IDLE, QUIET, REC_START, REC_SEED, REC_DATA, REC_ERROR);
signal state : STATES := IDLE;
signal next_state : STATES := IDLE;
 
signal sig_in_sync : STD_LOGIC := '0';
signal last_sig_in_sync : STD_LOGIC := '0';
signal in_buffer : STD_LOGIC_VECTOR(9 downto 0) := "0000000000";
signal data_buffer : STD_LOGIC_VECTOR(7 downto 0) := "00000000";
signal bit_counter : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal last_bit_counter : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal clk_data_int : STD_LOGIC := '0';
signal valid_int : STD_LOGIC := '0';
signal bit_counter_synced : STD_LOGIC := '0';
signal lfsr_rec_out : STD_LOGIC_VECTOR(7 downto 0);
signal lfsr_rec_seed : STD_LOGIC_VECTOR(7 downto 0);
signal lfsr_rec_reset : STD_LOGIC;
signal lfsr_rec_clk : STD_LOGIC;
signal lfsr_rec_clk_en : STD_LOGIC;
signal dec_clk : STD_LOGIC;
signal dec_clk_en : STD_LOGIC;
signal dec_in : STD_LOGIC_VECTOR(9 downto 0);
signal dec_out : STD_LOGIC_VECTOR(7 downto 0);
signal dec_kout : STD_LOGIC;
signal dec_code_err : STD_LOGIC;
component lfsr is
generic (
lfsr_length : STD_LOGIC_VECTOR(7 downto 0);
lfsr_out_length : STD_LOGIC_VECTOR(7 downto 0);
lfsr_allow_zero : STD_LOGIC);
port (
lfsr_out : out STD_LOGIC_VECTOR((conv_integer(lfsr_out_length) - 1) downto 0);
lfsr_seed : in STD_LOGIC_VECTOR((conv_integer(lfsr_length) - 1) downto 0);
lfsr_reset : in STD_LOGIC;
lfsr_clk : in STD_LOGIC;
lfsr_clk_en : in STD_LOGIC);
end component;
component dec_8b10b is
port (
clk : in STD_LOGIC;
ce : in STD_LOGIC;
din : in STD_LOGIC_VECTOR(9 downto 0);
dout : out STD_LOGIC_VECTOR(7 downto 0);
kout : out STD_LOGIC;
code_err : out STD_LOGIC);
end component;
begin
 
clk_data <= clk_data_int;
valid <= valid_int and not dec_kout;
 
lfsr_rec_clk <= clk_50M;
 
lfsr_rec : lfsr
Generic map ( lfsr_length => "00001000",
lfsr_out_length => "00001000",
lfsr_allow_zero => '0')
Port map ( lfsr_out => lfsr_rec_out,
lfsr_seed => lfsr_rec_seed,
lfsr_reset => lfsr_rec_reset,
lfsr_clk => lfsr_rec_clk,
lfsr_clk_en => lfsr_rec_clk_en);
 
dec_clk <= clk_50M;
data_buffer <= dec_out xor lfsr_rec_out;
dec : dec_8b10b
Port map ( clk => dec_clk,
ce => dec_clk_en,
din => dec_in,
dout => dec_out,
kout => dec_kout,
code_err => dec_code_err);
 
process(clk_50M)
variable sig_in_counter : STD_LOGIC_VECTOR(1 downto 0) := "00";
begin
if(clk_50M = '1' and clk_50M'event) then
if(reset = '1') then
state <= IDLE;
else
state <= next_state;
end if;
 
sig_in_sync <= sig_in;
last_sig_in_sync <= sig_in_sync;
 
if(last_sig_in_sync = sig_in_sync) then
sig_in_counter := sig_in_counter + 1;
else
sig_in_counter := (others => '0');
end if;
if(sig_in_counter(1 downto 0) = "01") then --This should be the approximate middle of the bit cell
in_buffer <= sig_in_sync & in_buffer(9 downto 1);
bit_counter <= bit_counter + 1;
if(bit_counter = 0) then
dec_in <= in_buffer;
clk_data_int <= '1';
elsif(bit_counter = 5) then
clk_data_int <= '0';
end if;
end if;
if(bit_counter = 10) then
bit_counter <= "0000";
end if;
 
if((bit_counter = 1) and (last_bit_counter = 0)) then
dec_clk_en <= '1';
else
dec_clk_en <= '0';
end if;
lfsr_rec_clk_en <= dec_clk_en;
last_bit_counter <= bit_counter;
case state is
when IDLE =>
lfsr_rec_seed <= "00000000";
data <= "00000000";
valid_int <= '0';
error <= '0';
when QUIET =>
bit_counter_synced <= '0';
lfsr_rec_seed <= "00000000";
lfsr_rec_reset <= '1';
data <= "00000000";
valid_int <= '0';
error <= '0';
when REC_START =>
if(bit_counter_synced = '0') then
bit_counter <= "0000";
bit_counter_synced <= '1';
end if;
lfsr_rec_seed <= "00000000";
lfsr_rec_reset <= '1';
data <= "00000000";
valid_int <= '0';
error <= '0';
when REC_SEED =>
lfsr_rec_reset <= '1';
if(bit_counter = 9) then
lfsr_rec_seed <= dec_out;
end if;
data <= "00000000";
valid_int <= '0';
error <= '0';
when REC_DATA =>
lfsr_rec_reset <= '0';
if(bit_counter = 2) then
data <= data_buffer;
valid_int <= '1';
error <= '0';
end if;
when REC_ERROR =>
error <= '1';
end case;
end if;
end process;
process(state, in_buffer, bit_counter, dec_kout, dec_code_err)
begin
case state is
when IDLE =>
next_state <= QUIET;
when QUIET =>
if(in_buffer = "0101111100" or in_buffer = "1010000011") then
next_state <= REC_START;
else
next_state <= QUIET;
end if;
when REC_START =>
if(bit_counter = 10) then
next_state <= REC_SEED;
else
next_state <= REC_START;
end if;
when REC_SEED =>
if(dec_code_err = '1') then --Need to wait until this state to check the decoder error output, as otherwise we may pick up the result of decoding something unaligned, resulting in a whole lot of errors that really aren't there...
next_state <= REC_ERROR;
elsif(bit_counter = 10) then
next_state <= REC_DATA;
else
next_state <= REC_SEED;
end if;
when REC_DATA =>
if(dec_code_err = '1') then
next_state <= REC_ERROR;
elsif(bit_counter = 10 and dec_kout = '1') then
next_state <= QUIET;
else
next_state <= REC_DATA;
end if;
when REC_ERROR =>
next_state <= QUIET;
end case;
end process;
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tpl_tx.vhd
0,0 → 1,280
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 12/3/2009
-- Design Name: TosNet
-- Module Name: tdl_tx - Behavioral
-- File Name: tdl_tx.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The transmit part of the TosNet physical layer.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
--------------------------------------------------------------------------------------------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
 
entity tpl_tx is
Port ( data : in STD_LOGIC_VECTOR(7 downto 0);
clk_50M : in STD_LOGIC;
clk_data_en : out STD_LOGIC;
enable : in STD_LOGIC;
reset : in STD_LOGIC;
sig_out : out STD_LOGIC;
clk_div_reset : in STD_LOGIC;
clk_div_reset_ack : out STD_LOGIC);
end tpl_tx;
 
architecture Behavioral of tpl_tx is
 
constant LFSR_INITIAL_SEED : STD_LOGIC_VECTOR(7 downto 0) := "01010101";
constant K_COMMA_1 : STD_LOGIC_VECTOR(7 downto 0) := "00111100";
constant K_COMMA_2 : STD_LOGIC_VECTOR(7 downto 0) := "10111100";
 
signal last_clk_div_reset : STD_LOGIC;
signal reset_clk_div : STD_LOGIC := '0';
signal clk_div : STD_LOGIC_VECTOR(5 downto 0) := (others => '0');
signal clk_en_12M5 : STD_LOGIC;
signal clk_en_1M25_0 : STD_LOGIC;
signal clk_en_1M25_1 : STD_LOGIC;
signal clk_en_1M25_2 : STD_LOGIC;
signal clk_en_1M25_3 : STD_LOGIC;
signal data_buffer_1 : STD_LOGIC_VECTOR(7 downto 0) := (others => '0');
signal data_buffer_2 : STD_LOGIC_VECTOR(7 downto 0) := (others => '0');
signal data_buffer_3 : STD_LOGIC_VECTOR(7 downto 0) := (others => '0');
signal enable_buffer_1 : STD_LOGIC := '0';
signal enable_buffer_2 : STD_LOGIC := '0';
signal out_buffer : STD_LOGIC_VECTOR(9 downto 0) := (others => '0');
type STATES is (IDLE, TRN_START, TRN_SEED, TRN_DATA);
signal state : STATES := IDLE;
signal next_state : STATES := IDLE;
 
signal lfsr_seed_out : STD_LOGIC_VECTOR(7 downto 0);
signal lfsr_seed_seed : STD_LOGIC_VECTOR(7 downto 0);
signal lfsr_seed_reset : STD_LOGIC;
signal lfsr_seed_clk : STD_LOGIC;
signal lfsr_seed_clk_en : STD_LOGIC;
signal lfsr_trn_out : STD_LOGIC_VECTOR(7 downto 0);
signal lfsr_trn_seed : STD_LOGIC_VECTOR(7 downto 0);
signal lfsr_trn_reset : STD_LOGIC;
signal lfsr_trn_clk : STD_LOGIC;
signal lfsr_trn_clk_en : STD_LOGIC;
 
signal enc_in : STD_LOGIC_VECTOR(7 downto 0) := K_COMMA_1;
signal enc_out : STD_LOGIC_VECTOR(9 downto 0);
signal enc_kin : STD_LOGIC := '1';
signal enc_clk : STD_LOGIC;
signal enc_clk_en : STD_LOGIC;
component lfsr is
generic (
lfsr_length : STD_LOGIC_VECTOR(7 downto 0);
lfsr_out_length : STD_LOGIC_VECTOR(7 downto 0);
lfsr_allow_zero : STD_LOGIC);
port (
lfsr_out : out STD_LOGIC_VECTOR((conv_integer(lfsr_out_length) - 1) downto 0);
lfsr_seed : in STD_LOGIC_VECTOR((conv_integer(lfsr_length) - 1) downto 0);
lfsr_reset : in STD_LOGIC;
lfsr_clk : in STD_LOGIC;
lfsr_clk_en : in STD_LOGIC);
end component;
component enc_8b10b is
port (
din : in STD_LOGIC_VECTOR(7 downto 0);
kin : in STD_LOGIC;
clk : in STD_LOGIC;
dout : out STD_LOGIC_VECTOR(9 downto 0);
ce : in STD_LOGIC);
end component;
 
begin
 
clk_data_en <= clk_en_1M25_0;
 
lfsr_seed_seed <= LFSR_INITIAL_SEED;
lfsr_seed_clk <= clk_50M;
lfsr_seed_reset <= reset;
lfsr_trn_clk <= clk_50M;
lfsr_trn_clk_en <= clk_en_1M25_1;
 
lfsr_seed : lfsr
Generic map ( lfsr_length => "00001000",
lfsr_out_length => "00001000",
lfsr_allow_zero => '0')
Port map ( lfsr_out => lfsr_seed_out,
lfsr_seed => lfsr_seed_seed,
lfsr_reset => lfsr_seed_reset,
lfsr_clk => lfsr_seed_clk,
lfsr_clk_en => lfsr_seed_clk_en);
lfsr_trn : lfsr
Generic map ( lfsr_length => "00001000",
lfsr_out_length => "00001000",
lfsr_allow_zero => '0')
Port map ( lfsr_out => lfsr_trn_out,
lfsr_seed => lfsr_trn_seed,
lfsr_reset => lfsr_trn_reset,
lfsr_clk => lfsr_trn_clk,
lfsr_clk_en => lfsr_trn_clk_en);
enc : enc_8b10b
Port map ( din => enc_in,
kin => enc_kin,
clk => enc_clk,
dout => enc_out,
ce => enc_clk_en);
 
enc_clk <= clk_50M;
enc_clk_en <= clk_en_1M25_2;
 
process(clk_50M)
begin
if(clk_50M = '1' and clk_50M'event) then
if(clk_div_reset = '1' and last_clk_div_reset = '0') then
reset_clk_div <= '1';
elsif(clk_div_reset = '0') then
clk_div_reset_ack <= '0';
end if;
 
if(reset_clk_div = '1' and clk_div(1 downto 0) = "11") then
clk_div <= "100100";
reset_clk_div <= '0';
clk_div_reset_ack <= '1';
else
if(clk_div = 39) then
clk_div <= (others => '0');
else
clk_div <= clk_div + 1;
end if;
end if;
 
last_clk_div_reset <= clk_div_reset;
end if;
end process;
 
clk_en_12M5 <= '1' when clk_div(1 downto 0) = "11" else '0'; --Sync the phase to clk_en_1M25_3
clk_en_1M25_0 <= '1' when clk_div = "000000" else '0'; --We're using phase-shifted versions of the clock-enables to minimize the latency of the system, as all the parts are perfectly pipelined anyway
clk_en_1M25_1 <= '1' when clk_div = "000001" else '0';
clk_en_1M25_2 <= '1' when clk_div = "000010" else '0';
clk_en_1M25_3 <= '1' when clk_div = "000011" else '0';
 
lfsr_trn_seed <= lfsr_seed_out;
process(clk_50M)
begin
if(clk_50M = '1' and clk_50M'event) then
if(reset = '1') then
state <= IDLE;
elsif(clk_en_1M25_1 = '1') then
state <= next_state;
data_buffer_3 <= data_buffer_2;
data_buffer_2 <= data_buffer_1;
data_buffer_1 <= data;
enable_buffer_2 <= enable_buffer_1;
enable_buffer_1 <= enable;
end if;
end if;
end process;
 
process(state, lfsr_trn_seed, data_buffer_3, lfsr_trn_out, clk_en_1M25_1)
begin
case state is
when IDLE =>
enc_in <= K_COMMA_1;
enc_kin <= '1';
lfsr_trn_reset <= '1';
lfsr_seed_clk_en <= clk_en_1M25_1;
when TRN_START =>
enc_in <= K_COMMA_2;
enc_kin <= '1';
lfsr_trn_reset <= '1';
lfsr_seed_clk_en <= '0';
when TRN_SEED =>
enc_in <= lfsr_trn_seed;
enc_kin <= '0';
lfsr_trn_reset <= '0';
lfsr_seed_clk_en <= '0';
when TRN_DATA =>
enc_in <= data_buffer_3 xor lfsr_trn_out;
enc_kin <= '0';
lfsr_trn_reset <= '0';
lfsr_seed_clk_en <= '0';
end case;
end process;
process(clk_50M)
begin
if(clk_50M = '1' and clk_50M'event) then
if(reset = '1') then
out_buffer <= (others => '0');
sig_out <= '0';
elsif(clk_en_12M5 = '1') then
if(clk_en_1M25_3 = '1') then
out_buffer <= enc_out;
else
out_buffer <= '0' & out_buffer(9 downto 1);
end if;
sig_out <= out_buffer(0);
end if;
end if;
end process;
 
process(state, enable, enable_buffer_2)
begin
case state is
when IDLE =>
if(enable = '1') then
next_state <= TRN_START;
else
next_state <= IDLE;
end if;
when TRN_START =>
next_state <= TRN_SEED;
when TRN_SEED =>
next_state <= TRN_DATA;
when TRN_DATA =>
if(enable_buffer_2 = '1') then
next_state <= TRN_DATA;
else
next_state <= IDLE;
end if;
end case;
end process;
 
end Behavioral;
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tosnet.vhd
0,0 → 1,469
------------------------------------------------------------------------------
-- tosnet.vhd - entity/architecture pair
------------------------------------------------------------------------------
-- IMPORTANT:
-- DO NOT MODIFY THIS FILE EXCEPT IN THE DESIGNATED SECTIONS.
--
-- SEARCH FOR --USER TO DETERMINE WHERE CHANGES ARE ALLOWED.
--
-- TYPICALLY, THE ONLY ACCEPTABLE CHANGES INVOLVE ADDING NEW
-- PORTS AND GENERICS THAT GET PASSED THROUGH TO THE INSTANTIATION
-- OF THE USER_LOGIC ENTITY.
------------------------------------------------------------------------------
--
-- ***************************************************************************
-- ** Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** Xilinx, Inc. **
-- ** XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" **
-- ** AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND **
-- ** SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, **
-- ** OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, **
-- ** APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION **
-- ** THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, **
-- ** AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE **
-- ** FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY **
-- ** WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE **
-- ** IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR **
-- ** REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF **
-- ** INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS **
-- ** FOR A PARTICULAR PURPOSE. **
-- ** **
-- ***************************************************************************
--
------------------------------------------------------------------------------
-- Filename: tosnet.vhd
-- Version: 3.20.a
-- Description: Top level design, instantiates library components and user logic.
-- Date: Tue Aug 03 15:27:10 2010 (by Create and Import Peripheral Wizard)
-- VHDL Standard: VHDL'93
------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port: "*_i"
-- device pins: "*_pin"
-- ports: "- Names begin with Uppercase"
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>"
------------------------------------------------------------------------------
 
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
 
library proc_common_v3_00_a;
use proc_common_v3_00_a.proc_common_pkg.all;
use proc_common_v3_00_a.ipif_pkg.all;
 
library plbv46_slave_single_v1_01_a;
use plbv46_slave_single_v1_01_a.plbv46_slave_single;
 
library tosnet_v3_20_a;
use tosnet_v3_20_a.user_logic;
 
------------------------------------------------------------------------------
-- Entity section
------------------------------------------------------------------------------
-- Definition of Generics:
-- C_BASEADDR -- PLBv46 slave: base address
-- C_HIGHADDR -- PLBv46 slave: high address
-- C_SPLB_AWIDTH -- PLBv46 slave: address bus width
-- C_SPLB_DWIDTH -- PLBv46 slave: data bus width
-- C_SPLB_NUM_MASTERS -- PLBv46 slave: Number of masters
-- C_SPLB_MID_WIDTH -- PLBv46 slave: master ID bus width
-- C_SPLB_NATIVE_DWIDTH -- PLBv46 slave: internal native data bus width
-- C_SPLB_P2P -- PLBv46 slave: point to point interconnect scheme
-- C_SPLB_SUPPORT_BURSTS -- PLBv46 slave: support bursts
-- C_SPLB_SMALLEST_MASTER -- PLBv46 slave: width of the smallest master
-- C_SPLB_CLK_PERIOD_PS -- PLBv46 slave: bus clock in picoseconds
-- C_INCLUDE_DPHASE_TIMER -- PLBv46 slave: Data Phase Timer configuration; 0 = exclude timer, 1 = include timer
-- C_FAMILY -- Xilinx FPGA family
-- C_MEM0_BASEADDR -- User memory space 0 base address
-- C_MEM0_HIGHADDR -- User memory space 0 high address
--
-- Definition of Ports:
-- SPLB_Clk -- PLB main bus clock
-- SPLB_Rst -- PLB main bus reset
-- PLB_ABus -- PLB address bus
-- PLB_UABus -- PLB upper address bus
-- PLB_PAValid -- PLB primary address valid indicator
-- PLB_SAValid -- PLB secondary address valid indicator
-- PLB_rdPrim -- PLB secondary to primary read request indicator
-- PLB_wrPrim -- PLB secondary to primary write request indicator
-- PLB_masterID -- PLB current master identifier
-- PLB_abort -- PLB abort request indicator
-- PLB_busLock -- PLB bus lock
-- PLB_RNW -- PLB read/not write
-- PLB_BE -- PLB byte enables
-- PLB_MSize -- PLB master data bus size
-- PLB_size -- PLB transfer size
-- PLB_type -- PLB transfer type
-- PLB_lockErr -- PLB lock error indicator
-- PLB_wrDBus -- PLB write data bus
-- PLB_wrBurst -- PLB burst write transfer indicator
-- PLB_rdBurst -- PLB burst read transfer indicator
-- PLB_wrPendReq -- PLB write pending bus request indicator
-- PLB_rdPendReq -- PLB read pending bus request indicator
-- PLB_wrPendPri -- PLB write pending request priority
-- PLB_rdPendPri -- PLB read pending request priority
-- PLB_reqPri -- PLB current request priority
-- PLB_TAttribute -- PLB transfer attribute
-- Sl_addrAck -- Slave address acknowledge
-- Sl_SSize -- Slave data bus size
-- Sl_wait -- Slave wait indicator
-- Sl_rearbitrate -- Slave re-arbitrate bus indicator
-- Sl_wrDAck -- Slave write data acknowledge
-- Sl_wrComp -- Slave write transfer complete indicator
-- Sl_wrBTerm -- Slave terminate write burst transfer
-- Sl_rdDBus -- Slave read data bus
-- Sl_rdWdAddr -- Slave read word address
-- Sl_rdDAck -- Slave read data acknowledge
-- Sl_rdComp -- Slave read transfer complete indicator
-- Sl_rdBTerm -- Slave terminate read burst transfer
-- Sl_MBusy -- Slave busy indicator
-- Sl_MWrErr -- Slave write error indicator
-- Sl_MRdErr -- Slave read error indicator
-- Sl_MIRQ -- Slave interrupt indicator
------------------------------------------------------------------------------
 
entity tosnet is
generic
(
-- ADD USER GENERICS BELOW THIS LINE ---------------
C_REG_ENABLE : std_logic_vector(7 downto 0) := X"00";
C_NODE_ID : integer := 0;
C_MAX_SKIPPED_READS : integer := 0;
C_MAX_SKIPPED_WRITES : integer := 0;
C_WATCHDOG_THRESHOLD : integer := 16384;
C_DISABLE_MASTER : std_logic := '0';
C_DISABLE_SLAVE : std_logic := '0';
C_DISABLE_ASYNC : std_logic := '0';
-- ADD USER GENERICS ABOVE THIS LINE ---------------
 
-- DO NOT EDIT BELOW THIS LINE ---------------------
-- Bus protocol parameters, do not add to or delete
C_BASEADDR : std_logic_vector := X"FFFFFFFF";
C_HIGHADDR : std_logic_vector := X"00000000";
C_SPLB_AWIDTH : integer := 32;
C_SPLB_DWIDTH : integer := 128;
C_SPLB_NUM_MASTERS : integer := 8;
C_SPLB_MID_WIDTH : integer := 3;
C_SPLB_NATIVE_DWIDTH : integer := 32;
C_SPLB_P2P : integer := 0;
C_SPLB_SUPPORT_BURSTS : integer := 0;
C_SPLB_SMALLEST_MASTER : integer := 32;
C_SPLB_CLK_PERIOD_PS : integer := 10000;
C_INCLUDE_DPHASE_TIMER : integer := 0;
C_FAMILY : string := "virtex5";
C_MEM0_BASEADDR : std_logic_vector := X"FFFFFFFF";
C_MEM0_HIGHADDR : std_logic_vector := X"00000000"
-- DO NOT EDIT ABOVE THIS LINE ---------------------
);
port
(
-- ADD USER PORTS BELOW THIS LINE ------------------
sig_in : in std_logic;
sig_out : out std_logic;
clk_50M : in std_logic;
sync_strobe : out std_logic;
system_halt : out std_logic;
-- ADD USER PORTS ABOVE THIS LINE ------------------
 
-- DO NOT EDIT BELOW THIS LINE ---------------------
-- Bus protocol ports, do not add to or delete
SPLB_Clk : in std_logic;
SPLB_Rst : in std_logic;
PLB_ABus : in std_logic_vector(0 to 31);
PLB_UABus : in std_logic_vector(0 to 31);
PLB_PAValid : in std_logic;
PLB_SAValid : in std_logic;
PLB_rdPrim : in std_logic;
PLB_wrPrim : in std_logic;
PLB_masterID : in std_logic_vector(0 to C_SPLB_MID_WIDTH-1);
PLB_abort : in std_logic;
PLB_busLock : in std_logic;
PLB_RNW : in std_logic;
PLB_BE : in std_logic_vector(0 to C_SPLB_DWIDTH/8-1);
PLB_MSize : in std_logic_vector(0 to 1);
PLB_size : in std_logic_vector(0 to 3);
PLB_type : in std_logic_vector(0 to 2);
PLB_lockErr : in std_logic;
PLB_wrDBus : in std_logic_vector(0 to C_SPLB_DWIDTH-1);
PLB_wrBurst : in std_logic;
PLB_rdBurst : in std_logic;
PLB_wrPendReq : in std_logic;
PLB_rdPendReq : in std_logic;
PLB_wrPendPri : in std_logic_vector(0 to 1);
PLB_rdPendPri : in std_logic_vector(0 to 1);
PLB_reqPri : in std_logic_vector(0 to 1);
PLB_TAttribute : in std_logic_vector(0 to 15);
Sl_addrAck : out std_logic;
Sl_SSize : out std_logic_vector(0 to 1);
Sl_wait : out std_logic;
Sl_rearbitrate : out std_logic;
Sl_wrDAck : out std_logic;
Sl_wrComp : out std_logic;
Sl_wrBTerm : out std_logic;
Sl_rdDBus : out std_logic_vector(0 to C_SPLB_DWIDTH-1);
Sl_rdWdAddr : out std_logic_vector(0 to 3);
Sl_rdDAck : out std_logic;
Sl_rdComp : out std_logic;
Sl_rdBTerm : out std_logic;
Sl_MBusy : out std_logic_vector(0 to C_SPLB_NUM_MASTERS-1);
Sl_MWrErr : out std_logic_vector(0 to C_SPLB_NUM_MASTERS-1);
Sl_MRdErr : out std_logic_vector(0 to C_SPLB_NUM_MASTERS-1);
Sl_MIRQ : out std_logic_vector(0 to C_SPLB_NUM_MASTERS-1)
-- DO NOT EDIT ABOVE THIS LINE ---------------------
);
 
attribute SIGIS : string;
attribute SIGIS of SPLB_Clk : signal is "CLK";
attribute SIGIS of SPLB_Rst : signal is "RST";
 
end entity tosnet;
 
------------------------------------------------------------------------------
-- Architecture section
------------------------------------------------------------------------------
 
architecture IMP of tosnet is
 
------------------------------------------
-- Array of base/high address pairs for each address range
------------------------------------------
constant ZERO_ADDR_PAD : std_logic_vector(0 to 31) := (others => '0');
constant USER_SLV_BASEADDR : std_logic_vector := C_BASEADDR;
constant USER_SLV_HIGHADDR : std_logic_vector := C_HIGHADDR;
 
constant IPIF_ARD_ADDR_RANGE_ARRAY : SLV64_ARRAY_TYPE :=
(
ZERO_ADDR_PAD & USER_SLV_BASEADDR, -- user logic slave space base address
ZERO_ADDR_PAD & USER_SLV_HIGHADDR, -- user logic slave space high address
ZERO_ADDR_PAD & C_MEM0_BASEADDR, -- user logic memory space 0 base address
ZERO_ADDR_PAD & C_MEM0_HIGHADDR -- user logic memory space 0 high address
);
 
------------------------------------------
-- Array of desired number of chip enables for each address range
------------------------------------------
constant USER_SLV_NUM_REG : integer := 5;
constant USER_NUM_REG : integer := USER_SLV_NUM_REG;
constant USER_NUM_MEM : integer := 1;
 
constant IPIF_ARD_NUM_CE_ARRAY : INTEGER_ARRAY_TYPE :=
(
0 => pad_power2(USER_SLV_NUM_REG), -- number of ce for user logic slave space
1 => 1 -- number of ce for user logic memory space 0 (always 1 chip enable)
);
 
------------------------------------------
-- Ratio of bus clock to core clock (for use in dual clock systems)
-- 1 = ratio is 1:1
-- 2 = ratio is 2:1
------------------------------------------
constant IPIF_BUS2CORE_CLK_RATIO : integer := 1;
 
------------------------------------------
-- Width of the slave data bus (32 only)
------------------------------------------
constant USER_SLV_DWIDTH : integer := C_SPLB_NATIVE_DWIDTH;
 
constant IPIF_SLV_DWIDTH : integer := C_SPLB_NATIVE_DWIDTH;
 
------------------------------------------
-- Width of the slave address bus (32 only)
------------------------------------------
constant USER_SLV_AWIDTH : integer := C_SPLB_AWIDTH;
 
------------------------------------------
-- Index for CS/CE
------------------------------------------
constant USER_SLV_CS_INDEX : integer := 0;
constant USER_SLV_CE_INDEX : integer := calc_start_ce_index(IPIF_ARD_NUM_CE_ARRAY, USER_SLV_CS_INDEX);
constant USER_MEM0_CS_INDEX : integer := 1;
constant USER_CS_INDEX : integer := USER_MEM0_CS_INDEX;
 
constant USER_CE_INDEX : integer := USER_SLV_CE_INDEX;
 
------------------------------------------
-- IP Interconnect (IPIC) signal declarations
------------------------------------------
signal ipif_Bus2IP_Clk : std_logic;
signal ipif_Bus2IP_Reset : std_logic;
signal ipif_IP2Bus_Data : std_logic_vector(0 to IPIF_SLV_DWIDTH-1);
signal ipif_IP2Bus_WrAck : std_logic;
signal ipif_IP2Bus_RdAck : std_logic;
signal ipif_IP2Bus_Error : std_logic;
signal ipif_Bus2IP_Addr : std_logic_vector(0 to C_SPLB_AWIDTH-1);
signal ipif_Bus2IP_Data : std_logic_vector(0 to IPIF_SLV_DWIDTH-1);
signal ipif_Bus2IP_RNW : std_logic;
signal ipif_Bus2IP_BE : std_logic_vector(0 to IPIF_SLV_DWIDTH/8-1);
signal ipif_Bus2IP_CS : std_logic_vector(0 to ((IPIF_ARD_ADDR_RANGE_ARRAY'length)/2)-1);
signal ipif_Bus2IP_RdCE : std_logic_vector(0 to calc_num_ce(IPIF_ARD_NUM_CE_ARRAY)-1);
signal ipif_Bus2IP_WrCE : std_logic_vector(0 to calc_num_ce(IPIF_ARD_NUM_CE_ARRAY)-1);
signal user_Bus2IP_RdCE : std_logic_vector(0 to USER_NUM_REG-1);
signal user_Bus2IP_WrCE : std_logic_vector(0 to USER_NUM_REG-1);
signal user_IP2Bus_Data : std_logic_vector(0 to USER_SLV_DWIDTH-1);
signal user_IP2Bus_RdAck : std_logic;
signal user_IP2Bus_WrAck : std_logic;
signal user_IP2Bus_Error : std_logic;
 
begin
 
------------------------------------------
-- instantiate plbv46_slave_single
------------------------------------------
PLBV46_SLAVE_SINGLE_I : entity plbv46_slave_single_v1_01_a.plbv46_slave_single
generic map
(
C_ARD_ADDR_RANGE_ARRAY => IPIF_ARD_ADDR_RANGE_ARRAY,
C_ARD_NUM_CE_ARRAY => IPIF_ARD_NUM_CE_ARRAY,
C_SPLB_P2P => C_SPLB_P2P,
C_BUS2CORE_CLK_RATIO => IPIF_BUS2CORE_CLK_RATIO,
C_SPLB_MID_WIDTH => C_SPLB_MID_WIDTH,
C_SPLB_NUM_MASTERS => C_SPLB_NUM_MASTERS,
C_SPLB_AWIDTH => C_SPLB_AWIDTH,
C_SPLB_DWIDTH => C_SPLB_DWIDTH,
C_SIPIF_DWIDTH => IPIF_SLV_DWIDTH,
C_INCLUDE_DPHASE_TIMER => C_INCLUDE_DPHASE_TIMER,
C_FAMILY => C_FAMILY
)
port map
(
SPLB_Clk => SPLB_Clk,
SPLB_Rst => SPLB_Rst,
PLB_ABus => PLB_ABus,
PLB_UABus => PLB_UABus,
PLB_PAValid => PLB_PAValid,
PLB_SAValid => PLB_SAValid,
PLB_rdPrim => PLB_rdPrim,
PLB_wrPrim => PLB_wrPrim,
PLB_masterID => PLB_masterID,
PLB_abort => PLB_abort,
PLB_busLock => PLB_busLock,
PLB_RNW => PLB_RNW,
PLB_BE => PLB_BE,
PLB_MSize => PLB_MSize,
PLB_size => PLB_size,
PLB_type => PLB_type,
PLB_lockErr => PLB_lockErr,
PLB_wrDBus => PLB_wrDBus,
PLB_wrBurst => PLB_wrBurst,
PLB_rdBurst => PLB_rdBurst,
PLB_wrPendReq => PLB_wrPendReq,
PLB_rdPendReq => PLB_rdPendReq,
PLB_wrPendPri => PLB_wrPendPri,
PLB_rdPendPri => PLB_rdPendPri,
PLB_reqPri => PLB_reqPri,
PLB_TAttribute => PLB_TAttribute,
Sl_addrAck => Sl_addrAck,
Sl_SSize => Sl_SSize,
Sl_wait => Sl_wait,
Sl_rearbitrate => Sl_rearbitrate,
Sl_wrDAck => Sl_wrDAck,
Sl_wrComp => Sl_wrComp,
Sl_wrBTerm => Sl_wrBTerm,
Sl_rdDBus => Sl_rdDBus,
Sl_rdWdAddr => Sl_rdWdAddr,
Sl_rdDAck => Sl_rdDAck,
Sl_rdComp => Sl_rdComp,
Sl_rdBTerm => Sl_rdBTerm,
Sl_MBusy => Sl_MBusy,
Sl_MWrErr => Sl_MWrErr,
Sl_MRdErr => Sl_MRdErr,
Sl_MIRQ => Sl_MIRQ,
Bus2IP_Clk => ipif_Bus2IP_Clk,
Bus2IP_Reset => ipif_Bus2IP_Reset,
IP2Bus_Data => ipif_IP2Bus_Data,
IP2Bus_WrAck => ipif_IP2Bus_WrAck,
IP2Bus_RdAck => ipif_IP2Bus_RdAck,
IP2Bus_Error => ipif_IP2Bus_Error,
Bus2IP_Addr => ipif_Bus2IP_Addr,
Bus2IP_Data => ipif_Bus2IP_Data,
Bus2IP_RNW => ipif_Bus2IP_RNW,
Bus2IP_BE => ipif_Bus2IP_BE,
Bus2IP_CS => ipif_Bus2IP_CS,
Bus2IP_RdCE => ipif_Bus2IP_RdCE,
Bus2IP_WrCE => ipif_Bus2IP_WrCE
);
 
------------------------------------------
-- instantiate User Logic
------------------------------------------
USER_LOGIC_I : entity tosnet_v3_20_a.user_logic
generic map
(
-- MAP USER GENERICS BELOW THIS LINE ---------------
C_REG_ENABLE => C_REG_ENABLE,
C_NODE_ID => C_NODE_ID,
C_MAX_SKIPPED_READS => C_MAX_SKIPPED_READS,
C_MAX_SKIPPED_WRITES => C_MAX_SKIPPED_WRITES,
C_WATCHDOG_THRESHOLD => C_WATCHDOG_THRESHOLD,
C_DISABLE_MASTER => C_DISABLE_MASTER,
C_DISABLE_SLAVE => C_DISABLE_SLAVE,
C_DISABLE_ASYNC => C_DISABLE_ASYNC,
-- MAP USER GENERICS ABOVE THIS LINE ---------------
 
C_SLV_AWIDTH => USER_SLV_AWIDTH,
C_SLV_DWIDTH => USER_SLV_DWIDTH,
C_NUM_REG => USER_NUM_REG,
C_NUM_MEM => USER_NUM_MEM
)
port map
(
-- MAP USER PORTS BELOW THIS LINE ------------------
sig_in => sig_in,
sig_out => sig_out,
clk_50M => clk_50M,
sync_strobe => sync_strobe,
system_halt => system_halt,
-- MAP USER PORTS ABOVE THIS LINE ------------------
 
Bus2IP_Clk => ipif_Bus2IP_Clk,
Bus2IP_Reset => ipif_Bus2IP_Reset,
Bus2IP_Addr => ipif_Bus2IP_Addr,
Bus2IP_CS => ipif_Bus2IP_CS(USER_CS_INDEX to USER_CS_INDEX+USER_NUM_MEM-1),
Bus2IP_RNW => ipif_Bus2IP_RNW,
Bus2IP_Data => ipif_Bus2IP_Data,
Bus2IP_BE => ipif_Bus2IP_BE,
Bus2IP_RdCE => user_Bus2IP_RdCE,
Bus2IP_WrCE => user_Bus2IP_WrCE,
IP2Bus_Data => user_IP2Bus_Data,
IP2Bus_RdAck => user_IP2Bus_RdAck,
IP2Bus_WrAck => user_IP2Bus_WrAck,
IP2Bus_Error => user_IP2Bus_Error
);
 
------------------------------------------
-- connect internal signals
------------------------------------------
IP2BUS_DATA_MUX_PROC : process( ipif_Bus2IP_CS, user_IP2Bus_Data ) is
begin
 
case ipif_Bus2IP_CS is
when "10" => ipif_IP2Bus_Data <= user_IP2Bus_Data;
when "01" => ipif_IP2Bus_Data <= user_IP2Bus_Data;
when others => ipif_IP2Bus_Data <= (others => '0');
end case;
 
end process IP2BUS_DATA_MUX_PROC;
 
ipif_IP2Bus_WrAck <= user_IP2Bus_WrAck;
ipif_IP2Bus_RdAck <= user_IP2Bus_RdAck;
ipif_IP2Bus_Error <= user_IP2Bus_Error;
 
user_Bus2IP_RdCE <= ipif_Bus2IP_RdCE(USER_CE_INDEX to USER_CE_INDEX+USER_NUM_REG-1);
user_Bus2IP_WrCE <= ipif_Bus2IP_WrCE(USER_CE_INDEX to USER_CE_INDEX+USER_NUM_REG-1);
 
end IMP;
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/commandpack.vhd
0,0 → 1,37
----------------------------------------------------------------------------------
-- Company: SDU, Robolab, Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 15:49:43 04/01/2008
-- Design Name:
-- Module Name: commandpack - Behavioral
-- Project Name: TosNet Datalink Layer
-- Target Devices: Xilinx Spartan3
-- Tool versions: ISE 9.2.04i
-- Description:
-- Contains the commands used for the network.
--
-- Dependencies:
--
-- Revision:
-- Revision 1.00 - Working!
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
 
package commandpack is
constant CMD_IDLE : STD_LOGIC_VECTOR(3 downto 0) := "0000";
constant CMD_MASTER_DSC : STD_LOGIC_VECTOR(3 downto 0) := "0010";
constant CMD_MASTER_SET : STD_LOGIC_VECTOR(3 downto 0) := "0011";
constant CMD_NET_DSC : STD_LOGIC_VECTOR(3 downto 0) := "0100";
constant CMD_NET_SET : STD_LOGIC_VECTOR(3 downto 0) := "0101";
constant CMD_REG_DSC : STD_LOGIC_VECTOR(3 downto 0) := "0110";
constant CMD_REG_SET : STD_LOGIC_VECTOR(3 downto 0) := "0111";
constant CMD_SYNC_DSC : STD_LOGIC_VECTOR(3 downto 0) := "1000";
constant CMD_SYNC_SET : STD_LOGIC_VECTOR(3 downto 0) := "1001";
constant CMD_DATA : STD_LOGIC_VECTOR(3 downto 0) := "1010";
constant CMD_HALT : STD_LOGIC_VECTOR(3 downto 0) := "1111";
end commandpack;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tdl_app_sync.vhd
0,0 → 1,184
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 7/3/2010
-- Design Name TosNet
-- Module Name: app_sync - Behavioral
-- File Name: app_sync.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The synchronization module handles the synchronization strobes
-- that are emitted at the end of each cycle. The strobe is
-- delayed for a fixed interval, depending on the node address
-- (which specifies the position of the node in the network
-- relative to the master), which causes the strobe to be emitted
-- at the same time in all nodes.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
 
entity tdl_app_sync is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_in_enable : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : out STD_LOGIC;
app_is_master : in STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_node_count : in STD_LOGIC_VECTOR(3 downto 0);
app_node_address : in STD_LOGIC_VECTOR(3 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end tdl_app_sync;
 
architecture Behavioral of tdl_app_sync is
 
type STATES is (OFF, CALC_SYNC_DELAY, SYNC_READY, SYNC_ONLINE, SYNC_RUNNING, SYNC_SET);
signal state : STATES := OFF;
signal next_state : STATES := OFF;
signal last_data_in_enable : STD_LOGIC;
 
signal counter : STD_LOGIC_VECTOR(4 downto 0) := "00000";
signal delay_counter : STD_LOGIC_VECTOR(11 downto 0) := "000000000000";
signal delay_current_node : STD_LOGIC_VECTOR(11 downto 0) := "000000000000";
constant delay_pr_node : STD_LOGIC_VECTOR(11 downto 0) := "000100101100";
 
begin
 
process(app_clk)
begin
if(app_clk = '1' and app_clk'EVENT) then
if(app_reset = '1') then
state <= OFF;
else
state <= next_state;
end if;
if(state = next_state) then
counter <= counter + 1;
else
counter <= "00000";
end if;
 
case state is
 
when OFF =>
delay_counter <= "000000000000";
delay_current_node <= "000000000000";
app_dsc_done <= '0';
last_data_in_enable <= '0';
app_sync_strobe <= '0';
 
when CALC_SYNC_DELAY =>
if(app_is_master = '1') then
delay_current_node <= "000000000000";
elsif(counter = 0) then
delay_current_node <= delay_pr_node;
else
delay_current_node <= delay_current_node + delay_pr_node;
end if;
when SYNC_READY =>
if(app_is_master = '1') then
app_sync_strobe <= '1'; --If this is the master node, send out a single sync pulse to get the application started...
end if;
when SYNC_ONLINE =>
app_dsc_done <= '1';
app_sync_strobe <= '0';
delay_counter <= "000000000000";
when SYNC_RUNNING =>
delay_counter <= delay_counter + 1;
when SYNC_SET =>
app_sync_strobe <= '1';
end case;
last_data_in_enable <= app_data_in_enable;
end if;
end process;
process(state, app_enable, counter, app_node_count, app_node_address, delay_counter, delay_current_node, app_data_in_enable, last_data_in_enable)
begin
case state is
when OFF =>
if(app_enable = '1') then
next_state <= CALC_SYNC_DELAY;
else
next_state <= OFF;
end if;
when CALC_SYNC_DELAY =>
if(counter = app_node_count - app_node_address - 1) then
next_state <= SYNC_READY;
else
next_state <= CALC_SYNC_DELAY;
end if;
when SYNC_READY => --Make sure that the current transmission is done before going online (if not the enable signal from the received sync_set will trigger the sync mechanism... which is kinda not what we want)
if(app_data_in_enable = '0') then
next_state <= SYNC_ONLINE;
else
next_state <= SYNC_READY;
end if;
when SYNC_ONLINE =>
if(app_data_in_enable = '0' and last_data_in_enable = '1') then
next_state <= SYNC_RUNNING;
else
next_state <= SYNC_ONLINE;
end if;
when SYNC_RUNNING =>
if(app_data_in_enable = '1') then --If app_data_in_enable goes high before the sync_strobe something bad is happening - but let's just make sure we don't make it worse by sending a sync_strobe in the middle of a (probably erroneous) transmission...
next_state <= SYNC_ONLINE;
elsif(delay_counter = delay_current_node) then
next_state <= SYNC_SET;
else
next_state <= SYNC_RUNNING;
end if;
when SYNC_SET =>
next_state <= SYNC_ONLINE;
end case;
end process;
 
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tdl_app_reg.vhd
0,0 → 1,361
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 10/3/2010
-- Design Name TosNet
-- Module Name: app_reg - Behavioral
-- File Name: app_reg.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The registry discovery module runs during startup, and polls
-- all nodes in the network for their enabled registers. The
-- gathered data is then distributed back to the nodes, and
-- stored in their network registers.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.commandpack.all;
 
entity tdl_app_reg is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : in STD_LOGIC;
app_is_master : in STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_network_reg_clk : out STD_LOGIC;
app_network_reg_addr : out STD_LOGIC_VECTOR(5 downto 0);
app_network_reg_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_we : inout STD_LOGIC_VECTOR(0 downto 0);
app_node_count : in STD_LOGIC_VECTOR(3 downto 0);
app_node_address : in STD_LOGIC_VECTOR(3 downto 0);
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_reg_enable : in STD_LOGIC_VECTOR(7 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end tdl_app_reg;
 
architecture Behavioral of tdl_app_reg is
 
type STATES is (OFF, IDLE, DSC_SEND, DSC_RECEIVE, DSC_RESPOND, SET_SEND, SET_RECEIVE, SET_RESPOND, DONE);
signal state : STATES := OFF;
signal next_state : STATES := OFF;
signal last_data_in_strobe : STD_LOGIC;
signal bytes_received : STD_LOGIC_VECTOR(5 downto 0) := "000000";
signal cmd_received : STD_LOGIC := '0';
signal counter : STD_LOGIC_VECTOR(8 downto 0) := "000000000";
signal node_count : STD_LOGIC_VECTOR(4 downto 0);
signal node_address : STD_LOGIC_VECTOR(4 downto 0);
begin
 
node_count <= '0' & app_node_count; --Add a leading 0, so we have an extra bit for eventual carrys
node_address <= '0' & app_node_address;
 
process(app_clk)
begin
if(app_clk = '1' and app_clk'EVENT) then
if(app_reset = '1') then
state <= OFF;
else
state <= next_state;
end if;
 
if(app_buffer_full = '1') then
counter <= counter;
elsif(state = next_state) then
counter <= counter + 1;
else
counter <= "000000000";
end if;
 
case state is
 
when OFF =>
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_data_out <= "00000000";
app_force_packet_error <= 'Z';
app_dsc_done <= '0';
app_network_reg_clk <= '0';
app_network_reg_addr <= "000000";
app_network_reg_data_out <= "00000000";
app_network_reg_we <= "0";
last_data_in_strobe <= '0';
bytes_received <= "000000";
cmd_received <= '0';
 
when IDLE =>
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_dsc_done <= '0';
app_network_reg_clk <= '0';
app_network_reg_we <= "0";
 
when DSC_SEND => --Transmit discovery packet (master only)
if(counter(8 downto 1) = 0) then
app_data_out_enable <= '1';
app_data_out <= CMD_REG_DSC & "0000";
app_data_out_strobe <= '1';
elsif(counter(8 downto 1) = 1) then
app_data_out_strobe <= '0';
elsif(counter(8 downto 1) = 2) then
app_data_out <= app_reg_enable;
app_data_out_strobe <= '1';
elsif(counter(8 downto 1) = 3) then
app_data_out_strobe <= '0';
elsif(counter(8 downto 1) = 4) then
app_data_out <= app_reg_enable;
app_data_out_strobe <= '1';
else
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
end if;
 
when DSC_RECEIVE => --Receive discovery packet
if(app_data_in_strobe = '1' and last_data_in_strobe = '0') then
if(bytes_received = 0 and app_data_in(7 downto 4) = CMD_REG_DSC and cmd_received = '0') then
bytes_received <= "000000";
cmd_received <= '1';
else
app_network_reg_addr <= bytes_received(4 downto 0) & not bytes_received(0);
app_network_reg_data_out <= app_data_in;
app_network_reg_we <= "1";
app_network_reg_clk <= '0';
bytes_received <= bytes_received + 1;
end if;
elsif(app_data_in_strobe = '0' and last_data_in_strobe = '1' and app_network_reg_we = "1") then
app_network_reg_clk <= '1';
else
app_network_reg_clk <= '0';
end if;
 
when DSC_RESPOND => --Forward discovery packet (slave only)
if(counter(8 downto 1) = 0) then
app_network_reg_we <= "0";
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 2) & not counter(2);
app_data_out_enable <= '1';
app_data_out_strobe <= '1';
app_data_out <= CMD_REG_DSC & "0000";
elsif(counter(7 downto 1) = (node_address) & "01") then
app_data_out_strobe <= '0';
elsif(counter(7 downto 1) = (node_address) & "10") then
app_data_out_strobe <= '1';
app_data_out <= app_reg_enable;
elsif(counter(7 downto 1) = (node_address) & "11") then
app_data_out_strobe <= '0';
elsif(counter(7 downto 1) = (node_address + 1) & "00") then
app_data_out_strobe <= '1';
app_data_out <= app_reg_enable;
elsif(counter(7 downto 1) = (node_address + 1) & "01") then
app_network_reg_we <= "0";
app_network_reg_clk <= '0';
app_data_out_strobe <= '0';
app_data_out_enable <= '0';
bytes_received <= "000000"; --Reset bytes_received, as the combinatorial part doesn't work otherwise
cmd_received <= '0';
elsif(counter(1) = '1') then
app_data_out_strobe <= '0';
app_network_reg_clk <= '1';
else
app_data_out_strobe <= '1';
app_data_out <= app_network_reg_data_in;
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 2) & not counter(2);
end if;
when SET_SEND => --Transmit set packet (master only)
if(counter(8 downto 1) = 0) then
app_network_reg_we <= "0";
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 2) & not counter(2);
app_data_out_enable <= '1';
app_data_out_strobe <= '1';
app_data_out <= CMD_REG_SET & "0000";
elsif(counter(7 downto 1) = node_count & "01") then
app_network_reg_we <= "0";
app_network_reg_clk <= '0';
app_data_out_strobe <= '0';
app_data_out_enable <= '0';
bytes_received <= "000000"; --Reset node_count and nodes_received, as the combinatorial part doesn't work otherwise
cmd_received <= '0';
elsif(counter(1) = '1') then
app_data_out_strobe <= '0';
app_network_reg_clk <= '1';
else
app_data_out_strobe <= '1';
app_data_out <= app_network_reg_data_in;
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 2) & not counter(2);
end if;
 
when SET_RECEIVE => --Receive set packet
if(app_data_in_strobe = '1' and last_data_in_strobe = '0') then
if(bytes_received = 0 and app_data_in(7 downto 4) = CMD_REG_SET and cmd_received = '0') then
bytes_received <= "000000";
cmd_received <= '1';
else
app_network_reg_addr <= bytes_received(4 downto 0) & not bytes_received(0);
app_network_reg_data_out <= app_data_in;
app_network_reg_we <= "1";
app_network_reg_clk <= '0';
bytes_received <= bytes_received + 1;
end if;
elsif(app_data_in_strobe = '0' and last_data_in_strobe = '1' and app_network_reg_we = "1") then
app_network_reg_clk <= '1';
else
app_network_reg_clk <= '0';
end if;
 
when SET_RESPOND => --Forward set packet (slave only)
if(counter(8 downto 1) = 0) then
app_network_reg_we <= "0";
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 2) & not counter(2);
app_data_out_enable <= '1';
app_data_out_strobe <= '1';
app_data_out <= CMD_REG_SET & "0000";
elsif(counter(7 downto 1) = node_count & "01") then
app_network_reg_we <= "0";
app_network_reg_clk <= '0';
app_data_out_strobe <= '0';
app_data_out_enable <= '0';
elsif(counter(1) = '1') then
app_data_out_strobe <= '0';
app_network_reg_clk <= '1';
else
app_data_out_strobe <= '1';
app_data_out <= app_network_reg_data_in;
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 2) & not counter(2);
end if;
 
when DONE => --Done!
app_network_reg_clk <= '0';
app_network_reg_addr <= "000000";
app_network_reg_data_out <= "00000000";
app_network_reg_we <= "0";
app_dsc_done <= '1';
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_data_out <= "00000000";
app_force_packet_error <= 'Z';
end case;
last_data_in_strobe <= app_data_in_strobe;
end if;
end process;
 
process(state, app_enable, counter, node_count, node_address, bytes_received, app_is_master, app_data_in_strobe, app_node_count)
begin
case state is
 
when OFF =>
if(app_enable = '1') then
next_state <= IDLE;
else
next_state <= OFF;
end if;
 
when IDLE =>
if(app_is_master = '1') then
next_state <= DSC_SEND;
else
next_state <= DSC_RECEIVE;
end if;
 
when DSC_SEND =>
if(counter(8 downto 1) = 5) then
next_state <= DSC_RECEIVE;
else
next_state <= DSC_SEND;
end if;
 
when DSC_RECEIVE =>
next_state <= DSC_RECEIVE;
if(app_is_master = '0') then
if((bytes_received(5 downto 1) = node_address) and app_data_in_strobe = '0') then
next_state <= DSC_RESPOND;
end if;
else
if((bytes_received(5 downto 1) = node_count) and app_data_in_strobe = '0') then
next_state <= SET_SEND;
end if;
end if;
 
when DSC_RESPOND =>
if(counter(7 downto 1) = (node_address + 1) & "01") then
next_state <= SET_RECEIVE;
else
next_state <= DSC_RESPOND;
end if;
 
when SET_SEND =>
if(counter(7 downto 1) = node_count & "01") then
next_state <= SET_RECEIVE;
else
next_state <= SET_SEND;
end if;
 
when SET_RECEIVE =>
next_state <= SET_RECEIVE;
if((bytes_received(5 downto 1) = node_count) and (app_data_in_strobe = '0')) then
if(app_is_master = '0') then
next_state <= SET_RESPOND;
else
next_state <= DONE;
end if;
end if;
 
when SET_RESPOND =>
if(counter(7 downto 1) = node_count & "01") then
next_state <= DONE;
else
next_state <= SET_RESPOND;
end if;
 
when DONE =>
next_state <= DONE;
 
end case;
end process;
 
end Behavioral;
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/dec_8b10b.vhd
0,0 → 1,270
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 11/5/2010
-- Design Name 8b/10b decoder
-- Module Name: dec_8b10b - Behavioral
-- File Name: dec_8b10b.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: An 8b/10b decoder. Like the encoder module, only the
-- functionality that is actually used in the TosNet physical
-- layer is implemented. That means that there is no support for
-- disparity checking, and the code error detection will not
-- detect all code errors (in particular in the case of the
-- primary/alternate encoding of HGF symbol "111"). The datalink
-- layer does CRC checking though, so any errors are very likely
-- to be picked up there instead.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
 
entity dec_8b10b is
port ( clk : in STD_LOGIC;
ce : in STD_LOGIC;
din : in STD_LOGIC_VECTOR(9 downto 0);
dout : out STD_LOGIC_VECTOR(7 downto 0);
kout : out STD_LOGIC;
code_err : out STD_LOGIC);
end dec_8b10b;
 
architecture Behavioral of dec_8b10b is
 
signal EDCBA : STD_LOGIC_VECTOR(4 downto 0) := (others => '0');
signal HGF : STD_LOGIC_VECTOR(2 downto 0) := (others => '0');
signal iedcba : STD_LOGIC_VECTOR(5 downto 0) := (others => '0');
signal jhgf : STD_LOGIC_VECTOR(3 downto 0) := (others => '0');
signal jhgfiedcba : STD_LOGIC_VECTOR(9 downto 0) := (others => '0');
signal code_err_s1 : STD_LOGIC;
signal code_err_s2 : STD_LOGIC;
 
begin
 
process(jhgfiedcba, EDCBA, HGF, code_err_s1, code_err_s2)
begin
case jhgfiedcba is
when "1001111100" =>
dout <= "00111100";
kout <= '1';
code_err <= '0';
when "0110000011" =>
dout <= "00111100";
kout <= '1';
code_err <= '0';
when "0101111100" =>
dout <= "10111100";
kout <= '1';
code_err <= '0';
when "1010000011" =>
dout <= "10111100";
kout <= '1';
code_err <= '0';
when others =>
dout <= HGF & EDCBA;
kout <= '0';
code_err <= code_err_s1 or code_err_s2;
end case;
end process;
 
jhgfiedcba <= jhgf & iedcba;
 
process(clk)
begin
if(clk = '1' and clk'event) then
if(ce = '1') then
iedcba <= din(5 downto 0);
jhgf <= din(9 downto 6);
end if;
end if;
end process;
 
process(iedcba)
begin
code_err_s1 <= '0';
case iedcba is
-- when "000000" =>
-- when "000001" =>
-- when "000010" =>
-- when "000011" =>
-- when "000100" =>
when "000101" =>
EDCBA <= "01111";
when "000110" =>
EDCBA <= "00000";
when "000111" =>
EDCBA <= "00111";
-- when "001000" =>
when "001001" =>
EDCBA <= "10000";
when "001010" =>
EDCBA <= "11111";
when "001011" =>
EDCBA <= "01011";
when "001100" =>
EDCBA <= "11000";
when "001101" =>
EDCBA <= "01101";
when "001110" =>
EDCBA <= "01110";
-- when "001111" =>
-- when "010000" =>
when "010001" =>
EDCBA <= "00001";
when "010010" =>
EDCBA <= "00010";
when "010011" =>
EDCBA <= "10011";
when "010100" =>
EDCBA <= "00100";
when "010101" =>
EDCBA <= "10101";
when "010110" =>
EDCBA <= "10110";
when "010111" =>
EDCBA <= "10111";
when "011000" =>
EDCBA <= "01000";
when "011001" =>
EDCBA <= "11001";
when "011010" =>
EDCBA <= "11010";
when "011011" =>
EDCBA <= "11011";
when "011100" =>
EDCBA <= "11100";
when "011101" =>
EDCBA <= "11101";
when "011110" =>
EDCBA <= "11110";
-- when "011111" =>
-- when "100000" =>
when "100001" =>
EDCBA <= "11110";
when "100010" =>
EDCBA <= "11101";
when "100011" =>
EDCBA <= "00011";
when "100100" =>
EDCBA <= "11011";
when "100101" =>
EDCBA <= "00101";
when "100110" =>
EDCBA <= "00110";
when "100111" =>
EDCBA <= "01000";
when "101000" =>
EDCBA <= "10111";
when "101001" =>
EDCBA <= "01001";
when "101010" =>
EDCBA <= "01010";
when "101011" =>
EDCBA <= "00100";
when "101100" =>
EDCBA <= "01100";
when "101101" =>
EDCBA <= "00010";
when "101110" =>
EDCBA <= "00001";
-- when "101111" =>
-- when "110000" =>
when "110001" =>
EDCBA <= "10001";
when "110010" =>
EDCBA <= "10010";
when "110011" =>
EDCBA <= "11000";
when "110100" =>
EDCBA <= "10100";
when "110101" =>
EDCBA <= "11111";
when "110110" =>
EDCBA <= "10000";
-- when "110111" =>
when "111000" =>
EDCBA <= "00111";
when "111001" =>
EDCBA <= "00000";
when "111010" =>
EDCBA <= "01111";
-- when "111011" =>
-- when "111100" =>
-- when "111101" =>
-- when "111110" =>
-- when "111111" =>
when others =>
code_err_s1 <= '1';
EDCBA <= "00000";
end case;
end process;
 
process(jhgf)
begin
code_err_s2 <= '0';
case jhgf is
-- when "0000" =>
when "0001" =>
HGF <= "111";
when "0010" =>
HGF <= "000";
when "0011" =>
HGF <= "011";
when "0100" =>
HGF <= "100";
when "0101" =>
HGF <= "101";
when "0110" =>
HGF <= "110";
when "0111" =>
HGF <= "111";
when "1000" =>
HGF <= "111";
when "1001" =>
HGF <= "001";
when "1010" =>
HGF <= "010";
when "1011" =>
HGF <= "100";
when "1100" =>
HGF <= "011";
when "1101" =>
HGF <= "000";
when "1110" =>
HGF <= "111";
-- when "1111" =>
when others =>
code_err_s2 <= '1';
HGF <= "000";
end case;
end process;
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tdl_app_net.vhd
0,0 → 1,377
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 10/3/2010
-- Design Name TosNet
-- Module Name: app_net - Behavioral
-- File Name: app_net.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The network discorvery module runs during startup, and
-- performs network discovery. It is initiated by the master
-- node, and polls all attached nodes for their node_ids which
-- are stored together with the addresses of the nodes (that is,
-- their position in the ring, relative to the master) in the
-- network registers on all nodes.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.commandpack.all;
 
 
entity tdl_app_net is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : in STD_LOGIC;
app_is_master : in STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_network_reg_clk : out STD_LOGIC;
app_network_reg_addr : out STD_LOGIC_VECTOR(5 downto 0);
app_network_reg_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_network_reg_we : inout STD_LOGIC_VECTOR(0 downto 0);
app_node_count : out STD_LOGIC_VECTOR(3 downto 0);
app_node_address : out STD_LOGIC_VECTOR(3 downto 0);
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end tdl_app_net;
 
architecture Behavioral of tdl_app_net is
 
type STATES is (OFF, IDLE, CLEAR_NETWORKREG, DSC_SEND, DSC_RECEIVE, DSC_RESPOND, SET_SEND, SET_RECEIVE, SET_RESPOND, DONE);
signal state : STATES := OFF;
signal next_state : STATES := OFF;
signal last_data_in_strobe : STD_LOGIC;
signal node_count : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal node_address : STD_LOGIC_VECTOR(3 downto 0) := "0000";
signal nodes_received : STD_LOGIC_VECTOR(4 downto 0) := "00000";
signal cmd_received : STD_LOGIC := '0';
signal counter : STD_LOGIC_VECTOR(8 downto 0) := "000000000";
 
begin
 
process(app_clk)
begin
if(app_clk = '1' and app_clk'EVENT) then
if(app_reset = '1') then
state <= OFF;
else
state <= next_state;
end if;
 
if(app_buffer_full = '1') then
counter <= counter;
elsif(state = next_state) then
counter <= counter + 1;
else
counter <= "000000000";
end if;
 
case state is
 
when OFF =>
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_data_out <= "00000000";
app_force_packet_error <= 'Z';
app_dsc_done <= '0';
app_network_reg_clk <= '0';
app_network_reg_addr <= "000000";
app_network_reg_data_out <= "00000000";
app_network_reg_we <= "0";
last_data_in_strobe <= '0';
node_count <= "0000";
nodes_received <= "00000";
cmd_received <= '0';
node_address <= "0000";
 
when IDLE =>
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_dsc_done <= '0';
app_network_reg_clk <= '0';
app_network_reg_we <= "0";
when CLEAR_NETWORKREG =>
app_network_reg_we <= "1";
if(counter(0) = '0') then
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(6 downto 1);
app_network_reg_data_out <= "00000000";
else
app_network_reg_clk <= '1';
end if;
when DSC_SEND => --Send discovery packet (master only)
if(counter(8 downto 1) = 0) then
app_data_out_enable <= '1';
app_data_out <= CMD_NET_DSC & "0001";
app_data_out_strobe <= '1';
elsif(counter(8 downto 1) = 1) then
app_data_out_strobe <= '0';
elsif(counter(8 downto 1) = 2) then
app_data_out <= "0000" & app_node_id;
app_data_out_strobe <= '1';
else
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
end if;
 
when DSC_RECEIVE => --Receive discovery packet
if(app_data_in_strobe = '1' and last_data_in_strobe = '0') then
if(node_count = 0 and app_data_in(7 downto 4) = CMD_NET_DSC and cmd_received = '0') then
node_count <= app_data_in(3 downto 0);
node_address <= app_data_in(3 downto 0);
nodes_received <= "00000";
cmd_received <= '1';
else
app_network_reg_addr <= nodes_received(3 downto 0) & "00";
app_network_reg_data_out <= app_data_in;
app_network_reg_we <= "1";
app_network_reg_clk <= '0';
nodes_received <= nodes_received + 1;
end if;
elsif(app_data_in_strobe = '0' and last_data_in_strobe = '1' and app_network_reg_we = "1") then
app_network_reg_clk <= '1';
else
app_network_reg_clk <= '0';
end if;
 
when DSC_RESPOND => --Forward discovery packet (slave only)
app_network_reg_we <= "0";
 
if(counter(8 downto 1) = 0) then
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(5 downto 2) & "00";
app_data_out_enable <= '1';
app_data_out_strobe <= '1';
app_data_out <= CMD_NET_DSC & (node_count + 1);
elsif(counter(5 downto 1) = node_count & '1') then
app_data_out_strobe <= '0';
elsif(counter(5 downto 1) = (node_count + 1) & '0') then
app_data_out_strobe <= '1';
app_data_out <= node_count & app_node_id;
elsif(counter(5 downto 1) = (node_count + 1) & '1') then
app_data_out_strobe <= '0';
app_data_out_enable <= '0';
node_count <= "0000"; --Reset node_count and nodes_received, as the combinatorial part doesn't work otherwise
nodes_received <= "00000";
cmd_received <= '0';
elsif(counter(1) = '1') then
app_data_out_strobe <= '0';
app_network_reg_clk <= '1';
else
app_data_out_strobe <= '1';
app_data_out <= app_network_reg_data_in;
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(5 downto 2) & "00";
end if;
when SET_SEND => --Transmit set packet (master only)
app_network_reg_we <= "0";
if(counter(8 downto 1) = 0) then
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(5 downto 2) & "00";
app_data_out_enable <= '1';
app_data_out_strobe <= '1';
app_data_out <= CMD_NET_SET & node_count;
elsif(counter(5 downto 1) = node_count & '1') then
app_network_reg_clk <= '0';
app_data_out_strobe <= '0';
app_data_out_enable <= '0';
node_count <= "0000"; --Reset node_count and nodes_received, as the combinatorial part doesn't work otherwise
nodes_received <= "00000";
cmd_received <= '0';
elsif(counter(1) = '1') then
app_data_out_strobe <= '0';
app_network_reg_clk <= '1';
else
app_data_out_strobe <= '1';
app_data_out <= app_network_reg_data_in;
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(5 downto 2) & "00";
end if;
 
when SET_RECEIVE => --Receive set packet
if(app_data_in_strobe = '1' and last_data_in_strobe = '0') then
if(node_count = 0 and app_data_in(7 downto 4) = CMD_NET_SET and cmd_received = '0') then
node_count <= app_data_in(3 downto 0);
nodes_received <= "00000";
cmd_received <= '1';
else
app_network_reg_addr <= nodes_received(3 downto 0) & "00";
app_network_reg_data_out <= app_data_in;
app_network_reg_we <= "1";
app_network_reg_clk <= '0';
nodes_received <= nodes_received + 1;
end if;
elsif(app_data_in_strobe = '0' and last_data_in_strobe = '1' and app_network_reg_we = "1") then
app_network_reg_clk <= '1';
else
app_network_reg_clk <= '0';
end if;
 
when SET_RESPOND => --Forward set packet (slave only)
app_network_reg_we <= "0";
if(counter(8 downto 1) = 0) then
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(5 downto 2) & "00";
app_data_out_enable <= '1';
app_data_out_strobe <= '1';
app_data_out <= CMD_NET_SET & node_count;
elsif(counter(5 downto 1) = node_count & '1') then
app_network_reg_clk <= '0';
app_data_out_strobe <= '0';
app_data_out_enable <= '0';
elsif(counter(1) = '1') then
app_data_out_strobe <= '0';
app_network_reg_clk <= '1';
else
app_data_out_strobe <= '1';
app_data_out <= app_network_reg_data_in;
app_network_reg_clk <= '0';
app_network_reg_addr <= counter(5 downto 2) & "00";
end if;
when DONE => --Done!
app_network_reg_we <= "0";
if(app_is_master = '1') then
app_node_address <= "0000";
else
app_node_address <= node_address;
end if;
app_node_count <= node_count;
app_network_reg_clk <= '0';
app_network_reg_addr <= "000000";
app_network_reg_data_out <= "00000000";
app_dsc_done <= '1';
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_data_out <= "00000000";
app_force_packet_error <= 'Z';
end case;
last_data_in_strobe <= app_data_in_strobe;
end if;
end process;
 
process(state, app_enable, app_data_in_strobe, counter, node_count, nodes_received, app_is_master)
begin
case state is
 
when OFF =>
if(app_enable = '1') then
next_state <= IDLE;
else
next_state <= OFF;
end if;
 
when IDLE =>
next_state <= CLEAR_NETWORKREG;
when CLEAR_NETWORKREG =>
if(counter = 128) then
if(app_is_master = '1') then
next_state <= DSC_SEND;
else
next_state <= DSC_RECEIVE;
end if;
else
next_state <= CLEAR_NETWORKREG;
end if;
when DSC_SEND =>
if(counter(8 downto 1) = 3) then
next_state <= DSC_RECEIVE;
else
next_state <= DSC_SEND;
end if;
 
when DSC_RECEIVE =>
next_state <= DSC_RECEIVE;
if((nodes_received = node_count) and not (node_count = 0) and (app_data_in_strobe = '0')) then
if(app_is_master = '0') then
next_state <= DSC_RESPOND;
else
next_state <= SET_SEND;
end if;
end if;
 
when DSC_RESPOND =>
if(counter(5 downto 1) = (node_count + 1) & '1') then
next_state <= SET_RECEIVE;
else
next_state <= DSC_RESPOND;
end if;
 
when SET_SEND =>
if(counter(5 downto 1) = node_count & '1') then
next_state <= SET_RECEIVE;
else
next_state <= SET_SEND;
end if;
 
when SET_RECEIVE =>
next_state <= SET_RECEIVE;
if((nodes_received = node_count) and not (node_count = 0) and (app_data_in_strobe = '0')) then
if(app_is_master = '0') then
next_state <= SET_RESPOND;
else
next_state <= DONE;
end if;
end if;
 
when SET_RESPOND =>
if(counter(5 downto 1) = node_count & '1') then
next_state <= DONE;
else
next_state <= SET_RESPOND;
end if;
 
when DONE =>
next_state <= DONE;
 
end case;
end process;
 
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/user_logic.vhd
0,0 → 1,566
------------------------------------------------------------------------------
-- user_logic.vhd - entity/architecture pair
------------------------------------------------------------------------------
--
-- ***************************************************************************
-- ** Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. **
-- ** **
-- ** Xilinx, Inc. **
-- ** XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" **
-- ** AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND **
-- ** SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, **
-- ** OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, **
-- ** APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION **
-- ** THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, **
-- ** AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE **
-- ** FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY **
-- ** WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE **
-- ** IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR **
-- ** REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF **
-- ** INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS **
-- ** FOR A PARTICULAR PURPOSE. **
-- ** **
-- ***************************************************************************
--
------------------------------------------------------------------------------
-- Filename: user_logic.vhd
-- Version: 3.20.a
-- Description: User logic.
-- Date: Tue Aug 03 15:27:10 2010 (by Create and Import Peripheral Wizard)
-- VHDL Standard: VHDL'93
------------------------------------------------------------------------------
-- Naming Conventions:
-- active low signals: "*_n"
-- clock signals: "clk", "clk_div#", "clk_#x"
-- reset signals: "rst", "rst_n"
-- generics: "C_*"
-- user defined types: "*_TYPE"
-- state machine next state: "*_ns"
-- state machine current state: "*_cs"
-- combinatorial signals: "*_com"
-- pipelined or register delay signals: "*_d#"
-- counter signals: "*cnt*"
-- clock enable signals: "*_ce"
-- internal version of output port: "*_i"
-- device pins: "*_pin"
-- ports: "- Names begin with Uppercase"
-- processes: "*_PROCESS"
-- component instantiations: "<ENTITY_>I_<#|FUNC>"
------------------------------------------------------------------------------
 
-- DO NOT EDIT BELOW THIS LINE --------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
 
library proc_common_v3_00_a;
use proc_common_v3_00_a.proc_common_pkg.all;
 
-- DO NOT EDIT ABOVE THIS LINE --------------------
 
--USER libraries added here
 
------------------------------------------------------------------------------
-- Entity section
------------------------------------------------------------------------------
-- Definition of Generics:
-- C_SLV_AWIDTH -- Slave interface address bus width
-- C_SLV_DWIDTH -- Slave interface data bus width
-- C_NUM_REG -- Number of software accessible registers
-- C_NUM_MEM -- Number of memory spaces
--
-- Definition of Ports:
-- Bus2IP_Clk -- Bus to IP clock
-- Bus2IP_Reset -- Bus to IP reset
-- Bus2IP_Addr -- Bus to IP address bus
-- Bus2IP_CS -- Bus to IP chip select for user logic memory selection
-- Bus2IP_RNW -- Bus to IP read/not write
-- Bus2IP_Data -- Bus to IP data bus
-- Bus2IP_BE -- Bus to IP byte enables
-- Bus2IP_RdCE -- Bus to IP read chip enable
-- Bus2IP_WrCE -- Bus to IP write chip enable
-- IP2Bus_Data -- IP to Bus data bus
-- IP2Bus_RdAck -- IP to Bus read transfer acknowledgement
-- IP2Bus_WrAck -- IP to Bus write transfer acknowledgement
-- IP2Bus_Error -- IP to Bus error response
------------------------------------------------------------------------------
 
entity user_logic is
generic
(
-- ADD USER GENERICS BELOW THIS LINE ---------------
C_REG_ENABLE : std_logic_vector(7 downto 0) := X"00";
C_NODE_ID : integer := 0;
C_MAX_SKIPPED_READS : integer := 0;
C_MAX_SKIPPED_WRITES : integer := 0;
C_WATCHDOG_THRESHOLD : integer := 16384;
C_DISABLE_MASTER : std_logic := '0';
C_DISABLE_SLAVE : std_logic := '0';
C_DISABLE_ASYNC : std_logic := '0';
-- ADD USER GENERICS ABOVE THIS LINE ---------------
 
-- DO NOT EDIT BELOW THIS LINE ---------------------
-- Bus protocol parameters, do not add to or delete
C_SLV_AWIDTH : integer := 32;
C_SLV_DWIDTH : integer := 32;
C_NUM_REG : integer := 5;
C_NUM_MEM : integer := 1
-- DO NOT EDIT ABOVE THIS LINE ---------------------
);
port
(
-- ADD USER PORTS BELOW THIS LINE ------------------
sig_in : in std_logic;
sig_out : out std_logic;
clk_50M : in std_logic;
sync_strobe : out std_logic;
system_halt : out std_logic;
-- ADD USER PORTS ABOVE THIS LINE ------------------
 
-- DO NOT EDIT BELOW THIS LINE ---------------------
-- Bus protocol ports, do not add to or delete
Bus2IP_Clk : in std_logic;
Bus2IP_Reset : in std_logic;
Bus2IP_Addr : in std_logic_vector(0 to C_SLV_AWIDTH-1);
Bus2IP_CS : in std_logic_vector(0 to C_NUM_MEM-1);
Bus2IP_RNW : in std_logic;
Bus2IP_Data : in std_logic_vector(0 to C_SLV_DWIDTH-1);
Bus2IP_BE : in std_logic_vector(0 to C_SLV_DWIDTH/8-1);
Bus2IP_RdCE : in std_logic_vector(0 to C_NUM_REG-1);
Bus2IP_WrCE : in std_logic_vector(0 to C_NUM_REG-1);
IP2Bus_Data : out std_logic_vector(0 to C_SLV_DWIDTH-1);
IP2Bus_RdAck : out std_logic;
IP2Bus_WrAck : out std_logic;
IP2Bus_Error : out std_logic
-- DO NOT EDIT ABOVE THIS LINE ---------------------
);
 
attribute SIGIS : string;
attribute SIGIS of Bus2IP_Clk : signal is "CLK";
attribute SIGIS of Bus2IP_Reset : signal is "RST";
 
end entity user_logic;
 
------------------------------------------------------------------------------
-- Architecture section
------------------------------------------------------------------------------
 
architecture IMP of user_logic is
 
--USER signal declarations added here, as needed for user logic
 
component tdl_top is
Port( node_id : in STD_LOGIC_VECTOR(3 downto 0);
reg_enable : in STD_LOGIC_VECTOR(7 downto 0);
watchdog_threshold : in STD_LOGIC_VECTOR(17 downto 0);
data_out_ext : out STD_LOGIC_VECTOR(7 downto 0);
data_out_strobe_ext : out STD_LOGIC;
data_out_enable_ext : out STD_LOGIC;
data_in_ext : in STD_LOGIC_VECTOR(7 downto 0);
data_in_strobe_ext : in STD_LOGIC;
data_in_enable_ext : in STD_LOGIC;
buffer_full : inout STD_LOGIC;
packet_error : inout STD_LOGIC;
force_packet_error : inout STD_LOGIC;
sync_strobe : inout STD_LOGIC;
online : out STD_LOGIC;
network_reg_addr : in STD_LOGIC_VECTOR(3 downto 0);
network_reg_data : out STD_LOGIC_VECTOR(31 downto 0);
network_reg_clk : in STD_LOGIC;
node_is_master : out STD_LOGIC;
node_address : out STD_LOGIC_VECTOR(3 downto 0);
clk_50M : in STD_LOGIC;
reset : in STD_LOGIC;
sig_in : in STD_LOGIC;
sig_out : inout STD_LOGIC);
end component;
component tal_top is
Generic(disable_slave : STD_LOGIC := '0';
disable_master : STD_LOGIC := '0';
disable_async : STD_LOGIC := '0');
Port( node_id : in STD_LOGIC_VECTOR(3 downto 0);
max_skipped_writes : in STD_LOGIC_VECTOR(15 downto 0);
max_skipped_reads : in STD_LOGIC_VECTOR(15 downto 0);
data_in : in STD_LOGIC_VECTOR(7 downto 0);
data_in_strobe : in STD_LOGIC;
data_in_enable : in STD_LOGIC;
data_out : out STD_LOGIC_VECTOR(7 downto 0);
data_out_strobe : out STD_LOGIC;
data_out_enable : out STD_LOGIC;
buffer_full : in STD_LOGIC;
packet_error : in STD_LOGIC;
force_packet_error : out STD_LOGIC;
sync_strobe : in STD_LOGIC;
network_reg_addr : out STD_LOGIC_VECTOR(3 downto 0);
network_reg_data : in STD_LOGIC_VECTOR(31 downto 0);
network_reg_clk : out STD_LOGIC;
data_reg_addr : in STD_LOGIC_VECTOR(9 downto 0);
data_reg_data_in : in STD_LOGIC_VECTOR(31 downto 0);
data_reg_data_out : out STD_LOGIC_VECTOR(31 downto 0);
data_reg_clk : in STD_LOGIC;
data_reg_we : in STD_LOGIC_VECTOR(0 downto 0);
data_reg_commit_write : in STD_LOGIC;
data_reg_commit_read : in STD_LOGIC;
skip_count_write : out STD_LOGIC_VECTOR(15 downto 0);
skip_count_read : out STD_LOGIC_VECTOR(15 downto 0);
current_buffer_index : out STD_LOGIC_VECTOR(3 downto 0);
node_address : in STD_LOGIC_VECTOR(3 downto 0);
is_master : in STD_LOGIC;
clk_50M : in STD_LOGIC;
pause : in STD_LOGIC;
pause_ack : out STD_LOGIC;
reset : in STD_LOGIC;
system_halt : out STD_LOGIC;
reset_counter : out STD_LOGIC_VECTOR(31 downto 0);
packet_counter : out STD_LOGIC_VECTOR(31 downto 0);
error_counter : out STD_LOGIC_VECTOR(31 downto 0);
async_in_data : in STD_LOGIC_VECTOR(37 downto 0);
async_out_data : out STD_LOGIC_VECTOR(37 downto 0);
async_in_clk : in STD_LOGIC;
async_out_clk : in STD_LOGIC;
async_in_full : out STD_LOGIC;
async_out_empty : out STD_LOGIC;
async_in_wr_en : in STD_LOGIC;
async_out_rd_en : in STD_LOGIC;
async_out_valid : out STD_LOGIC);
end component;
 
signal sig_out_int : STD_LOGIC;
signal data_up : STD_LOGIC_VECTOR(7 downto 0);
signal data_up_strobe : STD_LOGIC;
signal data_up_enable : STD_LOGIC;
signal data_down : STD_LOGIC_VECTOR(7 downto 0);
signal data_down_strobe : STD_LOGIC;
signal data_down_enable : STD_LOGIC;
signal buffer_full : STD_LOGIC;
signal sync_strobe_int : STD_LOGIC;
signal network_reg_addr : STD_LOGIC_VECTOR(3 downto 0);
signal network_reg_data : STD_LOGIC_VECTOR(31 downto 0);
signal network_reg_clk : STD_LOGIC;
signal node_address : STD_LOGIC_VECTOR(3 downto 0);
signal node_is_master : STD_LOGIC;
signal packet_error : STD_LOGIC;
signal online : STD_LOGIC;
signal app_reset : STD_LOGIC;
signal force_packet_error : STD_LOGIC;
signal max_skipped_writes : STD_LOGIC_VECTOR(15 downto 0);
signal max_skipped_reads : STD_LOGIC_VECTOR(15 downto 0);
signal watchdog_threshold : STD_LOGIC_VECTOR(17 downto 0);
signal data_reg_addr : STD_LOGIC_VECTOR(9 downto 0);
signal data_reg_data_in : STD_LOGIC_VECTOR(31 downto 0);
signal data_reg_data_out : STD_LOGIC_VECTOR(31 downto 0);
signal data_reg_clk : STD_LOGIC;
signal data_reg_we : STD_LOGIC_VECTOR(0 downto 0);
signal commit_write : STD_LOGIC;
signal commit_read : STD_LOGIC;
signal system_halt_int : STD_LOGIC;
signal packet_counter : STD_LOGIC_VECTOR(31 downto 0);
signal error_counter : STD_LOGIC_VECTOR(31 downto 0);
signal reset_counter : STD_LOGIC_VECTOR(31 downto 0);
signal async_in_data : STD_LOGIC_VECTOR(37 downto 0);
signal async_out_data : STD_LOGIC_VECTOR(37 downto 0);
signal async_rd_en : STD_LOGIC;
signal async_wr_en : STD_LOGIC;
signal async_empty : STD_LOGIC;
signal async_full : STD_LOGIC;
signal async_valid : STD_LOGIC;
signal async_rd_node_id : STD_LOGIC_VECTOR(3 downto 0);
signal async_wr_node_id : STD_LOGIC_VECTOR(3 downto 0);
signal async_rd_be : STD_LOGIC_VECTOR(1 downto 0);
signal async_wr_be : STD_LOGIC_VECTOR(1 downto 0);
 
------------------------------------------
-- Signals for user logic slave model s/w accessible register example
------------------------------------------
signal slv_reg0 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg1 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg2 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg3 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg4 : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_reg_write_sel : std_logic_vector(0 to 4);
signal slv_reg_read_sel : std_logic_vector(0 to 4);
signal slv_ip2bus_data : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal slv_read_ack : std_logic;
signal slv_write_ack : std_logic;
 
------------------------------------------
-- Signals for user logic memory space example
------------------------------------------
type BYTE_RAM_TYPE is array (0 to 255) of std_logic_vector(0 to 7);
type DO_TYPE is array (0 to C_NUM_MEM-1) of std_logic_vector(0 to C_SLV_DWIDTH-1);
signal mem_data_out : DO_TYPE;
signal mem_address : std_logic_vector(0 to 7);
signal mem_select : std_logic_vector(0 to 0);
signal mem_read_enable : std_logic;
signal mem_read_enable_dly1 : std_logic;
signal mem_read_req : std_logic;
signal mem_ip2bus_data : std_logic_vector(0 to C_SLV_DWIDTH-1);
signal mem_read_ack_dly1 : std_logic;
signal mem_read_ack : std_logic;
signal mem_write_ack : std_logic;
 
begin
 
--USER logic implementation added here
 
tdl_top_inst : tdl_top
Port map ( node_id => conv_std_logic_vector(C_NODE_ID, 4),
reg_enable => C_REG_ENABLE,
watchdog_threshold => conv_std_logic_vector(C_WATCHDOG_THRESHOLD, 18),
sig_in => sig_in,
sig_out => sig_out_int,
reset => Bus2IP_Reset,
clk_50M => clk_50M,
data_in_ext => data_down,
data_in_enable_ext => data_down_enable,
data_in_strobe_ext => data_down_strobe,
data_out_ext => data_up,
data_out_enable_ext => data_up_enable,
data_out_strobe_ext => data_up_strobe,
buffer_full => buffer_full,
packet_error => packet_error,
force_packet_error => force_packet_error,
sync_strobe => sync_strobe_int,
online => online,
network_reg_addr => network_reg_addr,
network_reg_data => network_reg_data,
network_reg_clk => network_reg_clk,
node_address => node_address,
node_is_master => node_is_master);
 
application_inst : tal_top
Generic map(disable_master => C_DISABLE_MASTER,
disable_slave => C_DISABLE_SLAVE,
disable_async => C_DISABLE_ASYNC)
Port map( node_id => conv_std_logic_vector(C_NODE_ID, 4),
max_skipped_writes => conv_std_logic_vector(C_MAX_SKIPPED_WRITES, 16),
max_skipped_reads => conv_std_logic_vector(C_MAX_SKIPPED_READS, 16),
data_in => data_up,
data_in_strobe => data_up_strobe,
data_in_enable => data_up_enable,
data_out => data_down,
data_out_strobe => data_down_strobe,
data_out_enable => data_down_enable,
buffer_full => buffer_full,
packet_error => packet_error,
force_packet_error => force_packet_error,
sync_strobe => sync_strobe_int,
network_reg_addr => network_reg_addr,
network_reg_data => network_reg_data,
network_reg_clk => network_reg_clk,
node_address => node_address,
is_master => node_is_master,
data_reg_addr => data_reg_addr,
data_reg_data_in => data_reg_data_in,
data_reg_data_out => data_reg_data_out,
data_reg_clk => data_reg_clk,
data_reg_we => data_reg_we,
data_reg_commit_write => commit_write,
data_reg_commit_read => commit_read,
clk_50M => clk_50M,
pause => '0',
reset => app_reset,
system_halt => system_halt_int,
packet_counter => packet_counter,
error_counter => error_counter,
reset_counter => reset_counter,
async_in_data => async_in_data,
async_out_data => async_out_data,
async_in_clk => Bus2IP_Clk,
async_out_clk => Bus2IP_Clk,
async_in_full => async_full,
async_out_empty => async_empty,
async_in_wr_en => async_wr_en,
async_out_rd_en => async_rd_en,
async_out_valid => async_valid);
 
app_reset <= not online;
sig_out <= sig_out_int;
------------------------------------------
-- Example code to read/write user logic slave model s/w accessible registers
--
-- Note:
-- The example code presented here is to show you one way of reading/writing
-- software accessible registers implemented in the user logic slave model.
-- Each bit of the Bus2IP_WrCE/Bus2IP_RdCE signals is configured to correspond
-- to one software accessible register by the top level template. For example,
-- if you have four 32 bit software accessible registers in the user logic,
-- you are basically operating on the following memory mapped registers:
--
-- Bus2IP_WrCE/Bus2IP_RdCE Memory Mapped Register
-- "1000" C_BASEADDR + 0x0
-- "0100" C_BASEADDR + 0x4
-- "0010" C_BASEADDR + 0x8
-- "0001" C_BASEADDR + 0xC
--
------------------------------------------
slv_reg_write_sel <= Bus2IP_WrCE(0 to 4);
slv_reg_read_sel <= Bus2IP_RdCE(0 to 4);
slv_write_ack <= Bus2IP_WrCE(0) or Bus2IP_WrCE(1) or Bus2IP_WrCE(2) or Bus2IP_WrCE(3) or Bus2IP_WrCE(4);
slv_read_ack <= Bus2IP_RdCE(0) or Bus2IP_RdCE(1) or Bus2IP_RdCE(2) or Bus2IP_RdCE(3) or Bus2IP_RdCE(4);
 
slv_reg0(0 to 3) <= async_rd_node_id;
slv_reg0(4 to 5) <= async_rd_be;
slv_reg0(6 to 7) <= "00";
slv_reg0(8 to 15) <= C_REG_ENABLE;
slv_reg0(16 to 19) <= node_address;
slv_reg0(20 to 23) <= conv_std_logic_vector(C_NODE_ID, 4);
slv_reg0(24) <= async_valid;
slv_reg0(25) <= async_empty;
slv_reg0(26) <= async_full;
slv_reg0(27) <= system_halt_int;
slv_reg0(28) <= node_is_master;
slv_reg0(29) <= online;
slv_reg0(30 to 31) <= "00";
slv_reg1 <= packet_counter;
slv_reg2 <= error_counter;
slv_reg3 <= reset_counter;
slv_reg4 <= async_out_data(31 downto 0) when async_valid = '1' else (others => '0');
async_in_data(37 downto 36) <= async_wr_be;
async_in_data(35 downto 32) <= async_wr_node_id;
async_rd_node_id <= async_out_data(35 downto 32) when async_valid = '1' else (others => '0');
async_rd_be <= async_out_data(37 downto 36) when async_valid = '1' else (others => '0');
async_rd_en <= '1' when slv_reg_read_sel = "00001" else '0';
-- implement slave model software accessible register(s)
SLAVE_REG_WRITE_PROC : process( Bus2IP_Clk ) is
begin
 
if Bus2IP_Clk'event and Bus2IP_Clk = '1' then
async_wr_en <= '0';
case slv_reg_write_sel is
when "10000" =>
if ( Bus2IP_BE(0) = '1' ) then
async_wr_node_id <= Bus2IP_Data(0 to 3);
async_wr_be <= Bus2IP_Data(4 to 5);
end if;
if ( Bus2IP_BE(3) = '1' ) then
commit_write <= Bus2IP_Data(30);
commit_read <= Bus2IP_Data(31);
end if;
when "00001" =>
if ( Bus2IP_BE = "1111" ) then
async_in_data(31 downto 0) <= Bus2IP_Data;
async_wr_en <= '1';
end if;
when others => null;
end case;
end if;
 
end process SLAVE_REG_WRITE_PROC;
 
-- implement slave model software accessible register(s) read mux
SLAVE_REG_READ_PROC : process( slv_reg_read_sel, slv_reg0, slv_reg1, slv_reg2, slv_reg3, slv_reg4) is
begin
 
case slv_reg_read_sel is
when "10000" => slv_ip2bus_data <= slv_reg0;
when "01000" => slv_ip2bus_data <= slv_reg1;
when "00100" => slv_ip2bus_data <= slv_reg2;
when "00010" => slv_ip2bus_data <= slv_reg3;
when "00001" => slv_ip2bus_data <= slv_reg4;
when others => slv_ip2bus_data <= (others => '0');
end case;
 
end process SLAVE_REG_READ_PROC;
 
------------------------------------------
-- Example code to generate user logic interrupts
--
-- Note:
-- The example code presented here is to show you one way of generating
-- interrupts from the user logic. This code snippet infers a counter
-- and generate the interrupts whenever the counter rollover (the counter
-- will rollover ~21 sec @50Mhz).
------------------------------------------
 
sync_strobe <= sync_strobe_int;
system_halt <= system_halt_int;
 
------------------------------------------
-- Example code to access user logic memory region
--
-- Note:
-- The example code presented here is to show you one way of using
-- the user logic memory space features. The Bus2IP_Addr, Bus2IP_CS,
-- and Bus2IP_RNW IPIC signals are dedicated to these user logic
-- memory spaces. Each user logic memory space has its own address
-- range and is allocated one bit on the Bus2IP_CS signal to indicated
-- selection of that memory space. Typically these user logic memory
-- spaces are used to implement memory controller type cores, but it
-- can also be used in cores that need to access additional address space
-- (non C_BASEADDR based), s.t. bridges. This code snippet infers
-- 1 256x32-bit (byte accessible) single-port Block RAM by XST.
------------------------------------------
mem_select <= Bus2IP_CS;
mem_read_ack <= mem_read_ack_dly1;
mem_write_ack <= data_reg_we(0);
mem_read_enable <= Bus2IP_CS(0) and Bus2IP_RNW;
data_reg_we(0) <= Bus2IP_CS(0) and not Bus2IP_RNW;
data_reg_addr <= Bus2IP_Addr(20 to 29);
data_reg_clk <= Bus2IP_Clk;
data_reg_data_in <= Bus2IP_Data;
 
-- implement single clock wide read request
mem_read_req <= mem_read_enable and not(mem_read_enable_dly1);
BRAM_RD_REQ_PROC : process( Bus2IP_Clk ) is
begin
 
if ( Bus2IP_Clk'event and Bus2IP_Clk = '1' ) then
if ( Bus2IP_Reset = '1' ) then
mem_read_enable_dly1 <= '0';
else
mem_read_enable_dly1 <= mem_read_enable;
end if;
end if;
 
end process BRAM_RD_REQ_PROC;
 
-- this process generates the read acknowledge 1 clock after read enable
-- is presented to the BRAM block. The BRAM block has a 1 clock delay
-- from read enable to data out.
BRAM_RD_ACK_PROC : process( Bus2IP_Clk ) is
begin
 
if ( Bus2IP_Clk'event and Bus2IP_Clk = '1' ) then
if ( Bus2IP_Reset = '1' ) then
mem_read_ack_dly1 <= '0';
else
mem_read_ack_dly1 <= mem_read_req;
end if;
end if;
 
end process BRAM_RD_ACK_PROC;
 
 
-- implement Block RAM read mux
MEM_IP2BUS_DATA_PROC : process( data_reg_data_out, mem_select ) is
begin
 
case mem_select is
when "1" => mem_ip2bus_data <= data_reg_data_out;
when others => mem_ip2bus_data <= (others => '0');
end case;
 
end process MEM_IP2BUS_DATA_PROC;
 
------------------------------------------
-- Example code to drive IP to Bus signals
------------------------------------------
IP2Bus_Data <= slv_ip2bus_data when slv_read_ack = '1' else
mem_ip2bus_data when mem_read_ack = '1' else
(others => '0');
 
IP2Bus_WrAck <= slv_write_ack or mem_write_ack;
IP2Bus_RdAck <= slv_read_ack or mem_read_ack;
IP2Bus_Error <= '0';
 
end IMP;
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/hdl/vhdl/tdl_app_master.vhd
0,0 → 1,211
----------------------------------------------------------------------------------
-- Company: University of Southern Denmark
-- Engineer: Simon Falsig
--
-- Create Date: 11/5/2010
-- Design Name TosNet
-- Module Name: app_master - Behavioral
-- File Name: app_master.vhd
-- Project Name: TosNet
-- Target Devices: Spartan3/6
-- Tool versions: Xilinx ISE 12.2
-- Description: The master discovery module performs master discovery and
-- setup during startup. The node with the lowest node_id is
-- designated as the master, and transmits this information to
-- all other nodes in the network.
--
-- Revision:
-- Revision 3.2 - Initial release
--
-- Copyright 2010
--
-- This module is free software: you can redistribute it and/or modify
-- it under the terms of the GNU Lesser General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This module is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU Lesser General Public License for more details.
--
-- You should have received a copy of the GNU Lesser General Public License
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.commandpack.all;
 
 
entity tdl_app_master is
Port ( app_enable : in STD_LOGIC;
app_data_in : in STD_LOGIC_VECTOR(7 downto 0);
app_data_in_strobe : in STD_LOGIC;
app_data_out : out STD_LOGIC_VECTOR(7 downto 0);
app_data_out_strobe : out STD_LOGIC;
app_data_out_enable : out STD_LOGIC;
app_buffer_full : in STD_LOGIC;
app_packet_error : in STD_LOGIC;
app_force_packet_error : out STD_LOGIC;
app_cmd_valid : in STD_LOGIC;
app_sync_strobe : in STD_LOGIC;
app_is_master : out STD_LOGIC;
app_dsc_done : out STD_LOGIC;
app_node_id : in STD_LOGIC_VECTOR(3 downto 0);
app_clk : in STD_LOGIC;
app_reset : in STD_LOGIC);
end tdl_app_master;
 
architecture Behavioral of tdl_app_master is
 
type STATES is (OFF, IDLE, DSC, CMP, SET, SET_RESPOND, WAIT_FOR_SET, DONE);
signal state : STATES := OFF;
signal next_state : STATES := OFF;
signal last_data_in_strobe : STD_LOGIC;
signal lowest_current_id : STD_LOGIC_VECTOR(3 downto 0);
 
signal counter : STD_LOGIC_VECTOR(2 downto 0) := "000";
 
begin
 
process(app_clk)
begin
if(app_clk = '1' and app_clk'EVENT) then
if(app_reset = '1') then
state <= OFF;
else
state <= next_state;
end if;
if(app_buffer_full = '1') then
counter <= counter;
elsif(state = next_state) then
counter <= counter + 1;
else
counter <= "000";
end if;
 
case state is
 
when OFF =>
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_data_out <= "00000000";
app_force_packet_error <= 'Z';
app_is_master <= '0';
app_dsc_done <= '0';
last_data_in_strobe <= '0';
lowest_current_id <= app_node_id;
 
when IDLE =>
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_dsc_done <= '0';
app_is_master <= '0';
 
when DSC => --Transmit discovery packet
app_data_out_enable <= '1';
app_data_out <= CMD_MASTER_DSC & lowest_current_id;
app_data_out_strobe <= '1';
 
when CMP => --Compare received packets to lowest known id
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
if(app_data_in_strobe = '1' and last_data_in_strobe = '0' and app_cmd_valid = '1') then
if(app_data_in(7 downto 4) = CMD_MASTER_DSC) then
if(app_data_in(3 downto 0) = app_node_id) then
app_is_master <= '1';
elsif(app_data_in(3 downto 0) < app_node_id) then
lowest_current_id <= app_data_in(3 downto 0);
end if;
end if;
end if;
 
when SET => --Transmit set packet (master only)
app_data_out_enable <= '1';
app_data_out <= CMD_MASTER_SET & lowest_current_id;
app_data_out_strobe <= '1';
when SET_RESPOND => --Forward set packet (slave only)
app_data_out_enable <= '1';
app_data_out <= app_data_in(7 downto 0);
app_data_out_strobe <= '1';
 
when WAIT_FOR_SET => --Wait until set is received again (master only)
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
when DONE => --Done!
app_dsc_done <= '1';
app_data_out_enable <= '0';
app_data_out_strobe <= '0';
app_data_out <= "00000000";
app_force_packet_error <= 'Z';
end case;
last_data_in_strobe <= app_data_in_strobe;
end if;
end process;
 
process(state, app_enable, app_data_in, app_data_in_strobe, last_data_in_strobe, app_node_id, app_cmd_valid)
begin
case state is
when OFF =>
if(app_enable = '1') then
next_state <= IDLE;
else
next_state <= OFF;
end if;
when IDLE =>
next_state <= DSC;
when DSC =>
next_state <= CMP;
when CMP =>
next_state <= CMP;
 
if(app_data_in_strobe = '1' and last_data_in_strobe = '0' and app_cmd_valid = '1') then
if(app_data_in(7 downto 4) = CMD_MASTER_DSC) then
if(app_data_in(3 downto 0) = app_node_id) then
next_state <= SET;
else
next_state <= DSC;
end if;
elsif(app_data_in(7 downto 4) = CMD_MASTER_SET) then
if(app_data_in(3 downto 0) > app_node_id) then --Make a quick sanity check on the received master node id, if it is larger than the id of this node, then something is wrong...
next_state <= IDLE;
else
next_state <= SET_RESPOND;
end if;
end if;
end if;
when SET =>
next_state <= WAIT_FOR_SET;
 
when SET_RESPOND =>
next_state <= DONE;
when WAIT_FOR_SET =>
next_state <= WAIT_FOR_SET;
if(app_data_in_strobe = '1' and last_data_in_strobe = '0' and app_cmd_valid = '1') then
if(app_data_in(7 downto 4) = CMD_MASTER_SET) then
next_state <= DONE;
end if;
end if;
when DONE =>
next_state <= DONE;
end case;
end process;
 
end Behavioral;
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/data/tosnet_v2_1_0.pao
0,0 → 1,32
##############################################################################
## Filename: /pcores/tosnet_v3_20_a/data/tosnet_v2_1_0.pao
## Description: Peripheral Analysis Order
## Date: Tue Aug 03 15:44:32 2010 (by Create and Import Peripheral Wizard)
##############################################################################
 
lib proc_common_v3_00_a proc_common_pkg vhdl
lib proc_common_v3_00_a or_muxcy vhdl
lib proc_common_v3_00_a family_support vhdl
lib tosnet_v3_20_a lfsr vhdl
lib tosnet_v3_20_a enc_8b10b vhdl
lib tosnet_v3_20_a dec_8b10b vhdl
lib tosnet_v3_20_a crcpack vhdl
lib tosnet_v3_20_a commandpack vhdl
lib proc_common_v3_00_a pselect_f vhdl
lib proc_common_v3_00_a or_gate128 vhdl
lib proc_common_v3_00_a ipif_pkg vhdl
lib tosnet_v3_20_a tpl_tx vhdl
lib tosnet_v3_20_a tpl_rx vhdl
lib tosnet_v3_20_a tdl_app_sync vhdl
lib tosnet_v3_20_a tdl_app_reg vhdl
lib tosnet_v3_20_a tdl_app_net vhdl
lib tosnet_v3_20_a tdl_app_master vhdl
lib tosnet_v3_20_a crcgen vhdl
lib proc_common_v3_00_a counter_f vhdl
lib plbv46_slave_single_v1_01_a plb_address_decoder vhdl
lib tosnet_v3_20_a tdl_top vhdl
lib tosnet_v3_20_a tal_top vhdl
lib plbv46_slave_single_v1_01_a plb_slave_attachment vhdl
lib tosnet_v3_20_a user_logic vhdl
lib plbv46_slave_single_v1_01_a plbv46_slave_single vhdl
lib tosnet_v3_20_a tosnet vhdl
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/data/tosnet_v2_1_0.mpd
0,0 → 1,97
###################################################################
##
## Name : tosnet
## Desc : Microprocessor Peripheral Description
## : Automatically generated by PsfUtility
##
###################################################################
 
BEGIN tosnet
 
## Peripheral Options
OPTION IPTYPE = PERIPHERAL
OPTION IMP_NETLIST = TRUE
OPTION HDL = VHDL
OPTION IP_GROUP = MICROBLAZE:PPC:USER
OPTION STYLE = MIX
OPTION RUN_NGCBUILD = TRUE
 
 
## Bus Interfaces
BUS_INTERFACE BUS = SPLB, BUS_STD = PLBV46, BUS_TYPE = SLAVE
 
## Generics for VHDL or Parameters for Verilog
PARAMETER C_REG_ENABLE = 0b00000000, DT = std_logic_vector(7 downto 0)
PARAMETER C_NODE_ID = 0, DT = INTEGER
PARAMETER C_MAX_SKIPPED_READS = 0, DT = INTEGER
PARAMETER C_MAX_SKIPPED_WRITES = 0, DT = INTEGER
PARAMETER C_WATCHDOG_THRESHOLD = 16384, DT = INTEGER
PARAMETER C_DISABLE_MASTER = 0, DT = std_logic
PARAMETER C_DISABLE_SLAVE = 0, DT = std_logic
PARAMETER C_DISABLE_ASYNC = 0, DT = std_logic
PARAMETER C_BASEADDR = 0xffffffff, DT = std_logic_vector, PAIR = C_HIGHADDR, ADDRESS = BASE, BUS = SPLB
PARAMETER C_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_BASEADDR, ADDRESS = HIGH, BUS = SPLB
PARAMETER C_SPLB_AWIDTH = 32, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_DWIDTH = 128, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_NUM_MASTERS = 8, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_MID_WIDTH = 3, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_NATIVE_DWIDTH = 32, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_P2P = 0, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_SUPPORT_BURSTS = 0, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_SMALLEST_MASTER = 32, DT = INTEGER, BUS = SPLB
PARAMETER C_SPLB_CLK_PERIOD_PS = 10000, DT = INTEGER, BUS = SPLB
PARAMETER C_INCLUDE_DPHASE_TIMER = 0, DT = INTEGER
PARAMETER C_FAMILY = virtex5, DT = STRING
PARAMETER C_MEM0_BASEADDR = 0xffffffff, DT = std_logic_vector, PAIR = C_MEM0_HIGHADDR, ADDRESS = BASE, BUS = SPLB, ADDR_TYPE = MEMORY
PARAMETER C_MEM0_HIGHADDR = 0x00000000, DT = std_logic_vector, PAIR = C_MEM0_BASEADDR, ADDRESS = HIGH, BUS = SPLB, ADDR_TYPE = MEMORY
 
## Ports
PORT sig_in = "", DIR = I
PORT sig_out = "", DIR = O
PORT clk_50M = "", DIR = I
PORT sync_strobe = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING
PORT system_halt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH
PORT SPLB_Clk = "", DIR = I, SIGIS = CLK, BUS = SPLB
PORT SPLB_Rst = SPLB_Rst, DIR = I, SIGIS = RST, BUS = SPLB
PORT PLB_ABus = PLB_ABus, DIR = I, VEC = [0:31], BUS = SPLB
PORT PLB_UABus = PLB_UABus, DIR = I, VEC = [0:31], BUS = SPLB
PORT PLB_PAValid = PLB_PAValid, DIR = I, BUS = SPLB
PORT PLB_SAValid = PLB_SAValid, DIR = I, BUS = SPLB
PORT PLB_rdPrim = PLB_rdPrim, DIR = I, BUS = SPLB
PORT PLB_wrPrim = PLB_wrPrim, DIR = I, BUS = SPLB
PORT PLB_masterID = PLB_masterID, DIR = I, VEC = [0:(C_SPLB_MID_WIDTH-1)], BUS = SPLB
PORT PLB_abort = PLB_abort, DIR = I, BUS = SPLB
PORT PLB_busLock = PLB_busLock, DIR = I, BUS = SPLB
PORT PLB_RNW = PLB_RNW, DIR = I, BUS = SPLB
PORT PLB_BE = PLB_BE, DIR = I, VEC = [0:((C_SPLB_DWIDTH/8)-1)], BUS = SPLB
PORT PLB_MSize = PLB_MSize, DIR = I, VEC = [0:1], BUS = SPLB
PORT PLB_size = PLB_size, DIR = I, VEC = [0:3], BUS = SPLB
PORT PLB_type = PLB_type, DIR = I, VEC = [0:2], BUS = SPLB
PORT PLB_lockErr = PLB_lockErr, DIR = I, BUS = SPLB
PORT PLB_wrDBus = PLB_wrDBus, DIR = I, VEC = [0:(C_SPLB_DWIDTH-1)], BUS = SPLB
PORT PLB_wrBurst = PLB_wrBurst, DIR = I, BUS = SPLB
PORT PLB_rdBurst = PLB_rdBurst, DIR = I, BUS = SPLB
PORT PLB_wrPendReq = PLB_wrPendReq, DIR = I, BUS = SPLB
PORT PLB_rdPendReq = PLB_rdPendReq, DIR = I, BUS = SPLB
PORT PLB_wrPendPri = PLB_wrPendPri, DIR = I, VEC = [0:1], BUS = SPLB
PORT PLB_rdPendPri = PLB_rdPendPri, DIR = I, VEC = [0:1], BUS = SPLB
PORT PLB_reqPri = PLB_reqPri, DIR = I, VEC = [0:1], BUS = SPLB
PORT PLB_TAttribute = PLB_TAttribute, DIR = I, VEC = [0:15], BUS = SPLB
PORT Sl_addrAck = Sl_addrAck, DIR = O, BUS = SPLB
PORT Sl_SSize = Sl_SSize, DIR = O, VEC = [0:1], BUS = SPLB
PORT Sl_wait = Sl_wait, DIR = O, BUS = SPLB
PORT Sl_rearbitrate = Sl_rearbitrate, DIR = O, BUS = SPLB
PORT Sl_wrDAck = Sl_wrDAck, DIR = O, BUS = SPLB
PORT Sl_wrComp = Sl_wrComp, DIR = O, BUS = SPLB
PORT Sl_wrBTerm = Sl_wrBTerm, DIR = O, BUS = SPLB
PORT Sl_rdDBus = Sl_rdDBus, DIR = O, VEC = [0:(C_SPLB_DWIDTH-1)], BUS = SPLB
PORT Sl_rdWdAddr = Sl_rdWdAddr, DIR = O, VEC = [0:3], BUS = SPLB
PORT Sl_rdDAck = Sl_rdDAck, DIR = O, BUS = SPLB
PORT Sl_rdComp = Sl_rdComp, DIR = O, BUS = SPLB
PORT Sl_rdBTerm = Sl_rdBTerm, DIR = O, BUS = SPLB
PORT Sl_MBusy = Sl_MBusy, DIR = O, VEC = [0:(C_SPLB_NUM_MASTERS-1)], BUS = SPLB
PORT Sl_MWrErr = Sl_MWrErr, DIR = O, VEC = [0:(C_SPLB_NUM_MASTERS-1)], BUS = SPLB
PORT Sl_MRdErr = Sl_MRdErr, DIR = O, VEC = [0:(C_SPLB_NUM_MASTERS-1)], BUS = SPLB
PORT Sl_MIRQ = Sl_MIRQ, DIR = O, VEC = [0:(C_SPLB_NUM_MASTERS-1)], BUS = SPLB
 
END
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet_v3_20_a/data/tosnet_v2_1_0.bbd
0,0 → 1,9
##############################################################################
## Filename: /pcores/tosnet_v3_20_a/data/tosnet_v2_1_0.bbd
## Description: Black Box Definition
## Date: Tue Aug 03 15:44:32 2010 (by Create and Import Peripheral Wizard)
##############################################################################
 
Files
################################################################################
network_register.ngc,async_fifo.ngc,data_reg.ngc
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/pcores/tosnet.prj
0,0 → 1,26
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\proc_common_pkg.vhd"
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\or_muxcy.vhd"
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\family_support.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\lfsr.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\enc_8b10b.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\dec_8b10b.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\crcpack.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\commandpack.vhd"
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\pselect_f.vhd"
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\or_gate128.vhd"
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\ipif_pkg.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tpl_tx.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tpl_rx.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tdl_app_sync.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tdl_app_reg.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tdl_app_net.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tdl_app_master.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\crcgen.vhd"
vhdl proc_common_v3_00_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\proc_common_v3_00_a\hdl\vhdl\counter_f.vhd"
vhdl plbv46_slave_single_v1_01_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\plbv46_slave_single_v1_01_a\hdl\vhdl\plb_address_decoder.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tdl_top.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\devl\projnav\tal_top.vhd"
vhdl plbv46_slave_single_v1_01_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\plbv46_slave_single_v1_01_a\hdl\vhdl\plb_slave_attachment.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\hdl\vhdl\user_logic.vhd"
vhdl plbv46_slave_single_v1_01_a "C:\Xilinx\12.2\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\plbv46_slave_single_v1_01_a\hdl\vhdl\plbv46_slave_single.vhd"
vhdl tosnet_v3_20_a "D:\XilinxEDKProjects\MBTosNetInterfaceRev3_2\pcores\tosnet_v3_20_a\hdl\vhdl\tosnet.vhd"
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/readme.txt
0,0 → 1,97
 
TosNet rev3.2
MicroBlaze Peripheral, readme.txt
 
Simon Falsig
University of Southern Denmark
Copyright 2010
 
This file is part of the TosNet MicroBlaze Peripheral
 
The TosNet MicroBlaze peripheral is free software: you can redistribute it
and/or modify it under the terms of the GNU Lesser General Public License as
published by the Free Software Foundation, either version 3 of the License,
or (at your option) any later version.
 
The TosNet MicroBlaze peripheral is distributed in the hope that it will be
useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser
General Public License for more details.
 
You should have received a copy of the GNU Lesser General Public License
along with the TosNet MicroBlaze peripheral. If not, see
<http://www.gnu.org/licenses/>.
 
 
******************************************
* Description
******************************************
The TosNet MicroBlaze peripheral provides an implementation of the TosNet
core, interfaced to the MicroBlaze PLB bus, along with a software driver
to support the functionality.
 
 
******************************************
* Installation
******************************************
Copy the contents of the 'drivers' and 'pcores' folders to an EDK peripheral
repository, preserving the original folder structure.
 
For instance:
c:\XilinxEDKRepository\MyProcessorIPLib\pcores\tosnet_v3_20_a
c:\XilinxEDKRepository\MyProcessorIPLib\drivers\tosnet_v3_20_a
 
You should now have access to the TosNet core from within EDKs IP Library.
 
 
******************************************
* Usage, XPS
******************************************
1. Add the TosNet component to your design.
 
2. Make 'sig_in' and 'sig_out' external, and connect these to your
transmission components.
 
3. Connect 'clk_50M' to a 50 MHz clock signal.
 
4. Connect the 'sync_strobe' and 'system_halt' interrupt signals to an
interrupt controller, if necessary.
 
5. Connect the TosNet component to the PLB bus.
 
6. Configure the TosNet component to your likings ('Configure IP').
Important settings are the 'C_NODE_ID' and 'C_REG_ENABLE', that
configure the node id and register enables, respectively.
 
7. Generate addresses for the memory and register spaces. The memory space
needs 8 kB, the register space needs 40 B (in both cases, larger spaces
of course work fine too).
 
8. Done!
 
 
******************************************
* Usage, SDK
******************************************
1. Make sure that SDK is using the TosNet driver for the TosNet component.
 
2. Initialize a TosNet structure.
 
3. Use the API described in 'tosnet.h' to access the TosNet component.
 
 
******************************************
* Important notes
******************************************
The MicroBlaze peripheral uses the exact same source files as the standard
TosNet component. This also goes for the BlockRAM and FIFO cores. The cores
delivered with the peripheral are created for the xc6slx16,csg234 device.
 
If you need to use the peripheral with other devices, you may have to
recreate the cores, using the settings described in the readme in the
'pcores\tosnet_v3_20_a\netlist' folder.
 
******************************************
* End of file
******************************************
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/drivers/tosnet_v3_20_a/src/tosnet.h
0,0 → 1,50
/*****************************************************************************
* Filename: /drivers/tosnet_v1_00_a/src/tosnet.h
* Version: 3.20.a
* Description: tosnet Driver Header File
* Date: Mon Feb 15 11:56:16 2010 (by Create and Import Peripheral Wizard)
*****************************************************************************/
 
#ifndef TOSNET_H
#define TOSNET_H
 
/***************************** Include Files *******************************/
 
#include "xbasic_types.h"
#include "xstatus.h"
#include "xio.h"
 
/************************** Constant Definitions ***************************/
 
/**************************** Type Definitions *****************************/
 
 
typedef struct {
volatile unsigned int *MemBaseAddress; /* Base address of memory */
volatile unsigned int *RegBaseAddress; /* Base address of registers */
} TosNet;
 
/***************** Macros (Inline Functions) Definitions *******************/
 
/************************** Function Prototypes ****************************/
 
XStatus TosNet_Initialize(TosNet *instancePtr, unsigned int *MemBaseAddress, unsigned int *RegBaseAddress); //Initializes a TosNet structure with the addresses of the memory and registers
unsigned int TosNet_GetNodeID(TosNet *instancePtr); //Returns the id of the node
unsigned int TosNet_GetNodeAddress(TosNet *instancePtr); //Returns the current address (that is, its position in the ring, relative to the current master) of the node
unsigned int TosNet_GetRegEnable(TosNet *instancePtr); //Returns the reg enables (bit 0 is 1 if register 0 is enabled, bit 1 is 1 if register 1 is enabled, etc, up to bit 7)
int TosNet_IsOnline(TosNet *instancePtr); //Returns 1 if the network is online, 0 otherwise
int TosNet_IsMaster(TosNet *instancePtr); //Returns 1 if the node is master, 0 if slave
int TosNet_SystemHalted(TosNet *instancePtr); //Returns 1 if the system is halted, 0 otherwise
void TosNet_CommitIn(TosNet *instancePtr); //Commits the in registers
void TosNet_CommitOut(TosNet *instancePtr); //Commits the out registers
unsigned int TosNet_GetPacketCounter(TosNet *instancePtr); //Returns the value of the packet counter
unsigned int TosNet_GetErrorCounter(TosNet *instancePtr); //Returns the value of the error counter
unsigned int TosNet_GetResetCounter(TosNet *instancePtr); //Returns the value of the reset counter
inline volatile unsigned int *TosNet_CalcInAddress(TosNet *instancePtr, unsigned int nodeId, unsigned int regId, unsigned int index); //Returns a pointer to the shared memory block address of a specified in register at nodeId/regId/index
inline volatile unsigned int *TosNet_CalcOutAddress(TosNet *instancePtr, unsigned int nodeId, unsigned int regId, unsigned int index); //Returns a pointer to the shared memory block address of a specified out register at nodeId/regId/index
 
int TosNet_AsyncDataReady(TosNet *instancePtr); //Returns 1 if data is available from the asynchronous channel
int TosNet_ReadAsync(TosNet *instancePtr, unsigned char *readBuffer, unsigned int maxBytes, unsigned int *nodeId); //Reads up to maxBytes of data from the asynchronous channel, data is returned in readBuffer, nodeId holds the sender (if the current node is master), the id of the current node (if the current node is a slave), or 0 (if the data comes from a broadcast)
int TosNet_WriteAsync(TosNet *instancePtr, unsigned char *writeBuffer, unsigned int writeBytes, unsigned int nodeId); //Writes writeBytes of data from writeBuffer to the asynchronous channel, nodeId should be the id of the target node (if the current node is master), the id of the current node (if the current node is a slave), or 0 (if the current node is master and wants to do a broadcast)
 
#endif /** TOSNET_H */
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/drivers/tosnet_v3_20_a/src/Makefile
0,0 → 1,32
##############################################################################
## Filename: /drivers/tosnet_v1_00_a/src/Makefile
## Description: Microprocessor Driver Makefile
## Date: Mon Feb 15 11:56:16 2010 (by Create and Import Peripheral Wizard)
##############################################################################
 
COMPILER=
ARCHIVER=
CP=cp
COMPILER_FLAGS=
EXTRA_COMPILER_FLAGS=
LIB=libxil.a
 
RELEASEDIR=../../../lib
INCLUDEDIR=../../../include
INCLUDES=-I./. -I${INCLUDEDIR}
 
INCLUDEFILES=tosnet.h
LIBSOURCES=tosnet.c
OUTS = *.o
 
libs:
echo "Compiling tosnet"
$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS}
make clean
 
include:
${CP} $(INCLUDEFILES) $(INCLUDEDIR)
 
clean:
rm -rf ${OUTS}
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/drivers/tosnet_v3_20_a/src/tosnet.c
0,0 → 1,182
/*****************************************************************************
* Filename: /drivers/tosnet_v1_00_a/src/tosnet.c
* Version: 3.20.a
* Description: tosnet Driver Source File
* Date: Mon Feb 15 11:56:16 2010 (by Create and Import Peripheral Wizard)
*****************************************************************************/
 
 
#define NODE_ID_BITS 0xf
#define NODE_ID_OFFSET 8
#define NODE_ADDRESS_BITS 0xf
#define NODE_ADDRESS_OFFSET 12
#define REG_ENABLE_BITS 0xff
#define REG_ENABLE_OFFSET 16
#define SYSTEM_HALT_BITS 0x1
#define SYSTEM_HALT_OFFSET 4
#define ONLINE_BITS 0x1
#define ONLINE_OFFSET 2
#define IS_MASTER_BITS 0x1
#define IS_MASTER_OFFSET 3
#define ASYNC_VALID_BITS 0x1
#define ASYNC_VALID_OFFSET 7
#define ASYNC_NODE_ID_BITS 0xf
#define ASYNC_NODE_ID_OFFSET 28
#define ASYNC_BE_BITS 0x3
#define ASYNC_BE_OFFSET 26
#define ASYNC_FULL_BITS 0x1
#define ASYNC_FULL_OFFSET 5
 
/***************************** Include Files *******************************/
 
#include "tosnet.h"
 
/************************** Function Definitions ***************************/
 
XStatus TosNet_Initialize(TosNet *instancePtr, unsigned int *MemBaseAddress, unsigned int *RegBaseAddress)
{
instancePtr->MemBaseAddress = (volatile unsigned int*) MemBaseAddress;
instancePtr->RegBaseAddress = (volatile unsigned int*) RegBaseAddress;
 
(instancePtr->RegBaseAddress)[0] = 0x00000003;
(instancePtr->RegBaseAddress)[0] = 0x0;
return XST_SUCCESS;
}
 
unsigned int TosNet_GetNodeID(TosNet *instancePtr)
{
return (((instancePtr->RegBaseAddress)[0] >> NODE_ID_OFFSET) & NODE_ID_BITS);
}
 
unsigned int TosNet_GetNodeAddress(TosNet *instancePtr)
{
return (((instancePtr->RegBaseAddress)[0] >> NODE_ADDRESS_OFFSET) & NODE_ADDRESS_BITS);
}
 
unsigned int TosNet_GetRegEnable(TosNet *instancePtr)
{
return (((instancePtr->RegBaseAddress)[0] >> REG_ENABLE_OFFSET) & REG_ENABLE_BITS);
}
 
int TosNet_IsOnline(TosNet *instancePtr)
{
return (((instancePtr->RegBaseAddress)[0] >> ONLINE_OFFSET) & ONLINE_BITS);
}
 
int TosNet_IsMaster(TosNet *instancePtr)
{
return (((instancePtr->RegBaseAddress)[0] >> IS_MASTER_OFFSET) & IS_MASTER_BITS);
}
 
int TosNet_SystemHalted(TosNet *instancePtr)
{
return (((instancePtr->RegBaseAddress)[0] >> SYSTEM_HALT_OFFSET) & SYSTEM_HALT_BITS);
}
 
void TosNet_CommitIn(TosNet *instancePtr)
{
unsigned int regTemp = (instancePtr->RegBaseAddress)[0] & 0xfffffffc;
(instancePtr->RegBaseAddress)[0] = regTemp + 1;
(instancePtr->RegBaseAddress)[0] = regTemp;
return;
}
 
void TosNet_CommitOut(TosNet *instancePtr)
{
unsigned int regTemp = (instancePtr->RegBaseAddress)[0] & 0xfffffffc;
(instancePtr->RegBaseAddress)[0] = regTemp + 2;
(instancePtr->RegBaseAddress)[0] = regTemp;
return;
}
 
unsigned int TosNet_GetPacketCounter(TosNet *instancePtr)
{
return (instancePtr->RegBaseAddress)[1];
}
 
unsigned int TosNet_GetErrorCounter(TosNet *instancePtr)
{
return (instancePtr->RegBaseAddress)[2];
}
 
unsigned int TosNet_GetResetCounter(TosNet *instancePtr)
{
return (instancePtr->RegBaseAddress)[3];
}
 
inline volatile unsigned int *TosNet_CalcInAddress(TosNet *instancePtr, unsigned int nodeId, unsigned int regId, unsigned int index)
{
return (instancePtr->MemBaseAddress) + (nodeId << 6) + (regId << 3) + (1 << 2) + index;
}
 
inline volatile unsigned int *TosNet_CalcOutAddress(TosNet *instancePtr, unsigned int nodeId, unsigned int regId, unsigned int index)
{
return (instancePtr->MemBaseAddress) + (nodeId << 6) + (regId << 3) + index;
}
 
int TosNet_AsyncDataReady(TosNet *instancePtr)
{
return ((((instancePtr->RegBaseAddress)[0]) >> ASYNC_VALID_OFFSET) & ASYNC_VALID_BITS);
}
 
int TosNet_ReadAsync(TosNet *instancePtr, unsigned char *readBuffer, unsigned int maxBytes, unsigned int *nodeId)
{
int currentNode = ((((instancePtr->RegBaseAddress)[0]) >> ASYNC_NODE_ID_OFFSET) & ASYNC_NODE_ID_BITS);
unsigned int dataBuffer, beBuffer, byteCount = 0, n, done = 0;
while(TosNet_AsyncDataReady(instancePtr) && (currentNode == (((instancePtr->RegBaseAddress)[0] >> ASYNC_NODE_ID_OFFSET) & ASYNC_NODE_ID_BITS)) && (byteCount < maxBytes) && (done == 0))
{
beBuffer = (((instancePtr->RegBaseAddress)[0] >> ASYNC_BE_OFFSET) & ASYNC_BE_BITS);
dataBuffer = (instancePtr->RegBaseAddress)[4]; //This performs the read, and triggers the core to read out the next value from the FIFO
 
if(beBuffer < 3)
{
done = 1;
}
for(n=0; n<(beBuffer+1); n++)
{
readBuffer[byteCount++] = ((unsigned char*)(&dataBuffer))[n];
if(byteCount == maxBytes)
{
break;
}
}
}
*nodeId = currentNode;
return byteCount;
}
 
 
int TosNet_WriteAsync(TosNet *instancePtr, unsigned char *writeBuffer, unsigned int writeBytes, unsigned nodeId)
{
unsigned int dataBuffer, beBuffer, n, byteCount = 0;
unsigned int regTemp = ((instancePtr->RegBaseAddress)[0] & 0x03ffffff) + ((nodeId & ASYNC_NODE_ID_BITS) << ASYNC_NODE_ID_OFFSET);
while(!(((instancePtr->RegBaseAddress)[0] >> ASYNC_FULL_OFFSET) & ASYNC_FULL_BITS) && (byteCount < writeBytes))
{
dataBuffer = 0;
beBuffer = 0;
for(n=0; n<4; n++)
{
dataBuffer += (unsigned int)(writeBuffer[byteCount++] << (8*(3-n)));
beBuffer++;
if(byteCount == writeBytes)
{
break;
}
}
(instancePtr->RegBaseAddress)[0] = regTemp + (((beBuffer-1) & ASYNC_BE_BITS) << ASYNC_BE_OFFSET);
(instancePtr->RegBaseAddress)[4] = dataBuffer; //This performs the write, and triggers the core to write the value into the FIFO
}
return byteCount;
}
 
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/drivers/tosnet_v3_20_a/data/tosnet_v2_1_0.tcl
0,0 → 1,11
##############################################################################
## Filename: /drivers/tosnet_v3_20_a/data/tosnet_v2_1_0.tcl
## Description: Microprocess Driver Command (tcl)
## Date: Tue Aug 03 15:28:52 2010 (by Create and Import Peripheral Wizard)
##############################################################################
 
#uses "xillib.tcl"
 
proc generate {drv_handle} {
xdefine_include_file $drv_handle "xparameters.h" "tosnet" "NUM_INSTANCES" "DEVICE_ID" "C_BASEADDR" "C_HIGHADDR" "C_MEM0_BASEADDR" "C_MEM0_HIGHADDR"
}
/trunk/gateware/MicroBlaze_Peripheral_rev3_2/drivers/tosnet_v3_20_a/data/tosnet_v2_1_0.mdd
0,0 → 1,15
##############################################################################
## Filename: /drivers/tosnet_v3_20_a/data/tosnet_v2_1_0.mdd
## Description: Microprocessor Driver Definition
## Date: Tue Aug 03 15:28:52 2010 (by Create and Import Peripheral Wizard)
##############################################################################
 
OPTION psf_version = 2.1.0;
 
BEGIN DRIVER tosnet
 
OPTION supported_peripherals = (tosnet);
OPTION depends = (common_v1_00_a);
OPTION copyfiles = all;
 
END DRIVER

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