URL
https://opencores.org/ocsvn/verilog_fixed_point_math_library/verilog_fixed_point_math_library/trunk
Subversion Repositories verilog_fixed_point_math_library
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- This comparison shows the changes necessary to convert path
/verilog_fixed_point_math_library
- from Rev 6 to Rev 7
- ↔ Reverse comparison
Rev 6 → Rev 7
/trunk/Specifications.docx
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trunk/Specifications.docx
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Index: trunk/qdiv.v
===================================================================
--- trunk/qdiv.v (revision 6)
+++ trunk/qdiv.v (revision 7)
@@ -40,7 +40,7 @@
reg [N-2+Q:0] reg_working_dividend; // Working copy of the dividend
reg [2*N+Q-3:0] reg_working_divisor; // Working copy of the divisor
- reg [N:0] reg_count; // This is obviously a lot bigger than it needs to be, as we only need
+ reg [N-1:0] reg_count; // This is obviously a lot bigger than it needs to be, as we only need
// count to N-1+Q but, computing that number of bits requires a
// logarithm (base 2), and I don't know how to do that in a
// way that will work for everyone
/trunk/qmults.v
37,7 → 37,7
reg [2*N-2:0] reg_multiplier_temp; // a working copy of the multiplier |
reg [N-1:0] reg_multiplicand_temp; // a working copy of the umultiplicand |
|
reg [N:0] reg_count; // This is obviously a lot bigger than it needs to be, as we only need |
reg [N-1:0] reg_count; // This is obviously a lot bigger than it needs to be, as we only need |
// count to N, but computing that number of bits requires a |
// logarithm (base 2), and I don't know how to do that in a |
// way that will work for every possibility |