URL
https://opencores.org/ocsvn/w11/w11/trunk
Subversion Repositories w11
Compare Revisions
- This comparison shows the changes necessary to convert path
/w11
- from Rev 33 to Rev 34
- ↔ Reverse comparison
Rev 33 → Rev 34
/trunk/tools/asm-11/tests/test_0190_dot.mac
0,0 → 1,29
; $Id: test_0190_dot.mac 712 2015-11-01 22:53:45Z mueller $ |
; |
; test dot '.' handling |
; '.' refers in MACRO-11 (RT11 V4.0) to |
; - address of opcode in case of instructions |
; - current address in case of .word lists |
; |
.asect |
.blkw 400 |
|
; use . in branches |
|
br . ;;!! 000777 |
br .+2 ;;!! 000400 |
br .+4 ;;!! 000401 |
bcc .+4 ;;!! 103001 |
|
; use . in immedate (refers to address of instruction) |
|
mov #.,r0 ;;!! 001010: 012700 001010 |
cmp #.,#. ;;!! 001014: 022727 001014 001014 |
|
; use . in .word lists (refers to current address |
|
.word . ;;!! 001022: 001022 |
.word .,. ;;!! 001024: 001024 001026 |
.word .,0,. ;;!! 001030: 001030 000000 001034 |
|
.end |
/trunk/tools/asm-11/lib/vec_devcatch_reset.mac
0,0 → 1,49
; $Id: vec_devcatch_reset.mac 710 2015-08-31 06:19:56Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; re-write vector catcher for device interrupts (subset used by w11) |
; |
mov #v..dlr+2,v..dlr ; vec 60 (DL11-RX 1st) |
clr v..dlr+2 |
mov #v..dlt+2,v..dlt ; vec 64 (DL11-TX 1st) |
clr v..dlt+2 |
; |
mov #v..ptr+2,v..ptr ; vec 70 (PC11/PTR) |
clr v..ptr+2 |
mov #v..ptp+2,v..ptp ; vec 74 (PC11/PTP) |
clr v..ptp+2 |
; |
mov #v..kwl+2,v..kwl ; vec 100 (KW11-L) |
clr v..kwl+2 |
mov #v..kwp+2,v..kwp ; vec 104 (KW11-P) |
clr v..kwp+2 |
; |
mov #v..deu+2,v..deu ; vec 120 (DEUNA) |
clr v..deu+2 |
; |
mov #v..rl+2,v..rl ; vec 120 (RL11) |
clr v..rl+2 |
; |
mov #v..lp+2,v..lp ; vec 200 (LP11) |
clr v..lp+2 |
; |
mov #v..rk+2,v..rk ; vec 220 (RK11) |
clr v..rk+2 |
mov #v..tm+2,v..tm ; vec 224 (TM11) |
clr v..tm+2 |
; |
mov #v..rp+2,v..rp ; vec 254 (RHRP) |
clr v..rp+2 |
mov #v..iis+2,v..iis ; vec 250 (IIST) |
clr v..iis+2 |
; |
mov #v..d2r+2,v..d2r ; vec 300 (DL11-RX 2nd) |
clr v..d2r+2 |
mov #v..d2t+2,v..d2t ; vec 304 (DL11-TX 2nd) |
clr v..d2t+2 |
mov #v..dzr+2,v..dzr ; vec 310 (DZ11-RX) |
clr v..dzr+2 |
mov #v..dzt+2,v..dzt ; vec 314 (DZ11-TX) |
clr v..dzt+2 |
; |
/trunk/tools/asm-11/lib/defs_nzvc.mac
0,0 → 1,22
; $Id: defs_nzvc.mac 710 2015-08-31 06:19:56Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; definitions for condition code combinations |
; |
cp0000=000000 ; N=0 Z=0 V=0 C=0 |
cp000c=000001 ; N=0 Z=0 V=0 C=1 |
cp00v0=000002 ; N=0 Z=0 V=1 C=0 |
cp00vc=000003 ; N=0 Z=0 V=1 C=1 |
cp0z00=000004 ; N=0 Z=1 V=0 C=0 |
cp0z0c=000005 ; N=0 Z=1 V=0 C=1 |
cp0zv0=000006 ; N=0 Z=1 V=1 C=0 |
cp0zvc=000007 ; N=0 Z=1 V=1 C=1 |
cpn000=000010 ; N=1 Z=0 V=0 C=0 |
cpn00c=000011 ; N=1 Z=0 V=0 C=1 |
cpn0v0=000012 ; N=1 Z=0 V=1 C=0 |
cpn0vc=000013 ; N=1 Z=0 V=1 C=1 |
cpnz00=000014 ; N=1 Z=1 V=0 C=0 |
cpnz0c=000015 ; N=1 Z=1 V=0 C=1 |
cpnzv0=000016 ; N=1 Z=1 V=1 C=0 |
cpnzvc=000017 ; N=1 Z=1 V=1 C=1 |
/trunk/tools/asm-11/lib/tcode_std_start.mac
0,0 → 1,63
; $Id: tcode_std_start.mac 712 2015-11-01 22:53:45Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; Default tcode startup code |
; |
.include |lib/defs_bits.mac| |
.include |lib/defs_cpu.mac| |
.include |lib/defs_nzvc.mac| |
; |
.include |lib/vec_cpucatch.mac| |
.include |lib/vec_devcatch.mac| |
; |
. = 000200 |
jmp @#start |
; |
. = 002000 |
stack: |
; |
dostop: halt ; successful halt address is 2002 !! |
stop: br dostop ; no restart after successful halt !! |
; |
psreg: .word cp.dsr ; pointer to switch reg (default->hardware) |
pdreg: .word cp.dsr ; pointer to display reg (default->hardware) |
swsreg: .word 0 ; software switch reg |
swdreg: .word 0 ; software display reg |
; |
tstno: .word 0 ; test number |
runno: .word 0 ; run number |
; |
; |
start: reset ; general reset |
mov #stack,sp ; setup stack |
; |
mov #v..lp+2,v..lp ; setup LP11 vector catcher |
clr v..lp |
; |
tst swsreg ; software switch reg setup ? |
bne 200$ ; if yes use software swi and disp reg |
; |
mov #100$,v..iit ; setup IIT handler |
mov #cp.pr7,v..iit+2 |
; |
mov 200$,r5 ; setup failed probe code pointer |
mov @#cp.dsr,r0 ; test switch register |
clr @#cp.dsr ; test display register |
br 300$ |
; |
; IIT handler for probing. Simply use r5 as return address |
; --> successful probes simply fall through |
; --> unsuccessful probes branch to address given in r5 |
; |
100$: mov r5,(sp) |
rti |
; |
; setup software swi and disp reg |
; |
200$: mov #swsreg,psreg |
mov #swdreg,pdreg |
; |
300$: mov #v..iit+2,v..iit ; reset to iit vector catcher |
clr v..iit+2 |
; |
/trunk/tools/asm-11/lib/defs_reg70.mac
0,0 → 1,30
; $Id: defs_reg70.mac 707 2015-08-02 12:10:42Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; definitions for 11/70 CPU registers (as in defs_reg70.das) |
; |
stklim = 177774 |
pirq = 177772 |
mbrk = 177770 |
cpuerr = 177766 |
sysid = 177764 |
hisize = 177762 |
losize = 177760 |
ubmap = 170200 |
; |
ms.hm = 177752 |
ms.mai = 177750 |
ms.ctl = 177746 |
ms.err = 177744 |
ms.ehi = 177742 |
ms.elo = 177740 |
; |
; symbol definitions for cpuerr |
; |
cp.hlt = 000200 |
cp.aer = 000100 |
cp.nxm = 000040 |
cp.ito = 000020 |
cp.ysv = 000010 |
cp.rsv = 000004 |
/trunk/tools/asm-11/lib/vec_cpucatch.mac
1,8 → 1,8
; $Id: vec_cpucatch.mac 503 2013-04-06 19:44:13Z mueller $ |
; $Id: vec_cpucatch.mac 710 2015-08-31 06:19:56Z mueller $ |
; Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; vector catcher for the basic cpu interrupts |
; vector catcher for basic cpu interrupts |
; |
. = 000004 |
v..iit: .word v..iit+2 ; vec 4 |
/trunk/tools/asm-11/lib/vec_cpucatch_reset.mac
0,0 → 1,29
; $Id: vec_cpucatch_reset.mac 710 2015-08-31 06:19:56Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; re-write vector catcher for basic cpu interrupts |
; |
mov #v..iit+2,v..iit ; vec 4 |
clr v..iit+2 |
mov #v..rit+2,v..rit ; vec 10 |
clr v..rit+2 |
; |
mov #v..bpt+2,v..bpt ; vec 14 (T bit; BPT) |
clr v..bpt+2 |
mov #v..iot+2,v..iot ; vec 20 (IOT) |
clr v..iot+2 |
mov #v..pwr+2,v..pwr ; vec 24 (Power fail, not used) |
clr v..pwr+2 |
mov #v..emt+2,v..emt ; vec 30 (EMT) |
clr v..emt+2 |
mov #v..trp+2,v..trp ; vec 34 (TRAP) |
clr v..trp+2 |
; |
mov #v..pir+2,v..pir ; vec 240 (PIRQ) |
clr v..pir+2 |
mov #v..fpp+2,v..fpp ; vec 244 (FPP) |
clr v..fpp+2 |
mov #v..mmu+2,v..mmu ; vec 250 (MMU) |
clr v..mmu+2 |
; |
/trunk/tools/asm-11/lib/defs_mmu.mac
0,0 → 1,57
; $Id: defs_mmu.mac 707 2015-08-02 12:10:42Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; definitions for mmu registers (as in defs_mmu.das) |
; |
ssr0 = 177572 |
ssr1 = 177574 |
ssr2 = 177576 |
ssr3 = 172516 |
; |
uipdr = 177600 ; usr i page dsc base |
udpdr = 177620 ; usr d page dsc base |
udpdr = 177620 ; usr d page dsc base |
uipar = 177640 ; usr i page addr base |
udpar = 177660 ; usr d page addr base |
sipdr = 172200 ; sup i page dsc base |
sdpdr = 172220 ; sup d page dsc base |
sipar = 172240 ; sup i page addr base |
sdpar = 172260 ; sup d page addr base |
kipdr = 172300 ; ker i page dsc base |
kdpdr = 172320 ; ker d page dsc base |
kipar = 172340 ; ker i page addr base |
kdpar = 172360 ; ker d page addr base |
; |
; symbol definitions for ssr0 |
; |
m0.anr = 100000 |
m0.ale = 040000 |
m0.ard = 020000 |
m0.trp = 010000 |
m0.ent = 001000 |
m0.mai = 000400 |
m0.ico = 000200 |
m0.dsp = 000020 |
m0.ena = 000001 |
; |
; symbol definitions for ssr3 |
; |
m3.eub = 000040 |
m3.e22 = 000020 |
m3.dkm = 000004 |
m3.dsm = 000002 |
m3.dum = 000001 |
; |
; symbol definitions for pdr regs |
; |
md.aia = 000200 |
md.aiw = 000100 |
md.dwn = 000010 |
md.an7 = 000007 |
md.arw = 000006 |
md.atw = 000005 |
md.atr = 000004 |
md.an3 = 000003 |
md.aro = 000002 |
md.art = 000001 |
/trunk/tools/asm-11/lib/tcode_std_base.mac
0,0 → 1,37
; $Id: tcode_std_base.mac 710 2015-08-31 06:19:56Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; Default tcode base code for simple tests |
; |
.include |lib/tcode_std_start.mac| |
; |
clr @pdreg ; clear display reg |
jmp loop1 |
; |
; IOT handler |
; called at end of each test |
; increments tstno and updates display register |
; |
vh.iot: inc tstno ; bump test number |
; setup display reg |
movb tstno,swdreg ; low byte: test number |
movb runno,swdreg+1 ; high byte: pass number |
mov swdreg,@pdreg ; write display reg (is noop when sw dreg used) |
rtt |
; |
loop: bit #bit00,@psreg ; test 'loop bit' |
bne 1$ |
jmp stop |
|
1$: reset ; re-reset CPU for each pass |
mov #stack,sp ; re-init SP |
clr tstno ; reset test counter |
inc runno ; bump pass counter |
; |
.include |lib/vec_cpucatch_reset.mac| |
.include |lib/vec_devcatch_reset.mac| |
; |
loop1: |
mov #vh.iot,v..iot ; setup IOT trap handler |
mov #cp.pr7,v..iot+2 |
/trunk/tools/asm-11/lib/vec_devcatch.mac
0,0 → 1,82
; $Id: vec_devcatch.mac 710 2015-08-31 06:19:56Z mueller $ |
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
; License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
; |
; vector catcher for device interrupts (subset used by w11) |
; |
; w11 device summary from ibdr_maxisys.vhd: |
; |
; ibbase vec pri slot attn sror device name |
; 177560 060 4 7 7 1 3/2 DL11-RX 1st |
; 064 4 6 6 ^ DL11-TX 1st |
; 177550 070 4 3 3 10 4/1 PC11/PTR |
; 074 4 2 2 ^ PC11/PTP |
; 177546 100 6 14 15 - 1/3 KW11-L |
; 172540 104 7 17 - 1/1 KW11-P |
; 174510 120 5 14 9 1/4 DEUNA |
; 174400 160 5 12 12 5 2/2 RL11 |
; 177514 200 4 1 1 8 4/2 LP11 |
; 177400 220 5 11 11 4 2/3 RK11 |
; 172520 224 5 10 10 7 2/4 TM11 |
; 176700 254 5 13 13 6 2/1 RHRP |
; 177500 260 6 15 16 - 1/2 IIST |
; 176500 300 4 5 5 2 3/3 DL11-RX 2nd |
; 304 4 4 4 ^ DL11-TX 2nd |
; 160100 310? 5 9 9 3 3/1 DZ11-RX |
; 314? 5 8 8 ^ DZ11-TX |
; |
. = 000060 |
v..dlr: .word v..dlr+2 ; vec 60 (DL11-RX 1st) |
.word 0 |
v..dlt: .word v..dlt+2 ; vec 64 (DL11-TX 1st) |
.word 0 |
; |
v..ptr: .word v..ptr+2 ; vec 70 (PC11/PTR) |
.word 0 |
v..ptp: .word v..ptp+2 ; vec 74 (PC11/PTP) |
.word 0 |
; |
. = 000100 |
v..kwl: .word v..kwl+2 ; vec 100 (KW11-L) |
.word 0 |
v..kwp: .word v..kwp+2 ; vec 104 (KW11-P) |
.word 0 |
; |
. = 000120 |
v..deu: .word v..deu+2 ; vec 120 (DEUNA) |
.word 0 |
; |
. = 000160 |
v..rl: .word v..rl+2 ; vec 120 (RL11) |
.word 0 |
; |
; Note on vector 200 |
; MAINDECs use 200 also as default start address. This vector catcher |
; might therefore be overwritten later by startup code of test programs. |
; |
. = 000200 |
v..lp: .word v..lp+2 ; vec 200 (LP11) |
.word 0 |
; |
. = 000220 |
v..rk: .word v..rk+2 ; vec 220 (RK11) |
.word 0 |
v..tm: .word v..tm+2 ; vec 224 (TM11) |
.word 0 |
; |
. = 000254 |
v..rp: .word v..rp+2 ; vec 254 (RHRP) |
.word 0 |
v..iis: .word v..iis+2 ; vec 250 (IIST) |
.word 0 |
; |
. = 000300 |
v..d2r: .word v..d2r+2 ; vec 300 (DL11-RX 2nd) |
.word 0 |
v..d2t: .word v..d2t+2 ; vec 304 (DL11-TX 2nd) |
.word 0 |
v..dzr: .word v..dzr+2 ; vec 310 (DZ11-RX) |
.word 0 |
v..dzt: .word v..dzt+2 ; vec 314 (DZ11-TX) |
.word 0 |
; |
/trunk/tools/tcl/ibd_dl11/.cvsignore
0,0 → 1,82
pkgIndex.tcl |
/trunk/tools/tcl/ibd_dl11/util.tcl
0,0 → 1,38
# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-26 719 1.0 Initial version |
# |
|
package provide ibd_dl11 1.0 |
|
package require rlink |
package require rw11util |
package require rw11 |
|
namespace eval ibd_dl11 { |
# |
# setup register descriptions for ibd_dl11 --------------------------------- |
# |
|
regdsc RCSR {done 7} {ie 6} |
regdsc RRCSR {done 7} {ie 6} {rlim 14 3} |
|
regdsc XCSR {done 7} {ie 6} {maint 2} |
|
rw11util::regmap_add ibd_dl11 tt?.rcsr {l? RCSR r? RRCSR} |
rw11util::regmap_add ibd_dl11 tt?.xcsr {?? XCSR} |
|
} |
trunk/tools/tcl/ibd_dl11
Property changes :
Added: svn:ignore
## -0,0 +1,34 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_pc11/.cvsignore
===================================================================
--- trunk/tools/tcl/ibd_pc11/.cvsignore (nonexistent)
+++ trunk/tools/tcl/ibd_pc11/.cvsignore (revision 34)
@@ -0,0 +1 @@
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_pc11/util.tcl
===================================================================
--- trunk/tools/tcl/ibd_pc11/util.tcl (nonexistent)
+++ trunk/tools/tcl/ibd_pc11/util.tcl (revision 34)
@@ -0,0 +1,38 @@
+# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $
+#
+# Copyright 2015- by Walter F.J. Mueller
+#
+# This program is free software; you may redistribute and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation, either version 2, or at your option any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+# for complete details.
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-12-26 719 1.0 Initial version
+#
+
+package provide ibd_pc11 1.0
+
+package require rlink
+package require rw11util
+package require rw11
+
+namespace eval ibd_pc11 {
+ #
+ # setup register descriptions for ibd_pc11 ---------------------------------
+ #
+
+ regdsc RCSR {err 15} {busy 11} {done 7} {ie 6} {enb 0}
+
+ regdsc PCSR {err 15} {done 7} {ie 6}
+
+ rw11util::regmap_add ibd_pc11 pc?.rcsr {?? RCSR}
+ rw11util::regmap_add ibd_pc11 pc?.xcsr {?? PCSR}
+
+ variable ANUM 10
+}
Index: trunk/tools/tcl/ibd_pc11
===================================================================
--- trunk/tools/tcl/ibd_pc11 (nonexistent)
+++ trunk/tools/tcl/ibd_pc11 (revision 34)
trunk/tools/tcl/ibd_pc11
Property changes :
Added: svn:ignore
## -0,0 +1,34 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_ibmon/util.tcl
===================================================================
--- trunk/tools/tcl/ibd_ibmon/util.tcl (revision 33)
+++ trunk/tools/tcl/ibd_ibmon/util.tcl (revision 34)
@@ -1,4 +1,4 @@
-# $Id: util.tcl 668 2015-04-25 14:31:19Z mueller $
+# $Id: util.tcl 722 2015-12-30 19:45:46Z mueller $
#
# Copyright 2015- by Walter F.J. Mueller
#
@@ -13,6 +13,8 @@
#
# Revision History:
# Date Rev Version Comment
+# 2015-12-28 721 1.0.2 add regmap_add defs; add symbolic register dump
+# 2015-07-25 704 1.0.1 start: use args and args2opts
# 2015-04-25 668 1.0 Initial version
#
@@ -20,6 +22,7 @@
package require rutil
package require rlink
+package require rw11util
namespace eval ibd_ibmon {
#
@@ -37,9 +40,13 @@
# 'pseudo register', describes 1st word in return list element of read proc
# all flag bits from DAT3 and DAT0
regdsc FLAGS {burst 11} {tout 10} {nak 9} {ack 8} \
- {busy 7} {cacc 5} {racc 4} {rmw 3} {be1 2} {be0 1} {we 0}
+ {busy 7} {cacc 5} {racc 4} {rmw 3} {be1 2} {be0 1} {we 0}
#
- # setup: amap definitions for rbd_rbmon
+ rw11util::regmap_add ibd_ibmon im.cntl {r? CNTL}
+ rw11util::regmap_add ibd_ibmon im.stat {r? STAT}
+ rw11util::regmap_add ibd_ibmon im.addr {r? ADDR}
+ #
+ # setup: amap definitions for ibd_ibmon
#
proc setup {{cpu "cpu0"} {base 0160000}} {
$cpu imap -insert im.cntl [expr {$base + 000}]
@@ -50,7 +57,7 @@
$cpu imap -insert im.data [expr {$base + 012}]
}
#
- # init: reset rbd_rbmon (stop, reset alim)
+ # init: reset ibd_ibmon (stop, reset alim)
#
proc init {{cpu "cpu0"}} {
$cpu cp \
@@ -60,20 +67,19 @@
-wibr im.addr 0x0000
}
#
- # start: start the rbmon
+ # start: start the ibmon
#
- proc start {{cpu "cpu0"} {opts {}}} {
- array set defs { conena 1 remena 1 locena 1 wena 1 }
- array set defs $opts
+ proc start {{cpu "cpu0"} args} {
+ args2opts opts { conena 1 remena 1 locena 1 wena 1 } {*}$args
$cpu cp -wibr im.cntl [regbld ibd_ibmon::CNTL start \
- [list wena $defs(wena)] \
- [list locena $defs(locena)] \
- [list remena $defs(remena)] \
- [list conena $defs(conena)] \
+ [list wena $opts(wena)] \
+ [list locena $opts(locena)] \
+ [list remena $opts(remena)] \
+ [list conena $opts(conena)] \
]
}
#
- # stop: stop the rbmon
+ # stop: stop the ibmon
#
proc stop {{cpu "cpu0"}} {
$cpu cp -wibr im.cntl [regbld ibd_ibmon::CNTL stop]
@@ -169,7 +175,7 @@
set eind [expr {1 - [llength $mondat] }]
append rval \
- " ind addr data delay nbsy btnab-crm10w acc-mode"
+ " ind addr data delay nbsy btnab-crm10w acc-mod"
set mtout [regbld ibd_ibmon::FLAGS tout ]
set mnak [regbld ibd_ibmon::FLAGS nak ]
@@ -216,15 +222,26 @@
if {$fracc} { set pacc "rem"}
set pedly [expr {$edly!=$edlymax ? [format "%5d" $edly] : " --"}]
+
set ename [format "%6.6o" $eaddr]
+ set etext ""
+ if {[$cpu imap -testaddr $eaddr]} {
+ set ename [$cpu imap -name $eaddr]
+ set eam "l${prw}"
+ if {$fracc} { set eam "r${prw}"}
+ set etext [rw11util::regmap_txt $ename $eam $edata]
+ }
+
set comment ""
if {$fnak} {append comment " NAK=1!"}
if {$ftout} {append comment " TOUT=1!"}
- if {[$cpu imap -testaddr $eaddr]} {set ename [$cpu imap -name $eaddr]}
+
append rval [format \
- "\n%5d %-10s %6.6o %5s %4d %s %s %s %s" \
+ "\n%5d %-10s %6.6o %5s %4d %s %s %s" \
$eind $ename $edata $pedly $enbusy [pbvi b12 $eflag] \
- $prmw $pacc $comment]
+ $prmw $pacc]
+ if {$etext ne ""} {append rval " $etext"}
+ if {$comment ne ""} {append rval " $comment"}
incr eind
}
/trunk/tools/tcl/rw11util/regmap.tcl
0,0 → 1,97
# $Id: regmap.tcl 720 2015-12-28 14:52:45Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-28 720 1.0 Initial version |
# 2015-12-26 719 0.1 First draft |
# |
|
package provide rw11util 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11util { |
|
variable regmap |
array set regmap {} |
variable regmap_loaded 0 |
|
# |
# regmap_add: add a register definition |
# |
proc regmap_add {pack name amlist} { |
variable regmap |
if {[info exists regmap($name)]} { |
error "E-regmap_add: register '$name' already defined" |
} |
|
set regmap($name) [list $pack $amlist] |
return "" |
} |
|
# |
# regmap_get: get a register definition |
# |
proc regmap_get {name am} { |
variable regmap |
variable regmap_loaded |
|
if {!$regmap_loaded} {regmap_load} |
|
foreach key [array names regmap] { |
if {[string match $key $name]} { |
set dsc $regmap($key) |
set pack [lindex $dsc 0] |
set amlist [lindex $dsc 1] |
foreach {amp reg} $amlist { |
if {[string match $amp $am]} { |
package require $pack |
return "${pack}::${reg}" |
} |
} |
} |
} |
return "" |
} |
|
# |
# regmap_txt: get text representation of a register |
# |
proc regmap_txt {name am val} { |
set rdsc [regmap_get $name $am] |
if {$rdsc eq ""} return "" |
return [regtxt $rdsc $val] |
} |
|
# |
# regmap_load: load all rw11 register definitions |
# |
proc regmap_load {} { |
variable regmap_loaded |
package require rw11 |
package require ibd_dl11 |
package require ibd_ibmon |
package require ibd_lp11 |
package require ibd_pc11 |
package require ibd_rhrp |
package require ibd_rk11 |
package require ibd_rl11 |
package require ibd_tm11 |
set regmap_loaded 1 |
return "" |
} |
|
|
} |
/trunk/tools/tcl/rw11util/.cvsignore
0,0 → 1,97
pkgIndex.tcl |
trunk/tools/tcl/rw11util
Property changes :
Added: svn:ignore
## -0,0 +1,34 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_rhrp/util.tcl
===================================================================
--- trunk/tools/tcl/ibd_rhrp/util.tcl (revision 33)
+++ trunk/tools/tcl/ibd_rhrp/util.tcl (revision 34)
@@ -1,4 +1,4 @@
-# $Id: util.tcl 690 2015-06-07 18:23:51Z mueller $
+# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $
#
# Copyright 2015- by Walter F.J. Mueller
#
@@ -13,6 +13,7 @@
#
# Revision History:
# Date Rev Version Comment
+# 2015-12-26 719 1.0.2 add regmap_add defs
# 2015-06-06 690 1.0.1 rdump: all online units now shown by default
# 2015-03-21 659 1.0 Initial version
#
@@ -20,14 +21,17 @@
package provide ibd_rhrp 1.0
package require rlink
+package require rw11util
package require rw11
namespace eval ibd_rhrp {
+
#
# setup register descriptions for ibd_rhrp ---------------------------------
#
- regdsc CS1 {sc 15} {tre 14} {dva 11} {bae 9 2} \
- {rdy 7} {ie 6} {func 5 5} {go 0}
+ regdsc CS1 {sc 15} {tre 14} {dva 11} {bae 9 2} {rdy 7} {ie 6} \
+ {func 5 5 "s:NOOP:UNL:SEEK:RECAL:DCLR:PORE:OFFS:RETC:PRES:PACK:FU12:FU13:SEAR:FU15:FU16:FU17:FU20:FU21:FU22:FU23:WCD:WCHD:FU26:FU27:WRITE:WHD:FU32:FU33:READ:RHD:FU36:FU37"} \
+ {go 0}
variable FUNC_NOOP [bvi b5 "00000"]
variable FUNC_UNL [bvi b5 "00001"]
variable FUNC_SEEK [bvi b5 "00010"]
@@ -46,13 +50,15 @@
variable FUNC_READ [bvi b5 "11100"]
variable FUNC_RHD [bvi b5 "11101"]
- regdsc RCS1 {val 15 8} {func 5 5} {go 0}
+ regdsc RCS1 {val 15 8} \
+ {func 5 5 "s:FU00:WUNIT:CUNIT:DONE:WIDLY:FU05:FU06:FU07:FU10:FU11:FU12:FU13:FU14:FU15:FU16:FU17:FU20:FU21:FU22:FU23:FU24:FU25:FU26:FU27:FU30:FU31:FU32:FU33:FU34:FU35:FU36:FU37"} \
+ {go 0}
variable RFUNC_WUNIT [bvi b5 "00001"]
variable RFUNC_CUNIT [bvi b5 "00010"]
variable RFUNC_DONE [bvi b5 "00011"]
variable RFUNC_WIDLY [bvi b5 "00100"]
- regdsc DA {ta 12 5 2d} {sa 5 6 2d}
+ regdsc DA {ta 12 5 d} {sa 5 6 d}
regdsc CS2 {wce 14} {ned 12} {nem 11} {pge 10} {or 7} {ir 6} \
{clr 5} {pat 4} {bai 3} {unit 2 3 d}
regdsc DS {ata 15} {erp 14} {pip 13} {mol 12} {wrl 11} {lbt 10} {dpr 8} \
@@ -59,7 +65,7 @@
{dry 7} {vv 6} {om 0}
regdsc ER1 {uns 14} {iae 10} {aoe 9} {rmr 2} {ilf 0}
regdsc AS {u3 3} {u2 2} {u1 1} {u0 0}
- regdsc LA {sc 11 6 2d}
+ regdsc LA {sc 11 6 d}
regdsc OF {fmt 12} {eci 11} {hci 10} {odi 7} {off 6 7}
variable DTE_RP04 [bvi b3 "000"]
@@ -77,11 +83,22 @@
variable DT_RP07 020042
regdsc SN {d3 15 4 d} {d2 11 4 d} {d1 7 4 d} {d0 3 4 d}
- regdsc OF {odi 7}
regdsc DC {dc 9 10 d}
regdsc CS3 {ie 6}
+ rw11util::regmap_add ibd_rhrp rp?.cs1 {l? CS1 rr CS1 rw RCS1}
+ rw11util::regmap_add ibd_rhrp rp?.da {?? DA}
+ rw11util::regmap_add ibd_rhrp rp?.cs2 {?? CS2}
+ rw11util::regmap_add ibd_rhrp rp?.ds {?? DS}
+ rw11util::regmap_add ibd_rhrp rp?.er1 {?? ER1}
+ rw11util::regmap_add ibd_rhrp rp?.as {?? AS}
+ rw11util::regmap_add ibd_rhrp rp?.la {?? LA}
+ rw11util::regmap_add ibd_rhrp rp?.of {?? OF}
+ rw11util::regmap_add ibd_rhrp rp?.sn {?? SN}
+ rw11util::regmap_add ibd_rhrp rp?.dc {?? DC}
+ rw11util::regmap_add ibd_rhrp rp?.cs3 {?? CS3}
+
variable ANUM 6
#
/trunk/tools/tcl/rw11/dmhbpt.tcl
0,0 → 1,155
# $Id: dmhbpt.tcl 701 2015-07-19 12:58:29Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-17 701 1.0 Initial version |
# 2015-07-05 697 0.1 First draft |
# |
|
package provide rw11 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11 { |
# |
# setup dmhbpt unit register descriptions for w11a ------------------------- |
# |
regdsc HB_CNTL {mode 5 2} {irena 2} {dwena 1} {drena 0} |
regdsc HB_STAT {irseen 2} {dwseen 1} {drseen 0} |
|
# |
# hb_set: set breakpoint |
# |
proc hb_set {cpu unit type lolim {hilim 0} } { |
hb_ucheck $cpu $unit |
if {![regexp {^[ksu]?[rwi]+$} $type]} { |
error "hb_set-E: bad type '$type', only ksu and iwr allowed" |
} |
set irena [string match *i* $type] |
set dwena [string match *w* $type] |
set drena [string match *r* $type] |
set mode 2 |
if {[string match *k* $type]} {set mode 0} |
if {[string match *s* $type]} {set mode 1} |
if {[string match *u* $type]} {set mode 3} |
if {$hilim < $lolim} {set hilim $lolim} |
|
$cpu cp -wreg "hb${unit}.cntl" \ |
[regbld rw11::HB_CNTL [list mode $mode] \ |
[list irena $irena] \ |
[list dwena $dwena] \ |
[list drena $drena] ] \ |
-wreg "hb${unit}.stat" 0 \ |
-wreg "hb${unit}.hilim" $hilim \ |
-wreg "hb${unit}.lolim" $lolim |
return "" |
} |
|
# |
# hb_remove: remove breakpoint |
# |
proc hb_remove {cpu {unit -1}} { |
if {$unit >= 0} { |
hb_ucheck $cpu $unit |
set ulist [list $unit] |
} else { |
set ulist {} |
set nmax [$cpu get hashbpt] |
for {set i 0} {$i<$nmax} {incr i} {lappend ulist $i} |
} |
set clist {} |
foreach i $ulist { |
lappend clist -wreg "hb${i}.cntl" 0 |
lappend clist -wreg "hb${i}.stat" 0 |
lappend clist -wreg "hb${i}.hilim" 0 |
lappend clist -wreg "hb${i}.lolim" 0 |
} |
$cpu cp {*}$clist |
return "" |
} |
|
# |
# hb_clear: clear breakpoint status |
# |
proc hb_clear {cpu {unit -1}} { |
if {$unit >= 0} { |
hb_ucheck $cpu $unit |
$cpu cp -wreg "hb${unit}.stat" 0 |
} else { |
set nbpt [$cpu get hashbpt] |
if {$nbpt > 0} { |
set clist {} |
for {set i 0} {$i < $nbpt} {incr i} { |
lappend clist -wreg "hb${i}.stat" 0 |
} |
$cpu cp {*}$clist |
} |
} |
return "" |
} |
|
# |
# hb_list: list breakpoints |
# |
proc hb_list {cpu {unit -1}} { |
set nmax [$cpu get hashbpt] |
set rval "" |
for {set i 0} {$i<$nmax} {incr i} { |
if {$i>0} {append rval "\n"} |
append rval "hb${i}: " |
append rval [hb_show $cpu $i] |
} |
return $rval |
} |
|
# |
# hb_show: show single breakpoint |
# |
proc hb_show {cpu unit} { |
hb_ucheck $cpu $unit |
$cpu cp -rreg "hb${unit}.cntl" cntl \ |
-rreg "hb${unit}.stat" stat \ |
-rreg "hb${unit}.hilim" hilim \ |
-rreg "hb${unit}.lolim" lolim |
set p_cntl [lindex {"k" "s" " " "u"} [regget rw11::HB_CNTL(mode) $cntl] ] |
if {[regget rw11::HB_CNTL(irena) $cntl]} {append p_cntl "i"} |
if {[regget rw11::HB_CNTL(dwena) $cntl]} {append p_cntl "w"} |
if {[regget rw11::HB_CNTL(drena) $cntl]} {append p_cntl "r"} |
set p_stat "" |
if {[regget rw11::HB_STAT(irseen) $stat]} {append p_stat "i"} |
if {[regget rw11::HB_STAT(dwseen) $stat]} {append p_stat "w"} |
if {[regget rw11::HB_STAT(drseen) $stat]} {append p_stat "r"} |
set rval "" |
if {$cntl == 0} { |
append rval "type: off" |
} else { |
append rval [format "type: %-4s" $p_cntl] |
append rval [format " seen: %-3s" $p_stat] |
append rval [format " lim: %6.6o" $lolim] |
if {$lolim!=$hilim} {append rval [format " : %6.6o" $hilim]} |
} |
return $rval |
} |
|
# |
# hb_check: check for valid unit number |
# |
proc hb_ucheck {cpu unit} { |
if {$unit < 0 || $unit >= [$cpu get hashbpt]} { |
error "hb_..-E: '$unit' out of range" |
} |
return "" |
} |
} |
/trunk/tools/tcl/rw11/asm.tcl
1,6 → 1,6
# $Id: asm.tcl 575 2014-07-27 20:55:41Z mueller $ |
# $Id: asm.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
13,6 → 13,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-25 704 1.0.4 asmrun,asmtreg,asmtmem: use args in proc definition |
# 2014-07-26 575 1.0.3 add asmwait_tout variable, use in asmwait |
# 2014-07-10 568 1.0.2 add errcnt return for asmtreg and asmtmem |
# 2014-03-01 552 1.0.1 BUGFIX: asmwait checks now pc if stop: defined |
31,39 → 32,38
# |
# asmrun: run a program loaded with ldasm |
# |
proc asmrun {cpu symName opts} { |
proc asmrun {cpu symName args} { |
upvar 1 $symName sym |
array set defs {r0 0 r1 0 r2 0 r3 0 r4 0 r5 0} |
array set defs $opts |
array set opts {r0 0 r1 0 r2 0 r3 0 r4 0 r5 0} |
array set opts $args |
|
if {![info exists defs(pc)]} { |
if {![info exists opts(pc)]} { |
if {[info exists sym(start)]} { |
set defs(pc) $sym(start) |
set opts(pc) $sym(start) |
} else { |
error "neither opts(pc) nor sym(start) given" |
} |
} |
|
if {![info exists defs(sp)]} { |
if {![info exists opts(sp)]} { |
if {[info exists sym(stack)]} { |
set defs(sp) $sym(stack) |
set opts(sp) $sym(stack) |
} elseif {[info exists sym(start)]} { |
set defs(sp) $sym(start) |
set opts(sp) $sym(start) |
} else { |
error "neither opts(sp) nor sym(stack) or sym(start) given" |
} |
} |
|
$cpu cp -wr0 $defs(r0) \ |
-wr1 $defs(r1) \ |
-wr2 $defs(r2) \ |
-wr3 $defs(r3) \ |
-wr4 $defs(r4) \ |
-wr5 $defs(r5) |
$cpu cp -wr0 $opts(r0) \ |
-wr1 $opts(r1) \ |
-wr2 $opts(r2) \ |
-wr3 $opts(r3) \ |
-wr4 $opts(r4) \ |
-wr5 $opts(r5) \ |
-wsp $opts(sp) \ |
-stapc $opts(pc) |
|
$cpu cp -wsp $defs(sp) \ |
-stapc $defs(pc) |
|
return "" |
} |
|
86,14 → 86,14
# |
# asmtreg: test registers after running a program loaded with ldasm |
# |
proc asmtreg {cpu opts} { |
array set defs $opts |
set cpcmd "" |
foreach key [lsort [array names defs]] { |
append cpcmd " -r$key -edata $defs($key)" |
proc asmtreg {cpu args} { |
array set opts $args |
set clist {} |
foreach key [lsort [array names opts]] { |
lappend clist "-r${key}" -edata $opts($key) |
} |
set errbeg [rlc errcnt] |
eval $cpu cp $cpcmd |
$cpu cp {*}$clist |
return [expr [rlc errcnt] - $errbeg] |
} |
|
100,13 → 100,18
# |
# asmtmem: test memory after running a program loaded with ldasm |
# |
proc asmtmem {cpu base list} { |
set nw [llength $list] |
if {$nw == 0} { |
error "asmtreg called with empty list" |
proc asmtmem {cpu args} { |
set clist {} |
foreach {base vlist} $args { |
set nw [llength $vlist] |
if {$nw == 0} { |
error "asmtreg called with empty value list" |
} |
lappend clist -wal $base |
lappend clist -brm $nw -edata $vlist |
} |
set errbeg [rlc errcnt] |
$cpu cp -wal $base -brm $nw -edata $list |
$cpu cp {*}$clist |
return [expr [rlc errcnt] - $errbeg] |
} |
|
/trunk/tools/tcl/rw11/defs.tcl
1,6 → 1,6
# $Id: defs.tcl 621 2014-12-26 21:20:05Z mueller $ |
# $Id: defs.tcl 719 2015-12-27 09:45:43Z mueller $ |
# |
# Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# Copyright 2014-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
13,6 → 13,8
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-26 719 1.0.2 add regmap_add defs; add CNTRL def |
# 2015-09-06 710 1.0.1 regdsc PSW: add silent n,z,v,c; *mode syms; fix tflag |
# 2014-03-07 553 1.0 Initial version (extracted from util.tcl) |
# |
|
20,6 → 22,7
|
package require rlink |
package require rwxxtpp |
package require rw11util |
|
namespace eval rw11 { |
# |
26,7 → 29,8
# setup cp interface register descriptions for w11a ----------------------- |
# |
regdsc CP_CNTL {func 3 0} |
regdsc CP_STAT {rust 7 4} {halt 3} {go 2} {merr 1} {err 0} |
regdsc CP_STAT {suspext 9} {suspint 8} {rust 7 4} \ |
{susp 3} {go 2} {merr 1} {err 0} |
regdsc CP_AH {ubm 7} {p22 6} {addr 5 6} |
# |
# setup w11a register descriptions ----------------------------------------- |
33,7 → 37,9
# |
# PSW - processor status word -------------------------------------- |
set A_PSW 0177776 |
regdsc PSW {cmode 15 2} {pmode 13 2} {rset 11} {pri 7 3} {tflag 3} {cc 3 4} |
regdsc PSW {cmode 15 2 "s:k:s:x:u"} {pmode 13 2 "s:k:s:x:u"} \ |
{rset 11} {pri 7 3 "d"} {tflag 4} {cc 3 4} \ |
{n 3 1 "-"} {z 2 1 "-"} {v 1 1 "-"} {c 0 1 "-"} |
# |
# SSR0 - MMU Segment Status Register #0 ---------------------------- |
set A_SSR0 0177572 |
69,6 → 75,22
set A_CPUERR 0177766 |
regdsc CPUERR {illhlt 7} {adderr 6} {nxm 5} {iobto 4} {ysv 3} {rsv 2} |
# |
# CNTRL - Memory System Control Register ------------------------- |
set A_CNTRL 0177746 |
regdsc CNTRL {frep 5 2} {fmiss 3 2} {disutrap 1} {distrap 0} |
# |
# setup regmap |
# |
rw11util::regmap_add rw11 psw {?? PSW} |
rw11util::regmap_add rw11 ssr0 {?? SSR0} |
rw11util::regmap_add rw11 ssr1 {?? SSR1} |
rw11util::regmap_add rw11 ssr3 {?? SSR3} |
rw11util::regmap_add rw11 sdr???.? {?? SDR} |
rw11util::regmap_add rw11 pirq {?? PIRQ} |
rw11util::regmap_add rw11 cpuerr {?? CPUERR} |
# |
rw11util::regmap_add rw11 cntrl {?? CNTRL} |
# |
# other w11a definitions --------------------------------------------------- |
# Interrupt vectors ----------------------------------------------- |
# |
/trunk/tools/tcl/rw11/tbench.tcl
1,4 → 1,4
# $Id: tbench.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: tbench.tcl 702 2015-07-19 17:36:09Z mueller $ |
# |
# Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
62,6 → 62,7
} |
|
if {![file readable "$tbase/$fname"]} { |
puts "-E: file $tbase/$fname not found or readable" |
error "-E: file $tbase/$fname not found or readable" |
} |
|
/trunk/tools/tcl/rw11/dasm.tcl
0,0 → 1,457
# $Id: dasm.tcl 718 2015-12-26 15:59:48Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-25 717 1.1 add dasm_inst2txt; add nriName arg in dasm_iline |
# 2015-08-04 709 1.0 Initial version |
# 2015-07-26 705 0.1 First draft |
# |
|
package provide rw11 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11 { |
|
#code mask name type acinf bwf |
variable dasm_opdsc { \ |
{0000000 0000000 halt 0arg {} - } \ |
{0000001 0000000 wait 0arg {} - } \ |
{0000002 0000000 rti 0arg {po po} w } \ |
{0000003 0000000 bpt 0arg {} - } \ |
{0000004 0000000 iot 0arg {} - } \ |
{0000005 0000000 reset 0arg {} - } \ |
{0000006 0000000 rtt 0arg {po po} w } \ |
{0000007 0000000 !mfpt 0arg {} - } \ |
{0000100 0000077 jmp 1arg {da} w } \ |
{0000200 0000007 rts 1reg {po} w } \ |
{0000230 0000007 spl spl {} - } \ |
{0000240 0000017 cl ccop {} - } \ |
{0000260 0000017 se ccop {} - } \ |
{0000300 0000077 swab 1arg {dm} w } \ |
{0000400 0000377 br br {} - } \ |
{0001000 0000377 bne br {} - } \ |
{0001400 0000377 beq br {} - } \ |
{0002000 0000377 bge br {} - } \ |
{0002400 0000377 blt br {} - } \ |
{0003000 0000377 bgt br {} - } \ |
{0003400 0000377 ble br {} - } \ |
{0004000 0000777 jsr rsrc {da pu} w } \ |
{0005000 0000077 clr 1arg {dw} w } \ |
{0005100 0000077 com 1arg {dm} w } \ |
{0005200 0000077 inc 1arg {dm} w } \ |
{0005300 0000077 dec 1arg {dm} w } \ |
{0005400 0000077 neg 1arg {dm} w } \ |
{0005500 0000077 adc 1arg {dm} w } \ |
{0005600 0000077 sbc 1arg {dm} w } \ |
{0005700 0000077 tst 1arg {dr} w } \ |
{0006000 0000077 ror 1arg {dm} w } \ |
{0006100 0000077 rol 1arg {dm} w } \ |
{0006200 0000077 asr 1arg {dm} w } \ |
{0006300 0000077 asl 1arg {dm} w } \ |
{0006400 0000077 mark mark {po} w } \ |
{0006500 0000077 mfpi 1arg {dr pu} w } \ |
{0006600 0000077 mtpi 1arg {po dw} w } \ |
{0006700 0000077 sxt 1arg {dw} w } \ |
{0007000 0000077 !csm 1arg {dr pu pu pu} - } \ |
{0007200 0000077 !tstset 1arg {dm} - } \ |
{0007300 0000077 !wrtlck 1arg {dw} w } \ |
{0010000 0007777 mov 2arg {sr dw} w } \ |
{0020000 0007777 cmp 2arg {sr dr} w } \ |
{0030000 0007777 bit 2arg {sr dr} w } \ |
{0040000 0007777 bic 2arg {sr dm} w } \ |
{0050000 0007777 bis 2arg {sr dm} w } \ |
{0060000 0007777 add 2arg {sr dm} w } \ |
{0070000 0000777 mul rdst {dr} w } \ |
{0071000 0000777 div rdst {dr} w } \ |
{0072000 0000777 ash rdst {dr} w } \ |
{0073000 0000777 ashc rdst {dr} w } \ |
{0074000 0000777 xor rsrc {dm} w } \ |
{0077000 0000777 sob sob {} - } \ |
{0100000 0000377 bpl br {} - } \ |
{0100400 0000377 bmi br {} - } \ |
{0101000 0000377 bhi br {} - } \ |
{0101400 0000377 blos br {} - } \ |
{0102000 0000377 bvc br {} - } \ |
{0102400 0000377 bvs br {} - } \ |
{0103000 0000377 bcc br {} - } \ |
{0103400 0000377 bcs br {} - } \ |
{0104000 0000377 emt trap {} - } \ |
{0104400 0000377 trap trap {} - } \ |
{0105000 0000077 clrb 1arg {dw} b } \ |
{0105100 0000077 comb 1arg {dm} b } \ |
{0105200 0000077 incb 1arg {dm} b } \ |
{0105300 0000077 decb 1arg {dm} b } \ |
{0105400 0000077 negb 1arg {dm} b } \ |
{0105500 0000077 adcb 1arg {dm} b } \ |
{0105600 0000077 sbcb 1arg {dm} b } \ |
{0105700 0000077 tstb 1arg {dr} b } \ |
{0106000 0000077 rorb 1arg {dm} b } \ |
{0106100 0000077 rolb 1arg {dm} b } \ |
{0106200 0000077 asrb 1arg {dm} b } \ |
{0106300 0000077 aslb 1arg {dm} b } \ |
{0106400 0000077 !mtps 1arg {} - } \ |
{0106500 0000077 mfpd 1arg {dr pu} w } \ |
{0106600 0000077 mtpd 1arg {po dw} w } \ |
{0106700 0000077 !mfps 1arg {} - } \ |
{0110000 0007777 movb 2arg {sr dw} b } \ |
{0120000 0007777 cmpb 2arg {sr dr} b } \ |
{0130000 0007777 bitb 2arg {sr dr} b } \ |
{0140000 0007777 bicb 2arg {sr dm} b } \ |
{0150000 0007777 bisb 2arg {sr dm} b } \ |
{0160000 0007777 sub 2arg {sr dm} b } \ |
{0170000 0000000 !cfcc 0arg {} - } \ |
{0170001 0000000 !setf 0arg {} - } \ |
{0170011 0000000 !setd 0arg {} - } \ |
{0170002 0000000 !seti 0arg {} - } \ |
{0170012 0000000 !setl 0arg {} - } \ |
{0170100 0000077 !ldfps 1fpp {dr} w } \ |
{0170200 0000077 !stfps 1fpp {dw} w } \ |
{0170300 0000077 !stst 1fpp {dw} w } \ |
{0170400 0000077 !clrf 1fpp {dw} f } \ |
{0170500 0000077 !tstf 1fpp {dr} f } \ |
{0170600 0000077 !absf 1fpp {dm} f } \ |
{0170700 0000077 !negf 1fpp {dm} f } \ |
{0171000 0000377 !mulf rfpp {dr} f } \ |
{0171400 0000377 !modf rfpp {dr} f } \ |
{0172000 0000377 !addf rfpp {dr} f } \ |
{0172400 0000377 !ldf rfpp {dr} f } \ |
{0173000 0000377 !subf rfpp {dr} f } \ |
{0173400 0000377 !cmpf rfpp {dr} f } \ |
{0174000 0000377 !stf rfpp {dw} f } \ |
{0174400 0000377 !divf rfpp {dr} f } \ |
{0175000 0000377 !stexp rfpp {dw} w } \ |
{0175400 0000377 !stcif rfpp {dw} f } \ |
{0176000 0000377 !stcfd rfpp {dw} f } \ |
{0176400 0000377 !ldexp rfpp {dr} w } \ |
{0177000 0000377 !ldcif rfpp {dr} f } \ |
{0177400 0000377 !ldcdf rfpp {dr} f } \ |
} |
|
# vector name |
variable dasm_vecmap |
array set dasm_vecmap { \ |
004 iit \ |
010 rit \ |
014 bpt \ |
020 iot \ |
024 pwr \ |
030 emt \ |
034 trp \ |
060 dla-r \ |
064 dla-t \ |
070 pc-r \ |
074 pc-p \ |
100 kw-l \ |
104 kw-p \ |
114 mse \ |
120 deuna \ |
160 rla \ |
200 lpa \ |
220 rka \ |
224 tma \ |
240 pir \ |
244 fpp \ |
250 mmu \ |
254 rpa \ |
260 iist \ |
300 dlb-r \ |
304 dlb-t \ |
310 dza-r \ |
314 dza-t \ |
} |
|
# a |
variable dasm_ackeymap |
array set dasm_ackeymap { \ |
sr:00 {} \ |
sr:10 {rd} \ |
sr:20 {rd} \ |
sr:30 {ra rd} \ |
sr:40 {rd} \ |
sr:50 {ra rd} \ |
sr:60 {ri rd} \ |
sr:70 {ri ra rd} \ |
sr:07 {} \ |
sr:17 {rd} \ |
sr:27 {ri} \ |
sr:37 {ri rd} \ |
sr:47 {rd} \ |
sr:57 {ra rd} \ |
sr:67 {ri rd} \ |
sr:77 {ri ra rd} \ |
dr:00 {} \ |
dr:10 {rd} \ |
dr:20 {rd} \ |
dr:30 {ra rd} \ |
dr:40 {rd} \ |
dr:50 {ra rd} \ |
dr:60 {ri rd} \ |
dr:70 {ri ra rd} \ |
dr:07 {} \ |
dr:17 {rd} \ |
dr:27 {ri} \ |
dr:37 {ri rd} \ |
dr:47 {rd} \ |
dr:57 {ra rd} \ |
dr:67 {ri rd} \ |
dr:77 {ri ra rd} \ |
dw:00 {} \ |
dw:10 {wd} \ |
dw:20 {wd} \ |
dw:30 {ra wd} \ |
dw:40 {wd} \ |
dw:50 {ra wd} \ |
dw:60 {ri wd} \ |
dw:70 {ri ra wd} \ |
dw:07 {} \ |
dw:17 {wd} \ |
dw:27 {wd} \ |
dw:37 {ri wd} \ |
dw:47 {wd} \ |
dw:57 {ra wd} \ |
dw:67 {ri wd} \ |
dw:77 {ri ra wd} \ |
dm:00 {} \ |
dm:10 {rd md} \ |
dm:20 {rd md} \ |
dm:30 {ra rd md} \ |
dm:40 {rd md} \ |
dm:50 {ra rd md} \ |
dm:60 {ri rd md} \ |
dm:70 {ri ra rd md} \ |
dm:07 {} \ |
dm:17 {rd md} \ |
dm:27 {rd md} \ |
dm:37 {ri rd md} \ |
dm:47 {rd md} \ |
dm:57 {ra rd md} \ |
dm:67 {ri rd md} \ |
dm:77 {ri ra rd md} \ |
da:00 {} \ |
da:10 {} \ |
da:20 {} \ |
da:30 {rd} \ |
da:40 {} \ |
da:50 {rd} \ |
da:60 {ri} \ |
da:70 {ri rd} \ |
da:07 {} \ |
da:17 {} \ |
da:27 {} \ |
da:37 {ri} \ |
da:47 {} \ |
da:57 {rd} \ |
da:67 {ri} \ |
da:77 {ri rd} \ |
} |
|
# |
# dasm_ireg2txt: convert ireg to text |
# |
proc dasm_ireg2txt {ireg} { |
set dsc [dasm_getdsc $ireg] |
if {[llength $dsc] != 0} { |
return [dasm_iline $ireg $dsc] |
} |
return "?[format %6.6o $ireg]?" |
} |
|
# |
# dasm_inst2txt: convert instruction to {text nwrd} |
# |
proc dasm_inst2txt {inst} { |
set ireg [lindex $inst 0] |
set rilist [lreplace $inst 0 0] |
set dsc [dasm_getdsc $ireg] |
if {[llength $dsc] == 0} { |
return [list "?[format %6.6o $ireg]?" 1] |
} |
set txt [dasm_iline $ireg $dsc $rilist nri] |
set nwrd [expr {$nri + 1}] |
return [list $txt $nwrd] |
} |
|
# |
# dasm_vec2txt: convert vector to text |
# |
proc dasm_vec2txt {vec} { |
variable dasm_vecmap |
set vkey [format %3.3o $vec] |
if {[info exists dasm_vecmap($vkey)]} {return $dasm_vecmap($vkey)} |
return "" |
} |
|
# |
# dasm_getdsc: get opdsc matching an opcode |
# |
proc dasm_getdsc {ireg} { |
variable dasm_opdsc |
set ndsc [llength $dasm_opdsc] |
set ibeg 0 |
set iend [expr {$ndsc - 1} ] |
while {$ibeg >= 0 && $iend < $ndsc && $iend >= $ibeg} { |
set icur [expr {( $ibeg + $iend ) / 2}] |
set cdsc [lindex $dasm_opdsc $icur] |
set ccode [lindex $cdsc 0] |
set cmask [lindex $cdsc 1] |
set iregm [expr { $ireg & [rutil::com16 $cmask] } ] |
if {$iregm == $ccode} {return $cdsc} |
if {$iregm < $ccode} { |
set iend [expr {$icur - 1}] |
} else { |
set ibeg [expr {$icur + 1}] |
} |
} |
return {} |
} |
|
# |
# dasm_iline: convert 1-3 words; return text and word count |
# |
proc dasm_iline {ireg idsc {rilist {}} {nriName {}} } { |
set icode [lindex $idsc 0] |
set imask [lindex $idsc 1] |
set imnemo [lindex $idsc 2] |
set itype [lindex $idsc 3] |
|
set src [expr {( $ireg >> 6 ) & 077}]; # source address spec |
set dst [expr { $ireg & 077}]; # dest address spec |
set reg6 [expr {( $ireg >> 6 ) & 07}]; # register from 8:6 |
set reg0 [expr { $ireg & 07}]; # register from 2:0 |
|
# Note on br and sob: offsets are expressed as ". +- nnn" |
# where . represents the pc of instruction (as in assembler) |
# the instruction itself holds the offset to the pc after fetch !! |
switch $itype { |
0arg { set rval "$imnemo" } |
1arg { set rval "$imnemo [dasm_regmod $dst]"} |
2arg { set rval "$imnemo [dasm_regmod $src],[dasm_regmod $dst]"} |
rsrc { set rval "$imnemo [dasm_regnam $reg6],[dasm_regmod $dst]"} |
rdst { set rval "$imnemo [dasm_regmod $dst],[dasm_regnam $reg6]"} |
1reg { set rval "$imnemo [dasm_regnam $reg0]"} |
br { if {$ireg & 0200} { |
set sign "-" |
set off [expr {((~$ireg) & 0177) + 1}] |
set off [expr {($off - 1) * 2}] |
} else { |
set sign "+" |
set off [expr {$ireg & 0177}] |
set off [expr {($off + 1) * 2}] |
} |
set rval "$imnemo .${sign}${off}" |
} |
sob { set off [expr {$ireg & 0077}] |
set off [expr {($off - 1) * 2}] |
set rval "$imnemo [dasm_regnam $reg6],.-${off}" |
} |
trap { set off [expr {$ireg & 0377}] |
set rval "$imnemo [format %3.3o $off]" |
} |
spl { set off [expr {$ireg & 0007}] |
set rval "$imnemo $off " |
} |
ccop { set off [expr {$ireg & 0017}] |
set del "" |
set str "" |
if {$ireg & 010} { append str "${del}${imnemo}n"; set del "+"} |
if {$ireg & 004} { append str "${del}${imnemo}z"; set del "+"} |
if {$ireg & 002} { append str "${del}${imnemo}v"; set del "+"} |
if {$ireg & 001} { append str "${del}${imnemo}c"; set del "+"} |
set rval $str |
if {$off == 0} {set rval "nop"} |
if {$ireg == 0257} {set rval "ccc"} |
if {$ireg == 0277} {set rval "scc"} |
} |
mark { set off [expr {$ireg & 0077}] |
set rval "$imnemo [format %3.3o $off]" |
} |
1fpp { set rval "$imnemo [dasm_regmod $dst f]"} |
rfpp { set regf [expr {( $ireg >> 6 ) & 03}]; # register from 8:6 |
set rval "$imnemo f${regf},[dasm_regmod $dst f]" |
} |
default { return "??itype" } |
} |
|
set nval 0 |
while {1} { |
set i [string first X $rval] |
if {$i < 0} {break} |
if {[llength $rilist] == 0} { |
set rval [string replace $rval $i $i "n"] |
} else { |
incr nval |
set rval [string replace $rval $i $i [format %6.6o [lindex $rilist 0]]] |
set rilist [lreplace $rilist 0 0] |
} |
} |
|
if {$nriName ne ""} { |
upvar 1 $nriName nri |
set nri $nval |
} |
|
return $rval |
} |
|
# |
# dasm_regmod: return access mode info |
# |
proc dasm_regmod {regmod {pref r} } { |
set mod [expr {( $regmod >> 3 ) & 07}] |
set reg [expr { $regmod & 07}] |
set rstr [dasm_regnam $reg] |
if {$mod == 0 && $pref == "f" && $reg <= 5} {set rstr "f$reg"} |
switch $mod { |
0 { if {$pref == "f" && $reg <= 5} {return "f$reg"} |
return "$rstr" |
} |
1 { return "($rstr)"} |
2 { if {$reg!=7} {return "($rstr)+"} else {return "#X"} } |
3 { if {$reg!=7} {return "@($rstr)+"} else {return "@#X"} } |
4 {return "-($rstr)"} |
5 {return "@-($rstr)"} |
6 {return "X($rstr)"} |
7 {return "@X($rstr)"} |
} |
return "??regmod" |
} |
|
# |
# dasm_regnam: return register name |
# |
proc dasm_regnam {reg} { |
set rstr "r${reg}" |
if {$reg == 6} {set rstr "sp"} |
if {$reg == 7} {set rstr "pc"} |
return $rstr |
} |
|
# |
# dasm_acmod2aclist |
# |
proc dasm_acmod2aclist {acmod regmod} { |
variable dasm_ackeymap |
set mod [expr {( $regmod >> 3 ) & 07}] |
set reg [expr { $regmod & 07}] |
if {$reg != 7} {set reg 0} |
set ackey [format "%s:%o%o" $acmod $mod $reg] |
if {[info exists dasm_ackeymap($ackey)]} { |
return $dasm_ackeymap($ackey) |
} |
return "??" |
} |
|
} |
/trunk/tools/tcl/rw11/shell_egd.tcl
0,0 → 1,515
# $Id: shell_egd.tcl 720 2015-12-28 14:52:45Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-28 720 1.0 Initial version |
# 2015-12-23 717 0.1 First draft |
# |
|
package provide rw11 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11 { |
|
variable shell_egd_lrdef "l" |
variable shell_egd_amdef "p" |
|
# |
# shell_exa: examine memory, return as text ('e' command in shell) --------- |
# |
proc shell_exa {aspec} { |
set pspec [shell_aspec_parse $aspec] |
set mspec [shell_pspec_map $pspec] |
set rval [shell_mspec_get $mspec] |
set rtxt [shell_mspec_txt $mspec $rval] |
return $rtxt |
} |
|
# |
# shell_get: examine memory, return as list ('g' command in shell) --------- |
# |
proc shell_get {aspec} { |
set pspec [shell_aspec_parse $aspec] |
set mspec [shell_pspec_map $pspec] |
set rval [shell_mspec_get $mspec] |
return $rval |
} |
|
# |
# shell_dep: deposit memory ('d' command in shell) ------------------------- |
# |
proc shell_dep {aspec args} { |
set pspec [shell_aspec_parse $aspec] |
set mspec [shell_pspec_map $pspec] |
set rval [shell_mspec_put $mspec $args] |
return "" |
} |
|
# |
# shell_aspec_parse: ------------------------------------------------------- |
# |
proc shell_aspec_parse {aspec} { |
variable shell_egd_lrdef |
variable shell_egd_amdef |
|
set volist [split $aspec "/"] |
set saddr [lindex $volist 0] |
set opts [lreplace $volist 0 0] |
|
# parse options part |
set opt_lr "" |
set opt_am "" |
set opt_fmt "o" |
set opt_cnt 1 |
foreach opt $opts { |
switch -regexp -matchvar mvar -- $opt { |
{^[lr]$} { set opt_lr $opt } |
{^[cpksu][id]$} { set opt_am $opt } |
{^[pe]$} { set opt_am $opt } |
{^[iabodxfF]$} { set opt_fmt $opt } |
{^(\d)+$} { set opt_cnt $opt } |
default { error "-E: bad option: $opt"} |
} |
} |
|
# check of only options specified --> update default opts |
if {$saddr eq ""} { |
if {$opt_lr ne ""} {set shell_egd_lrdef $opt_lr} |
if {$opt_am ne ""} {set shell_egd_amdef $opt_am} |
return {} |
} |
|
# parse symbolic address part |
# use default loc/rem or address space |
if {$opt_lr eq ""} {set opt_lr $shell_egd_lrdef} |
if {$opt_am eq ""} {set opt_am $shell_egd_amdef} |
|
# Note: put regexp patterns in {} to prevent that tcl modifies them ! |
switch -regexp -matchvar mvar -- $saddr { |
{^([0-7]+)$} { |
set paddr [list "pa" $opt_am [lindex $mvar 1]] |
} |
{^(r0|r1|r2|r3|r4|r5|r6|r7|sp|pc|ps)$} { |
set paddr [list "reg" "" [lindex $mvar 1]] |
} |
{^@(r0|r1|r2|r3|r4|r5|r6|r7|sp|pc)$} { |
set paddr [list "ireg" $opt_am [lindex $mvar 1] 0] |
} |
{^\((r0|r1|r2|r3|r4|r5|r6|r7|sp|pc)\)$} { |
set paddr [list "ireg" $opt_am [lindex $mvar 1] 0] |
} |
{^([0-9].*?)\((r0|r1|r2|r3|r4|r5|r6|r7|sp|pc)\)$} { |
set paddr [list "ireg" $opt_am [lindex $mvar 2] [lindex $mvar 1]] |
} |
{^(.+?)\+([0-9].*)$} { |
set paddr [list "name" $opt_lr [lindex $mvar 1] [lindex $mvar 2]] |
} |
default { |
set paddr [list "name" $opt_lr $saddr 0] |
} |
} |
|
return [list $paddr $opt_cnt $opt_fmt] |
} |
|
# |
# shell_pspec_map: --------------------------------------------------------- |
# |
proc shell_pspec_map {pspec} { |
variable shell_cpu |
set paddr [lindex $pspec 0] |
set cnt [lindex $pspec 1] |
set fmt [lindex $pspec 2] |
set mode [lindex $paddr 0] |
set am [lindex $paddr 1] |
set addr [lindex $paddr 2] |
set off [lindex $paddr 3] |
|
if {$addr eq "sp"} {set addr "r6"} |
if {$addr eq "pc"} {set addr "r7"} |
|
switch $mode { |
reg { |
if {$addr eq "ps"} { |
if {$cnt > 1} { error "-E: for 'ps' only range count of 1 allowed" } |
} else { |
set rnum [string range $addr 1 1] |
if {[expr {$rnum + $cnt}] > 8} { error "-E: range extends beyond r7" } |
} |
return [list "reg" "" $addr $cnt $fmt ] |
} |
|
pa - |
ireg { |
if {$mode eq "ireg"} { |
$shell_cpu cp -r$addr rval |
set addr [expr {$rval + $off}] |
} |
set am0 [string range $am 0 0] |
set am1 [string range $am 1 1] |
if {$am1 ne ""} { |
if {$am0 eq "c" || $am0 eq "p"} { |
$shell_cpu cp -rps rval |
if {$am0 eq "c"} { |
set xmode [regget rw11::PSW(cmode) $rval] |
} else { |
set xmode [regget rw11::PSW(pmode) $rval] |
} |
set am0 [string range "ksxu" $xmode $xmode] |
} |
set segnum [expr {$addr>>13}] |
set sarname "sar${am0}${am1}.${segnum}" |
$shell_cpu cp -rreg $sarname sarval |
set addr [expr {$addr + 64 * $sarval}] |
set am "e" |
} |
return [list "mem" $am $addr $cnt $fmt ] |
} |
|
name { |
set addr [$shell_cpu imap $addr] |
set addr [expr {$addr + $off}] |
for {set i 0} {$i < $cnt} {incr i} { |
set taddr [expr {$addr + 2*$i}] |
if {![$shell_cpu imap -testaddr $taddr]} { |
error "-E: address [format %06o $taddr] not mapped in imap" |
} |
} |
return [list "iop" $am $addr $cnt $fmt ] |
} |
} |
|
error "-E: BUGCHECK: bad mode $mode" |
|
} |
|
# |
# shell_mspec_get: --------------------------------------------------------- |
# |
proc shell_mspec_get {mspec} { |
variable shell_cpu |
set mode [lindex $mspec 0]; # reg,mem,iop |
set am [lindex $mspec 1]; # l,r or p,e,[cpksu][id] |
set addr [lindex $mspec 2] |
set cnt [lindex $mspec 3] |
set fmt [lindex $mspec 4]; # i,a,b,o,d,x,f,F |
|
switch $mode { |
mem { |
set clist {} |
if {$am eq "p"} { |
lappend clist -wal $addr |
} else { |
lappend clist -wa $addr -p22 |
} |
lappend clist -brm $cnt rval |
$shell_cpu cp {*}$clist |
return $rval |
} |
|
reg { |
set clist {} |
if {$addr eq "ps"} { |
lappend clist -rps cpval0 |
} else { |
set rbase [string range $addr 1 1] |
for {set i 0} {$i < $cnt} {incr i} { |
set rnum [expr {$rbase + $i}] |
lappend clist -rr${rnum} cpval${i} |
} |
} |
$shell_cpu cp {*}$clist |
} |
|
iop { |
set clist {} |
if {$am eq "l"} { # loc access |
lappend clist -wal $addr |
for {set i 0} {$i < $cnt} {incr i} { |
lappend clist -rmi cpval[format %02d $i] |
incr addr 2 |
} |
} else { # rem access |
for {set i 0} {$i < $cnt} {incr i} { |
lappend clist -ribr $addr cpval[format %02d $i] |
incr addr 2 |
} |
} |
$shell_cpu cp {*}$clist |
} |
|
default { error "-E: BUGCHECK: bad mode $mode" } |
} |
|
set rval {} |
foreach var [lsort -dictionary [info locals cpval*]] { |
lappend rval [set $var] |
} |
|
return $rval |
} |
|
# |
# shell_mspec_txt: --------------------------------------------------------- |
# |
proc shell_mspec_txt {mspec rval} { |
variable shell_cpu |
set mode [lindex $mspec 0] |
set am [lindex $mspec 1] |
set addr [lindex $mspec 2] |
set cnt [lindex $mspec 3] |
set fmt [lindex $mspec 4] |
|
set rtxt {} |
set ind 0 |
|
switch $mode { |
mem { |
while {$ind < $cnt} { |
set line [format "%08o:" [expr {$addr + 2*$ind}]] |
switch $fmt { |
b { |
for {set i 0} {$i < 4 && $ind < $cnt} {incr i; incr ind} { |
append line " " |
append line [pbvi b16 [lindex $rval $ind]] |
} |
} |
|
o { |
for {set i 0} {$i < 8 && $ind < $cnt} {incr i; incr ind} { |
append line [format " %06o" [lindex $rval $ind]] |
} |
} |
|
d { |
for {set i 0} {$i < 8 && $ind < $cnt} {incr i; incr ind} { |
append line [format " %6d" [lindex $rval $ind]] |
} |
} |
|
x { |
for {set i 0} {$i < 12 && $ind < $cnt} {incr i; incr ind} { |
append line [format " %04x" [lindex $rval $ind]] |
} |
} |
|
a { |
set blist {} |
for {set i 0} {$i < 4 && $ind < $cnt} {incr i; incr ind} { |
set val [lindex $rval $ind] |
lappend blist [expr { $val & 0xff}] |
lappend blist [expr {($val>>8) & 0xff}] |
} |
set linebyt "" |
set lineasc "" |
foreach byt $blist { |
append linebyt [format " %03o" $byt] |
set pmark " " |
if {$byt >= 128} { |
set pmark "!" |
set byt [expr {$byt & 0177}] |
} |
if {$byt < 32} { |
append lineasc " $pmark" |
append lineasc [lindex {{\0} "^a" "^b" "^c" |
"^d" "^e" "^f" "^g" |
"BS" "^i" "LF" "VT" |
"FF" "CR" "^n" "^o" |
"^p" "^q" "^r" "^s" |
"^t" "^u" "^v" "^w" |
"^x" "^y" "^z" "ES" |
"FS" "GS" "RS" "US" } $byt] |
} elseif {$byt >= 32 && $byt < 127} { |
append lineasc [format " %s%c" $pmark $byt] |
} else { |
append lineasc " ${pmark}DE" |
} |
} |
while {[string length $linebyt] < 32} { append linebyt " "} |
append line $linebyt |
append line " : " |
append line $lineasc |
} |
|
i { |
set inst [lrange $rval $ind [expr {$ind + 2}]] |
set dsc [rw11::dasm_inst2txt $inst] |
set txt [lindex $dsc 0] |
set nwrd [lindex $dsc 1] |
for {set i 0} {$i < 3} {incr i} { |
if {$i < $nwrd} { |
append line [format " %06o" [lindex $rval $ind]] |
incr ind |
} else { |
append line " " |
} |
} |
append line " : $txt" |
} |
|
default { error "-E: not yet implemented format option /$fmt" } |
|
} |
if {$rtxt ne ""} {append rtxt "\n"} |
append rtxt $line |
} |
} |
|
reg { |
for {set i 0} {$i < $cnt} {incr i} { |
set cval [shell_conv_bodx $fmt [lindex $rval $i]] |
set rnam $addr |
if {$i > 0} { set rnam "r[expr {[string range $addr 1 1] + $i}]" } |
if {$rtxt ne ""} {append rtxt "\n"} |
append rtxt "$rnam : $cval" |
} |
} |
|
iop { |
for {set i 0} {$i < $cnt} {incr i; incr addr 2} { |
set val [lindex $rval $i] |
set cval [shell_conv_bodx $fmt $val] |
set name [$shell_cpu imap -name $addr] |
set line [format "%06o %-8s : %s" $addr $name $cval] |
if {[$shell_cpu imap -testaddr $addr]} { |
set cnam [$shell_cpu imap -name $addr] |
set ctxt [rw11util::regmap_txt $cnam "${am}r" $val] |
if {$ctxt ne ""} {append line " $ctxt"} |
} |
if {$rtxt ne ""} {append rtxt "\n"} |
append rtxt $line |
} |
|
} |
} |
|
return $rtxt |
} |
|
# |
# shell_mspec_put: --------------------------------------------------------- |
# |
proc shell_mspec_put {mspec valr} { |
variable shell_cpu |
set mode [lindex $mspec 0] |
set am [lindex $mspec 1] |
set addr [lindex $mspec 2] |
set cnt [lindex $mspec 3] |
set fmt [lindex $mspec 4] |
|
# handle conversions |
# - regdsc values (as list in {k v ...} or {dsc k v ...} format) |
# - 0bnnnn values |
|
set vals {} |
foreach val $valr { |
if {[llength $val] > 1} { |
set rdsc "" |
if {$mode eq "iop"} { |
set ioaddr [expr {$addr + 2 * [llength $vals]}] |
if {[$shell_cpu imap -testaddr $ioaddr]} { |
set ioname [$shell_cpu imap -name $ioaddr] |
set rdsc [rw11util::regmap_get $ioname "${am}w"] |
} |
} |
if {[llength $val] & 01} { |
set rdsc [lindex $val 0] |
set val [lreplace $val 0 0] |
} |
if {$rdsc ne "" && [info exists $rdsc]} { |
set val [regbldkv $rdsc {*}$val] |
} else { |
error "-E: missing or invalid register desciptor '$rdsc'" |
} |
|
} else { |
if {[string match "0b*" $val]} { |
set val [bvi b16 [string range $val 2 end]] |
} |
} |
lappend vals $val |
} |
|
set nvals [llength $vals] |
if {$nvals != $cnt} { |
error "-E: expected $cnt write values, seen only $nvals" |
} |
|
|
switch $mode { |
mem { |
set clist {} |
if {$am eq "p"} { |
lappend clist -wal $addr |
} else { |
lappend clist -wa $addr -p22 |
} |
lappend clist -bwm $vals |
$shell_cpu cp {*}$clist |
return "" |
} |
|
reg { |
set clist {} |
if {$addr eq "ps"} { |
lappend clist -wps $vals |
} else { |
set rbase [string range $addr 1 1] |
for {set i 0} {$i < $cnt} {incr i} { |
set rnum [expr {$rbase + $i}] |
lappend clist -wr${rnum} [lindex $vals $i] |
} |
} |
$shell_cpu cp {*}$clist |
} |
|
iop { |
set clist {} |
if {$am eq "l"} { # loc access |
lappend clist -wal $addr |
for {set i 0} {$i < $cnt} {incr i} { |
lappend clist -wmi [lindex $vals $i] |
incr addr 2 |
} |
} else { # rem access |
for {set i 0} {$i < $cnt} {incr i} { |
lappend clist -wibr $addr [lindex $vals $i] |
incr addr 2 |
} |
} |
$shell_cpu cp {*}$clist |
} |
|
default { error "-E: BUGCHECK: bad mode $mode" } |
} |
|
return "" |
|
} |
|
# |
# shell_conv_bodx: --------------------------------------------------------- |
# |
proc shell_conv_bodx {fmt val} { |
switch $fmt { |
b { return [pbvi b16 $val] } |
d { return [format "%6d" $val] } |
x { return [format "%04x" $val] } |
default { return [format "%06o" $val] } |
} |
} |
|
} |
/trunk/tools/tcl/rw11/shell.tcl
0,0 → 1,293
# $Id: shell.tcl 717 2015-12-25 17:38:09Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-23 717 1.1 add e,g,d commands; fix shell_tin |
# 2015-07-12 700 1.0 Initial version |
# |
|
package provide rw11 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11 { |
|
variable shell_depth 0 |
variable shell_cpu "cpu0" |
variable shell_attnhdl_added 0 |
variable shell_eofchar_save {puts {}} |
|
# |
# shell_start: start rw11 shell -------------------------------------------- |
# |
proc shell_start {} { |
variable shell_cpu |
variable shell_attnhdl_added |
variable shell_eofchar_save |
global tirri_interactive |
|
# quit if shell already active |
if {[llength [info procs ::rw11::unknown_save]] > 0} { |
error "rw11 shell already started" |
} |
|
# set unknown handler |
rename ::unknown ::rw11::unknown_save |
rename ::rw11::shell_forward ::unknown |
|
# check that attn handler is installed |
if {!$shell_attnhdl_added} { |
rls attn -add 0x0001 { rw11::shell_attncpu } |
set shell_attnhdl_added 1 |
} |
|
# redefine ti_rri prompt and eof handling |
if { $tirri_interactive } { |
# setup new prompt (save old one...) |
rename ::tclreadline::prompt1 ::rw11::shell_prompt1_save |
namespace eval ::tclreadline { |
proc prompt1 {} { |
return "${rw11::shell_cpu}> " |
} |
} |
# disable ^D (and save old setting) |
set shell_eofchar_save [::tclreadline::readline eofchar] |
::tclreadline::readline eofchar {::rw11::shell_eofchar} |
} |
|
return "" |
} |
|
# |
# shell_stop: stop rw11 shell ---------------------------------------------- |
# |
proc shell_stop {} { |
variable shell_eofchar_save |
global tirri_interactive |
|
if {[llength [info procs ::rw11::unknown_save]] == 0} { |
error "rw11 shell not started" |
} |
rename ::unknown ::rw11::shell_forward |
rename ::rw11::unknown_save ::unknown |
# restore ti_rri prompt and eof handling |
|
if { $tirri_interactive } { |
rename ::tclreadline::prompt1 {} |
rename ::rw11::shell_prompt1_save ::tclreadline::prompt1 |
::tclreadline::readline eofchar $shell_eofchar_save |
} |
|
return "" |
} |
|
# |
# shell_forward: rw11 shell forwarder (will be renamed to ::unknown) ------- |
# |
proc shell_forward args { |
uplevel 1 [list rw11::shell {*}$args] |
} |
|
# |
# shell_eofchar: eofchar handler ------------------------------------------- |
# |
proc shell_eofchar args { |
cpu0 cp -rstat cpustat |
if {[regget rw11::CP_STAT(go) $cpustat]} { |
puts \ |
"cpu0 running, ^D disabled. Use qq to quit shell or tirri_exit to bail out" |
return "" |
} |
shell_stop |
return "" |
} |
|
# |
# shell_attncpu: cpu attn handler ------------------------------------------ |
# |
proc shell_attncpu {} { |
puts "CPU attention" |
puts [cpu0 show -r0ps] |
return "" |
} |
|
# |
# shell: rw11 shell -------------------------------------------------------- |
# |
proc shell args { |
variable shell_depth |
variable shell_cpu |
set rval {} |
set cname [lindex $args 0] |
set cargs [lreplace $args 0 0] |
|
switch $cname { |
|
e {set rval [shell_exa {*}$cargs]} |
g {set rval [shell_get {*}$cargs]} |
d {set rval [shell_dep {*}$cargs]} |
|
c0 - |
c1 - |
c2 - |
c3 {set rval [shell_setcpu $cname]} |
|
cs {set rval [shell_cs {*}$cargs]} |
cr {set rval [shell_cr {*}$cargs]} |
cl {set rval [shell_cll {*}$cargs]} |
|
bs {set rval [rw11::hb_set $shell_cpu {*}$cargs]} |
br {set rval [rw11::hb_remove $shell_cpu {*}$cargs]} |
bl {set rval [rw11::hb_list $shell_cpu {*}$cargs]} |
|
qq {set rval [rw11::shell_stop {*}$cargs]} |
|
. {set rval [shell_cls {*}$cargs]} |
? {set rval [shell_clb {*}$cargs]} |
( {set rval [shell_ti {*}$cargs]} |
< {set rval [shell_tin {*}$cargs]} |
|
h {set rval [shell_help {*}$cargs]} |
|
default { |
if {$shell_depth > 1} { |
error "nested entry to shell for \"$cname\"" |
} |
incr shell_depth |
uplevel 1 [list rw11::unknown_save {*}$args] |
} |
} |
set shell_depth 0 |
return $rval; |
} |
|
# |
# shell_setcpu: set current cpu -------------------------------------------- |
# |
proc shell_setcpu {cname} { |
variable shell_cpu |
set cpucmd "cpu[string range $cname 1 1]" |
if {[llength [info commands $cpucmd]] == 0} { |
error "'$cpucmd' not available" |
} |
set shell_cpu $cpucmd |
return "" |
} |
|
# |
# shell_cs: cpu step ------------------------------------------------------- |
# |
proc shell_cs {{nstep 1}} { |
variable shell_cpu |
set rval {} |
for {set i 0} {$i < $nstep} {incr i} { |
rw11::hb_clear $shell_cpu |
$shell_cpu cp -step |
if {$i > 0} {append rval "\n"} |
append rval [$shell_cpu show -pcps] |
$shell_cpu cp -rstat stat |
if {[regget rw11::CP_STAT(rust) $stat] != 4} {break} |
} |
return $rval |
} |
|
# |
# shell_cr: cpu resume ----------------------------------------------------- |
# |
proc shell_cr {} { |
variable shell_cpu |
rw11::hb_clear $shell_cpu |
$shell_cpu cp -resume |
return "" |
} |
|
# |
# shell_cls: cpu short status ---------------------------------------------- |
# |
proc shell_cls {} { |
variable shell_cpu |
return [$shell_cpu show -pcps] |
} |
|
# |
# shell_clb: cpu brief status --------------------------------------------- |
# |
proc shell_clb {} { |
variable shell_cpu |
return [$shell_cpu show -r0ps] |
} |
|
# |
# shell_cll: cpu long status ----------------------------------------------- |
# |
proc shell_cll {} { |
variable shell_cpu |
set rval [$shell_cpu show -r0ps] |
append rval "\n" |
append rval [$shell_cpu show -mmu] |
append rval "\n" |
append rval [$shell_cpu show -ubmap] |
} |
|
# |
# shell_ti: tta0 input (no cr at end) -------------------------------------- |
# |
proc shell_ti args { |
variable shell_cpu |
set str [join $args " "] |
"${shell_cpu}tta0" type $str |
return "" |
} |
|
# |
# shell_tin: tta0 input (with cr at end) ----------------------------------- |
# |
proc shell_tin args { |
variable shell_cpu |
set str [join $args " "] |
append str "\r" |
"${shell_cpu}tta0" type $str |
return "" |
} |
|
# |
# shell_help: shell help text ---------------------------------------------- |
# |
proc shell_help args { |
set rval "rw11 shell command abreviations:" |
foreach i {0 1 2 3} { |
if {[llength [info commands "cpu${i}"]] > 0} { |
append rval "\n c${i} ; select cpu${i}" |
} |
} |
append rval "\n e aspec ; examine memory, return as text" |
append rval "\n g aspec ; get memory, return as tcl list" |
append rval "\n d aspec vals ; deposit memory" |
append rval "\n cs ; cpu step" |
append rval "\n cr ; cpu resume" |
append rval "\n cl ; full cpu state (with mmu+ubmap)" |
append rval "\n bs ind typ lo hi ; set bpt" |
append rval "\n br ?ind? ; remove bpt" |
append rval "\n bl ; list bpt" |
append rval "\n qq ; quit shell, return to ti_rri" |
append rval "\n . ; short cpu state (pc+psw)" |
append rval "\n ? ; brief cpu state (all regs)" |
append rval "\n ( ?text? ; tta0 input without cr" |
append rval "\n < ?text? ; tta0 input with cr" |
append rval "\n h ; this help text" |
return $rval |
} |
|
} |
/trunk/tools/tcl/rw11/dmscnt.tcl
0,0 → 1,74
# $Id: dmscnt.tcl 722 2015-12-30 19:45:46Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-30 722 1.0.2 sc_start: use args2opts |
# 2015-12-28 721 1.0.1 use ena instead of cnt; use regbldkv |
# 2015-06-27 695 1.0 Initial version |
# |
|
package provide rw11 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11 { |
# |
# setup dmscnt unit register descriptions for w11a ------------------------- |
# |
regdsc SC_CNTL {clr 1} {ena 0} |
regdsc SC_ADDR {mem 10 8} {word 1 2} |
|
# |
# sc_setup: rmap definitions for dmscnt |
# |
proc sc_setup {{cpu "cpu0"}} { |
set base [$cpu get base] |
$cpu rmap -insert sc.cntl [expr {$base + 0x40}] |
$cpu rmap -insert sc.addr [expr {$base + 0x41}] |
$cpu rmap -insert sc.data [expr {$base + 0x42}] |
} |
|
# |
# sc_start: start the dmscnt |
# |
proc sc_start {{cpu "cpu0"} args} { |
args2opts opts { clr 0 } {*}$args |
$cpu cp -wreg sc.cntl [regbldkv rw11::SC_CNTL ena 1 clr $opts(clr)] |
} |
|
# |
# sc_stop: stop the dmscnt |
# |
proc sc_stop {{cpu "cpu0"}} { |
$cpu cp -wreg sc.cntl [regbldkv rw11::SC_CNTL ena 0] |
} |
|
# |
# sc_read: read dmscnt data |
# |
proc sc_read {{cpu "cpu0"}} { |
$cpu cp -wreg sc.addr 0x0000 \ |
-rblk sc.data [expr {2*3*256}] blk |
set sn 0 |
set rval {} |
append rval "#sn . .... ...." |
foreach {d0 d1 d2} $blk { |
append rval [format "\n%3.3x %1.1x %4.4x %4.4x" $sn $d2 $d1 $d0] |
incr sn |
} |
return $rval |
} |
|
} |
/trunk/tools/tcl/rw11/util.tcl
1,4 → 1,4
# $Id: util.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: util.tcl 722 2015-12-30 19:45:46Z mueller $ |
# |
# Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
13,6 → 13,8
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-30 721 1.3.6 BUGFIX: setup_ostr: adopt to use args2opts |
# 2015-07-25 704 1.3.5 use args2opts |
# 2015-05-17 683 1.3.4 setup_sys: add TM11 |
# 2015-05-15 682 1.3.3 BUGFIX: setup_cpu: fix cpu reset (now -stop -creset) |
# 2015-05-08 675 1.3.2 w11a start/stop/suspend overhaul |
80,10 → 82,9
# |
# setup_tt: setup terminals ------------------------------------------------ |
# |
proc setup_tt {{cpu "cpu0"} {optlist {}}} { |
proc setup_tt {{cpu "cpu0"} args} { |
# process and check options |
array set optref { ndl 2 dlrlim 0 ndz 0 to7bit 0 app 0 nbck 1} |
rutil::optlist2arr opt optref $optlist |
args2opts opt {ndl 2 dlrlim 0 ndz 0 to7bit 0 app 0 nbck 1} {*}$args |
|
# check option values |
if {$opt(ndl) < 1 || $opt(ndl) > 2} { |
127,10 → 128,9
# |
# setup_ostr: setup Ostream device (currently lp or pp) -------------------- |
# |
proc setup_ostr {cpu unit optlist} { |
proc setup_ostr {cpu unit args} { |
# process and check options |
array set optref { app 0 nbck 1} |
rutil::optlist2arr opt optref $optlist |
args2opts opt {app 0 nbck 1} {*}$args |
|
# setup attach url options |
set urloptlist {} |
154,23 → 154,21
# |
# setup_lp: setup printer -------------------------------------------------- |
# |
proc setup_lp {{cpu "cpu0"} {optlist {}}} { |
proc setup_lp {{cpu "cpu0"} args} { |
# process and check options |
array set optref { nlp 1 app 0 nbck 1} |
rutil::optlist2arr opt optref $optlist |
args2opts opt {nlp 1 app 0 nbck 1} {*}$args |
if {$opt(nlp) != 0} { |
setup_ostr $cpu "lpa0" [list app $opt(app) nbck $opt(nbck)] |
setup_ostr $cpu "lpa0" app $opt(app) nbck $opt(nbck) |
} |
} |
# |
# setup_pp: setup paper puncher -------------------------------------------- |
# |
proc setup_pp {{cpu "cpu0"} {optlist {}}} { |
proc setup_pp {{cpu "cpu0"} args} { |
# process and check options |
array set optref { npc 1 app 0 nbck 1} |
rutil::optlist2arr opt optref $optlist |
args2opts opt {npc 1 app 0 nbck 1} {*}$args |
if {$opt(npc) != 0} { |
setup_ostr $cpu "pp" [list app $opt(app) nbck $opt(nbck)] |
setup_ostr $cpu "pp" app $opt(app) nbck $opt(nbck) |
} |
} |
|
207,4 → 205,18
return "" |
} |
|
# |
# ps2txt: convert ps to text ----------------------------------------------- |
# |
proc ps2txt {ps} { |
reggetkv rw11::PSW $ps "ps_" cmode pmode rset pri tflag n z v c |
set p_cmode [lindex {k s ? u} $ps_cmode] |
set p_pmode [lindex {k s ? u} $ps_pmode] |
set p_tflag [expr {$ps_tflag ? "t" : "-"}] |
set p_cc [expr {$ps_n ? "n" : "."}] |
append p_cc [expr {$ps_z ? "z" : "."}] |
append p_cc [expr {$ps_v ? "v" : "."}] |
append p_cc [expr {$ps_c ? "c" : "."}] |
return "${p_cmode}${p_pmode}${ps_rset}${ps_pri}${p_tflag}${p_cc}" |
} |
} |
/trunk/tools/tcl/rw11/dmcmon.tcl
0,0 → 1,461
# $Id: dmcmon.tcl 710 2015-08-31 06:19:56Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-08-05 708 1.0 Initial version |
# 2015-07-05 697 0.1 First draft |
# |
|
package provide rw11 1.0 |
|
package require rlink |
package require rwxxtpp |
|
namespace eval rw11 { |
# |
# setup dmcmon unit register descriptions for w11a ------------------------- |
# |
regdsc CM_CNTL {mwsup 4} {imode 3} {wena 2} {stop 1} {start 0} |
regdsc CM_STAT {bsize 15 3} {malcnt 12 4} {wrap 0} |
regdsc CM_ADDR {laddr 15 12} {waddr 3 4} |
regdsc CM_IADDR {laddr 15 12} |
|
regdsc CM_D8 {xnum 7 8} {req 15} {istart 9} {idone 8} |
regdsc CM_D8REQ {wacc 14} {macc 13} {cacc 12} {bytop 11} {dspace 10} |
regdsc CM_D8ACK {ack 14} {err 13} {tysv 12} {tmmu 11} {mwdrop 10} |
regdsc CM_D8ERR {vmerr 12 3} |
|
regdsc CM_D7 {pc 15 15} {idec 0} |
|
# D5 has bit fields like rw11::PSW plus additional ones |
regdsc CM_D5 {cmode 15 2} {pmode 13 2} {rset 11} \ |
{pri 7 3 d} {tflag 4} {cc 3 4 "-"} {n 3} {z 2} {v 1} {c 0} |
regdsc CM_D5IM0 {dres_val 10} {ddst_we 9} {dsrc_we 8} |
regdsc CM_D5IM1 {vfetch 8} |
|
variable CM_D8_VMERR_ODD 01 |
variable CM_D8_VMERR_MMU 02 |
variable CM_D8_VMERR_NXM 03 |
variable CM_D8_VMERR_IOBTO 04 |
variable CM_D8_VMERR_RSV 05 |
|
# |
# cm_start: start the dmcmon |
# |
proc cm_start {{cpu "cpu0"} args} { |
args2opts opts { mwsup 0 imode 0 wena 1 } {*}$args |
$cpu cp -wreg cm.cntl [regbldkv rw11::CM_CNTL start 1 \ |
mwsup $opts(mwsup) imode $opts(imode) \ |
wena $opts(wena) ] |
} |
|
# |
# cm_stop: stop the dmcmon |
# |
proc cm_stop {{cpu "cpu0"}} { |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL stop] |
} |
|
# |
# cm_read: read nent last entries (by default all) |
# returns a list, 1st entry descriptor, rest 9-tuples in d0,..,d8 order |
# |
proc cm_read {{cpu "cpu0"} {nent -1}} { |
$cpu cp -rreg cm.cntl rcntl \ |
-rreg cm.stat rstat \ |
-rreg cm.addr raddr |
|
set bsize [regget rw11::CM_STAT(bsize) $rstat] |
set amax [expr {( 256 << $bsize ) - 1}] |
if {$nent == -1} { set nent $amax } |
|
set laddr [regget rw11::CM_ADDR(laddr) $raddr] |
set nval $laddr |
if {[regget rw11::CM_STAT(wrap) $rstat]} { set nval $amax } |
|
if {$nent > $nval} {set nent $nval} |
if {$nent == 0} { return {} } |
|
set caddr [expr {( $laddr - $nent ) & $amax}] |
$cpu cp -wreg cm.addr [regbld rw11::CM_ADDR [list laddr $caddr]] |
|
set rval {} |
lappend rval [list $rcntl $rstat 0x0000] |
|
set nrest $nent |
set nblkmax [rlc get bsizeprudent] |
set ngetmax [expr {$nblkmax / 9}] |
while {$nrest > 0} { |
set nget $nrest |
if {$nget > $ngetmax} {set nget $ngetmax} |
set nblk [expr {9 * $nget}] |
$cpu cp -rblk cm.data $nblk rawdat |
|
foreach {d0 d1 d2 d3 d4 d5 d6 d7 d8} $rawdat { |
lappend rval [list $d0 $d1 $d2 $d3 $d4 $d5 $d6 $d7 $d8] |
} |
set nrest [expr {$nrest - $nget }] |
} |
|
$cpu cp -wreg cm.addr $raddr |
|
return $rval |
} |
|
# |
# cm_print: convert raw into human readable format |
# |
proc cm_print {cmraw} { |
set imode [regget rw11::CM_CNTL(imode) [lindex $cmraw 0 0]] |
set rval {} |
set line {} |
if { $imode} {append line " nc"} |
if {!$imode} {append line "state "} |
|
if {$imode} { |
append line " ....pc" |
} else { |
append line " ....pc " |
append line " ..ireg" |
} |
append line " cprptnzvc" |
append line " ..dsrc" |
append line " ..ddst" |
append line " ..dres" |
append line " vmaddr" |
append line " vmdata" |
append rval $line |
|
set first 1 |
set cnum_last 0 |
set vmracc_last 0 |
set vmreq_pend 0 |
set vmbytop 0 |
set pc_last -1 |
set ireg_last -1 |
|
set snum2state [cm_get_snum2state] |
|
foreach item [lrange $cmraw 1 end] { |
set d0 [lindex $item 0] |
set d1 [lindex $item 1] |
set d2 [lindex $item 2] |
set d3 [lindex $item 3] |
set d4 [lindex $item 4] |
set d5 [lindex $item 5] |
set d6 [lindex $item 6] |
set d7 [lindex $item 7] |
set d8 [lindex $item 8] |
|
reggetkv rw11::CM_D8 $d8 "d8_" xnum req istart idone |
reggetkv rw11::CM_D8REQ $d8 "d8_" wacc macc cacc bytop dspace |
reggetkv rw11::CM_D8ACK $d8 "d8_" ack err tysv tmmu mwdrop |
reggetkv rw11::CM_D8ERR $d8 "d8_" vmerr |
reggetkv rw11::CM_D7 $d7 "d7_" pc idec |
set d7_pc [expr {$d7_pc << 1}] |
reggetkv rw11::CM_D5IM0 $d5 "d5_" dres_val ddst_we dsrc_we |
reggetkv rw11::CM_D5IM1 $d5 "d5_" vfetch |
|
set p_iflag " " |
if {$d8_istart} {set p_iflag "-"} |
if {$d8_idone} {set p_iflag "|"} |
if {$d8_istart && $d8_idone} {set p_iflag "+"} |
|
set p_vm " " |
if {$d8_req} { |
set vmbytop $d8_bytop |
set p_vmrw [expr {$d8_wacc ? "w" : "r"}] |
set p_vmmmc " " |
if {$d8_macc} {set p_vmmmc "m"} |
if {$d8_cacc} {set p_vmmmc "c"} |
set p_vmbytop [expr {$d8_bytop ? "b" : " "}] |
set p_vmspace [expr {$d8_dspace ? "d" : "i"}] |
set p_vm "${p_vmrw}${p_vmmmc}${p_vmbytop}${p_vmspace}" |
} elseif {$d8_ack} { |
set p_mwdrop " " |
set p_trap " " |
if {$d8_mwdrop} {set p_mwdrop "+"} |
if {$d8_tmmu} {set p_trap "mm"} |
if {$d8_tysv} {set p_trap "ys"}; # ysv has precedence |
set p_vm "a${p_mwdrop}${p_trap}" |
} elseif {$d8_err} { |
set p_err " " |
if {$d8_vmerr == $rw11::CM_D8_VMERR_ODD} {set p_err "odd"} |
if {$d8_vmerr == $rw11::CM_D8_VMERR_MMU} {set p_err "mmu"} |
if {$d8_vmerr == $rw11::CM_D8_VMERR_NXM} {set p_err "nxm"} |
if {$d8_vmerr == $rw11::CM_D8_VMERR_IOBTO} {set p_err "bto"} |
if {$d8_vmerr == $rw11::CM_D8_VMERR_RSV} {set p_err "rsv"} |
set p_vm "E${p_err}" |
} |
|
set line "\n" |
if {$imode} { |
set ccnt [expr {$d8_xnum - $cnum_last}] |
if {$ccnt < 0} {set ccnt [expr {$ccnt + 256}]} |
if {$first} {set ccnt 0} |
append line [format %3d $ccnt] |
} else { |
set snam [lindex $snum2state $d8_xnum] |
append line [format %-14s $snam] |
} |
|
if {$imode} { |
append line " [cm_print_coct $d7_pc 1 1]" |
} else { |
append line " [cm_print_coct $d7_pc $d7_idec 1]${p_iflag}" |
append line " [cm_print_coct $d6 $d7_idec 1]" |
} |
|
append line " [rw11::ps2txt $d5]" |
|
append line " [cm_print_coct $d4 [expr {$d5_dsrc_we || $imode}] 1]" |
append line " [cm_print_coct $d3 [expr {$d5_ddst_we || $imode}] 1]" |
append line " [cm_print_coct $d2 [expr {$d5_dres_val || $imode}] 0]" |
|
append line " ${p_vm}" |
append line " [cm_print_coct $d1 [expr {$d8_req || $imode}] $vmreq_pend]" |
set p_new [expr {( $d8_req && $d8_wacc ) || \ |
( $d8_req==0 && $d8_ack && $vmracc_last ) || \ |
$imode }] |
append line " [cm_print_coct $d0 $p_new 0 $vmbytop]" |
|
if {$imode} { |
if {$d5_vfetch} { |
set vnam [string toupper [rw11::dasm_vec2txt $d1]] |
append line " !VFETCH [format %3.3o $d1] ${vnam}" |
} else { |
# if vmerr and same pc,ireg as previous entry suppress dasm line |
# that ensures that ifetch Eodd's will not give double dasm lines |
if {$d8_req==0 && $d8_err && $d7_pc==$pc_last && $d6==$ireg_last} { |
append line " !VMERR ${p_vm}" |
} else { |
append line " [dasm_ireg2txt $d6]" |
} |
} |
} else { |
if {$d7_idec} {append line " [dasm_ireg2txt $d6]"} |
} |
|
append rval $line |
|
set cnum_last $d8_xnum |
if {$d8_req} { |
set vmracc_last [expr {!$d8_wacc}] |
set vmreq_pend 1 |
} elseif {$d8_ack || $d8_err} { |
set vmreq_pend 0 |
} |
set first 0 |
set pc_last $d7_pc |
set ireg_last $d6 |
} |
return $rval |
} |
|
proc cm_print_coct {data new valid {bytop 0}} { |
if {$new} { |
if {$bytop == 0} { |
return [format %6.6o $data] |
} else { |
return [format " %3.3o" [expr {$data & 0xff}]] |
} |
} |
if {$valid} {return " ..."} |
return " ." |
} |
|
# |
# cm_raw2txt: converts raw data list into a storable text format |
# |
proc cm_raw2txt {cmraw} { |
set len [llength $cmraw] |
if {$len == 0} {return ""} |
set rval [format "# cntl,stat,type: %6.6o %6.6o %6.6o" \ |
[lindex $cmraw 0 0] [lindex $cmraw 0 1] [lindex $cmraw 0 2]] |
append rval "\n# d8 ....pc ..ireg ...psw ..dsrc ..ddst ..dres vmaddr vmdata" |
for {set i 1} {$i < $len} {incr i} { |
append rval [format \ |
"\n%4.4x %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o" \ |
[lindex $cmraw $i 8] [lindex $cmraw $i 7] [lindex $cmraw $i 6] \ |
[lindex $cmraw $i 5] [lindex $cmraw $i 4] [lindex $cmraw $i 3] \ |
[lindex $cmraw $i 2] [lindex $cmraw $i 1] [lindex $cmraw $i 0] ] |
} |
return $rval |
} |
|
# |
# cm_txt2raw: converts storable text format back in raw data list |
# |
proc cm_txt2raw {text} { |
set rval {} |
set first 1 |
foreach line [split $text "\n"] { |
set flist [split $line] |
if {$first} { |
lappend rval [lrange $flist 2 end] |
set first 0 |
continue |
} |
if {[string match "#*" $line]} {continue} |
set d8 "0x[lindex $flist 0]" |
set d7 "0[lindex $flist 1]" |
set d6 "0[lindex $flist 2]" |
set d5 "0[lindex $flist 3]" |
set d4 "0[lindex $flist 4]" |
set d3 "0[lindex $flist 5]" |
set d2 "0[lindex $flist 6]" |
set d1 "0[lindex $flist 7]" |
set d0 "0[lindex $flist 8]" |
lappend rval [list $d0 $d1 $d2 $d3 $d4 $d5 $d6 $d7 $d8] |
} |
return $rval |
} |
|
# |
# cm_get_snum2state |
# |
proc cm_get_snum2state {} { |
set retrobase $::env(RETROBASE) |
set fname "$retrobase/rtl/w11a/pdp11_sequencer.vhd" |
set fd [open $fname r] |
|
set act 0 |
set smax 0 |
while {[gets $fd line] >= 0} { |
if {[regexp -- {^\s*-- STATE2SNUM mapper begin} $line]} { |
set act 1 |
continue |
} |
if {!$act} {continue} |
if {[regexp -- {^\s*-- STATE2SNUM mapper end} $line]} {break} |
if {[regexp -- {^\s*$} $line]} {continue} |
#puts $line |
set r [regexp -- {^\s+when\s+(\w+)\s+=>.*:=\s*x"(.*)";} $line dummy m1 m2] |
if {$r} { |
set snum "0x$m2" |
set snam [string range $m1 2 end]; # strip leading s_ |
set snam2snum($snam) $snum |
if {$snum > $smax} {set smax $snum} |
} |
} |
set rval {} |
for {set i 0} {$i <= $smax} {incr i} {lappend rval {}} |
foreach key [array names snam2snum] { |
lset rval $snam2snum($key) $key |
} |
|
close $fd |
return $rval |
} |
|
# |
# cm_read_lint: read lint (last instruction) context |
# returns list of lists |
# 1. stat,ipc,ireg |
# 2. mal list (CM_STAT.malcnt entries) |
# 3. regs list ps,r0,...,pc (optional if $regs != 0) |
# |
proc cm_read_lint {{cpu "cpu0"} {regs 0}} { |
set clist {} |
lappend clist -rreg cm.stat rstat |
lappend clist -rreg cm.ipc ripc |
lappend clist -rreg cm.ireg rireg |
lappend clist -rblk cm.imal 16 rimal |
if {$regs} { |
foreach reg {ps r0 r1 r2 r3 r4 r5 sp pc} {lappend clist -r${reg} ${reg} } |
} |
|
$cpu cp {*}$clist |
|
set malcnt [regget rw11::CM_STAT(malcnt) $rstat] |
set rimal [lreplace $rimal [expr {$malcnt + 1}] end]; # keep only defined |
|
set rval list [list $rstat $ripc $rireg] $rimal |
if {$regs} {lappend rval [list $rps $rr0 $rr1 $rr2 $rr3 $rr4 $rr5 $rsp $rpc]} |
|
return $rval |
} |
|
# |
# cm_print_lint: print lint (last instruction) context |
# |
proc cm_print_lint {cmlraw} { |
set stat [lindex $cmlraw 0 0] |
set ipc [lindex $cmlraw 0 1] |
set ireg [lindex $cmlraw 0 2] |
set mal [lindex $cmlraw 1] |
set nmal [llength $mal] |
|
set bwf "w" |
set aclist {} |
set dsc [dasm_getdsc $ireg] |
if {[llength $dsc] != 0} { |
set acinf [lindex $dsc 4] |
set bwf [lindex $dsc 5] |
foreach acmod $acinf { |
set actyp [string range $acmod 0 0] |
if {$actyp eq "s"} { |
set regmod [expr {($ireg >> 6) & 077}] |
lappend aclist {*}[dasm_acmod2aclist $acmod $regmod] |
} elseif {$actyp eq "d"} { |
set regmod [expr { $ireg & 077}] |
lappend aclist {*}[dasm_acmod2aclist $acmod $regmod] |
} else { |
lappend aclist $acmod |
} |
} |
|
set rilist {} |
set line2 "" |
foreach {ma md} $mal { |
set acmod [lindex $aclist 0] |
set aclist [lreplace $aclist 0 0] |
switch $acmod { |
ri {lappend rilist $md} |
ra {append line2 [format "%6.6o->" $ma]} |
rd {append line2 [format "%6.6o->%6.6o; " $ma $md]} |
wd {append line2 [format "%6.6o<-%6.6o; " $ma $md]} |
md {set line2 [string range $line2 0 end-2] |
append line2 [format "<-%6.6o; " $md]} |
default {append line2 [format "%s:%6.6o:%6.6o; " $acmod $ma $md]} |
} |
} |
|
set itxt [dasm_iline $ireg $dsc $rilist] |
set rval [format "pc: %6.6o ireg: %6.6o na:%2d %s" $ipc $ireg $nmal $itxt] |
if {$line2 ne ""} {append rval "\n $line2"} |
|
} else { |
set rval [format "pc: %6.6o ireg: %6.6o na:%2d" $ipc $ireg $na] |
foreach {ma mv} $mal { |
append rval [format "\n %6.6o : " $ma] |
if {$mv ne ""} append rval [format "%6.6o" $mv] |
} |
} |
|
if {[llength $cmlraw] > 2} { |
append regs [lindex $cmlraw 2] |
append rval "\n ps: [rw11::ps2txt [lindex $regs 0]]" |
append rval [format " rx: %6.6o %6.6o %6.6o %6.6o %6.6o %6.6o" \ |
[lindex $regs 1] [lindex $regs 2] [lindex $regs 3] |
[lindex $regs 4] [lindex $regs 5] [lindex $regs 6]] |
set rpc [lindex $regs 8] |
set p_br ""; # FIXME !! |
append vval [format " %6.6o %6.6o%s" \ |
[lindex $regs 7] $rpc $p_br] |
} |
|
return $rval |
} |
} |
/trunk/tools/tcl/ibd_lp11/.cvsignore
0,0 → 1,461
pkgIndex.tcl |
/trunk/tools/tcl/ibd_lp11/util.tcl
0,0 → 1,36
# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-26 719 1.0 Initial version |
# |
|
package provide ibd_lp11 1.0 |
|
package require rlink |
package require rw11util |
package require rw11 |
|
namespace eval ibd_lp11 { |
# |
# setup register descriptions for ibd_lp11 --------------------------------- |
# |
|
regdsc CSR {err 15} {done 7} {ie 6} |
|
rw11util::regmap_add ibd_lp11 lp?.rcsr {?? CSR} |
|
variable ANUM 8 |
|
} |
trunk/tools/tcl/ibd_lp11
Property changes :
Added: svn:ignore
## -0,0 +1,34 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_rk11/.cvsignore
===================================================================
--- trunk/tools/tcl/ibd_rk11/.cvsignore (nonexistent)
+++ trunk/tools/tcl/ibd_rk11/.cvsignore (revision 34)
@@ -0,0 +1 @@
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_rk11/util.tcl
===================================================================
--- trunk/tools/tcl/ibd_rk11/util.tcl (nonexistent)
+++ trunk/tools/tcl/ibd_rk11/util.tcl (revision 34)
@@ -0,0 +1,57 @@
+# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $
+#
+# Copyright 2015- by Walter F.J. Mueller
+#
+# This program is free software; you may redistribute and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation, either version 2, or at your option any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+# for complete details.
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-12-26 719 1.0 Initial version
+#
+
+package provide ibd_rk11 1.0
+
+package require rlink
+package require rw11util
+package require rw11
+
+namespace eval ibd_rk11 {
+ #
+ # setup register descriptions for ibd_rk11 ---------------------------------
+ #
+
+ regdsc DS {id 15 3} {hden 11} {dru 10} {sin 9} {sok 8} {dry 7} \
+ {adry 6} {wps 5} {scsa 4} {sc 3 4}
+ regdsc ER {dre 15} {ovr 14} {wlo 13} {pge 11} \
+ {nxm 10} {nxd 7} {nxc 6} {nxs 5} {cse 1} {wce 0}
+ regdsc CS {err 15} {he 14} {scp 13} {maint 12} {iba 11} {fmt 10} \
+ {rwa 9} {sse 8} {rdy 7} {ide 6} {mex 5 2} \
+ {func 3 3 "s:CRES:WR:RD:WCHK:SEEK:RCHK:DRES:WLCK"} \
+ {go 0}
+ regdsc DA {drsel 15 3} {cyl 12 8} {sur 4} {sc 3 4}
+ regdsc RMR {rid 15 3} {crdone 11} {sbclr 10} {creset 9} {fdone 8} {sdone 7 8}
+
+ variable FUNC_CRES [bvi b3 "000"]
+ variable FUNC_WR [bvi b3 "001"]
+ variable FUNC_RD [bvi b3 "010"]
+ variable FUNC_WCHK [bvi b3 "011"]
+ variable FUNC_SEEK [bvi b3 "100"]
+ variable FUNC_RCHK [bvi b3 "101"]
+ variable FUNC_DRES [bvi b3 "110"]
+ variable FUNC_WLCK [bvi b3 "111"]
+
+ rw11util::regmap_add ibd_rk11 rk?.ds {?? DS}
+ rw11util::regmap_add ibd_rk11 rk?.er {?? ER}
+ rw11util::regmap_add ibd_rk11 rk?.cs {?? CS}
+ rw11util::regmap_add ibd_rk11 rk?.da {?? DA}
+ rw11util::regmap_add ibd_rk11 rk?.mr {r? RMR}
+
+ variable ANUM 4
+}
Index: trunk/tools/tcl/ibd_rk11
===================================================================
--- trunk/tools/tcl/ibd_rk11 (nonexistent)
+++ trunk/tools/tcl/ibd_rk11 (revision 34)
trunk/tools/tcl/ibd_rk11
Property changes :
Added: svn:ignore
## -0,0 +1,34 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_rl11/.cvsignore
===================================================================
--- trunk/tools/tcl/ibd_rl11/.cvsignore (nonexistent)
+++ trunk/tools/tcl/ibd_rl11/.cvsignore (revision 34)
@@ -0,0 +1 @@
+pkgIndex.tcl
Index: trunk/tools/tcl/ibd_rl11/util.tcl
===================================================================
--- trunk/tools/tcl/ibd_rl11/util.tcl (nonexistent)
+++ trunk/tools/tcl/ibd_rl11/util.tcl (revision 34)
@@ -0,0 +1,47 @@
+# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $
+#
+# Copyright 2015- by Walter F.J. Mueller
+#
+# This program is free software; you may redistribute and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation, either version 2, or at your option any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+# for complete details.
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-12-26 719 1.0 Initial version
+#
+
+package provide ibd_rl11 1.0
+
+package require rlink
+package require rw11util
+package require rw11
+
+namespace eval ibd_rl11 {
+ #
+ # setup register descriptions for ibd_rl11 ---------------------------------
+ #
+
+ regdsc CS {err 15} {de 14} {e 13 4} {ds 9 2} {crdy 7} {ie 6} {ba 5 2} \
+ {func 3 3 "s:NOOP:WCHK:GS:SEEK:RHDR:WR:RD:RNHC"} \
+ {drdy 0}
+ regdsc RCS {mprem 15 5} {mploc 10 3} {ena_mprem 5} {ena_mploc 4}
+
+ variable FUNC_NOOP [bvi b3 "000"]
+ variable FUNC_WCHK [bvi b3 "001"]
+ variable FUNC_GS [bvi b3 "010"]
+ variable FUNC_SEEK [bvi b3 "011"]
+ variable FUNC_RHDR [bvi b3 "100"]
+ variable FUNC_WR [bvi b3 "101"]
+ variable FUNC_RD [bvi b3 "110"]
+ variable FUNC_RNHC [bvi b3 "111"]
+
+ rw11util::regmap_add ibd_rl11 rl?.cs {l? CS r? RCS}
+
+ variable ANUM 5
+}
Index: trunk/tools/tcl/ibd_rl11
===================================================================
--- trunk/tools/tcl/ibd_rl11 (nonexistent)
+++ trunk/tools/tcl/ibd_rl11 (revision 34)
trunk/tools/tcl/ibd_rl11
Property changes :
Added: svn:ignore
## -0,0 +1,34 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
+pkgIndex.tcl
Index: trunk/tools/tcl/setup_packages
===================================================================
--- trunk/tools/tcl/setup_packages (revision 33)
+++ trunk/tools/tcl/setup_packages (revision 34)
@@ -1,5 +1,5 @@
#! /usr/bin/env tclshcpp
-# $Id: setup_packages 683 2015-05-17 21:54:35Z mueller $
+# $Id: setup_packages 719 2015-12-27 09:45:43Z mueller $
#
pkg_mkIndex -verbose ../lib \
librlinktpp.so \
@@ -16,9 +16,15 @@
pkg_mkIndex -verbose rbemon *.tcl
#
pkg_mkIndex -verbose rw11 *.tcl
+pkg_mkIndex -verbose rw11util *.tcl
#
+pkg_mkIndex -verbose ibd_dl11 *.tcl
pkg_mkIndex -verbose ibd_ibmon *.tcl
+pkg_mkIndex -verbose ibd_lp11 *.tcl
+pkg_mkIndex -verbose ibd_pc11 *.tcl
pkg_mkIndex -verbose ibd_rhrp *.tcl
+pkg_mkIndex -verbose ibd_rk11 *.tcl
+pkg_mkIndex -verbose ibd_rl11 *.tcl
pkg_mkIndex -verbose ibd_tm11 *.tcl
#
pkg_mkIndex -verbose tst_rlink *.tcl
Index: trunk/tools/tcl/rutil/regdsc.tcl
===================================================================
--- trunk/tools/tcl/rutil/regdsc.tcl (nonexistent)
+++ trunk/tools/tcl/rutil/regdsc.tcl (revision 34)
@@ -0,0 +1,304 @@
+# $Id: regdsc.tcl 705 2015-07-26 21:25:42Z mueller $
+#
+# Copyright 2011-2015 by Walter F.J. Mueller
+#
+# This program is free software; you may redistribute and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation, either version 2, or at your option any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+# for complete details.
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-07-24 705 1.1 add regbldkv,reggetkv; regtxt: add {all 0} arg
+# add s:.. ptyp to support symbolic field values
+# 2015-06-26 695 1.0 Initial version (with reg* procs from util.tcl)
+#
+
+package provide rutil 1.0
+
+package require rutiltpp
+
+namespace eval rutil {
+ #
+ # regdsc: setup a register descriptor --------------------------------------
+ #
+ proc regdsc {rdscName args} {
+ upvar $rdscName rdsc
+ set fbegmax -1
+ set mskftot 0
+
+ foreach arg $args {
+ set nopt [llength $arg]
+ if {$nopt < 2 || $nopt > 4} {
+ error "regdsc-E: wrong number of elements in field dsc \"$arg\""
+ }
+ set fnam [lindex $arg 0]
+ set fbeg [lindex $arg 1]
+ set flen [lindex $arg 2]
+ if {$nopt < 3} { set flen 1 }
+ set ptyp [lindex $arg 3]
+ if {$nopt < 4} { set ptyp "b" }
+ set popt {}
+ set plen 0
+
+ set mskb [expr {( 1 << $flen ) - 1}]
+ set mskf [expr {$mskb << ( $fbeg - ( $flen - 1 ) )}]
+
+ if {[string match "s:*" $ptyp]} {
+ set popt [lrange [split $ptyp ":"] 1 end]
+ set ptyp "s"
+ if { [llength $popt] != ( 1 << $flen ) } {
+ error "regdsc-E: bad value count for for \"$rdscName:$fnam\""
+ }
+ foreach nam $popt {
+ if {![string match {[A-Za-z]*} $nam]} {
+ error "regdsc-E: bad name \"$name\" for for \"$rdscName:$fnam\""
+ }
+ set nlen [string length $nam]
+ if {$nlen > $plen} {set plen $nlen}
+ }
+ lappend popt $plen
+
+ } else {
+ switch $ptyp {
+ b {}
+ o -
+ x {set plen [string length [format "%${ptyp}" $mskb]]
+ set popt "%${plen}.${plen}${ptyp}"}
+ d {set plen [string length [format "%d" $mskb]]
+ set popt "%${plen}d"}
+ - {}
+ default {error "regdsc-E: bad ptyp \"$ptyp\" for \"$rdscName:$fnam\""}
+ }
+ }
+
+ if {( $flen - 1 ) > $fbeg} {
+ error "regdsc-E: bad field dsc \"$arg\": length > start position"
+ }
+
+ set rdsc($fnam) [list $fbeg $flen $mskb $mskf $ptyp $popt]
+
+ if {$fbegmax < $fbeg} {set fbegmax $fbeg}
+ set mskftot [expr {$mskftot | $mskf}]
+ }
+
+ set rdsc(-n) [lsort -decreasing -command regdsc_sort \
+ [array names rdsc -regexp {^[^-]}] ]
+
+ set rdsc(-w) [expr {$fbegmax + 1}]
+ set rdsc(-m) $mskftot
+
+ return ""
+ }
+
+ proc regdsc_sort {a b} {
+ upvar rdsc urdsc
+ return [expr {[lindex $urdsc($a) 0] - [lindex $urdsc($b) 0] }]
+ }
+
+ #
+ # regdsc_print: print register descriptor ----------------------------------
+ #
+ proc regdsc_print {rdscName} {
+ upvar $rdscName rdsc
+ set rval ""
+ if {! [info exists rdsc]} {
+ error "can't access \"$rdscName\": variable doesn't exist"
+ }
+
+ set rsize $rdsc(-w)
+
+ append rval " field bits bitmask"
+
+ foreach fnam $rdsc(-n) {
+ set fdsc $rdsc($fnam)
+ set fbeg [lindex $fdsc 0]
+ set flen [lindex $fdsc 1]
+ set fmskf [lindex $fdsc 3]
+ set ptyp [lindex $fdsc 4]
+ set popt [lindex $fdsc 5]
+ set line " "
+ append line [format "%8s" $fnam]
+ if {$flen > 1} {
+ append line [format " %2d:%2d" $fbeg [expr {$fbeg - $flen + 1}]]
+ } else {
+ append line [format " %2d" $fbeg]
+ }
+ append line " "
+ append line [pbvi "b${rsize}" $fmskf]
+ if {$ptyp eq "s"} {
+ append line " " [join [lrange $popt 0 end-1] ":"]
+ } else {
+ if {$popt ne ""} {append line " $popt"}
+ }
+ append rval "\n$line"
+ }
+ return $rval
+ }
+
+ #
+ # regbld: build a register value from list of keys or {key val} pairs ------
+ #
+ proc regbld {rdscName args} {
+ upvar $rdscName rdsc
+ set kvl {}
+ foreach arg $args {
+ set narg [llength $arg]
+ if {$narg < 1 || $narg > 2} {
+ error "regbld-E: field specifier \"$arg\": must be 'name \[val\]'"
+ }
+ set fnam [lindex $arg 0]
+ if {! [info exists rdsc($fnam)] } {
+ error "regbld-E: field specifier \"$arg\": field unknown"
+ }
+
+ set fval 1
+ if {$narg == 1} {
+ set flen [lindex $rdsc($fnam) 1]
+ if {$flen > 1} {
+ error "regbld-E: field specifier \"$arg\": no value and flen>1"
+ }
+ } else {
+ set fval [lindex $arg 1]
+ }
+ lappend kvl $fnam $fval
+ }
+ return [regbldkv rdsc {*}$kvl]
+ }
+
+ #
+ # regbldkv: build a register value from key value list ---------------------
+ #
+ proc regbldkv {rdscName args} {
+ upvar $rdscName rdsc
+ if {[llength $args] % 2 != 0} {
+ error "regbldkv-E: odd number of optional key value args"
+ }
+
+ set rval 0
+ foreach {fnam fval} $args {
+ if {! [info exists rdsc($fnam)] } {
+ error "regbldkv-E: field specifier \"$fnam\": field unknown"
+ }
+ set fbeg [lindex $rdsc($fnam) 0]
+ set flen [lindex $rdsc($fnam) 1]
+ set mskb [lindex $rdsc($fnam) 2]
+ set ptyp [lindex $rdsc($fnam) 4]
+ set popt [lindex $rdsc($fnam) 5]
+
+ if {$ptyp eq "s" && ! [string is integer $fval]} {
+ set nind [lsearch [lrange $popt 0 end-1] $fval]
+ if {$nind < 0} {
+ error "regbldkv-E: \"$fval\" unknown value name for \"$fnam\""
+ }
+ set fval $nind
+ }
+
+ if {$fval >= 0} {
+ if {$fval > $mskb} {
+ error "regbldkv-E: field specifier \"$fnam\": $fval > $mskb"
+ }
+ } else {
+ if {$fval < [expr {- $mskb}]} {
+ error "regbldkv-E: field specifier \"$fnam\": $fval < -$mskb]"
+ }
+ set fval [expr {$fval & $mskb}]
+ }
+ set rval [expr {$rval | $fval << ( $fbeg - ( $flen - 1 ) )}]
+
+ }
+ return $rval
+ }
+
+ #
+ # regget: extract field from a register value ------------------------------
+ #
+ proc regget {fdscName val} {
+ upvar $fdscName fdsc
+ if {! [info exists fdsc] } {
+ error "regget-E: field descriptor \"$fdscName\" unknown"
+ }
+ set fbeg [lindex $fdsc 0]
+ set flen [lindex $fdsc 1]
+ set mskb [lindex $fdsc 2]
+ return [expr {( $val >> ( $fbeg - ( $flen - 1 ) ) ) & $mskb}]
+ }
+
+ #
+ # reggetkv: extract multiple fields to variables ---------------------------
+ #
+ proc reggetkv {rdscName val pref args} {
+ upvar $rdscName rdsc
+ if {[llength $args] == 0} {set args "*"}
+ foreach kpat $args {
+ set nvar 0
+ foreach key [array names rdsc $kpat] {
+ if {[string match -* $key]} {continue}
+ upvar "${pref}${key}" var
+ set var [regget "rdsc($key)" $val]
+ incr nvar
+ }
+ if {$nvar == 0} {
+ error "reggetkv-E: no match for field name pattern \"$kpat\""
+ }
+ }
+ }
+
+ #
+ # regtxt: convert register value to a text string --------------------------
+ # Note: mode currently only "" and "a" (show all fields) allowed
+ # maybe later also "th" (table head) and "tr" (table row)
+ #
+ proc regtxt {rdscName val {mode ""}} {
+ upvar $rdscName rdsc
+ set rval ""
+
+ foreach fnam $rdsc(-n) {
+ set flen [lindex $rdsc($fnam) 1]
+ set ptyp [lindex $rdsc($fnam) 4]
+ set popt [lindex $rdsc($fnam) 5]
+ set fval [regget rdsc($fnam) $val]
+
+ if {$ptyp eq "-" || ($ptyp ne "s" && $fval == 0 && $mode eq "")} {continue}
+
+ if {$rval ne ""} {append rval " "}
+ append rval "${fnam}"
+ if {$ptyp eq "b" && $flen == 1 && $mode eq ""} {continue}
+ append rval ":"
+
+ if {$ptyp eq "s"} {
+ set plen [lindex $popt end]
+ append rval [format "%-${plen}s" [lindex $popt $fval]]
+ } elseif {$ptyp eq "b"} {
+ append rval [pbvi b${flen} $fval]
+ } else {
+ append rval [format "${popt}" $fval]
+ }
+ }
+ return $rval
+ }
+
+ #
+ # ! export reg... procs to global scope ------------------------------------
+ #
+
+ namespace export regdsc
+ namespace export regdsc_print
+ namespace export regbld
+ namespace export regbldkv
+ namespace export regget
+ namespace export reggetkv
+ namespace export regtxt
+}
+
+namespace import rutil::regdsc
+namespace import rutil::regdsc_print
+namespace import rutil::regbld
+namespace import rutil::regbldkv
+namespace import rutil::regget
+namespace import rutil::reggetkv
+namespace import rutil::regtxt
Index: trunk/tools/tcl/rutil/fileio.tcl
===================================================================
--- trunk/tools/tcl/rutil/fileio.tcl (nonexistent)
+++ trunk/tools/tcl/rutil/fileio.tcl (revision 34)
@@ -0,0 +1,55 @@
+# $Id: fileio.tcl 705 2015-07-26 21:25:42Z mueller $
+#
+# Copyright 2015- by Walter F.J. Mueller
+#
+# This program is free software; you may redistribute and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation, either version 2, or at your option any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+# for complete details.
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-07-17 701 1.0 Initial version
+#
+
+package provide rutil 1.0
+
+package require rutiltpp
+
+namespace eval rutil {
+ #
+ # tofile: write a variable to file -----------------------------------------
+ #
+ proc tofile {fname val} {
+ if [catch {open $fname w} fout] {
+ error "Cannot open $fname for writing"
+ } else {
+ puts $fout $val
+ close $fout
+ }
+ return ""
+ }
+
+ #
+ # fromfile: read a variable from file --------------------------------------
+ #
+ proc fromfile {fname} {
+ if [catch {open $fname r} fin] {
+ error "Cannot open $fname for reading"
+ } else {
+ set rval [read -nonewline $fin]
+ close $fin
+ }
+ return $rval
+ }
+
+ namespace export tofile
+ namespace export fromfile
+}
+
+namespace import rutil::tofile
+namespace import rutil::fromfile
Index: trunk/tools/tcl/rutil/util.tcl
===================================================================
--- trunk/tools/tcl/rutil/util.tcl (revision 33)
+++ trunk/tools/tcl/rutil/util.tcl (revision 34)
@@ -1,4 +1,4 @@
-# $Id: util.tcl 689 2015-06-05 14:33:18Z mueller $
+# $Id: util.tcl 705 2015-07-26 21:25:42Z mueller $
#
# Copyright 2011-2015 by Walter F.J. Mueller
#
@@ -13,6 +13,8 @@
#
# Revision History:
# Date Rev Version Comment
+# 2015-07-25 704 1.1.1 rename optlist2arr->args2opts, new logic, export it
+# 2015-06-26 695 1.1 move reg* proc to regdsc.tcl
# 2015-06-05 688 1.0.5 add dohook
# 2015-03-28 660 1.0.4 add com8 and com16
# 2014-12-23 619 1.0.3 regget: add check for unknown field descriptor
@@ -28,17 +30,19 @@
namespace eval rutil {
#
- # optlist2arr: process options arguments given as key value list -----------
+ # args2opts: process options arguments given as key value list -----------
#
- proc optlist2arr {outarrname refarrname optlist} {
- upvar $outarrname outarr
- upvar $refarrname refarr
- array set outarr [array get refarr]
- foreach {key value} $optlist {
- if {[info exists outarr($key)]} {
- set outarr($key) $value
+ proc args2opts {optsName refs args} {
+ upvar $optsName opts
+ if {[llength $args] % 2 != 0} {
+ error "args2opts-E: odd number of optional key value args"
+ }
+ array set opts $refs
+ foreach {key value} $args {
+ if {[info exists opts($key)]} {
+ set opts($key) $value
} else {
- error "key $key not valid in optlist"
+ error "args2opts-E: key $key not valid in optlist"
}
}
return ""
@@ -45,167 +49,6 @@
}
#
- # regdsc: setup a register descriptor --------------------------------------
- #
- proc regdsc {name args} {
- upvar $name rdsc
- set fbegmax -1
- set mskftot 0
-
- foreach arg $args {
- set nopt [llength $arg]
- if {$nopt < 2} {
- error "wrong number of elements in field dsc \"$arg\""
- }
- set fnam [lindex $arg 0]
- set fbeg [lindex $arg 1]
- set flen [lindex $arg 2]
- if {$nopt < 3} { set flen 1 }
- set popt [lindex $arg 3]
- if {$nopt < 4} { set popt "b" }
-
- if {( $flen - 1 ) > $fbeg} {
- error "error in field dsc \"$arg\": length > start position"
- }
-
- set mskb [expr {( 1 << $flen ) - 1}]
- set mskf [expr {$mskb << ( $fbeg - ( $flen - 1 ) )}]
- set rdsc($fnam) [list $fbeg $flen $mskb $mskf $popt]
-
- if {$fbegmax < $fbeg} {set fbegmax $fbeg}
- set mskftot [expr {$mskftot | $mskf}]
- }
-
- set rdsc(-n) [lsort -decreasing -command regdsc_sort \
- [array names rdsc -regexp {^[^-]}] ]
-
- set rdsc(-w) [expr {$fbegmax + 1}]
- set rdsc(-m) $mskftot
-
- return ""
- }
-
- #
- # regdsc_print: print register descriptor ----------------------------------
- #
- proc regdsc_print {name} {
- upvar $name rdsc
- set rval ""
- if {! [info exists rdsc]} {
- error "can't access \"$name\": variable doesn't exist"
- }
-
- set rsize $rdsc(-w)
-
- append rval " field bits bitmask"
-
- foreach fnam $rdsc(-n) {
- set fdsc $rdsc($fnam)
- set fbeg [lindex $fdsc 0]
- set flen [lindex $fdsc 1]
- set fmskf [lindex $fdsc 3]
- set line " "
- append line [format "%8s" $fnam]
- if {$flen > 1} {
- append line [format " %2d:%2d" $fbeg [expr {$fbeg - $flen + 1}]]
- } else {
- append line [format " %2d" $fbeg]
- }
- append line " "
- append line [pbvi "b${rsize}" $fmskf]
- append rval "\n$line"
- }
- return $rval
- }
-
- proc regdsc_sort {a b} {
- upvar rdsc urdsc
- return [expr {[lindex $urdsc($a) 0] - [lindex $urdsc($b) 0] }]
- }
-
- #
- # regbld: build a register value from a list of fields ---------------------
- #
- proc regbld {name args} {
- upvar $name rdsc
- set rval 0
- foreach arg $args {
- if {[llength $arg] < 1 || [llength $arg] > 2} {
- error "error in field specifier \"$arg\": must be 'name [val]'"
- }
- set fnam [lindex $arg 0]
- if {! [info exists rdsc($fnam)] } {
- error "error in field specifier \"$arg\": field unknown"
- }
- set fbeg [lindex $rdsc($fnam) 0]
- set flen [lindex $rdsc($fnam) 1]
-
- if {[llength $arg] == 1} {
- if {$flen > 1} {
- error "error in field specifier \"$arg\": no value and flen>1"
- }
- set mskf [lindex $rdsc($fnam) 3]
- set rval [expr {$rval | $mskf}]
-
- } else {
- set fval [lindex $arg 1]
- set mskb [lindex $rdsc($fnam) 2]
- if {$fval >= 0} {
- if {$fval > $mskb} {
- error "error in field specifier \"$arg\": value > $mskb"
- }
- } else {
- if {$fval < [expr {- $mskb}]} {
- error "error in field specifier \"$arg\": value < [expr -$mskb]"
- }
- set fval [expr {$fval & $mskb}]
- }
- set rval [expr {$rval | $fval << ( $fbeg - ( $flen - 1 ) )}]
- }
-
- }
- return $rval
- }
-
- #
- # regget: extract field from a register value ------------------------------
- #
- proc regget {name val} {
- upvar $name fdsc
- if {! [info exists fdsc] } {
- error "register field descriptor \"$name\" unknown"
- }
- set fbeg [lindex $fdsc 0]
- set flen [lindex $fdsc 1]
- set mskb [lindex $fdsc 2]
- return [expr {( $val >> ( $fbeg - ( $flen - 1 ) ) ) & $mskb}]
- }
-
- #
- # regtxt: convert register value to a text string --------------------------
- #
- proc regtxt {name val} {
- upvar $name rdsc
- set rval ""
-
- foreach fnam $rdsc(-n) {
- set popt [lindex $rdsc($fnam) 4]
- set fval [regget rdsc($fnam) $val]
- if {$popt ne "-"} {
- if {$rval ne ""} {append rval " "}
- append rval "${fnam}:"
- if {$popt eq "b"} {
- set flen [lindex $rdsc($fnam) 1]
- append rval [pbvi b${flen} $fval]
- } else {
- append rval [format "%${popt}" $fval]
- }
- }
- }
- return $rval
- }
-
- #
# errcnt2txt: returns "PASS" if 0 and "FAIL" otherwise ---------------------
#
proc errcnt2txt {errcnt} {
@@ -259,19 +102,10 @@
return
}
- #
- # ! export reg... procs to global scope ------------------------------------
- #
+ # ! export some procs to global scope --------------------------------------
- namespace export regdsc
- namespace export regdsc_print
- namespace export regbld
- namespace export regget
- namespace export regtxt
+ namespace export args2opts
+
}
-namespace import rutil::regdsc
-namespace import rutil::regdsc_print
-namespace import rutil::regbld
-namespace import rutil::regget
-namespace import rutil::regtxt
+namespace import rutil::args2opts
/trunk/tools/tcl/ibd_tm11/util.tcl
1,4 → 1,4
# $Id: $ |
# $Id: util.tcl 719 2015-12-27 09:45:43Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
13,6 → 13,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-26 719 1.0.1 add regmap_add defs |
# 2015-05-17 683 1.0 Initial version |
# |
|
19,6 → 20,7
package provide ibd_tm11 1.0 |
|
package require rlink |
package require rw11util |
package require rw11 |
|
namespace eval ibd_tm11 { |
30,7 → 32,9
{onl 6} {bot 5} {wrl 2} {rew 1} {tur 0} |
|
regdsc CR {err 15} {den 14 2} {ini 12} {pevn 11} {unit 10 3} \ |
{rdy 7} {ie 6} {ea 5 2} {func 3 3} {go 0} |
{rdy 7} {ie 6} {ea 5 2} \ |
{func 3 3 "s:UNLOAD:READ:WRITE:WEOF:SFORW:SBACK:WRTEG:REWIND"} \ |
{go 0} |
variable FUNC_UNLOAD [bvi b3 "000"] |
variable FUNC_READ [bvi b3 "001"] |
variable FUNC_WRITE [bvi b3 "010"] |
40,13 → 44,18
variable FUNC_WRTEG [bvi b3 "110"] |
variable FUNC_REWIND [bvi b3 "111"] |
|
regdsc RCR {icmd 15} {pae 12} {rle 9} {bte 8} {nxm 7} \ |
{unit 5 2} {func 3 3} {go 0} |
regdsc RCR {icmd 15} {pae 12} {rle 9} {bte 8} {nxm 7} {unit 5 2} \ |
{func 3 3 "s:FU0:WUNIT:DONE:FU3:FU4:FU5:FU6:FU7"} \ |
{go 0} |
variable RFUNC_WUNIT [bvi b3 "001"] |
variable RFUNC_DONE [bvi b3 "010"] |
|
regdsc RRL {eof 10} {eot 9} {onl 8} {bot 7} {wrl 6} {rew 5} {unit 2 2} |
|
rw11util::regmap_add ibd_tm11 tm?.sr {?? SR} |
rw11util::regmap_add ibd_tm11 tm?.cr {l? CR rr CR rw RCR} |
rw11util::regmap_add ibd_tm11 tm?.rl {r? RRL} |
|
variable ANUM 7 |
|
# |
/trunk/tools/tbench/cp/test_cp_cpubasics.tcl
1,4 → 1,4
# $Id: test_cp_cpubasics.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_cp_cpubasics.tcl 702 2015-07-19 17:36:09Z mueller $ |
# |
# Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
5,6 → 5,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-19 702 1.1.1 ignore attn in stat checks |
# 2015-05-09 676 1.1 w11a start/stop/suspend overhaul |
# 2013-03-31 502 1.0 Initial version |
# |
91,12 → 92,13
|
set statgo [regbld rw11::STAT cpugo] |
set statgosu [regbld rw11::STAT cpususp cpugo] |
set statmask [rutil::com8 [regbld rw11::STAT attn]]; # check all but attn |
|
rlc log " execute via -stapc, check cpugo and that r2 increments" |
$cpu cp -wr2 00000 \ |
-stapc $sym(start) \ |
-rr2 rr2_1 -estat $statgo \ |
-rr2 rr2_2 -estat $statgo |
-rr2 rr2_1 -estat $statgo $statmask \ |
-rr2 rr2_2 -estat $statgo $statmask |
tmpproc_checkr2inc $rr2_1 |
tmpproc_checkr2inc [expr {$rr2_2 - $rr2_1}] |
|
103,13 → 105,13
rlc log " suspend, check cpususp=1 and that r2 doesn't increment" |
$cpu cp -suspend \ |
-wr2 00000 \ |
-rr2 -edata 0 -estat $statgosu \ |
-rr2 -edata 0 -estat $statgosu |
-rr2 -edata 0 -estat $statgosu $statmask \ |
-rr2 -edata 0 -estat $statgosu $statmask |
|
rlc log " resume, check cpususp=0 and that r2 increments again" |
$cpu cp -resume \ |
-rr2 rr2_1 -estat $statgo \ |
-rr2 rr2_2 -estat $statgo |
-rr2 rr2_1 -estat $statgo $statmask \ |
-rr2 rr2_2 -estat $statgo $statmask |
tmpproc_checkr2inc $rr2_1 |
tmpproc_checkr2inc [expr {$rr2_2 - $rr2_1}] |
|
/trunk/tools/tbench/tm11/test_tm11_int.tcl
1,4 → 1,4
# $Id: test_tm11_int.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_tm11_int.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
5,6 → 5,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-25 704 1.0.1 tmpproc_dotest: use args rather opts |
# 2015-05-17 683 1.0 Initial version |
# |
# Test interrupt response |
88,25 → 89,23
##puts $lst |
|
# define tmpproc for readback checks |
proc tmpproc_dotest {cpu symName opts} { |
proc tmpproc_dotest {cpu symName args} { |
upvar 1 $symName sym |
|
set tout 10.; # FIXME_code: parameter ?? |
|
# setup defs hash, first defaults, than write over concrete run values |
array set defs { i.cr 0 \ |
i.bc 0 \ |
i.ba 0 \ |
o.sr 0 \ |
o.cr 0 \ |
o.bc 0 \ |
o.ba 0 \ |
do.lam 0 |
} |
array set defs $opts |
args2opts opts {i.cr 0 \ |
i.bc 0 \ |
i.ba 0 \ |
o.sr 0 \ |
o.cr 0 \ |
o.bc 0 \ |
o.ba 0 \ |
do.lam 0 } {*}$args |
|
# build ibuf |
set ibuf [list $defs(i.bc) $defs(i.ba) $defs(i.cr)] |
set ibuf [list $opts(i.bc) $opts(i.ba) $opts(i.cr)] |
|
# setup write ibuf, setup stack, and start cpu at start: |
$cpu cp -wal $sym(ibuf) \ |
115,7 → 114,7
-stapc $sym(start) |
|
# here do minimal lam handling (harvest + send DONE) |
if {$defs(do.lam)} { |
if {$opts(do.lam)} { |
rlc wtlam $tout apat |
$cpu cp -attn \ |
-wibr tma.cs [ibd_rhrp::cr_func $ibd_tm11::RFUNC_DONE] |
128,15 → 127,15
-rsp -edata $sym(stack) \ |
-wal $sym(obuf) \ |
-rmi -edata 1 \ |
-rmi -edata $defs(o.sr) \ |
-rmi -edata $defs(o.cr) \ |
-rmi -edata $defs(o.bc) \ |
-rmi -edata $defs(o.ba) \ |
-rmi -edata $opts(o.sr) \ |
-rmi -edata $opts(o.cr) \ |
-rmi -edata $opts(o.bc) \ |
-rmi -edata $opts(o.ba) \ |
-wal $sym(fbuf) \ |
-rmi -edata $defs(o.sr) \ |
-rmi -edata $defs(o.cr) \ |
-rmi -edata $defs(o.bc) \ |
-rmi -edata $defs(o.ba) |
-rmi -edata $opts(o.sr) \ |
-rmi -edata $opts(o.cr) \ |
-rmi -edata $opts(o.bc) \ |
-rmi -edata $opts(o.ba) |
|
return "" |
} |
148,7 → 147,7
# -- Section A --------------------------------------------------------------- |
rlc log " A1.1 set cr.ie=1 -> software interrupt -------------" |
|
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cr [regbld ibd_tm11::CR ie] \ |
i.bc 0xff00 \ |
i.ba 0x8800 \ |
156,7 → 155,5
o.cr [regbld ibd_tm11::CR rdy ie] \ |
o.bc 0xff00 \ |
o.ba 0x8800 |
] |
|
tmpproc_dotest $cpu sym $opts |
|
/trunk/tools/tbench/w11a_cmon/test_cmon_logs.tcl
0,0 → 1,852
# $Id: test_cmon_logs.tcl 708 2015-08-03 06:41:43Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-08-02 707 1.0 Initial version |
# |
# Test cm_print |
|
# ---------------------------------------------------------------------------- |
rlc log "test_cmon_logs: test cmon logs (cm_print) ---------------------------" |
|
if {[$cpu get hascmon] == 0} { |
rlc log " test_cmon_logs-W: no cmon unit found, test aborted" |
return |
} |
|
# reset cmon |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start stop] \ |
-rreg cm.cntl -edata 0 |
|
# define tmpproc for executing tests |
proc tmpproc_dotest {cpu code tname} { |
|
$cpu ldasm -lst lst -sym sym $code |
|
foreach imode {0 1} { |
$cpu cp -creset |
rw11::cm_start $cpu imode $imode mwsup 1 |
rw11::asmrun $cpu sym |
rw11::asmwait $cpu sym |
rw11::cm_stop $cpu |
set cmraw [rw11::cm_read $cpu] |
set cmprt [rw11::cm_print $cmraw] |
set fnam "test_cmon_${tname}_imode${imode}.log" |
tofile $fnam $cmprt |
} |
return "" |
} |
|
# -- Section A --------------------------------------------------------------- |
rlc log " A: basic instructions -------------------------------------" |
rlc log " A1: opg_reg: basic register - register -------------" |
|
set code { |
. = 1000 |
start: clr r0 ; 000000* |
inc r0 ; 000001* |
mov r0,r1 ; 000001 000001* |
mov r0,r2 ; 000001 000001 000001* |
asl r2 ; 000001 000001 000002* |
neg r1 ; 000001 177777* 000002 |
clc ; c = 0 |
rol r1 ; 000001 177776* 000002 c = 1 |
ror r2 ; 000001 177776 100001* c = 0 |
mov r2,r3 ; 000001 177776 100001 100001* |
com r2 ; 000001 177776 077776* 100001 |
asr r3 ; 000001 177776 077776 140000* |
mov r3,r4 ; 000001 177776 077776 140000 140000* |
swab r4 ; 000001 177776 077776 140000 000300* |
bis r3,r4 ; 000001 177776 077776 140000 140300* |
bic r3,r1 ; 000001 037776* 077776 140000 140300 |
dec r1 ; 000001 037775* 077776 140000 140300 |
sub r0,r2 ; 000001 037775* 077775 140000 140300 |
add r0,r4 ; 000001 037775* 077775 140000 140301* |
xor r3,r4 ; 000001 037775* 077775 140000 000301* |
halt |
stop: |
} |
|
tmpproc_dotest $cpu $code opg_reg |
|
# -- ------- A2 ----------------------------------------------------------- |
rlc log " A2: mov_srcr: mov and srcr chain -------------------" |
|
set code { |
. = 1000 |
start: nop |
clr r0 ; m=0,rx; |
inc r0 ; m=0,rx; |
mov r0,r1 ; m=0,rx; |
mov #a,r2 ; m=2,pc; r2<=a |
mov #pa,r3 ; m=2,pc; r3<=pa |
mov (r2)+,r4 ; m=2,rx; read a; r2->b |
mov (r2),r4 ; m=1,rx; read b; |
mov -(r2),r4 ; m=4,rx; read a; r2->a |
mov @(r3)+,r4 ; m=3,rx; read a; r3->pb |
mov @-(r3),r4 ; m=5,rx; read a; r3->pa |
mov a,r4 ; m=6,pc; read a; |
mov @pb,r4 ; m=7,pc; read b; |
mov @#a,r4 ; m=3,pc; read a; |
mov 2(r2),r4 ; m=6,rx; read b (r2->a) |
mov @2(r3),r4 ; m=7,rx; read b (r3->pa) |
halt |
stop: |
; |
a: .word 123 |
b: .word 234 |
pa: .word a |
pb: .word b |
} |
|
tmpproc_dotest $cpu $code mov_srcr |
|
# -- ------- A3 ----------------------------------------------------------- |
rlc log " A3: mov_dstw: mov and dstw chain -------------------" |
|
set code { |
. = 1000 |
start: mov #123,r0 |
mov #234,r1 |
mov #a,r2 ; m=2,pc; r2<=a |
mov #pa,r3 ; m=2,pc; r3<=pa |
mov r0,(r2)+ ; m=2,rx; write a; r2->b |
mov r0,(r2) ; m=1,rx; write b; |
mov r1,-(r2) ; m=4,rx; write a; r2->a |
mov r0,@(r3)+ ; m=3,rx; write a; r3->pb |
mov r1,@-(r3) ; m=5,rx; write a; r3->pa |
mov r0,a ; m=6,pc; write a; |
mov r1,@pb ; m=7,pc; write b; |
mov r1,@#a ; m=3,pc; write a; |
mov r0,2(r2) ; m=6,rx; write b (r2->a) |
mov r1,@2(r3) ; m=7,rx; write b (r3->pa) |
halt |
stop: |
; |
a: .word 0 |
b: .word 0 |
pa: .word a |
pb: .word b |
} |
|
tmpproc_dotest $cpu $code mov_dstw |
|
# -- ------- A4 ----------------------------------------------------------- |
rlc log " A4: cmp_dstr: cmp and dstr chain -------------------" |
|
set code { |
. = 1000 |
start: mov #000001,r0 |
mov #177777,r1 |
mov #a,r2 |
mov #pa,r3 |
cmp r0,(r2)+ ; m=2,rx; read a; r2->b |
cmp r1,(r2) ; m=1,rx; read b; |
cmp r0,-(r2) ; m=4,rx; read a; r2->a |
cmp r0,@(r3)+ ; m=3,rx; read a; r3->pb |
cmp r0,@-(r3) ; m=5,rx; read a; r3->pa |
cmp r0,a ; m=6,pc; read a; |
cmp r1,@pb ; m=7,pc; read b; |
cmp r0,#000001 ; m=2,pc; read const |
cmp r0,@#a ; m=3,pc; read a; |
cmp r1,2(r2) ; m=6,rx; read b (r2->a) |
cmp r1,@2(r3) ; m=7,rx; read b (r3->pa) |
halt |
stop: |
; |
a: .word 000001 |
b: .word 177777 |
pa: .word a |
pb: .word b |
} |
|
tmpproc_dotest $cpu $code cmp_dstr |
|
# -- ------- A5 ----------------------------------------------------------- |
rlc log " A5: add_dstr: add and dstr chain, test r-m-w -------" |
|
set code { |
. = 1000 |
start: mov #000123,a |
mov #000234,b |
mov #000001,r0 |
mov #177777,r1 |
mov #a,r2 |
mov #pa,r3 |
add r0,(r2)+ ; m=2,rx; modify a; r2->b |
add r1,(r2) ; m=1,rx; modify b; |
add r0,-(r2) ; m=4,rx; modify a; r2->a |
add r0,@(r3)+ ; m=3,rx; modify a; r3->pb |
add r0,@-(r3) ; m=5,rx; modify a; r3->pa |
add r0,a ; m=6,pc; modify a; |
add r1,@pb ; m=7,pc; modify b; |
add r0,@#a ; m=3,pc; modify a; |
add r1,2(r2) ; m=6,rx; modify b (r2->a) |
add r1,@2(r3) ; m=7,rx; modify b (r3->pa) |
halt |
stop: |
; |
a: .word 000001 |
b: .word 177777 |
pa: .word a |
pb: .word b |
} |
|
tmpproc_dotest $cpu $code add_dstr |
|
rlc log " A6: op_byte some byte accesses ---------------------" |
|
set code { |
. = 1000 |
start: |
mov #pb0,r2 |
movb a0,r0 |
movb a1,r1 |
movb r0,@(r2)+ ; write b0; afterwards r2->pb1 |
movb r1,b1 ; write b1 |
incb @pb1 ; access b1 |
bisb #101,@-2(r2) ; access b0 |
halt |
stop: |
; |
a0: .byte 010 |
a1: .byte 020 |
b0: .byte 0 |
b1: .byte 0 |
pb0: .word b0 |
pb1: .word b1 |
} |
|
tmpproc_dotest $cpu $code op_byte |
|
# -- ------- A7 ----------------------------------------------------------- |
rlc log " A7: op_mixed: a long mixed address case ------------" |
|
set code { |
. = 1000 |
start: mov #123,a |
mov #234,b |
mov #pa,r0 |
mov #pb,r1 |
add @-2(r1),@2(r0) ; does add a,b ... |
mov b,r0 |
halt |
stop: |
; |
a: .word 0 |
b: .word 0 |
pa: .word a |
pb: .word b |
} |
|
tmpproc_dotest $cpu $code op_mixed |
|
# -- ------- A8 ----------------------------------------------------------- |
rlc log " A8: op_long: complex instructions: mul,div,ash(c) --" |
|
set code { |
. = 1000 |
start: mov #1234,r0 |
mul #2345,r0 ; 1234*2345 -> 314 2614 |
add #345,r1 ; add 345 to lsb |
adc r0 ; and carry to msb |
mov r1,r5 |
div #1234,r0 ; 314 3161 / 1234 -> 2345 reminder 345 |
mov r0,r4 ; quotient 2345 |
mov r1,r5 ; reminder 345 |
; |
mov #1,r0 |
ash #10,r0 |
mov r0,r4 |
; |
mov #123,r1 |
mov #234,r0 |
ashc #3,r0 |
mov r0,r4 ; msb: 2340 |
mov r1,r5 ; lsb: 1230 |
halt |
stop: |
} |
|
tmpproc_dotest $cpu $code op_long |
|
# -- ------- A8 ----------------------------------------------------------- |
rlc log " A8: op_mxpx: m(tf)p(id) instruction ----------------" |
|
set code { |
. = 1000 |
start: mov #123,a ; set a value |
mfpd @pa ; fetch a: now on stack |
inc (sp) ; inc it |
mtpd @pa ; store a |
mov a,r0 ; and check |
halt |
stop: |
; |
a: .word 0 |
pa: .word a |
} |
|
tmpproc_dotest $cpu $code op_mxpx |
|
# -- Section B --------------------------------------------------------------- |
rlc log " B: flow control instructions ------------------------------" |
|
rlc log " B1: jsr_dsta: jsr and dsta chain -------------------" |
|
set code { |
. = 1000 |
start: mov #ra,r2 |
mov #pra,r3 |
jsr pc,(r2)+ ; m=2,rx; call ra; r2->rb |
jsr pc,(r2) ; m=1,rx; call rb; |
jsr pc,-(r2) ; m=4,rx; call ra; r2->ra |
jsr pc,@(r3)+ ; m=3,rx; call ra; r3->prb |
jsr pc,@-(r3) ; m=5,rx; call ra; r3->pra |
jsr pc,ra ; m=6,pc; call ra; |
jsr pc,@prb ; m=7,pc; call rb; |
jsr pc,@#ra ; m=3,pc; call ra; |
jsr pc,2(r2) ; m=6,rx; call rb (r2->ra) |
jsr pc,@2(r3) ; m=7,rx; call rb (r3->pra) |
halt |
stop: |
; |
ra: rts pc |
rb: rts pc |
pra: .word ra |
prb: .word rb |
} |
|
tmpproc_dotest $cpu $code jsr_dsta |
|
# -- ------- B2 ----------------------------------------------------------- |
rlc log " B2: brsobjmp: br, sob and jmp ----------------------" |
|
set code { |
. = 1000 |
start: clr r0 |
mov #000001,r1 |
mov #177777,r2 |
; cmp and cond branch |
cmp r1,r0 |
beq bad |
bne 10$ |
halt |
; bit and cond branch |
10$: bit r1,r2 |
beq bad |
bne 20$ |
halt |
; br loop |
20$: mov #3,r3 |
clr r4 |
21$: inc r4 |
dec r3 |
bne 21$ |
|
; sob loop |
30$: mov #3,r3 |
clr r4 |
31$: inc r4 |
sob r3,31$ |
|
; some branches |
br 40$ |
halt |
40$: sec |
bcc bad |
bcs 41$ |
|
; and jumps |
41$: jmp l1 |
halt |
l1: jmp @#l2 |
halt |
l2: halt |
stop: |
; |
bad: halt |
} |
|
tmpproc_dotest $cpu $code brsobjmp |
|
# -- ------- B3 ----------------------------------------------------------- |
rlc log " B3: test mark instruction (never used nonsense) ----" |
|
set code { |
. = 1000 |
start: mov r5,-(sp) ; push old r5 on stack |
mov #101,-(sp) ; push 1st param |
mov #102,-(sp) ; push 2nd param |
mov #103,-(sp) ; push 3rd param |
mov #<mark+3>,-(sp) ; push MARK 3 |
mov sp,r5 ; get address of MARK N |
jsr pc,r ; call routine |
halt |
stop: |
; |
r: mov 6(r5),r0 ; 1st param |
mov 4(r5),r0 ; 2nd param |
mov 2(r5),r0 ; 3rd param |
rts r5 |
} |
|
tmpproc_dotest $cpu $code op_mark |
|
# -- Section D --------------------------------------------------------------- |
rlc log " D: traps --------------------------------------------------" |
rlc log " D1: trap instructions ------------------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
. = 000004 |
v..iit: .word vh.xxx ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.xxx ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.bpt ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.iot ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.emt ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.trp ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.xxx ; vec 250 (MMU) |
.word 000340 |
; |
. = 1000 |
start: bpt |
iot |
emt 123 |
trap 234 |
halt |
stop: |
; |
vh.bpt: mov #010000,r0 |
rti |
vh.iot: mov #020000,r0 |
rti |
vh.emt: mov (sp),r0 |
mov -2(r0),r0 |
bic #177400,r0 |
bis #030000,r0 |
rti |
vh.trp: mov (sp),r0 |
mov -2(r0),r0 |
bic #177400,r0 |
bis #040000,r0 |
rti |
; |
vh.xxx: halt |
} |
|
tmpproc_dotest $cpu $code trap_ins |
|
# -- ------- D2 ----------------------------------------------------------- |
rlc log " D2: usage of trace bit in psw ----------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
. = 000004 |
v..iit: .word vh.xxx ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.xxx ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.bpt ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.iot ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.xxx ; vec 250 (MMU) |
.word 000340 |
; |
. = 1000 |
start: mov #<cp.cmu+cp.pr7+cp.t>,-(sp) |
mov #ucode,-(sp) |
rtt ; use rtt, allow 1 instruction |
halt |
; |
; this code will be executed in user mode |
; |
ucode: clr r2 |
inc r2 |
com r2 |
iot |
; |
; iot will end this test with a halt (is executed in kernel mode) |
; |
vh.iot: halt |
stop: |
; |
; bpt handler returns traced instruction (works only for 1 word instructions !!) |
; |
vh.bpt: mov (sp),r0 |
mov -2(r0),r0 |
rtt ; use rtt, allow 1 instruction |
; |
vh.xxx: halt |
} |
|
tmpproc_dotest $cpu $code trap_tbit |
|
# -- ------- D3 ----------------------------------------------------------- |
rlc log " D3: test yellow stack trap -------------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
.include |lib/defs_reg70.mac| |
. = 000004 |
v..iit: .word vh.iit ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.rit ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.xxx ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.xxx ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.xxx ; vec 250 (MMU) |
.word 000340 |
; |
. = 1000 |
start: clr @#cpuerr ; FIXME: hack to workaround creset issue |
; remove (with defs_reg70 include) when fixed |
mov #400,sp |
mov #123,-(sp) |
halt |
stop: |
; |
vh.iit: mov #010000,r0 |
mov sp,r5 |
rti |
vh.rit: mov #020000,r0 |
rti |
; |
vh.xxx: halt |
} |
|
tmpproc_dotest $cpu $code trap_ysv |
|
# -- ------- D43 ----------------------------------------------------------- |
rlc log " D4: mmu trap ---------------------------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
.include |lib/defs_mmu.mac| |
. = 000004 |
v..iit: .word vh.xxx ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.xxx ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.xxx ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.xxx ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.mmu ; vec 250 (MMU) |
.word cp.pr7 |
; |
. = 1000 |
start: mov #<77400+md.arw>,@#<kipdr+00> ; s0: slf=127; ed=0; acf=rw |
mov #000000,@#<kipar+00> ; 1-to-1 |
mov #<77400+md.atw>,@#<kipdr+02> ; s1: slf=127; ed=0; acf=rw,trap-w |
mov #000200,@#<kipar+02> ; 1-to-1 |
mov #<77400+md.arw>,@#<kipdr+16> ; s7: slf=127; ed=0; acf=rw |
mov #177600,@#<kipar+16> ; to io page (22 bit) |
mov #234,vtst |
mov #m3.e22,@#ssr3 ; enable 22bit mode |
mov #<m0.ent+m0.ena>,@#ssr0 ; enable mmu, enable traps |
; |
mov vtst,r0 ; no trap (is read) |
inc r0 |
mov r0,vtst ; should trap (is write) |
inc vtst ; should trap (is read-mod-write) |
; |
clr @#ssr0 |
halt |
stop: |
; |
vh.mmu: mov #<m0.ent+m0.ena>,@#ssr0 ; clear error flags, keep enables |
rti |
; |
vh.xxx: halt |
; |
. = 0020000 |
vtst: .word 234 ; in segment 1, will trap on write |
} |
|
tmpproc_dotest $cpu $code trap_mmu |
|
# -- Section E --------------------------------------------------------------- |
rlc log " E: faults -------------------------------------------------" |
rlc log " E1: test reserved and bad instruction faults -------" |
|
set code { |
.include |lib/defs_cpu.mac| |
. = 000004 |
v..iit: .word vh.iit ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.rit ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.xxx ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.xxx ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.xxx ; vec 250 (MMU) |
.word 000340 |
; |
. = 1000 |
start: |
tst0: mov #tst1,r5 |
.word 000010 ; reserved instruction (trap 10) |
halt |
; |
tst1: mov #end,r5 |
jsr pc,r1 ; bad address mode instruction (trap 10) |
halt |
; |
end: halt |
stop: |
; |
vh.iit: mov #010000,r0 |
mov r5,(sp) |
rti |
vh.rit: mov #020000,r0 |
mov r5,(sp) |
rti |
; |
vh.xxx: halt |
} |
|
tmpproc_dotest $cpu $code flt_trap10 |
|
# -- ------- E2 ----------------------------------------------------------- |
rlc log " E2: test odd addr, io timeout faults ---------------" |
# Note: E1/E2 splitt in two tests to ensure they stay < 256 cycles |
|
set code { |
.include |lib/defs_cpu.mac| |
. = 000004 |
v..iit: .word vh.iit ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.rit ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.xxx ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.xxx ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.xxx ; vec 250 (MMU) |
.word 000340 |
; |
. = 1000 |
start: |
tst0: mov #tst1,r5 |
mov b,r1 ; odd address (data) |
halt |
; |
tst1: mov #tst2,r5 |
jmp b ; odd address (code) |
halt |
; |
tst2: mov #end,r5 |
mov @#160000,r1 ; ibus timeout |
halt |
; |
end: halt |
stop: |
; |
vh.iit: mov #010000,r0 |
mov r5,(sp) |
rti |
vh.rit: mov #020000,r0 |
mov r5,(sp) |
rti |
; |
vh.xxx: halt |
; |
a: .byte 0 |
b: .byte 0 |
} |
|
tmpproc_dotest $cpu $code flt_oddtout |
|
# -- ------- E3 ----------------------------------------------------------- |
rlc log " E3: test red stack trap ----------------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
. = 000004 |
v..iit: .word vh.iit ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.rit ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.xxx ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.xxx ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.xxx ; vec 250 (MMU) |
.word 000340 |
; |
. = 1000 |
start: mov #300,sp |
mov #123,-(sp) |
halt |
stop: |
; |
vh.iit: mov #010000,r0 |
mov sp,r5 |
rti |
vh.rit: mov #020000,r0 |
rti |
; |
vh.xxx: halt |
} |
|
tmpproc_dotest $cpu $code flt_rsv |
|
# -- ------- E4 ----------------------------------------------------------- |
rlc log " E4: mmu fault --------------------------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
.include |lib/defs_mmu.mac| |
. = 000004 |
v..iit: .word vh.xxx ; vec 4 |
.word cp.pr7 |
v..rit: .word vh.xxx ; vec 10 |
.word cp.pr7 |
v..bpt: .word vh.xxx ; vec 14 (T bit; BPT) |
.word cp.pr7 |
v..iot: .word vh.xxx ; vec 20 (IOT) |
.word cp.pr7 |
. = 000030 |
v..emt: .word vh.xxx ; vec 30 (EMT) |
.word cp.pr7 |
v..trp: .word vh.xxx ; vec 34 (TRAP) |
.word cp.pr7 |
. = 000250 |
v..mmu: .word vh.mmu ; vec 250 (MMU) |
.word cp.pr7 |
; |
. = 1000 |
start: mov #<77400+md.arw>,@#<kipdr+00> ; s0: slf=127; ed=0; acf=rw |
mov #000000,@#<kipar+00> ; 1-to-1 |
mov #077400,@#<kipdr+02> ; s1: slf=127; ed=0; acf=abo |
mov #<77400+md.arw>,@#<kipdr+16> ; s7: slf=127; ed=0; acf=rw |
mov #177600,@#<kipar+16> ; to io page (22 bit) |
mov #m3.e22,@#ssr3 ; enable 22bit mode |
mov #m0.ena,@#ssr0 ; enable mmu |
; |
mov #bad,r5 ; to blocker |
mov vok,a ; should be ok |
mov #ok,r5 ; recover address |
mov vbad,b ; should fault |
br bad ; to blocker |
ok: mov #bad,r5 ; to blocker |
mov vok,a ; should be ok again |
; |
clr @#ssr0 |
halt |
stop: |
bad: halt |
; |
a: .word 0 |
b: .word 0 |
; |
vh.mmu: mov @#ssr0,r0 ; check ssr0 |
mov @#ssr1,r1 ; check ssr1 |
mov @#ssr2,r2 ; check ssr2 |
mov #m0.ena,@#ssr0 ; clear error flags, keep enable |
mov r5,(sp) ; use recovery address |
rti |
; |
vh.xxx: halt |
; |
. = 0010000 |
vok: .word 123 ; still in segment 0, thus ok |
; |
. = 0020000 |
vbad: .word 234 ; in segment 1, will abort |
} |
|
tmpproc_dotest $cpu $code flt_mmu |
|
# -- Section I --------------------------------------------------------------- |
rlc log " I: interrupt-----------------------------------------------" |
|
rlc log " I1: test pirq interrupts and spl -------------------" |
|
set code { |
.include |lib/defs_cpu.mac| |
.include |lib/defs_reg70.mac| |
. = 000240 |
v..pir: .word vh.pir ; vec 240 (PIRQ) |
.word cp.pr7 |
; |
. = 1000 |
start: spl 7 |
movb #300,pirq+1 ; book pr7 and pr6 |
clr r5 |
; |
spl 6 ; next instruction always done |
inc r5 ; interrupt after inc |
inc r5 |
; |
spl 0 ; next instruction always done |
inc r5 ; interrupt after inc |
inc r5 |
; |
halt |
stop: |
; |
vh.pir: mov pirq,r0 |
bic #177761,r0 ; mask index bits |
asr r0 ; get pri |
mov #1,r1 |
ash r0,r1 ; r2 = 1<<pri |
bicb r1,pirq+1 ; clear request |
mov r5,r2 ; sample inc counter |
rti |
} |
|
tmpproc_dotest $cpu $code int_pirq |
|
/trunk/tools/tbench/w11a_cmon/w11a_cmon_all.dat
0,0 → 1,7
# $Id: w11a_cmon_all.dat 701 2015-07-19 12:58:29Z mueller $ |
# |
## steering file for all w11a_cmon tests |
# |
test_cmon_regs.tcl |
test_cmon_imon.tcl |
# |
/trunk/tools/tbench/w11a_cmon/test_cmon_regs.tcl
0,0 → 1,107
# $Id: test_cmon_regs.tcl 706 2015-08-01 06:59:48Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-18 701 1.0 Initial version |
# |
# Test register response |
|
# ---------------------------------------------------------------------------- |
rlc log "test_cmon_regs: test register response ------------------------------" |
|
if {[$cpu get hascmon] == 0} { |
rlc log " test_cmon_regs-W: no cmon unit found, test aborted" |
return |
} |
|
# -- Section A --------------------------------------------------------------- |
rlc log " A basic register access tests -----------------------------" |
|
rlc log " A1: test cntl --------------------------------------" |
# reset cmon |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start stop] \ |
-rreg cm.cntl -edata 0 |
|
# test imode, wena bits (set only when start=1) |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start] \ |
-rreg cm.cntl -edata [regbld rw11::CM_CNTL start] \ |
-wreg cm.cntl [regbld rw11::CM_CNTL wena start] \ |
-rreg cm.cntl -edata [regbld rw11::CM_CNTL wena start] \ |
-wreg cm.cntl [regbld rw11::CM_CNTL imode wena start] \ |
-rreg cm.cntl -edata [regbld rw11::CM_CNTL imode wena start] |
# test imode, wena bits (kept when start=0) |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL stop] \ |
-rreg cm.cntl -edata [regbld rw11::CM_CNTL imode wena] \ |
-wreg cm.cntl [regbld rw11::CM_CNTL start stop] \ |
-rreg cm.cntl -edata 0 \ |
-wreg cm.cntl [regbld rw11::CM_CNTL imode] \ |
-rreg cm.cntl -edata 0 \ |
-wreg cm.cntl [regbld rw11::CM_CNTL wena] \ |
-rreg cm.cntl -edata 0 |
|
# start cmon |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start] \ |
-rreg cm.cntl -edata [regbld rw11::CM_CNTL start] |
|
rlc log " A2: test stat --------------------------------------" |
# is read only |
$cpu cp -rreg cm.stat \ |
-wreg cm.stat 0 -estaterr |
|
rlc log " A3: test addr ---------------------------------------" |
rlc log " A3.1: when stopped ----------------------------------" |
# start will clear addr |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL stop] \ |
-rreg cm.cntl -edata 0 \ |
-wreg cm.addr [regbld rw11::CM_ADDR {laddr 017} {waddr 03}] \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 017} {waddr 03}] \ |
-wreg cm.cntl [regbld rw11::CM_CNTL start] \ |
-rreg cm.cntl -edata [regbld rw11::CM_CNTL start] \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 0} {waddr 0}] |
rlc log " A3.2: test err when started and written ------------" |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start] \ |
-wreg cm.addr 0x1234 -estaterr |
|
rlc log " A4: test data --------------------------------------" |
rlc log " A4.1: when stopped ---------------------------------" |
# stop, set addr, and nine times data, check addr |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL stop] \ |
-wreg cm.addr [regbld rw11::CM_ADDR {laddr 010} {waddr 0}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 001}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 002}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 003}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 004}] |
# at 9th data read waddr goes 0 and laddr incs |
$cpu cp -rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 005}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 006}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 007}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 010} {waddr 010}] \ |
-rreg cm.data \ |
-rreg cm.addr -edata [regbld rw11::CM_ADDR {laddr 011} {waddr 000}] |
|
rlc log " A4.2: test err when started or written -------------" |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start] \ |
-rreg cm.data -estaterr \ |
-wreg cm.cntl [regbld rw11::CM_CNTL stop] \ |
-wreg cm.data 0 -estaterr |
|
rlc log " A5: test imon section; readable, not writable ------" |
$cpu cp -rreg cm.iaddr \ |
-rreg cm.ipc \ |
-rreg cm.ireg \ |
-rreg cm.imal \ |
-wreg cm.iaddr 0 -estaterr \ |
-wreg cm.ipc 0 -estaterr \ |
-wreg cm.ireg 0 -estaterr \ |
-wreg cm.imal 0 -estaterr |
/trunk/tools/tbench/w11a_cmon/test_cmon_imon.tcl
0,0 → 1,225
# $Id: test_cmon_imon.tcl 706 2015-08-01 06:59:48Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-18 701 1.0 Initial version |
# |
# Test register response |
|
# ---------------------------------------------------------------------------- |
rlc log "test_cmon_imon: test last instruction monitor -----------------------" |
|
if {[$cpu get hascmon] == 0} { |
rlc log " test_cmon_regs-W: no cmon unit found, test aborted" |
return |
} |
|
# reset cmon |
$cpu cp -wreg cm.cntl [regbld rw11::CM_CNTL start stop] \ |
-rreg cm.cntl -edata 0 |
|
# -- Section A --------------------------------------------------------------- |
rlc log " A: simple linear code, word access ------------------------" |
|
# All src modes tested |
# mode 0 1 2 3 4 5 6 7 |
# non-pc I0 I6 I5 I8 I7 I9 I13 I14 |
# pc I3 I12 I10 I11 |
|
$cpu ldasm -lst lst -sym sym { |
. = 1000 |
start: nop |
I0: clr r0 ; m=0,rx; |
I1: inc r0 ; m=0,rx; |
I2: mov r0,r1 ; m=0,rx; |
I3: mov #a,r2 ; m=2,pc; r2->a |
I4: mov #pa,r3 ; m=2,pc; r3->pa |
I5: mov (r2)+,r4 ; m=2,rx; read a; r2->b |
I6: mov (r2),r4 ; m=1,rx; read b; |
I7: mov -(r2),r4 ; m=4,rx; read a; r2->a |
I8: mov @(r3)+,r4 ; m=3,rx; read a; r3->pb |
I9: mov @-(r3),r4 ; m=5,rx; read a; r3->pa |
I10: mov a,r4 ; m=6,pc; |
I11: mov @pb,r4 ; m=7,pc; |
I12: mov @#a,r4 ; m=3,pc; |
I13: mov 2(r2),r4 ; m=6,rx; read b (r2->a) |
I14: mov @2(r3),r4 ; m=7,rx; read b (r3->pa) |
I15: add @px,@py ; worst case, 7 accesses ... |
I16: halt |
stop: |
; |
a: .word 123 |
b: .word 234 |
x: .word 345 |
y: .word 001 ; ! will be modified, re-init for 2nd pass ! |
pa: .word a |
pb: .word b |
px: .word x |
py: .word y |
} |
|
# puts $lst |
|
rlc log " A1: run code ---------------------------------------" |
$cpu cp -wma $sym(y) 1; # re-init y ! |
rw11::asmrun $cpu sym |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu r0 1 r1 1 r2 $sym(a) r3 $sym(pa) r4 0234 |
rw11::asmtmem $cpu $sym(y) {0346} |
|
rlc log " A2: test ipc,ireg ----------------------------------" |
|
set edata {} |
lappend edata $sym(start) 0000240; # nop |
lappend edata $sym(I0) 0005000; # clr r0 |
lappend edata $sym(I1) 0005200; # inc r0 |
lappend edata $sym(I2) 0010001; # mov r0,r1 |
lappend edata $sym(I3) 0012702; # mov #a,r2 |
lappend edata $sym(I4) 0012703; # mov #pa,r3 |
lappend edata $sym(I5) 0012204; # mov (r2)+,r4 |
lappend edata $sym(I6) 0011204; # mov (r2),r4 |
lappend edata $sym(I7) 0014204; # mov -(r2),r4 |
lappend edata $sym(I8) 0013304; # mov @(r3)+,r4 |
lappend edata $sym(I9) 0015304; # mov @-(r3),r4 |
lappend edata $sym(I10) 0016704; # mov a,r4 |
lappend edata $sym(I11) 0017704; # mov @pa,r4 |
lappend edata $sym(I12) 0013704; # mov @#a,r4 |
lappend edata $sym(I13) 0016204; # mov 2(r2),r4 |
lappend edata $sym(I14) 0017304; # mov @2(r3),r4 |
lappend edata $sym(I15) 0067777; # add @pc,@pd |
|
$cpu cp -wma $sym(y) 1; # re-init y ! |
$cpu cp -stop -creset -wpc $sym(start) |
|
foreach {ipc ireg} $edata { |
$cpu cp -step \ |
-rreg "cm.ipc" -edata $ipc \ |
-rreg "cm.ireg" -edata $ireg |
} |
|
rlc log " A3: test imal (memory access log) ------------------" |
|
set edata {} |
lappend edata $sym(start) {}; # nop |
lappend edata $sym(I0) {}; # clr r0 |
lappend edata $sym(I1) {}; # inc r0 |
lappend edata $sym(I2) {}; # mov r0,r1 |
lappend edata $sym(I3) [list [expr {$sym(I3)+2}] $sym(a)]; # mov #a,r2 |
lappend edata $sym(I4) [list [expr {$sym(I4)+2}] $sym(pa)]; # mov #pa,r3 |
lappend edata $sym(I5) [list $sym(a) 0123]; # mov (r2)+,r4 |
lappend edata $sym(I6) [list $sym(b) 0234]; # mov (r2),r4 |
lappend edata $sym(I7) [list $sym(a) 0123]; # mov -(r2),r4 |
lappend edata $sym(I8) [list $sym(pa) $sym(a) $sym(a) 0123]; # mov @(r3)+,r4 |
lappend edata $sym(I9) [list $sym(pa) $sym(a) $sym(a) 0123]; # mov @-(r3),r4 |
lappend edata $sym(I10) [list [expr {$sym(I10)+2}] \ |
[expr {$sym(a) - ($sym(I10)+4)}] \ |
$sym(a) 0123]; # mov a,r4 |
lappend edata $sym(I11) [list [expr {$sym(I11)+2}] \ |
[expr {$sym(pb) - ($sym(I11)+4)}] \ |
$sym(pb) $sym(b) \ |
$sym(b) 0234]; # mov @pa,r4 |
lappend edata $sym(I12) [list [expr {$sym(I12)+2}] $sym(a) \ |
$sym(a) 0123]; # mov @#a,r4 |
lappend edata $sym(I13) [list [expr {$sym(I13)+2}] 0002 \ |
$sym(b) 0234]; # mov 2(r2),r4 |
lappend edata $sym(I14) [list [expr {$sym(I14)+2}] 0002 \ |
$sym(pb) $sym(b) $sym(b) 0234]; # mov @2(r3),r4 |
lappend edata $sym(I15) [list [expr {$sym(I15)+2}] \ |
[expr {$sym(px) - ($sym(I15)+4)}] \ |
$sym(px) $sym(x) $sym(x) 0345 \ |
[expr {$sym(I15)+4}] \ |
[expr {$sym(py) - ($sym(I15)+6)}] \ |
$sym(py) $sym(y) $sym(y) 0001 \ |
$sym(y) 0346]; # add @px,@py |
|
$cpu cp -wma $sym(y) 1; # re-init y ! |
$cpu cp -stop -creset -wpc $sym(start) |
|
# read ipc (to clear read pointer!) |
foreach {ipc mal} $edata { |
set malcnt [llength $mal] |
set clist {} |
lappend clist -step |
lappend clist -rreg "cm.ipc" -edata $ipc |
lappend clist -rreg "cm.stat" \ |
-edata [regbldkv rw11::CM_STAT malcnt $malcnt] |
if {$malcnt > 0} { |
lappend clist -rblk "cm.imal" $malcnt -edata $mal |
} |
$cpu cp {*}$clist |
} |
|
# -- Section B --------------------------------------------------------------- |
rlc log " B: simple linear code, byte access ------------------------" |
|
$cpu ldasm -lst lst -sym sym { |
. = 1000 |
start: nop |
I0: movb a0,r0 |
I1: movb a1,r1 |
I2: movb r0,b0 |
I3: movb r1,b1 |
I4: incb c0 |
I5: incb c1 |
I6: halt |
stop: |
; |
a0: .byte ^x05 |
a1: .byte ^x0a |
b0: .byte 0 |
b1: .byte 0 |
c0: .byte ^x55 |
c1: .byte ^xaa |
} |
|
# puts $lst |
|
rlc log " B1: test imal (memory access log) ------------------" |
|
set edata {} |
lappend edata $sym(start) {}; # nop |
|
lappend edata $sym(I0) [list [expr {$sym(I0)+2}] \ |
[expr {$sym(a0) - ($sym(I0)+4)}] \ |
$sym(a0) 0x0005]; # movb a0,r0 |
|
lappend edata $sym(I1) [list [expr {$sym(I1)+2}] \ |
[expr {$sym(a1) - ($sym(I1)+4)}] \ |
$sym(a1) 0x000a]; # movb a1,r1 |
|
lappend edata $sym(I2) [list [expr {$sym(I2)+2}] \ |
[expr {$sym(b0) - ($sym(I2)+4)}] \ |
$sym(b0) 0x0005]; # movb r0,b0 |
|
lappend edata $sym(I3) [list [expr {$sym(I3)+2}] \ |
[expr {$sym(b1) - ($sym(I3)+4)}] \ |
$sym(b1) 0x000a]; # movb r1,b1 |
|
lappend edata $sym(I4) [list [expr {$sym(I4)+2}] \ |
[expr {$sym(c0) - ($sym(I4)+4)}] \ |
$sym(c0) 0x0055 \ |
$sym(c0) 0x0056]; # incb c0 |
|
lappend edata $sym(I5) [list [expr {$sym(I5)+2}] \ |
[expr {$sym(c1) - ($sym(I5)+4)}] \ |
$sym(c1) 0x000aa \ |
$sym(c1) 0x000ab]; # incb c1 |
|
$cpu cp -stop -creset -wpc $sym(start) |
|
# read ipc (to clear read pointer!) |
foreach {ipc data} $edata { |
set malcnt [llength $data] |
set clist {} |
lappend clist -step |
lappend clist -rreg "cm.ipc" -edata $ipc |
lappend clist -rreg "cm.stat" \ |
-edata [regbldkv rw11::CM_STAT malcnt $malcnt] |
if {$malcnt > 0} { |
lappend clist -rblk "cm.imal" $malcnt -edata $data |
} |
$cpu cp {*}$clist |
} |
trunk/tools/tbench/w11a_cmon
Property changes :
Added: svn:ignore
## -0,0 +1,33 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
Index: trunk/tools/tbench/cpu_all.dat
===================================================================
--- trunk/tools/tbench/cpu_all.dat (revision 33)
+++ trunk/tools/tbench/cpu_all.dat (revision 34)
@@ -1,4 +1,4 @@
-# $Id: cpu_all.dat 683 2015-05-17 21:54:35Z mueller $
+# $Id: cpu_all.dat 704 2015-07-25 14:18:03Z mueller $
#
## steering file for all cpu tests
#
@@ -5,3 +5,6 @@
@cp/cp_all.dat
@w11a/w11a_all.dat
#
+@w11a_cmon/w11a_cmon_all.dat
+@w11a_hbpt/w11a_hbpt_all.dat
+#
\ No newline at end of file
Index: trunk/tools/tbench/w11a_hbpt/test_hbpt_basics.tcl
===================================================================
--- trunk/tools/tbench/w11a_hbpt/test_hbpt_basics.tcl (nonexistent)
+++ trunk/tools/tbench/w11a_hbpt/test_hbpt_basics.tcl (revision 34)
@@ -0,0 +1,289 @@
+# $Id: test_hbpt_basics.tcl 722 2015-12-30 19:45:46Z mueller $
+#
+# Copyright 2015- by Walter F.J. Mueller
+# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-12-30 721 1.0.1 BUGFIX: add missing wtcpu in mfpd/mtpd tests
+# 2015-07-11 700 1.0 Initial version
+#
+# Test register response
+
+# ----------------------------------------------------------------------------
+rlc log "test_hbpt_basics: basic tests with 1 unit ---------------------------"
+
+set nbpt [$cpu get hashbpt]
+if {$nbpt == 0} {
+ rlc log " test_hbpt_basics-W: no hbpt units found, test aborted"
+ return
+}
+
+rlc log " setup: clear all bpts"
+for {set i 0} {$i<$nbpt} {incr i} {
+ $cpu cp -wreg "hb${i}.cntl" 0 \
+ -wreg "hb${i}.stat" 0
+}
+
+# -- Section A ---------------------------------------------------------------
+rlc log " A basic ir,dr,dw break tests ------------------------------"
+
+$cpu ldasm -lst lst -sym sym {
+ . = 1000
+start: nop
+I0: clr r0
+I1: inc r0
+I2: inc r0
+I3: inc r0
+I4: mov a,r1
+I5: mov @pb,r2
+I6: mov r1,c
+I7: mov r2,@pd
+I8: halt
+stop:
+;
+a: .word 123
+b: .word 234
+c: .word 0
+d: .word 0
+pb: .word b
+pd: .word d
+}
+
+rlc log " A1: run code without breaks ------------------------"
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+rw11::asmtreg $cpu r0 3 r1 0123 r2 0234
+rw11::asmtmem $cpu $sym(c) {0123}
+rw11::asmtmem $cpu $sym(d) {0234}
+
+rlc log " A2.1: ir break on single instruction ---------------"
+# set ir break after 1st "inc r0"
+rw11::hb_set cpu0 0 i $sym(I1)
+rw11::asmrun $cpu sym
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT irseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I2) \
+ -rr0 -edata 1
+
+rlc log " A2.2: step after ir break --------------------------"
+$cpu cp -step
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT irseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 04} susp go] \
+ -rpc -edata $sym(I3) \
+ -rr0 -edata 2
+
+rlc log " A2.3: resume after ir break ------------------------"
+$cpu cp -resume
+rw11::asmwait $cpu sym
+rw11::asmtreg $cpu r0 3 r1 0123 r2 0234
+
+rlc log " A3.1: ir break on range of instructions ------------"
+# set ir break on 2nd and 3rd "inc r0"
+rw11::hb_set cpu0 0 i $sym(I2) $sym(I3)
+rw11::asmrun $cpu sym
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT irseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I3) \
+ -rr0 -edata 2
+
+rlc log " A3.2: resume, should re-break ----------------------"
+$cpu cp -resume
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I4) \
+ -rr0 -edata 3
+
+rlc log " A3.3: resume, should run to end --------------------"
+$cpu cp -resume
+rw11::asmwait $cpu sym
+rw11::asmtreg $cpu r0 3 r1 0123 r2 0234
+
+rlc log " A4.1: dr break on direct read location -------------"
+# set dr break on a, should break after "mov a,r1"
+rw11::hb_set cpu0 0 r $sym(a)
+rw11::asmrun $cpu sym
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT drseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I5) \
+ -rr1 -edata 0123
+
+rlc log " A4.2: dr break on pointer used in indirect write ---"
+# set dr break on pd, should break after "mov r2,@pd"
+rw11::hb_set cpu0 0 r $sym(pd)
+$cpu cp -resume
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT drseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I8) \
+ -rr2 -edata 0234
+
+rlc log " A5.1: dw break on direct written location ----------"
+# set dw break on c, should break after "mov r1,c"
+rw11::hb_set cpu0 0 w $sym(c)
+rw11::asmrun $cpu sym
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT dwseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I7) \
+ -rr2 -edata 0234
+
+rlc log " A5.2: dw break on indirect write location ----------"
+# set dw break on d, should break after "mov r2,@pd"
+rw11::hb_set cpu0 0 w $sym(d)
+$cpu cp -resume
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT dwseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I8) \
+ -rr2 -edata 0234
+
+# -- Section B ---------------------------------------------------------------
+rlc log " B specific ir tests ---------------------------------------"
+
+$cpu ldasm -lst lst -sym sym {
+ . = 1000
+stack:
+start: nop
+I0: mov #a,r0
+I1: mov a,r1
+I2: mov 2(r0),r2
+I3: mfpi c
+I4: mov (sp)+,r3
+I5: halt
+stop:
+;
+a: .word 123
+b: .word 234
+c: .word 345
+}
+
+rlc log " B1: run code without breaks ------------------------"
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+rw11::asmtreg $cpu r0 $sym(a) r1 0123 r2 0234 r3 0345
+
+rlc log " B2: ensure that immediate fetch doesn't ir break ---"
+# set ir break on immediate value of "mov #a,r0"
+rw11::hb_set cpu0 0 i [expr $sym(I0)+2]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " B3: ensure that index fetch (reg != pc) doesn't ir break ---"
+# set ir break on index value of "mov a,r1"
+rw11::hb_set cpu0 0 i [expr $sym(I1)+2]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " B4: ensure that index fetch (reg == pc) doesn't ir break ---"
+# set ir break on index value of "mov 2(r0),r2"
+rw11::hb_set cpu0 0 i [expr $sym(I2)+2]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " B5: ensure that mfpi doesn't ir break ---"
+# set ir break on load value of "mfpi c"
+rw11::hb_set cpu0 0 i [expr $sym(c)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+# -- Section C ---------------------------------------------------------------
+rlc log " C test mode logic and mfpd/mtpd ---------------------------"
+
+$cpu ldasm -lst lst -sym sym {
+ .include |lib/defs_cpu.mac|
+ . = 1000
+stack:
+start: nop
+ mov #,@#cp.psw ;cm=pm=user
+I1: mov a,r0
+I2: mov r0,b
+I3: nop
+ mov #cp.pmu,@#cp.psw ;cm=kernel,pm=user
+I4: mfpd c
+I5: mov (sp),r1
+I6: mtpd d
+I7: nop
+ halt
+stop:
+;
+a: .word 123
+b: .word 0
+c: .word 234
+d: .word 0
+}
+
+rlc log " C1: run code without breaks ------------------------"
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+rw11::asmtreg $cpu r0 0123 r1 0234
+rw11::asmtmem $cpu $sym(b) {0123}
+rw11::asmtmem $cpu $sym(d) {0234}
+
+rlc log " C2.1: kernel dr break on user mode read -> no bpt --"
+# set k mode dr break on value of "mov a,r0"
+rw11::hb_set cpu0 0 kr [expr $sym(a)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " C2.2: super dr break on user mode read -> no bpt ---"
+# set s mode dr break on value of "mov a,r0"
+rw11::hb_set cpu0 0 sr [expr $sym(a)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " C2.3: user dw break on user mode write -> bpt -----"
+# set u mode dw break on value of "mov r0,b"
+rw11::hb_set cpu0 0 uw [expr $sym(b)]
+rw11::asmrun $cpu sym
+
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT dwseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I3)
+
+rlc log " C3.1: kernel dr break on mfpd (pm=user) -> no bpt --"
+# set k mode dr break on target of "mfpd c"
+rw11::hb_set cpu0 0 kr [expr $sym(c)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " C3.2: super dr break on mfpd (pm=user) -> no bpt --"
+# set s mode dr break on target of "mfpd c"
+rw11::hb_set cpu0 0 sr [expr $sym(c)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " C3.3: user dr break on mfpd (pm=user) -> bpt -----"
+# set u mode dr break on target of "mfpd c"
+rw11::hb_set cpu0 0 ur [expr $sym(c)]
+rw11::asmrun $cpu sym
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT drseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I5)
+
+rlc log " C4.1: kernel dw break on mtpd (pm=user) -> no bpt --"
+# set k mode dw break on target of "mtpd d"
+rw11::hb_set cpu0 0 kw [expr $sym(d)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " C4.2: super dw break on mtpd (pm=user) -> no bpt --"
+# set s mode dw break on target of "mtpd d"
+rw11::hb_set cpu0 0 sw [expr $sym(d)]
+rw11::asmrun $cpu sym
+rw11::asmwait $cpu sym
+
+rlc log " C4.3: user dw break on mtpd (pm=user) -> bpt -----"
+# set u mode dw break on target of "mtpd d"
+rw11::hb_set cpu0 0 uw [expr $sym(d)]
+rw11::asmrun $cpu sym
+$cpu wtcpu -reset $rw11::asmwait_tout
+$cpu cp -rreg "hb0.stat" -edata [regbld rw11::HB_STAT dwseen] \
+ -rstat -edata [regbld rw11::CP_STAT suspint {rust 06} susp go] \
+ -rpc -edata $sym(I7)
+
Index: trunk/tools/tbench/w11a_hbpt/w11a_hbpt_all.dat
===================================================================
--- trunk/tools/tbench/w11a_hbpt/w11a_hbpt_all.dat (nonexistent)
+++ trunk/tools/tbench/w11a_hbpt/w11a_hbpt_all.dat (revision 34)
@@ -0,0 +1,7 @@
+# $Id: w11a_hbpt_all.dat 701 2015-07-19 12:58:29Z mueller $
+#
+## steering file for all w11a_hbpt tests
+#
+test_hbpt_regs.tcl
+test_hbpt_basics.tcl
+#
Index: trunk/tools/tbench/w11a_hbpt/test_hbpt_regs.tcl
===================================================================
--- trunk/tools/tbench/w11a_hbpt/test_hbpt_regs.tcl (nonexistent)
+++ trunk/tools/tbench/w11a_hbpt/test_hbpt_regs.tcl (revision 34)
@@ -0,0 +1,75 @@
+# $Id: test_hbpt_regs.tcl 701 2015-07-19 12:58:29Z mueller $
+#
+# Copyright 2015- by Walter F.J. Mueller
+# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
+#
+# Revision History:
+# Date Rev Version Comment
+# 2015-07-11 700 1.0 Initial version
+#
+# Test register response
+
+# ----------------------------------------------------------------------------
+rlc log "test_hbpt_regs: test register response ------------------------------"
+
+set nbpt [$cpu get hashbpt]
+if {$nbpt == 0} {
+ rlc log " test_hbpt_regs-W: no hbpt units found, test aborted"
+ return
+}
+
+# -- Section A ---------------------------------------------------------------
+rlc log " A1: test cntl,stat for unit 0 -----------------------------"
+
+foreach {cntl stat} [list \
+ [regbld rw11::HB_CNTL {mode 1} {irena 0} {dwena 0} {drena 1}] \
+ [regbld rw11::HB_STAT {irseen 1} {dwseen 0} {drseen 0}] \
+ [regbld rw11::HB_CNTL {mode 2} {irena 0} {dwena 1} {drena 1}] \
+ [regbld rw11::HB_STAT {irseen 1} {dwseen 1} {drseen 0}] \
+ [regbld rw11::HB_CNTL {mode 3} {irena 1} {dwena 1} {drena 1}] \
+ [regbld rw11::HB_STAT {irseen 1} {dwseen 1} {drseen 1}] \
+ [regbld rw11::HB_CNTL {mode 0} {irena 0} {dwena 0} {drena 0}] \
+ [regbld rw11::HB_STAT {irseen 0} {dwseen 0} {drseen 0}] \
+ ] {
+ $cpu cp -wreg "hb0.cntl" $cntl \
+ -wreg "hb0.stat" $stat \
+ -rreg "hb0.cntl" -edata $cntl \
+ -rreg "hb0.stat" -edata $stat
+}
+
+rlc log " A2: test hilim,lolim for unit 0 ---------------------------"
+foreach {hilim lolim} {0177777 0100000 \
+ 0100000 0177777 \
+ 0000000 0000000 } {
+ $cpu cp -wreg "hb0.hilim" $hilim \
+ -wreg "hb0.lolim" $lolim \
+ -rreg "hb0.hilim" -edata [expr {$hilim & 0177776}] \
+ -rreg "hb0.lolim" -edata [expr {$lolim & 0177776}]
+}
+
+rlc log " A3: test cntl,stat,hi,lolim for all $nbpt units ---------------"
+
+set cntl {}
+set stat {}
+set hilim {}
+set lolim {}
+
+for {set i 0} {$i<$nbpt} {incr i} {
+ lappend cntl [expr {$i + 1} ]
+ lappend stat [expr {$i + 1} ]
+ lappend hilim [expr {2 * ($i+1) * 1234} ]
+ lappend lolim [expr {2 * ($i+1) * 2345} ]
+}
+
+for {set i 0} {$i<$nbpt} {incr i} {
+ $cpu cp -wreg "hb${i}.cntl" [lindex $cntl $i] \
+ -wreg "hb${i}.stat" [lindex $stat $i] \
+ -wreg "hb${i}.hilim" [lindex $hilim $i] \
+ -wreg "hb${i}.lolim" [lindex $lolim $i]
+}
+for {set i 0} {$i<$nbpt} {incr i} {
+ $cpu cp -rreg "hb${i}.cntl" -edata [lindex $cntl $i] \
+ -rreg "hb${i}.stat" -edata [lindex $stat $i] \
+ -rreg "hb${i}.hilim" -edata [lindex $hilim $i] \
+ -rreg "hb${i}.lolim" -edata [lindex $lolim $i]
+}
Index: trunk/tools/tbench/w11a_hbpt
===================================================================
--- trunk/tools/tbench/w11a_hbpt (nonexistent)
+++ trunk/tools/tbench/w11a_hbpt (revision 34)
trunk/tools/tbench/w11a_hbpt
Property changes :
Added: svn:ignore
## -0,0 +1,33 ##
+*.dep_ghdl
+*.dep_isim
+*.dep_xst
+work-obj93.cf
+*.vcd
+*.ghw
+*.sav
+*.tmp
+*.exe
+ise
+xflow.his
+*.ngc
+*.ncd
+*.pcf
+*.bit
+*.msk
+isim
+isim.log
+isim.wdb
+fuse.log
+*_[sft]sim.vhd
+*_tsim.sdf
+*_xst.log
+*_tra.log
+*_twr.log
+*_map.log
+*_par.log
+*_tsi.log
+*_pad.log
+*_bgn.log
+*_svn.log
+*_sum.log
+*_[dsft]sim.log
Index: trunk/tools/tbench/w11a/test_w11a_inst_traps.tcl
===================================================================
--- trunk/tools/tbench/w11a/test_w11a_inst_traps.tcl (revision 33)
+++ trunk/tools/tbench/w11a/test_w11a_inst_traps.tcl (revision 34)
@@ -1,4 +1,4 @@
-# $Id: test_w11a_inst_traps.tcl 683 2015-05-17 21:54:35Z mueller $
+# $Id: test_w11a_inst_traps.tcl 704 2015-07-25 14:18:03Z mueller $
#
# Copyright 2013-2014 by Walter F.J. Mueller
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
@@ -70,14 +70,14 @@
.word 177777
}
-rw11::asmrun $cpu sym [list r5 $sym(data) ]
+rw11::asmrun $cpu sym r5 $sym(data)
rw11::asmwait $cpu sym
-rw11::asmtreg $cpu [list r0 0 \
- r1 0 \
- r2 0 \
- r3 0 \
- r5 [expr {$sym(data) + 6*5*2}] \
- sp $sym(stack) ]
+rw11::asmtreg $cpu r0 0 \
+ r1 0 \
+ r2 0 \
+ r3 0 \
+ r5 [expr {$sym(data) + 6*5*2}] \
+ sp $sym(stack)
# data: trap ps; trap id; stack-pc; stack-ps opcode
rw11::asmtmem $cpu $sym(data) \
/trunk/tools/tbench/w11a/test_w11a_dstm_word_flow.tcl
1,4 → 1,4
# $Id: test_w11a_dstm_word_flow.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_w11a_dstm_word_flow.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
50,19 → 50,19
pdat5e: |
} |
|
rw11::asmrun $cpu sym [list r0 010 \ |
r1 $sym(data1) \ |
r2 $sym(data2) \ |
r3 $sym(pdata3) \ |
r4 $sym(data4e) \ |
r5 $sym(pdat5e) ] |
rw11::asmrun $cpu sym r0 010 \ |
r1 $sym(data1) \ |
r2 $sym(data2) \ |
r3 $sym(pdata3) \ |
r4 $sym(data4e) \ |
r5 $sym(pdat5e) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 011 \ |
r1 $sym(data1) \ |
r2 [expr {$sym(data2) + 4}] \ |
r3 [expr {$sym(pdata3) + 4}] \ |
r4 [expr {$sym(data4e) - 4}] \ |
r5 [expr {$sym(pdat5e) - 4}] ] |
rw11::asmtreg $cpu r0 011 \ |
r1 $sym(data1) \ |
r2 [expr {$sym(data2) + 4}] \ |
r3 [expr {$sym(pdata3) + 4}] \ |
r4 [expr {$sym(data4e) - 4}] \ |
r5 [expr {$sym(pdat5e) - 4}] |
rw11::asmtmem $cpu $sym(data1) {021 031 032 041 042 051 052 061 062} |
|
# ---------------------------------------------------------------------------- |
91,13 → 91,13
pdata3: .word data3 |
} |
|
rw11::asmrun $cpu sym [list r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] ] |
rw11::asmrun $cpu sym r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] \ |
r2 0 \ |
r3 0 \ |
r4 0 \ |
r5 0 ] |
rw11::asmtreg $cpu r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] \ |
r2 0 \ |
r3 0 \ |
r4 0 \ |
r5 0 |
rw11::asmtmem $cpu $sym(data0) {0201 0211 0221 0231 0241} |
/trunk/tools/tbench/w11a/test_w11a_srcr_word_flow.tcl
1,4 → 1,4
# $Id: test_w11a_srcr_word_flow.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_w11a_srcr_word_flow.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
31,15 → 31,15
stop: |
} |
|
rw11::asmrun $cpu sym [list r0 01234] |
rw11::asmrun $cpu sym r0 01234 |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 01234 \ |
r1 01234 \ |
r2 $sym(stack) \ |
r3 $sym(lpc) \ |
r4 0 \ |
r5 0 \ |
sp $sym(stack) ] |
rw11::asmtreg $cpu r0 01234 \ |
r1 01234 \ |
r2 $sym(stack) \ |
r3 $sym(lpc) \ |
r4 0 \ |
r5 0 \ |
sp $sym(stack) |
|
# ---------------------------------------------------------------------------- |
rlc log " (r0),(r0)+,-(r0) (mode=1,2,4)" |
65,14 → 65,14
.word 1002 |
} |
|
rw11::asmrun $cpu sym [list r0 $sym(data)] |
rw11::asmrun $cpu sym r0 $sym(data) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 $sym(data) \ |
r1 001001 \ |
r2 001001 \ |
r3 001002 \ |
r4 001002 \ |
r5 001001 ] |
rw11::asmtreg $cpu r0 $sym(data) \ |
r1 001001 \ |
r2 001001 \ |
r3 001002 \ |
r4 001002 \ |
r5 001001 |
|
# ---------------------------------------------------------------------------- |
rlc log " @(r0)+,@-(r0) (mode=3,5)" |
101,14 → 101,14
data1: .word 2002 |
} |
|
rw11::asmrun $cpu sym [list r0 $sym(pdata)] |
rw11::asmrun $cpu sym r0 $sym(pdata) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 $sym(pdata) \ |
r1 002001 \ |
r2 002002 \ |
r3 [expr {$sym(pdata)+4}] \ |
r4 002002 \ |
r5 002001 ] |
rw11::asmtreg $cpu r0 $sym(pdata) \ |
r1 002001 \ |
r2 002002 \ |
r3 [expr {$sym(pdata)+4}] \ |
r4 002002 \ |
r5 002001 |
|
# ---------------------------------------------------------------------------- |
rlc log " nn(r0),@nn(r0) (mode=6,7)" |
138,14 → 138,14
data1: .word 003004 |
} |
|
rw11::asmrun $cpu sym [list r0 $sym(data)] |
rw11::asmrun $cpu sym r0 $sym(data) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 $sym(data) \ |
r1 003001 \ |
r2 003002 \ |
r3 003003 \ |
r4 003004 \ |
r5 0 ] |
rw11::asmtreg $cpu r0 $sym(data) \ |
r1 003001 \ |
r2 003002 \ |
r3 003003 \ |
r4 003004 \ |
r5 0 |
|
# ---------------------------------------------------------------------------- |
rlc log " #nn,@#nn,var,@var (mode=27,37,67,77)" |
171,11 → 171,11
data4: .word 004004 |
} |
|
rw11::asmrun $cpu sym {} |
rw11::asmrun $cpu sym |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 0 \ |
r1 004001 \ |
r2 004002 \ |
r3 004003 \ |
r4 004004 \ |
r5 0 ] |
rw11::asmtreg $cpu r0 0 \ |
r1 004001 \ |
r2 004002 \ |
r3 004003 \ |
r4 004004 \ |
r5 0 |
/trunk/tools/tbench/w11a/test_w11a_div.tcl
1,4 → 1,4
# $Id: test_w11a_div.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_w11a_div.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
92,7 → 92,7
$ddh $ddl $dr16 $n $z $v $c $q16 $r16 $ddi $dri $qi $ri ] |
} |
|
rw11::asmrun $cpu sym [list r0 $ddh r1 $ddl r2 $dr16] |
rw11::asmrun $cpu sym r0 $ddh r1 $ddl r2 $dr16 |
rw11::asmwait $cpu sym |
|
if {!$v && !$c} { # test q and r only when V=0 C=0 expected |
100,7 → 100,7
} |
lappend treglist r3 $nzvc |
|
set errcnt [rw11::asmtreg $cpu $treglist] |
set errcnt [rw11::asmtreg $cpu {*}$treglist] |
|
if {$errcnt} { |
puts [format \ |
/trunk/tools/tbench/w11a/test_w11a_dsta_flow.tcl
1,4 → 1,4
# $Id: test_w11a_dsta_flow.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_w11a_dsta_flow.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
64,20 → 64,20
.word 177777 |
} |
|
rw11::asmrun $cpu sym [list r0 $sym(sub00) \ |
r1 $sym(sub10) \ |
r2 $sym(psub2) \ |
r3 [expr {$sym(sub30)+2}] \ |
r4 $sym(psub4e) \ |
r5 $sym(data) ] |
rw11::asmrun $cpu sym r0 $sym(sub00) \ |
r1 $sym(sub10) \ |
r2 $sym(psub2) \ |
r3 [expr {$sym(sub30)+2}] \ |
r4 $sym(psub4e) \ |
r5 $sym(data) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 $sym(sub00) \ |
r1 [expr {$sym(sub10)+2}] \ |
r2 [expr {$sym(psub2)+4}] \ |
r3 $sym(sub30) \ |
r4 $sym(psub4) \ |
r5 [expr {$sym(data) + 7*2*2}] \ |
sp $sym(stack) ] |
rw11::asmtreg $cpu r0 $sym(sub00) \ |
r1 [expr {$sym(sub10)+2}] \ |
r2 [expr {$sym(psub2)+4}] \ |
r3 $sym(sub30) \ |
r4 $sym(psub4) \ |
r5 [expr {$sym(data) + 7*2*2}] \ |
sp $sym(stack) |
rw11::asmtmem $cpu $sym(data) [list \ |
0100 $sym(start:100$) \ |
0110 $sym(start:110$) \ |
127,17 → 127,17
.word 177777 |
} |
|
rw11::asmrun $cpu sym [list r0 [expr {$sym(sub00)-020}] \ |
r1 [expr {$sym(psub10)-040}] \ |
r5 $sym(data) ] |
rw11::asmrun $cpu sym r0 [expr {$sym(sub00)-020}] \ |
r1 [expr {$sym(psub10)-040}] \ |
r5 $sym(data) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 [expr {$sym(sub00)-020}] \ |
r1 [expr {$sym(psub10)-040}] \ |
r2 0 \ |
r3 0 \ |
r4 0 \ |
r5 [expr {$sym(data) + 5*2*2}] \ |
sp $sym(stack) ] |
rw11::asmtreg $cpu r0 [expr {$sym(sub00)-020}] \ |
r1 [expr {$sym(psub10)-040}] \ |
r2 0 \ |
r3 0 \ |
r4 0 \ |
r5 [expr {$sym(data) + 5*2*2}] \ |
sp $sym(stack) |
rw11::asmtmem $cpu $sym(data) [list \ |
01100 $sym(start:1100$) \ |
01110 $sym(start:1110$) \ |
/trunk/tools/tbench/w11a/test_w11a_dstw_word_flow.tcl
1,4 → 1,4
# $Id: test_w11a_dstw_word_flow.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_w11a_dstw_word_flow.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
50,18 → 50,18
pdat5e: |
} |
|
rw11::asmrun $cpu sym [list r1 $sym(data1) \ |
r2 $sym(data2) \ |
r3 $sym(pdata3) \ |
r4 $sym(data4e) \ |
r5 $sym(pdat5e) ] |
rw11::asmrun $cpu sym r1 $sym(data1) \ |
r2 $sym(data2) \ |
r3 $sym(pdata3) \ |
r4 $sym(data4e) \ |
r5 $sym(pdat5e) |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 0100 \ |
r1 $sym(data1) \ |
r2 [expr {$sym(data2) + 4}] \ |
r3 [expr {$sym(pdata3) + 4}] \ |
r4 [expr {$sym(data4e) - 4}] \ |
r5 [expr {$sym(pdat5e) - 4}] ] |
rw11::asmtreg $cpu r0 0100 \ |
r1 $sym(data1) \ |
r2 [expr {$sym(data2) + 4}] \ |
r3 [expr {$sym(pdata3) + 4}] \ |
r4 [expr {$sym(data4e) - 4}] \ |
r5 [expr {$sym(pdat5e) - 4}] |
rw11::asmtmem $cpu $sym(data1) {0110 0120 0121 0130 0131 0140 0141 0150 0151} |
|
# ---------------------------------------------------------------------------- |
90,13 → 90,13
pdata3: .word data3 |
} |
|
rw11::asmrun $cpu sym [list r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] ] |
rw11::asmrun $cpu sym r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] |
rw11::asmwait $cpu sym |
rw11::asmtreg $cpu [list r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] \ |
r2 0 \ |
r3 0 \ |
r4 0 \ |
r5 0 ] |
rw11::asmtreg $cpu r0 [expr {$sym(data0)-020}] \ |
r1 [expr {$sym(pdata1)-040}] \ |
r2 0 \ |
r3 0 \ |
r4 0 \ |
r5 0 |
rw11::asmtmem $cpu $sym(data0) {0200 0210 0220 0230 0240} |
/trunk/tools/tbench/rhrp/test_rhrp_basics.tcl
1,4 → 1,4
# $Id: test_rhrp_basics.tcl 683 2015-05-17 21:54:35Z mueller $ |
# $Id: test_rhrp_basics.tcl 705 2015-07-26 21:25:42Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
101,12 → 101,12
set dsmsk [regbld ibd_rhrp::DS dpr] |
set cs2msk [regbld ibd_rhrp::CS2 ned {unit 3}] |
foreach {unit dpr dte dt} $tbl { |
set dsval [regbld ibd_rhrp::DS [list dpr $dpr]] |
set cs2val [regbld ibd_rhrp::CS2 [list ned [expr {1-$dpr}]] [list unit $unit]] |
set dsval [regbldkv ibd_rhrp::DS dpr $dpr] |
set cs2val [regbldkv ibd_rhrp::CS2 ned [expr {1-$dpr}] unit $unit] |
$cpu cp -wibr rpa.cs1 [ibd_rhrp::rcs1_wunit $unit] \ |
-ribr rpa.ds -edata $dsval $dsmsk \ |
-ribr rpa.dt -edata $dte \ |
-wma rpa.cs2 [regbld ibd_rhrp::CS2 [list unit $unit]] \ |
-wma rpa.cs2 [regbldkv ibd_rhrp::CS2 unit $unit] \ |
-wma rpa.cs1 [regbld ibd_rhrp::CS1 tre] \ |
-rma rpa.dt -edata $dt \ |
-rma rpa.cs2 -edata $cs2val $cs2msk |
191,8 → 191,8
|
set cs2msk [regbld ibd_rhrp::CS2 ned {unit -1}] |
foreach {unit} {4 5 6 7} { |
set cs2val [regbld ibd_rhrp::CS2 ned [list unit $unit]] |
$cpu cp -wma rpa.cs2 [regbld ibd_rhrp::CS2 [list unit $unit]] \ |
set cs2val [regbldkv ibd_rhrp::CS2 ned 1 unit $unit] |
$cpu cp -wma rpa.cs2 [regbldkv ibd_rhrp::CS2 unit $unit] \ |
-wma rpa.cs1 [regbld ibd_rhrp::CS1 tre] \ |
-rma rpa.dt -edata 0 \ |
-rma rpa.cs2 -edata $cs2val $cs2msk |
/trunk/tools/tbench/rhrp/test_rhrp_func_reg.tcl
1,4 → 1,4
# $Id: test_rhrp_func_reg.tcl 692 2015-06-21 11:53:24Z mueller $ |
# $Id: test_rhrp_func_reg.tcl 705 2015-07-26 21:25:42Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
122,7 → 122,7
rlc exec -attn -edata $attnmsk |
|
# check rdy=0 ie=0 func=read |
set cs1val [regbld ibd_rhrp::CS1 [list func $ibd_rhrp::FUNC_READ]] |
set cs1val [regbldkv ibd_rhrp::CS1 func READ] |
set cs1msk [regbld ibd_rhrp::CS1 rdy ie {func -1}] |
# expect ds mol=1 dpr=1 dry=0 |
set dsval [regbld ibd_rhrp::DS mol dpr] |
149,7 → 149,7
rlc log " D1.5: loc check: cs1.rdy=1, ds.dry=1 -----------------" |
|
# expect cs1 sc=0 tre=0 dva=1 rdy=1 ie=0 func=read go=0 |
set cs1val [regbld ibd_rhrp::CS1 dva rdy [list func $ibd_rhrp::FUNC_READ]] |
set cs1val [regbldkv ibd_rhrp::CS1 dva 1 rdy 1 func READ] |
# expect ds ata=0 mol=1 dpr=1 dry=1 |
set dsval [regbld ibd_rhrp::DS mol dpr dry] |
|
/trunk/tools/tbench/rhrp/test_rhrp_int.tcl
1,4 → 1,4
# $Id: test_rhrp_int.tcl 692 2015-06-21 11:53:24Z mueller $ |
# $Id: test_rhrp_int.tcl 705 2015-07-26 21:25:42Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
5,6 → 5,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-25 704 1.1.2 tmpproc_dotest: use args rather opts |
# 2015-06-20 692 1.1.1 de-configure all drives at begin |
# 2015-05-04 674 1.1 w11a start/stop/suspend overhaul |
# 2015-03-29 667 1.0 Initial version |
172,13 → 173,13
##puts $lst |
|
# define tmpproc for readback checks |
proc tmpproc_dotest {cpu symName opts} { |
proc tmpproc_dotest {cpu symName args} { |
upvar 1 $symName sym |
|
set tout 10.; # FIXME_code: parameter ?? |
|
# setup defs hash, first defaults, than write over concrete run values |
array set defs { i.cs2 0 \ |
args2opts opts {i.cs2 0 \ |
i.da 0 \ |
i.dc 0 \ |
i.cs1 0 \ |
199,18 → 200,15
or.icnt 0 \ |
or.pcnt 1 \ |
do.rint 0 \ |
do.lam 0 |
} |
array set defs $opts |
do.lam 0 } {*}$args |
|
# build ibuf |
set ibuf [list $defs(i.cs2) $defs(i.da) $defs(i.dc) $defs(i.cs1) \ |
$defs(do.rint)] |
set ibuf [list $opts(i.cs2) $opts(i.da) $opts(i.dc) $opts(i.cs1) \ |
$opts(do.rint)] |
|
# setup idly, write ibuf, setup stack, and start cpu at start: |
$cpu cp -wibr rpa.cs1 [regbld ibd_rhrp::RCS1 \ |
[list val $defs(i.idly)] \ |
[list func $ibd_rhrp::RFUNC_WIDLY] ] \ |
$cpu cp -wibr rpa.cs1 [regbldkv ibd_rhrp::RCS1 \ |
val $opts(i.idly) func WIDLY ] \ |
-wal $sym(ibuf) \ |
-bwm $ibuf \ |
-wsp $sym(stack) \ |
217,7 → 215,7
-stapc $sym(start) |
|
# here do minimal lam handling (harvest + send DONE) |
if {$defs(do.lam)} { |
if {$opts(do.lam)} { |
rlc wtlam $tout apat |
$cpu cp -attn \ |
-wibr rpa.cs1 [ibd_rhrp::cs1_func $ibd_rhrp::RFUNC_DONE] |
227,28 → 225,28
|
# determine regs after cleanup |
set cs1msk [rutil::com16 [regbld ibd_rhrp::CS1 {func -1}]] |
set fcs2 [expr {$defs(o.cs2) & 0x00ff}]; # cs1.tre clears upper byte ! |
set fcs2 [expr {$opts(o.cs2) & 0x00ff}]; # cs1.tre clears upper byte ! |
set fer1 0 |
if {!$defs(do.rint)} { # no reinterrupt, ata clear by cpu |
set fcs1 [expr {$defs(o.cs1) & ~[regbld ibd_rhrp::CS1 sc tre {func -1}] }] |
set fds [expr {$defs(o.ds) & ~[regbld ibd_rhrp::DS ata erp] }] |
if {!$opts(do.rint)} { # no reinterrupt, ata clear by cpu |
set fcs1 [expr {$opts(o.cs1) & ~[regbld ibd_rhrp::CS1 sc tre {func -1}] }] |
set fds [expr {$opts(o.ds) & ~[regbld ibd_rhrp::DS ata erp] }] |
set fas 0 |
} else { # reinterrupt, ata still pending |
set fcs1 [expr {$defs(o.cs1) & ~[regbld ibd_rhrp::CS1 tre {func -1}] }] |
set fds [expr {$defs(o.ds) & ~[regbld ibd_rhrp::DS erp] }] |
set fas $defs(o.as) |
set fcs1 [expr {$opts(o.cs1) & ~[regbld ibd_rhrp::CS1 tre {func -1}] }] |
set fds [expr {$opts(o.ds) & ~[regbld ibd_rhrp::DS erp] }] |
set fas $opts(o.as) |
} |
$cpu cp -rpc -edata $sym(stop) \ |
-rsp -edata $sym(stack) \ |
-wal $sym(icnt) \ |
-rmi -edata $defs(o.icnt) \ |
-rmi -edata $opts(o.icnt) \ |
-rmi \ |
-rmi -edata $defs(o.cs1) \ |
-rmi -edata $defs(o.cs2) \ |
-rmi -edata $defs(o.er1) \ |
-rmi -edata $defs(o.ds) \ |
-rmi -edata $defs(o.as) \ |
-rmi -edata $defs(o.itim) \ |
-rmi -edata $opts(o.cs1) \ |
-rmi -edata $opts(o.cs2) \ |
-rmi -edata $opts(o.er1) \ |
-rmi -edata $opts(o.ds) \ |
-rmi -edata $opts(o.as) \ |
-rmi -edata $opts(o.itim) \ |
-rmi -edata $fcs1 $cs1msk \ |
-rmi -edata $fcs2 \ |
-rmi -edata $fer1 \ |
255,7 → 253,7
-rmi -edata $fds \ |
-rmi -edata $fas |
|
if {!$defs(do.rint)} return ""; |
if {!$opts(do.rint)} return ""; |
|
$cpu cp -start |
|
262,22 → 260,22
$cpu wtcpu -reset $tout |
|
# determine regs after cleanup |
set fcs1 [expr {$defs(or.cs1) & ~[regbld ibd_rhrp::CS1 sc] }] |
set fcs2 $defs(or.cs2) |
set fcs1 [expr {$opts(or.cs1) & ~[regbld ibd_rhrp::CS1 sc] }] |
set fcs2 $opts(or.cs2) |
set fer1 0 |
set fds [expr {$defs(or.ds) & ~[regbld ibd_rhrp::DS ata] }] |
set fds [expr {$opts(or.ds) & ~[regbld ibd_rhrp::DS ata] }] |
set fas 0 |
|
$cpu cp -rpc -edata $sym(stop) \ |
-rsp -edata $sym(stack) \ |
-wal $sym(icnt) \ |
-rmi -edata $defs(or.icnt) \ |
-rmi -edata $opts(or.icnt) \ |
-rmi \ |
-rmi -edata $defs(or.cs1) \ |
-rmi -edata $defs(or.cs2) \ |
-rmi -edata $defs(or.er1) \ |
-rmi -edata $defs(or.ds) \ |
-rmi -edata $defs(or.as) \ |
-rmi -edata $opts(or.cs1) \ |
-rmi -edata $opts(or.cs2) \ |
-rmi -edata $opts(or.er1) \ |
-rmi -edata $opts(or.ds) \ |
-rmi -edata $opts(or.as) \ |
-rmi \ |
-rmi -edata $fcs1 \ |
-rmi -edata $fcs2 \ |
298,7 → 296,7
rlc log " A1.1 set cs1.ie=1 alone -> no interrupt ------------" |
|
# Note: no interrupt, so ie stays on ! |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie] \ |
o.icnt 0 \ |
o.cs1 [regbld ibd_rhrp::CS1 dva rdy ie] \ |
307,13 → 305,11
o.ds [regbld ibd_rhrp::DS mol dpr dry] \ |
o.as 0 \ |
o.itim 0 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A1.2 set cs1.ie=1 with rdy=1 -> software interrupt -" |
|
# Note: interrupt, so ie switched off again ! |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 rdy ie] \ |
o.icnt 1 \ |
o.cs1 [regbld ibd_rhrp::CS1 dva rdy] \ |
322,14 → 318,11
o.ds [regbld ibd_rhrp::DS mol dpr dry] \ |
o.as 0 \ |
o.itim 1 |
] |
|
tmpproc_dotest $cpu sym $opts |
|
rlc log " A2: test state functions: iff no, as yes ------------------" |
rlc log " A2.1 noop function ---------------------------------" |
|
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie go] \ |
o.cs1 [regbld ibd_rhrp::CS1 ie dva rdy] \ |
o.cs2 [regbld ibd_rhrp::CS2 or ir] \ |
337,13 → 330,11
o.ds [regbld ibd_rhrp::DS mol dpr dry] \ |
o.as 0 \ |
o.itim 0 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A2.2 pack acknowledge function (sets ds.vv=1) ------" |
|
set rbcs1func [list func $ibd_rhrp::FUNC_PACK] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 $rbcs1func ie go] \ |
o.cs1 [regbld ibd_rhrp::CS1 dva rdy ie $rbcs1func] \ |
o.cs2 [regbld ibd_rhrp::CS2 or ir] \ |
351,8 → 342,6
o.ds [regbld ibd_rhrp::DS mol dpr dry vv] \ |
o.as 0 \ |
o.itim 0 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3: test seek type functions: iff no, as yes --------------" |
|
360,7 → 349,7
|
# check that cs1.sc=1, ds.ata=1, and as.u0=1 |
set rbcs1func [list func $ibd_rhrp::FUNC_SEEK] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 $rbcs1func go] \ |
o.cs1 [regbld ibd_rhrp::CS1 sc dva rdy $rbcs1func] \ |
o.cs2 [regbld ibd_rhrp::CS2 or ir] \ |
368,14 → 357,12
o.ds [regbld ibd_rhrp::DS ata mol dpr dry vv] \ |
o.as [regbld ibd_rhrp::AS u0] \ |
o.itim 0 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3.2 seek function, valid da,dc, idly=0 ------------" |
|
# check re-interrupt too |
set rbcs1func [list func $ibd_rhrp::FUNC_SEEK] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie $rbcs1func go] \ |
i.dc 814 \ |
i.idly 0 \ |
393,13 → 380,11
or.er1 0 \ |
or.ds [regbld ibd_rhrp::DS ata mol dpr dry vv] \ |
or.as [regbld ibd_rhrp::AS u0] |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3.3 seek function, invalid dc ---------------------" |
|
set rbcs1func [list func $ibd_rhrp::FUNC_SEEK] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie $rbcs1func go] \ |
i.dc 815 \ |
o.icnt 1 \ |
409,13 → 394,11
o.ds [regbld ibd_rhrp::DS ata erp mol dpr dry vv] \ |
o.as [regbld ibd_rhrp::AS u0] \ |
o.itim 1 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3.4 search function, valid da,dc, idly=0 ----------" |
|
set rbcs1func [list func $ibd_rhrp::FUNC_SEAR] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie $rbcs1func go] \ |
i.dc 0 \ |
i.da [regbld ibd_rhrp::DA {ta 0} {sa 21}] \ |
427,13 → 410,11
o.ds [regbld ibd_rhrp::DS ata mol dpr dry vv] \ |
o.as [regbld ibd_rhrp::AS u0] \ |
o.itim 1 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3.5 search function, valid da,dc, idly=2 ----------" |
|
set rbcs1func [list func $ibd_rhrp::FUNC_SEAR] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie $rbcs1func go] \ |
i.dc 0 \ |
i.da [regbld ibd_rhrp::DA {ta 0} {sa 21}] \ |
445,13 → 426,11
o.ds [regbld ibd_rhrp::DS ata mol dpr dry vv] \ |
o.as [regbld ibd_rhrp::AS u0] \ |
o.itim 3 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3.5 search function, valid da,dc, idly=8 ----------" |
|
set rbcs1func [list func $ibd_rhrp::FUNC_SEAR] |
set opts [list \ |
tmpproc_dotest $cpu sym \ |
i.cs1 [regbld ibd_rhrp::CS1 ie $rbcs1func go] \ |
i.dc 0 \ |
i.da [regbld ibd_rhrp::DA {ta 0} {sa 21}] \ |
463,8 → 442,6
o.ds [regbld ibd_rhrp::DS ata mol dpr dry vv] \ |
o.as [regbld ibd_rhrp::AS u0] \ |
o.itim 9 |
] |
tmpproc_dotest $cpu sym $opts |
|
rlc log " A3.5 search function, invalid sa, idly=8 -----------" |
# Note: idly is 8, but error ata's come immediately !! |
483,7 → 460,7
o.as [regbld ibd_rhrp::AS u0] \ |
o.itim 1 |
] |
tmpproc_dotest $cpu sym $opts |
tmpproc_dotest $cpu sym {*}$opts |
|
rlc log " A4: test transfer functions: iff yes, as no ---------------" |
rlc log " A4.1 read function, valid da,dc --------------------" |
497,5 → 474,5
o.ds [regbld ibd_rhrp::DS mol dpr dry vv] \ |
do.lam 1 |
] |
tmpproc_dotest $cpu sym $opts |
tmpproc_dotest $cpu sym {*}$opts |
|
/trunk/tools/tbench/rhrp/test_rhrp_int2.tcl
1,4 → 1,4
# $Id: test_rhrp_int2.tcl 692 2015-06-21 11:53:24Z mueller $ |
# $Id: test_rhrp_int2.tcl 705 2015-07-26 21:25:42Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
5,6 → 5,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-07-25 704 1.0.1 tmpproc_dotest: use args rather opts |
# 2015-05-20 692 1.0 Initial version |
# |
# Test interrupt response |
183,16 → 184,14
##puts $lst |
|
# define tmpproc for readback checks |
proc tmpproc_dotest {cpu symName opts} { |
proc tmpproc_dotest {cpu symName args} { |
upvar 1 $symName sym |
|
set tout 10.; # FIXME_code: parameter ?? |
|
# setup defs hash, first defaults, than write over concrete run values |
array set defs { i.nseek 0 \ |
i.idly 0 |
} |
array set defs $opts |
args2opts opts {i.nseek 0 \ |
i.idly 0 } {*}$args |
|
set fread [list func $ibd_rhrp::FUNC_READ] |
set fsear [list func $ibd_rhrp::FUNC_SEAR] |
201,8 → 200,8
# build ibuf |
set ibuf {} |
lappend ibuf 01 0100 [regbld ibd_rhrp::CS1 ie $fread go] |
lappend ibuf $defs(i.nseek) |
for {set i 1} {$i<=$defs(i.nseek)} {incr i} { |
lappend ibuf $opts(i.nseek) |
for {set i 1} {$i<=$opts(i.nseek)} {incr i} { |
set da [expr { 010 + $i}] |
set dc [expr {0100 + $i}] |
lappend ibuf $da $dc [regbld ibd_rhrp::CS1 ie $fsear go] |
210,9 → 209,8
} |
|
# setup idly, write ibuf, setup stack, and start cpu at start: |
$cpu cp -wibr rpa.cs1 [regbld ibd_rhrp::RCS1 \ |
[list val $defs(i.idly)] \ |
[list func $ibd_rhrp::RFUNC_WIDLY] ] \ |
$cpu cp -wibr rpa.cs1 [regbldkv ibd_rhrp::RCS1 \ |
val $opts(i.idly) func WIDLY ] \ |
-wal $sym(ibuf) \ |
-bwm $ibuf \ |
-wsp $sym(stack) \ |
253,7 → 251,7
|
# check setup search |
set mskcs1sc [rutil::com16 [regbld ibd_rhrp::CS1 sc]] |
for {set i 1} {$i<=$defs(i.nseek)} {incr i} { |
for {set i 1} {$i<=$opts(i.nseek)} {incr i} { |
set osscs1 [regbld ibd_rhrp::CS1 dva ie $fsear] |
set osscs2 [regbld ibd_rhrp::CS2 or ir [list unit $i]] |
set ossds [regbld ibd_rhrp::DS pip mol dpr vv] |
266,7 → 264,7
} |
|
# check interrupt xfer |
set sc [expr {$defs(i.nseek) > 0}] |
set sc [expr {$opts(i.nseek) > 0}] |
set oixcs1 [regbld ibd_rhrp::CS1 [list sc $sc] dva rdy $fread] |
set oixcs2 [regbld ibd_rhrp::CS2 or ir] |
set oixds [regbld ibd_rhrp::DS mol dpr dry vv] |
280,7 → 278,7
|
# check interrupt search |
set oisas $as |
for {set i 1} {$i<=$defs(i.nseek)} {incr i} { |
for {set i 1} {$i<=$opts(i.nseek)} {incr i} { |
set oiscs1 [regbld ibd_rhrp::CS1 [list sc $sc] dva rdy $fsear] |
set oiscs2 [regbld ibd_rhrp::CS2 or ir [list unit $i]] |
set oisds [regbld ibd_rhrp::DS ata mol dpr dry vv] |
305,33 → 303,17
|
rlc log " A1: test without search -----------------------------------" |
|
set opts [list \ |
i.nseek 0 \ |
i.idly 0 |
] |
tmpproc_dotest $cpu sym $opts |
tmpproc_dotest $cpu sym i.nseek 0 i.idly 0 |
|
rlc log " A2: test with 1 search ------------------------------------" |
|
set opts [list \ |
i.nseek 1 \ |
i.idly 10 |
] |
tmpproc_dotest $cpu sym $opts |
tmpproc_dotest $cpu sym i.nseek 1 i.idly 10 |
|
rlc log " A2: test with 2 search ------------------------------------" |
|
set opts [list \ |
i.nseek 2 \ |
i.idly 10 |
] |
tmpproc_dotest $cpu sym $opts |
tmpproc_dotest $cpu sym i.nseek 2 i.idly 10 |
|
rlc log " A2: test with 3 search ------------------------------------" |
|
set opts [list \ |
i.nseek 3 \ |
i.idly 10 |
] |
tmpproc_dotest $cpu sym $opts |
tmpproc_dotest $cpu sym i.nseek 3 i.idly 10 |
|
/trunk/tools/tbench/rhrp/test_rhrp_regs.tcl
1,4 → 1,4
# $Id: test_rhrp_regs.tcl 692 2015-06-21 11:53:24Z mueller $ |
# $Id: test_rhrp_regs.tcl 705 2015-07-26 21:25:42Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
87,7 → 87,7
rlc log " A1.4: rem write bae, read l+r bae+cs1.bae ----------" |
|
foreach bae {077 071 000} { |
set cs1val [regbld ibd_rhrp::CS1 [list bae [expr {$bae & 03}]]] |
set cs1val [regbldkv ibd_rhrp::CS1 bae [expr {$bae & 03}] ] |
$cpu cp -wibr rpa.bae $bae \ |
-ribr rpa.bae -edata $bae \ |
-ribr rpa.cs1 -edata $cs1val $cs1msk \ |
100,7 → 100,7
$cpu cp -wibr rpa.bae 070; # set 3 lbs of bae |
|
foreach cs1bae {03 01 00} { |
set cs1val [regbld ibd_rhrp::CS1 [list bae $cs1bae]] |
set cs1val [regbldkv ibd_rhrp::CS1 bae $cs1bae] |
set bae [expr {070 | $cs1bae}] |
$cpu cp -wma rpa.cs1 $cs1val \ |
-rma rpa.bae -edata $bae \ |
202,8 → 202,8
} |
|
foreach {unit ta sa dc} $tbl { |
$cpu cp -wma rpa.cs2 [regbld ibd_rhrp::CS2 [list unit $unit]] \ |
-wma rpa.da [regbld ibd_rhrp::DA [list ta $ta] [list sa $sa]] \ |
$cpu cp -wma rpa.cs2 [regbldkv ibd_rhrp::CS2 unit $unit] \ |
-wma rpa.da [regbldkv ibd_rhrp::DA ta $ta sa $sa] \ |
-wma rpa.dc $dc |
} |
|
225,7 → 225,7
|
foreach {unit ta sa dc} $tbl { |
$cpu cp -wibr rpa.cs1 [ibd_rhrp::rcs1_wunit $unit] \ |
-wibr rpa.da [regbld ibd_rhrp::DA [list ta $ta] [list sa $sa]] \ |
-wibr rpa.da [regbldkv ibd_rhrp::DA ta $ta sa $sa] \ |
-wibr rpa.dc $dc |
} |
|
/trunk/tools/src/librw11/Rw11Cpu.hpp
1,4 → 1,4
// $Id: Rw11Cpu.hpp 675 2015-05-08 21:05:08Z mueller $ |
// $Id: Rw11Cpu.hpp 721 2015-12-29 17:50:50Z mueller $ |
// |
// Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
// |
13,6 → 13,9
// |
// Revision History: |
// Date Rev Version Comment |
// 2015-12-28 721 1.2.5 BUGFIX: IM* correct register offset definitions |
// 2015-07-12 700 1.2.4 use ..CpuAct instead ..CpuGo (new active based lam); |
// add probe and map setup for optional cpu components |
// 2015-05-08 675 1.2.3 w11a start/stop/suspend overhaul |
// 2015-04-25 668 1.2.2 add AddRbibr(), AddWbibr() |
// 2015-04-03 661 1.2.1 add kStat_M_* defs |
26,7 → 29,7
|
/*! |
\file |
\version $Id: Rw11Cpu.hpp 675 2015-05-08 21:05:08Z mueller $ |
\version $Id: Rw11Cpu.hpp 721 2015-12-29 17:50:50Z mueller $ |
\brief Declaration of class Rw11Cpu. |
*/ |
|
77,6 → 80,11
uint16_t Base() const; |
uint16_t IBase() const; |
|
bool HasScnt() const; |
bool HasCmon() const; |
uint16_t HasHbpt() const; |
bool HasIbmon() const; |
|
void AddCntl(const boost::shared_ptr<Rw11Cntl>& spcntl); |
bool TestCntl(const std::string& name) const; |
void ListCntl(std::vector<std::string>& list) const; |
119,10 → 127,10
bool trace=false); |
bool Boot(const std::string& uname, RerrMsg& emsg); |
|
void SetCpuGoUp(); |
void SetCpuGoDown(uint16_t stat); |
double WaitCpuGoDown(double tout); |
bool CpuGo() const; |
void SetCpuActUp(); |
void SetCpuActDown(uint16_t stat); |
double WaitCpuActDown(double tout); |
bool CpuAct() const; |
uint16_t CpuStat() const; |
|
uint16_t IbusRemoteAddr(uint16_t ibaddr) const; |
184,6 → 192,7
static const uint16_t kCPURUST_STOP = 0x3; //!< cpu was stopped |
static const uint16_t kCPURUST_STEP = 0x4; //!< cpu was stepped |
static const uint16_t kCPURUST_SUSP = 0x5; //!< cpu was suspended |
static const uint16_t kCPURUST_HBPT = 0x6; //!< cpu hardware bpt |
static const uint16_t kCPURUST_RUNS = 0x7; //!< cpu running |
static const uint16_t kCPURUST_VECFET = 0x8; //!< vector fetch halt |
static const uint16_t kCPURUST_RECRSV = 0x9; //!< rec red-stack halt |
200,9 → 209,45
// defs for the four status bits defined by w11 rbus iface |
static const uint8_t kStat_M_CmdErr = kBBit07; //!< stat: cmderr flag |
static const uint8_t kStat_M_CmdMErr = kBBit06; //!< stat: cmdmerr flag |
static const uint8_t kStat_M_CpuHalt = kBBit05; //!< stat: cpuhalt flag |
static const uint8_t kStat_M_CpuSusp = kBBit05; //!< stat: cpususp flag |
static const uint8_t kStat_M_CpuGo = kBBit04; //!< stat: cpugo flag |
|
// defs for optional w11 components |
static const uint16_t kSCBASE = 0x0040; //!< DMSCNT reg base offset |
static const uint16_t kSCCNTL = 0x0000; //!< SC.CNTL reg offset |
static const uint16_t kSCADDR = 0x0001; //!< SC.ADDR reg offset |
static const uint16_t kSCDATA = 0x0002; //!< SC.DATA reg offset |
|
static const uint16_t kCMBASE = 0x0048; //!< DMCMON reg base offset |
static const uint16_t kCMCNTL = 0x0000; //!< CM.CNTL reg offset |
static const uint16_t kCMSTAT = 0x0001; //!< CM.STAT reg offset |
static const uint16_t kCMADDR = 0x0002; //!< CM.ADDR reg offset |
static const uint16_t kCMDATA = 0x0003; //!< CM.DATA reg offset |
static const uint16_t kCMIADDR = 0x0004; //!< CM.IADDR reg offset |
static const uint16_t kCMIPC = 0x0005; //!< CM.IPC reg offset |
static const uint16_t kCMIREG = 0x0006; //!< CM.IREG reg offset |
static const uint16_t kCMIMAL = 0x0007; //!< CM.IMAL reg offset |
|
static const uint16_t kHBBASE = 0x0050; //!< DMHBPT reg base offset |
static const uint16_t kHBSIZE = 0x0004; //!< DMHBPT unit size |
static const uint16_t kHBNMAX = 0x0004; //!< DMHBPT max number units |
static const uint16_t kHBCNTL = 0x0000; //!< HB.CNTL reg offset |
static const uint16_t kHBSTAT = 0x0001; //!< HB.STAT reg offset |
static const uint16_t kHBHILIM = 0x0002; //!< HB.HILIM reg offset |
static const uint16_t kHBLOLIM = 0x0003; //!< HB.LOLIM reg offset |
|
static const uint16_t kIMBASE = 0160000; //!< Ibmon ibus address |
static const uint16_t kIMCNTL = 0x0000; //!< IM.CNTL reg offset |
static const uint16_t kIMSTAT = 0x0002; //!< IM.STAT reg offset |
static const uint16_t kIMHILIM = 0x0004; //!< IM.HILIM reg offset |
static const uint16_t kIMLOLIM = 0x0006; //!< IM.LOLIM reg offset |
static const uint16_t kIMADDR = 0x0008; //!< IM.ADDR reg offset |
static const uint16_t kIMDATA = 0x000a; //!< IM.DATA reg offset |
|
protected: |
void SetupStd(); |
void SetupOpt(); |
|
private: |
Rw11Cpu() {} //!< default ctor blocker |
|
212,10 → 257,14
size_t fIndex; |
uint16_t fBase; |
uint16_t fIBase; |
bool fCpuGo; |
bool fHasScnt; //!< has dmscnt (state counter) |
bool fHasCmon; //!< has dmcmon (cpu monitor) |
uint16_t fHasHbpt; //!< has dmhbpt (hardware breakpoint) |
bool fHasIbmon; //!< has ibmon (ibus monitor) |
bool fCpuAct; |
uint16_t fCpuStat; |
boost::mutex fCpuGoMutex; |
boost::condition_variable fCpuGoCond; |
boost::mutex fCpuActMutex; |
boost::condition_variable fCpuActCond; |
cmap_t fCntlMap; //!< name->cntl map |
RlinkAddrMap fIAddrMap; //!< ibus name<->address mapping |
RlinkAddrMap fRAddrMap; //!< rbus name<->address mapping |
/trunk/tools/src/librw11/Rw11CntlRHRP.cpp
1,4 → 1,4
// $Id: Rw11CntlRHRP.cpp 686 2015-06-04 21:08:08Z mueller $ |
// $Id: Rw11CntlRHRP.cpp 720 2015-12-28 14:52:45Z mueller $ |
// |
// Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
// Other credits: |
15,6 → 15,7
// |
// Revision History: |
// Date Rev Version Comment |
// 2015-12-28 720 1.0.3 use octal for er1= printouts |
// 2015-06-04 686 1.0.2 check for spurious lams |
// 2015-05-24 684 1.0.1 fixed rpcs2 update for wcheck and nem aborts |
// 2015-05-14 680 1.0 Initial version |
23,7 → 24,7
|
/*! |
\file |
\version $Id: Rw11CntlRHRP.cpp 686 2015-06-04 21:08:08Z mueller $ |
\version $Id: Rw11CntlRHRP.cpp 720 2015-12-28 14:52:45Z mueller $ |
\brief Implemenation of Rw11CntlRHRP. |
*/ |
|
612,7 → 613,7
lmsg << "-I RHRP" |
<< " err " |
<< " cs1=" << RosPrintBvi(fRd_rpcs1,8) |
<< " er1=" << RosPrintBvi(rper1,2,16); |
<< " er1=" << RosPrintBvi(rper1,8); |
} |
|
return; |
662,8 → 663,8
if (rper1 || rpcs2) { |
lmsg << "-I RHRP" |
<< " err " |
<< " er1=" << RosPrintBvi(rper1,2,16) |
<< " cs2=" << RosPrintBvi(rpcs2,2,8) |
<< " er1=" << RosPrintBvi(rper1,8) |
<< " cs2=" << RosPrintBvi(rpcs2,8,8) |
<< endl; |
} |
lmsg << "-I RHRP" |
/trunk/tools/src/librw11/Rw11Cpu.cpp
1,4 → 1,4
// $Id: Rw11Cpu.cpp 682 2015-05-15 18:35:29Z mueller $ |
// $Id: Rw11Cpu.cpp 719 2015-12-27 09:45:43Z mueller $ |
// |
// Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
// |
13,6 → 13,9
// |
// Revision History: |
// Date Rev Version Comment |
// 2015-12-26 719 1.2.5 BUGFIX: IM* correct register offset definitions |
// 2015-07-12 700 1.2.5 use ..CpuAct instead ..CpuGo (new active based lam); |
// add probe and map setup for optional cpu components |
// 2015-05-15 682 1.2.4 BUGFIX: Boot(): extract unit number properly |
// Boot(): stop cpu before load, check unit number |
// 2015-05-08 675 1.2.3 w11a start/stop/suspend overhaul |
29,7 → 32,7
|
/*! |
\file |
\version $Id: Rw11Cpu.cpp 682 2015-05-15 18:35:29Z mueller $ |
\version $Id: Rw11Cpu.cpp 719 2015-12-27 09:45:43Z mueller $ |
\brief Implemenation of Rw11Cpu. |
*/ |
#include <stdlib.h> |
101,6 → 104,7
const uint16_t Rw11Cpu::kCPURUST_STOP; |
const uint16_t Rw11Cpu::kCPURUST_STEP; |
const uint16_t Rw11Cpu::kCPURUST_SUSP; |
const uint16_t Rw11Cpu::kCPURUST_HBPT; |
const uint16_t Rw11Cpu::kCPURUST_RUNS; |
const uint16_t Rw11Cpu::kCPURUST_VECFET; |
const uint16_t Rw11Cpu::kCPURUST_RECRSV; |
116,9 → 120,40
|
const uint8_t Rw11Cpu::kStat_M_CmdErr; |
const uint8_t Rw11Cpu::kStat_M_CmdMErr; |
const uint8_t Rw11Cpu::kStat_M_CpuHalt; |
const uint8_t Rw11Cpu::kStat_M_CpuSusp; |
const uint8_t Rw11Cpu::kStat_M_CpuGo; |
|
const uint16_t Rw11Cpu::kSCBASE; |
const uint16_t Rw11Cpu::kSCCNTL; |
const uint16_t Rw11Cpu::kSCADDR; |
const uint16_t Rw11Cpu::kSCDATA; |
|
const uint16_t Rw11Cpu::kCMBASE; |
const uint16_t Rw11Cpu::kCMCNTL; |
const uint16_t Rw11Cpu::kCMSTAT; |
const uint16_t Rw11Cpu::kCMADDR; |
const uint16_t Rw11Cpu::kCMDATA; |
const uint16_t Rw11Cpu::kCMIADDR; |
const uint16_t Rw11Cpu::kCMIPC; |
const uint16_t Rw11Cpu::kCMIREG; |
const uint16_t Rw11Cpu::kCMIMAL; |
|
const uint16_t Rw11Cpu::kHBBASE; |
const uint16_t Rw11Cpu::kHBSIZE; |
const uint16_t Rw11Cpu::kHBNMAX; |
const uint16_t Rw11Cpu::kHBCNTL; |
const uint16_t Rw11Cpu::kHBSTAT; |
const uint16_t Rw11Cpu::kHBHILIM; |
const uint16_t Rw11Cpu::kHBLOLIM; |
|
const uint16_t Rw11Cpu::kIMBASE; |
const uint16_t Rw11Cpu::kIMCNTL; |
const uint16_t Rw11Cpu::kIMSTAT; |
const uint16_t Rw11Cpu::kIMHILIM; |
const uint16_t Rw11Cpu::kIMLOLIM; |
const uint16_t Rw11Cpu::kIMADDR; |
const uint16_t Rw11Cpu::kIMDATA; |
|
//------------------------------------------+----------------------------------- |
//! Constructor |
|
128,10 → 163,14
fIndex(0), |
fBase(0), |
fIBase(0x4000), |
fCpuGo(0), |
fHasScnt(false), |
fHasCmon(false), |
fHasHbpt(0), |
fHasIbmon(false), |
fCpuAct(0), |
fCpuStat(0), |
fCpuGoMutex(), |
fCpuGoCond(), |
fCpuActMutex(), |
fCpuActCond(), |
fCntlMap(), |
fIAddrMap(), |
fRAddrMap(), |
150,69 → 189,8
void Rw11Cpu::Setup(Rw11* pw11) |
{ |
fpW11 = pw11; |
// add control port address rbus mappings |
AllRAddrMapInsert("conf" , Base()+kCPCONF); |
AllRAddrMapInsert("cntl" , Base()+kCPCNTL); |
AllRAddrMapInsert("stat" , Base()+kCPSTAT); |
AllRAddrMapInsert("psw" , Base()+kCPPSW); |
AllRAddrMapInsert("al" , Base()+kCPAL); |
AllRAddrMapInsert("ah" , Base()+kCPAH); |
AllRAddrMapInsert("mem" , Base()+kCPMEM); |
AllRAddrMapInsert("memi" , Base()+kCPMEMI); |
AllRAddrMapInsert("r0" , Base()+kCPR0); |
AllRAddrMapInsert("r1" , Base()+kCPR0+1); |
AllRAddrMapInsert("r2" , Base()+kCPR0+2); |
AllRAddrMapInsert("r3" , Base()+kCPR0+3); |
AllRAddrMapInsert("r4" , Base()+kCPR0+4); |
AllRAddrMapInsert("r5" , Base()+kCPR0+5); |
AllRAddrMapInsert("sp" , Base()+kCPR0+6); |
AllRAddrMapInsert("pc" , Base()+kCPR0+7); |
AllRAddrMapInsert("membe",Base()+kCPMEMBE); |
|
// add cpu register address ibus and rbus mappings |
AllIAddrMapInsert("psw" , 0177776); |
AllIAddrMapInsert("stklim" , 0177774); |
AllIAddrMapInsert("pirq" , 0177772); |
AllIAddrMapInsert("mbrk" , 0177770); |
AllIAddrMapInsert("cpuerr" , 0177766); |
AllIAddrMapInsert("sysid" , 0177764); |
AllIAddrMapInsert("hisize" , 0177762); |
AllIAddrMapInsert("losize" , 0177760); |
|
AllIAddrMapInsert("hm" , 0177752); |
AllIAddrMapInsert("maint" , 0177750); |
AllIAddrMapInsert("cntrl" , 0177746); |
AllIAddrMapInsert("syserr" , 0177744); |
AllIAddrMapInsert("hiaddr" , 0177742); |
AllIAddrMapInsert("loaddr" , 0177740); |
|
AllIAddrMapInsert("ssr2" , 0177576); |
AllIAddrMapInsert("ssr1" , 0177574); |
AllIAddrMapInsert("ssr0" , 0177572); |
|
AllIAddrMapInsert("sdreg" , 0177570); |
|
AllIAddrMapInsert("ssr3" , 0172516); |
|
// add mmu segment register files |
string sdr = "sdr"; |
string sar = "sar"; |
for (char i=0; i<8; i++) { |
char ichar = '0'+i; |
AllIAddrMapInsert(sdr+"ki."+ichar, 0172300+2*i); |
AllIAddrMapInsert(sdr+"kd."+ichar, 0172320+2*i); |
AllIAddrMapInsert(sar+"ki."+ichar, 0172340+2*i); |
AllIAddrMapInsert(sar+"kd."+ichar, 0172360+2*i); |
AllIAddrMapInsert(sdr+"si."+ichar, 0172200+2*i); |
AllIAddrMapInsert(sdr+"sd."+ichar, 0172220+2*i); |
AllIAddrMapInsert(sar+"si."+ichar, 0172240+2*i); |
AllIAddrMapInsert(sar+"sd."+ichar, 0172260+2*i); |
AllIAddrMapInsert(sdr+"ui."+ichar, 0177600+2*i); |
AllIAddrMapInsert(sdr+"ud."+ichar, 0177620+2*i); |
AllIAddrMapInsert(sar+"ui."+ichar, 0177640+2*i); |
AllIAddrMapInsert(sar+"ud."+ichar, 0177660+2*i); |
} |
|
SetupStd(); |
SetupOpt(); |
return; |
} |
|
722,7 → 700,7
clist.Clear(); |
clist.AddWreg(fBase+kCPPC, astart); // load PC |
clist.AddWreg(fBase+kCPCNTL, kCPFUNC_START); // and start |
SetCpuGoUp(); |
SetCpuActUp(); |
if (!Server().Exec(clist, emsg)) return false; |
|
return true; |
731,12 → 709,12
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
void Rw11Cpu::SetCpuGoUp() |
void Rw11Cpu::SetCpuActUp() |
{ |
boost::lock_guard<boost::mutex> lock(fCpuGoMutex); |
fCpuGo = true; |
boost::lock_guard<boost::mutex> lock(fCpuActMutex); |
fCpuAct = true; |
fCpuStat = 0; |
fCpuGoCond.notify_all(); |
fCpuActCond.notify_all(); |
return; |
} |
|
743,13 → 721,13
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
void Rw11Cpu::SetCpuGoDown(uint16_t stat) |
void Rw11Cpu::SetCpuActDown(uint16_t stat) |
{ |
if ((stat & kCPSTAT_M_CpuGo) == 0) { |
boost::lock_guard<boost::mutex> lock(fCpuGoMutex); |
fCpuGo = false; |
if ((stat & kCPSTAT_M_CpuGo) == 0 || (stat & kCPSTAT_M_CpuSusp) != 0 ) { |
boost::lock_guard<boost::mutex> lock(fCpuActMutex); |
fCpuAct = false; |
fCpuStat = stat; |
fCpuGoCond.notify_all(); |
fCpuActCond.notify_all(); |
} |
return; |
} |
757,15 → 735,15
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
double Rw11Cpu::WaitCpuGoDown(double tout) |
double Rw11Cpu::WaitCpuActDown(double tout) |
{ |
boost::system_time t0(boost::get_system_time()); |
boost::system_time timeout(boost::posix_time::max_date_time); |
if (tout > 0.) |
timeout = t0 + boost::posix_time::microseconds((long)1E6 * tout); |
boost::unique_lock<boost::mutex> lock(fCpuGoMutex); |
while (fCpuGo) { |
if (!fCpuGoCond.timed_wait(lock, timeout)) return -1.; |
boost::unique_lock<boost::mutex> lock(fCpuActMutex); |
while (fCpuAct) { |
if (!fCpuActCond.timed_wait(lock, timeout)) return -1.; |
} |
boost::posix_time::time_duration dt = boost::get_system_time() - t0; |
return double(dt.ticks()) / dt.ticks_per_second(); |
815,7 → 793,7
RlinkCommandList clist; |
clist.AddRreg(fBase+kCPSTAT); |
Server().Exec(clist); |
SetCpuGoDown(clist[0].Data()); |
SetCpuActDown(clist[0].Data()); |
return; |
} |
|
832,7 → 810,11
os << bl << " fIndex: " << fIndex << endl; |
os << bl << " fBase: " << RosPrintf(fBase,"$x0",4) << endl; |
os << bl << " fIBase: " << RosPrintf(fIBase,"$x0",4) << endl; |
os << bl << " fCpuGo: " << fCpuGo << endl; |
os << bl << " fHasScnt: " << fHasScnt << endl; |
os << bl << " fHasCmon: " << fHasCmon << endl; |
os << bl << " fHasHbpt: " << fHasHbpt << endl; |
os << bl << " fHasIbmon: " << fHasIbmon << endl; |
os << bl << " fCpuAct: " << fCpuAct << endl; |
os << bl << " fCpuStat: " << RosPrintf(fCpuStat,"$x0",4) << endl; |
os << bl << " fCntlMap: " << endl; |
for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) { |
845,4 → 827,151
return; |
} |
|
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
void Rw11Cpu::SetupStd() |
{ |
// add control port address rbus mappings |
AllRAddrMapInsert("conf" , Base()+kCPCONF); |
AllRAddrMapInsert("cntl" , Base()+kCPCNTL); |
AllRAddrMapInsert("stat" , Base()+kCPSTAT); |
AllRAddrMapInsert("psw" , Base()+kCPPSW); |
AllRAddrMapInsert("al" , Base()+kCPAL); |
AllRAddrMapInsert("ah" , Base()+kCPAH); |
AllRAddrMapInsert("mem" , Base()+kCPMEM); |
AllRAddrMapInsert("memi" , Base()+kCPMEMI); |
AllRAddrMapInsert("r0" , Base()+kCPR0); |
AllRAddrMapInsert("r1" , Base()+kCPR0+1); |
AllRAddrMapInsert("r2" , Base()+kCPR0+2); |
AllRAddrMapInsert("r3" , Base()+kCPR0+3); |
AllRAddrMapInsert("r4" , Base()+kCPR0+4); |
AllRAddrMapInsert("r5" , Base()+kCPR0+5); |
AllRAddrMapInsert("sp" , Base()+kCPR0+6); |
AllRAddrMapInsert("pc" , Base()+kCPR0+7); |
AllRAddrMapInsert("membe", Base()+kCPMEMBE); |
|
// add cpu register address ibus and rbus mappings |
AllIAddrMapInsert("psw" , 0177776); |
AllIAddrMapInsert("stklim" , 0177774); |
AllIAddrMapInsert("pirq" , 0177772); |
AllIAddrMapInsert("mbrk" , 0177770); |
AllIAddrMapInsert("cpuerr" , 0177766); |
AllIAddrMapInsert("sysid" , 0177764); |
AllIAddrMapInsert("hisize" , 0177762); |
AllIAddrMapInsert("losize" , 0177760); |
|
AllIAddrMapInsert("hm" , 0177752); |
AllIAddrMapInsert("maint" , 0177750); |
AllIAddrMapInsert("cntrl" , 0177746); |
AllIAddrMapInsert("syserr" , 0177744); |
AllIAddrMapInsert("hiaddr" , 0177742); |
AllIAddrMapInsert("loaddr" , 0177740); |
|
AllIAddrMapInsert("ssr2" , 0177576); |
AllIAddrMapInsert("ssr1" , 0177574); |
AllIAddrMapInsert("ssr0" , 0177572); |
|
AllIAddrMapInsert("sdreg" , 0177570); |
|
AllIAddrMapInsert("ssr3" , 0172516); |
|
// add mmu segment register files |
string sdr = "sdr"; |
string sar = "sar"; |
for (char i=0; i<8; i++) { |
char ichar = '0'+i; |
AllIAddrMapInsert(sdr+"ki."+ichar, 0172300+2*i); |
AllIAddrMapInsert(sdr+"kd."+ichar, 0172320+2*i); |
AllIAddrMapInsert(sar+"ki."+ichar, 0172340+2*i); |
AllIAddrMapInsert(sar+"kd."+ichar, 0172360+2*i); |
AllIAddrMapInsert(sdr+"si."+ichar, 0172200+2*i); |
AllIAddrMapInsert(sdr+"sd."+ichar, 0172220+2*i); |
AllIAddrMapInsert(sar+"si."+ichar, 0172240+2*i); |
AllIAddrMapInsert(sar+"sd."+ichar, 0172260+2*i); |
AllIAddrMapInsert(sdr+"ui."+ichar, 0177600+2*i); |
AllIAddrMapInsert(sdr+"ud."+ichar, 0177620+2*i); |
AllIAddrMapInsert(sar+"ui."+ichar, 0177640+2*i); |
AllIAddrMapInsert(sar+"ud."+ichar, 0177660+2*i); |
} |
|
return; |
} |
|
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
void Rw11Cpu::SetupOpt() |
{ |
// probe optional components: dmscnt, dmcmon, dmhbpt and ibmon |
RlinkCommandList clist; |
|
int isc = clist.AddRreg(Base()+kSCBASE+kSCCNTL); |
clist.SetLastExpectStatus(0,0); // disable stat check |
|
int icm = clist.AddRreg(Base()+kCMBASE+kCMCNTL); |
clist.SetLastExpectStatus(0,0); |
|
int ihb[kHBNMAX]; |
for (int i=0; i<kHBNMAX; i++) { |
ihb[i] = clist.AddRreg(Base()+kHBBASE+i*kHBSIZE+kHBCNTL); |
clist.SetLastExpectStatus(0,0); |
} |
int iim = AddRibr(clist, kIMBASE+kIMCNTL); |
clist.SetLastExpectStatus(0,0); |
|
Connect().Exec(clist); |
|
uint8_t statmsk = RlinkCommand::kStat_M_RbTout | |
RlinkCommand::kStat_M_RbNak | |
RlinkCommand::kStat_M_RbErr; |
|
fHasScnt = (clist[isc].Status() & statmsk) == 0; |
if (fHasScnt) { |
uint16_t base = Base() + kSCBASE; |
AllRAddrMapInsert("sc.cntl" , base + kSCCNTL); |
AllRAddrMapInsert("sc.addr" , base + kSCADDR); |
AllRAddrMapInsert("sc.data" , base + kSCDATA); |
} |
|
fHasCmon = (clist[icm].Status() & statmsk) == 0; |
if (fHasCmon) { |
uint16_t base = Base() + kCMBASE; |
AllRAddrMapInsert("cm.cntl" , base + kCMCNTL); |
AllRAddrMapInsert("cm.stat" , base + kCMSTAT); |
AllRAddrMapInsert("cm.addr" , base + kCMADDR); |
AllRAddrMapInsert("cm.data" , base + kCMDATA); |
AllRAddrMapInsert("cm.iaddr" , base + kCMIADDR); |
AllRAddrMapInsert("cm.ipc" , base + kCMIPC); |
AllRAddrMapInsert("cm.ireg" , base + kCMIREG); |
AllRAddrMapInsert("cm.imal" , base + kCMIMAL); |
} |
|
fHasHbpt = 0; |
for (int i=0; i<kHBNMAX; i++) { |
if ((clist[ihb[i]].Status() & statmsk) != 0) break; |
fHasHbpt += 1; |
uint16_t base = Base() + kHBBASE + i*kHBSIZE; |
std::string pref = "hb"; |
pref += '0'+i; |
AllRAddrMapInsert(pref+".cntl" , base + kHBCNTL); |
AllRAddrMapInsert(pref+".stat" , base + kHBSTAT); |
AllRAddrMapInsert(pref+".hilim" , base + kHBHILIM); |
AllRAddrMapInsert(pref+".lolim" , base + kHBLOLIM); |
} |
|
fHasIbmon = (clist[iim].Status() & statmsk) == 0; |
if (fHasIbmon) { |
AllIAddrMapInsert("im.cntl", kIMBASE + kIMCNTL); |
AllIAddrMapInsert("im.stat", kIMBASE + kIMSTAT); |
AllIAddrMapInsert("im.hilim", kIMBASE + kIMHILIM); |
AllIAddrMapInsert("im.lolim", kIMBASE + kIMLOLIM); |
AllIAddrMapInsert("im.addr", kIMBASE + kIMADDR); |
AllIAddrMapInsert("im.data", kIMBASE + kIMDATA); |
} |
|
return; |
} |
|
|
} // end namespace Retro |
/trunk/tools/src/librw11/Rw11Cpu.ipp
1,4 → 1,4
// $Id: Rw11Cpu.ipp 659 2015-03-22 23:15:51Z mueller $ |
// $Id: Rw11Cpu.ipp 700 2015-07-12 19:28:31Z mueller $ |
// |
// Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
// |
13,6 → 13,7
// |
// Revision History: |
// Date Rev Version Comment |
// 2015-07-12 700 1.2.1 use ..CpuAct instead ..CpuGo (new active based lam) |
// 2015-03-21 659 1.2 add RAddrMap |
// 2014-12-25 621 1.1 Adopt for 4k word ibus window; add IAddrMap |
// 2013-04-12 504 1.0 Initial version |
21,7 → 22,7
|
/*! |
\file |
\version $Id: Rw11Cpu.ipp 659 2015-03-22 23:15:51Z mueller $ |
\version $Id: Rw11Cpu.ipp 700 2015-07-12 19:28:31Z mueller $ |
\brief Implemenation (inline) of Rw11Cpu. |
*/ |
|
95,6 → 96,38
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
inline bool Rw11Cpu::HasScnt() const |
{ |
return fHasScnt; |
} |
|
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
inline bool Rw11Cpu::HasCmon() const |
{ |
return fHasCmon; |
} |
|
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
inline uint16_t Rw11Cpu::HasHbpt() const |
{ |
return fHasHbpt; |
} |
|
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
inline bool Rw11Cpu::HasIbmon() const |
{ |
return fHasIbmon; |
} |
|
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
inline uint16_t Rw11Cpu::CpuStat() const |
{ |
return fCpuStat; |
103,9 → 136,9
//------------------------------------------+----------------------------------- |
//! FIXME_docs |
|
inline bool Rw11Cpu::CpuGo() const |
inline bool Rw11Cpu::CpuAct() const |
{ |
return fCpuGo; |
return fCpuAct; |
} |
|
//------------------------------------------+----------------------------------- |
/trunk/tools/src/librwxxtpp/RtclRw11Cpu.cpp
1,4 → 1,4
// $Id: RtclRw11Cpu.cpp 682 2015-05-15 18:35:29Z mueller $ |
// $Id: RtclRw11Cpu.cpp 718 2015-12-26 15:59:48Z mueller $ |
// |
// Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
// |
13,6 → 13,10
// |
// Revision History: |
// Date Rev Version Comment |
// 2015-12-26 718 1.2.8 use BlockSizeMax() for 'cp -b[rw]m' and 'ldasm' |
// 2015-07-12 700 1.2.4 use ..CpuAct instead ..CpuGo (new active based lam); |
// add probe and map setup for optional cpu components |
// 2015-06-27 695 1.2.3 M_get: add ibase getter |
// 2015-05-04 674 1.2.2 w11a start/stop/suspend overhaul |
// 2015-04-25 668 1.2.1 M_cp: add -rbibr, wbibr; GetRAddr: drop odd check |
// 2015-04-03 661 1.2 expect logic: drop estatdef, use LastExpect.. |
33,7 → 37,7
|
/*! |
\file |
\version $Id: RtclRw11Cpu.cpp 682 2015-05-15 18:35:29Z mueller $ |
\version $Id: RtclRw11Cpu.cpp 718 2015-12-26 15:59:48Z mueller $ |
\brief Implemenation of RtclRw11Cpu. |
*/ |
|
345,7 → 349,7
string varprint; |
string vardump; |
|
bool setcpugo = false; |
bool setcpuact = false; |
|
while (args.NextOpt(opt, optset)) { |
size_t lsize = clist.Size(); |
517,7 → 521,7
|
} else if (opt == "-brm") { // -brm size ?varData ?varStat --- |
int32_t bsize; |
if (!args.GetArg("bsize", bsize, 1, 256)) return kERR; |
if (!args.GetArg("bsize", bsize, 1, Connect().BlockSizeMax())) return kERR; |
if (!GetVarName(args, "??varData", lsize, vardata)) return kERR; |
if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR; |
clist.AddRblk(base + Rw11Cpu::kCPMEMI, (size_t) bsize); |
524,7 → 528,7
|
} else if (opt == "-bwm") { // -bwm block ?varStat ----------- |
vector<uint16_t> block; |
if (!args.GetArg("data", block, 1, 256)) return kERR; |
if (!args.GetArg("data", block, 1, Connect().BlockSizeMax())) return kERR; |
if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR; |
clist.AddWblk(base + Rw11Cpu::kCPMEMI, block); |
|
531,7 → 535,7
} else if (opt == "-start") { // -start ?varStat --------------- |
if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR; |
clist.AddWreg(base + Rw11Cpu::kCPCNTL, Rw11Cpu::kCPFUNC_START); |
setcpugo = true; |
setcpuact = true; |
|
} else if (opt == "-stop") { // -stop ?varStat ---------------- |
if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR; |
556,6 → 560,7
} else if (opt == "-resume") { // -resume ?varStat -------------- |
if (!GetVarName(args, "??varStat", lsize, varstat)) return kERR; |
clist.AddWreg(base + Rw11Cpu::kCPCNTL, Rw11Cpu::kCPFUNC_RESUME); |
setcpuact = true; |
|
} else if (opt == "-stapc") { // -stapc addr ?varStat ---------- |
uint16_t data; |
565,7 → 570,7
clist.AddWreg(base + Rw11Cpu::kCPCNTL, Rw11Cpu::kCPFUNC_CRESET); |
clist.AddWreg(base + Rw11Cpu::kCPPC, data); |
clist.AddWreg(base + Rw11Cpu::kCPCNTL, Rw11Cpu::kCPFUNC_START); |
setcpugo = true; |
setcpuact = true; |
|
} else if (opt == "-rmembe") { // -rmembe ?varData ?varStat ------ |
if (!GetVarName(args, "??varData", lsize, vardata)) return kERR; |
707,7 → 712,7
if (clist.Size() == 0) return kOK; |
|
// signal cpugo up before clist executed to prevent races |
if (setcpugo) Obj().SetCpuGoUp(); |
if (setcpuact) Obj().SetCpuActUp(); |
|
RerrMsg emsg; |
// this one intentionally on Connect() to allow mixing of rlc + w11 commands |
795,7 → 800,7
} |
|
} else { // server is active |
twait = Obj().WaitCpuGoDown(tout); |
twait = Obj().WaitCpuActDown(tout); |
} |
|
if (twait < 0.) { // timeout |
1135,7 → 1140,7
for (cmap_it_t it=cmap.begin(); it!=cmap.end(); it++) { |
//cout << "+++2 mem[" << RosPrintf(it->first, "o0", 6) |
// << "]=" << RosPrintf(it->second, "o0", 6) << endl; |
if (dot != it->first || block.size() == 256) { |
if (dot != it->first || block.size() >= Connect().BlockSizeMax()) { |
if (block.size()) { |
if (!Obj().MemWrite(base, block, emsg)) return args.Quit(emsg); |
block.clear(); |
1208,7 → 1213,7
|
const char* mode[4] = {"k","s","?","u"}; |
const char* rust[16] = {"init", "HALTed", "reset", "stopped", |
"stepped", "suspend", "0110", "..run..", |
"stepped", "suspend", "hbpt", "..run..", |
"F:vecfet", "F:redstk", "1010", "1011", |
"F:seq", "F:vmbox" , "1101", "1111"}; |
|
1430,9 → 1435,14
void RtclRw11Cpu::SetupGetSet() |
{ |
Rw11Cpu* pobj = &Obj(); |
fGets.Add<const string&>("type", boost::bind(&Rw11Cpu::Type, pobj)); |
fGets.Add<size_t> ("index", boost::bind(&Rw11Cpu::Index, pobj)); |
fGets.Add<uint16_t> ("base", boost::bind(&Rw11Cpu::Base, pobj)); |
fGets.Add<const string&>("type", boost::bind(&Rw11Cpu::Type, pobj)); |
fGets.Add<size_t> ("index", boost::bind(&Rw11Cpu::Index, pobj)); |
fGets.Add<uint16_t> ("base", boost::bind(&Rw11Cpu::Base, pobj)); |
fGets.Add<uint16_t> ("ibase", boost::bind(&Rw11Cpu::IBase, pobj)); |
fGets.Add<bool> ("hasscnt", boost::bind(&Rw11Cpu::HasScnt, pobj)); |
fGets.Add<bool> ("hascmon", boost::bind(&Rw11Cpu::HasCmon, pobj)); |
fGets.Add<uint16_t> ("hashbpt", boost::bind(&Rw11Cpu::HasHbpt, pobj)); |
fGets.Add<bool> ("hasibmon", boost::bind(&Rw11Cpu::HasIbmon, pobj)); |
return; |
} |
|
/trunk/tools/bin/dmscntanal
0,0 → 1,488
#!/usr/bin/perl -w |
# $Id: dmscntanal 721 2015-12-29 17:50:50Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-06-28 696 1.0 Initial version |
# |
|
use 5.14.0; # require Perl 5.14 or higher |
use strict; # require strict checking |
|
use Getopt::Long; |
|
my %opts = (); |
|
GetOptions(\%opts, "help", "raw") |
or die "bad options"; |
|
sub print_help; |
sub read_file; |
sub show_raw; |
sub add_groups; |
sub group_new; |
|
my @snum2nam; |
my %snam2num; |
my %dat_all; |
my %dat_km; |
my %dat_um; |
my $sum_all; |
my $sum_km; |
my $sum_um; |
|
autoflush STDOUT 1 if (-p STDOUT); # autoflush if output into pipe |
|
if (exists $opts{help}) { |
print_help; |
exit 0; |
} |
|
foreach my $file (@ARGV) { |
read_file($file); |
add_groups(); |
show_raw() if exists $opts{raw}; |
show_frac(); |
} |
|
#------------------------------------------------------------------------------- |
|
sub read_file { |
my ($file) = @_; |
|
%dat_km = (); |
%dat_um = (); |
%dat_all = (); |
@snum2nam = (); |
%snam2num = (); |
$sum_all = 0; |
$sum_km = 0; |
$sum_um = 0; |
|
open IFILE,"<$file" or die "failed to open $file"; |
|
while (<IFILE>) { |
chomp; |
next if m/^#/; |
if (m/^\s*([[:xdigit:]]+) |
\s+(\w+) |
\s+(\d+) |
\s+(\d+) |
\s+(\d+)/x) { |
my $snum = hex($1); |
my $snam = $2; |
my $all = 1. * "$3."; |
my $km = 1. * "$4."; |
my $um = 1. * "$5."; |
|
$snum2nam[$snum] = $snam; |
$snam2num{$snam} = $snum; |
|
$dat_all{$snam} += $all; |
$dat_km{$snam} += $km; |
$dat_um{$snam} += $um; |
|
$sum_all += $all; |
$sum_km += $km; |
$sum_um += $um; |
|
} else { |
printf STDERR "bad line: $_\n"; |
} |
} |
|
close IFILE; |
|
} |
|
#------------------------------------------------------------------------------- |
|
sub show_raw { |
print "#\n"; |
print "#sn state all km usm" . |
" all% km% usm%\n"; |
printf "# sum_all %11.0f %11.0f %11.0f %6.2f %6.2f %6.2f\n", |
$sum_all, $sum_km, $sum_um, |
get_frac(100., $sum_all, $sum_all), |
get_frac(100., $sum_km, $sum_all), |
get_frac(100., $sum_um, $sum_all); |
|
for (my $snum=0; $snum<scalar(@snum2nam); $snum++) { |
my $snam = $snum2nam[$snum]; |
next unless defined $snam; |
printf "%3.3x %-18s %11.0f %11.0f %11.0f %6.2f %6.2f %6.2f\n", |
$snum, $snam, $dat_all{$snam}, $dat_km{$snam}, $dat_um{$snam}, |
get_frac(100., $dat_all{$snam}, $sum_all), |
get_frac(100., $dat_km{$snam}, $sum_km), |
get_frac(100., $dat_um{$snam}, $sum_um); |
} |
} |
|
#------------------------------------------------------------------------------- |
|
sub show_frac { |
print "#\n"; |
print "# Ratio all km usm\n"; |
print_frac('%','cycles busy', 'g_sum_exec', 'g_sum'); |
print_frac('%','cycles cpmem', 'g_cp_mem', 'g_sum'); |
print_frac('%','cycles wextra', 'g_all_wextra', 'g_sum_exec'); |
print_frac('%','cycles jsr+rts', 'g_op_jsrrts', 'g_sum_exec'); |
print_frac('%','cycles int+rti', 'g_intrti', 'g_sum_exec'); |
print_frac('%','ifetch/idecode', 's_ifetch', 's_idecode'); |
print_frac('%','flow cntl/idecode', 'g_flow', 's_idecode'); |
print_frac('%',' br/idecode', 's_op_br', 's_idecode'); |
print_frac('%',' sob/idecode', 's_op_sob', 's_idecode'); |
print_frac('%',' jmp/idecode', 's_opa_jmp', 's_idecode'); |
print_frac('%',' jsr/idecode', 's_opa_jsr', 's_idecode'); |
print_frac('%',' rts/idecode', 's_op_rts', 's_idecode'); |
print_frac(' ','cycles/idecode (cpi)', 'g_sum_exec', 's_idecode'); |
print_frac(' ',' fetdec/idecode', 'g_ifetdec', 's_idecode'); |
print_frac(' ',' srcr/idecode', 'g_srcr', 's_idecode'); |
print_frac(' ',' dstr/idecode', 'g_dstr', 's_idecode'); |
print_frac(' ',' dstw/idecode', 'g_dstw', 's_idecode'); |
print_frac(' ',' dsta/idecode', 'g_dsta', 's_idecode'); |
print_frac(' ','ifetch_w/ifetch', 's_ifetch_w', 's_ifetch'); |
print_frac(' ','wextra/idecode', 'g_all_wextra', 's_idecode'); |
} |
|
#------------------------------------------------------------------------------- |
|
sub print_frac { |
my ($pre,$text,$nom,$denom) = @_; |
|
die "print_frac: bad key '$nom'" unless defined $snam2num{$nom}; |
die "print_frac: bad key '$denom'" unless defined $snam2num{$denom}; |
|
my $fact = ($pre eq '%') ? 100. : 1.; |
printf " %-22s %7.2f%s %7.2f%s %7.2f%s\n", |
$text, |
get_frac($fact, $dat_all{$nom}, $dat_all{$denom}), $pre, |
get_frac($fact, $dat_km{$nom}, $dat_km{$denom}), $pre, |
get_frac($fact, $dat_um{$nom}, $dat_um{$denom}), $pre; |
} |
|
#------------------------------------------------------------------------------- |
|
sub get_frac { |
my ($fact,$nom,$denom) = @_; |
$denom = 1. unless $denom > 0.; |
return $fact*($nom/$denom); |
} |
|
#------------------------------------------------------------------------------- |
|
sub add_groups { |
group_new(0x100, 'g_sum'); |
$dat_all{g_sum} = $sum_all; |
$dat_km{g_sum} = $sum_km; |
$dat_um{g_sum} = $sum_um; |
|
group_new(0x110, 'g_cp', |
's_cp_regread', |
's_cp_rps', |
's_cp_memr_w', |
's_cp_memw_w'); |
|
group_new(0x111, 'g_cp_mem', |
's_idle', |
's_cp_memr_w', |
's_cp_memw_w', |
'-', |
's_int_ext'); |
|
group_new(0x112, 'g_ifetdec', |
's_ifetch', |
's_ifetch_w', |
's_idecode'); |
|
group_new(0x113, 'g_srcr', |
's_srcr_def', |
's_srcr_def_w', |
's_srcr_inc', |
's_srcr_inc_w', |
's_srcr_dec', |
's_srcr_dec1', |
's_srcr_ind', |
's_srcr_ind1_w', |
's_srcr_ind2', |
's_srcr_ind2_w'); |
|
group_new(0x114, 'g_dstr', |
's_dstr_def', |
's_dstr_def_w', |
's_dstr_inc', |
's_dstr_inc_w', |
's_dstr_dec', |
's_dstr_dec1', |
's_dstr_ind', |
's_dstr_ind1_w', |
's_dstr_ind2', |
's_dstr_ind2_w'); |
|
group_new(0x115, 'g_dstw', |
's_dstw_def', |
's_dstw_def_w', |
's_dstw_inc', |
's_dstw_inc_w', |
's_dstw_incdef_w', |
's_dstw_dec', |
's_dstw_dec1', |
's_dstw_ind', |
's_dstw_ind_w', |
's_dstw_def246'); |
|
group_new(0x116, 'g_dsta', |
's_dsta_inc', |
's_dsta_incdef_w', |
's_dsta_dec', |
's_dsta_dec1', |
's_dsta_ind', |
's_dsta_ind_w'); |
|
group_new(0x120, 'g_op_rts', |
's_op_rts', |
's_op_rts_pop', |
's_op_rts_pop_w'); |
|
group_new(0x121, 'g_op_sob', |
's_op_sob', |
's_op_sob1'); |
|
group_new(0x122, 'g_op_gen', |
's_opg_gen', |
's_opg_gen_rmw_w'); |
|
group_new(0x123, 'g_op_mul', |
's_opg_mul', |
's_opg_mul1'); |
|
group_new(0x124, 'g_op_div', |
's_opg_div', |
's_opg_div_cn', |
's_opg_div_cr', |
's_opg_div_sq', |
's_opg_div_sr', |
's_opg_div_quit'); |
|
group_new(0x125, 'g_op_ash', |
's_opg_ash', |
's_opg_ash_cn'); |
|
group_new(0x126, 'g_op_ashc', |
's_opg_ashc', |
's_opg_ashc_cn', |
's_opg_ashc_wl'); |
|
group_new(0x127, 'g_op_jsr', |
's_opa_jsr', |
's_opa_jsr1', |
's_opa_jsr_push', |
's_opa_jsr_push_w', |
's_opa_jsr2'); |
|
group_new(0x128, 'g_op_mtp', |
's_opa_mtp', |
's_opa_mtp_pop_w', |
's_opa_mtp_reg', |
's_opa_mtp_mem', |
's_opa_mtp_mem_w'); |
|
group_new(0x129, 'g_op_mfp', |
's_opa_mfp_reg', |
's_opa_mfp_mem', |
's_opa_mfp_mem_w', |
's_opa_mfp_dec', |
's_opa_mfp_push', |
's_opa_mfp_push_w'); |
|
group_new(0x12a, 'g_int', |
's_int_ext', |
's_int_getpc', |
's_int_getpc_w', |
's_int_getps', |
's_int_getps_w', |
's_int_getsp', |
's_int_decsp', |
's_int_pushps', |
's_int_pushps_w', |
's_int_pushpc', |
's_int_pushpc_w'); |
|
group_new(0x12b, 'g_rti', |
's_rti_getpc', |
's_rti_getpc_w', |
's_rti_getps', |
's_rti_getps_w', |
's_rti_newpc'); |
|
group_new(0x130, 'g_op_jsrrts', |
'g_op_jsr', |
'g_op_rts'); |
|
group_new(0x131, 'g_flow', |
's_op_br', |
's_op_sob', |
's_opa_jmp', |
's_opa_jsr', |
's_op_rts'); |
|
group_new(0x13a, 'g_intrti', |
'g_int', |
'g_rti'); |
|
group_new(0x101, 'g_sum_noidle', |
'g_sum', |
'-', |
'g_cp_mem', |
's_op_wait'); |
|
group_new(0x102, 'g_sum_exec', |
'g_sum_noidle', |
'-', |
'g_int', |
'g_rti'); |
|
group_new(0x140, 'g_ifetch_wextra', |
's_ifetch_w', |
'-', |
's_ifetch'); |
|
group_new(0x141, 'g_srcr_wextra', |
's_srcr_def_w', |
's_srcr_inc_w', |
's_srcr_ind1_w', |
's_srcr_ind2_w', |
'-', |
's_srcr_def', |
's_srcr_inc', |
's_srcr_ind', |
's_srcr_ind2'); |
|
group_new(0x142, 'g_dstr_wextra', |
's_dstr_def_w', |
's_dstr_inc_w', |
's_dstr_ind1_w', |
's_dstr_ind2_w', |
'-', |
's_dstr_def', |
's_dstr_inc', |
's_dstr_ind', |
's_dstr_ind2'); |
|
group_new(0x143, 'g_dstw_wextra', |
's_dstw_def_w', |
's_dstw_inc_w', |
's_dstw_incdef_w', |
's_dstw_ind_w', |
'-', |
's_dstw_def', |
's_dstw_inc', |
's_dstw_ind', |
's_dstw_def246'); |
|
group_new(0x144, 'g_dsta_wextra', |
's_dsta_incdef_w', |
's_dsta_ind_w', |
'-', |
's_dsta_inc', |
's_dsta_ind'); |
|
group_new(0x145, 'g_op_rts_wextra', |
's_op_rts_pop_w', |
'-', |
's_op_rts_pop'); |
|
group_new(0x146, 'g_op_jsr_wextra', |
's_opa_jsr_push_w', |
'-', |
's_opa_jsr_push'); |
|
group_new(0x147, 'g_op_mtp_wextra', |
's_opa_mtp_pop_w', |
's_opa_mtp_mem_w', |
'-', |
's_opa_mtp', |
's_opa_mtp_mem'); |
|
group_new(0x148, 'g_op_mfp_wextra', |
's_opa_mfp_mem_w', |
's_opa_mfp_push_w', |
'-', |
's_opa_mfp_mem', |
's_opa_mfp_push'); |
|
group_new(0x149, 'g_int_wextra', |
's_int_getpc_w', |
's_int_getps_w', |
's_int_pushps_w', |
's_int_pushpc_w', |
'-', |
's_int_getpc', |
's_int_getps', |
's_int_pushps', |
's_int_pushpc'); |
|
group_new(0x14a, 'g_rti_wextra', |
's_rti_getpc_w', |
's_rti_getps_w', |
'-', |
's_rti_getpc', |
's_rti_getps'); |
|
group_new(0x14f, 'g_all_wextra', |
'g_ifetch_wextra', |
'g_srcr_wextra', |
'g_dstr_wextra', |
'g_dstw_wextra', |
'g_dsta_wextra', |
'g_op_rts_wextra', |
'g_op_jsr_wextra', |
'g_op_mtp_wextra', |
'g_op_mfp_wextra', |
'g_int_wextra', |
'g_rti_wextra'); |
} |
|
#------------------------------------------------------------------------------- |
|
sub group_new { |
my $snum = shift @_; |
my $snam = shift @_; |
|
die "group_new: bad snum '$snum'" if defined $snum2nam[$snum]; |
die "group_new: bad snam '$snam'" if defined $snam2num{$snam}; |
|
$snum2nam[$snum] = $snam; |
$snam2num{$snam} = $snum; |
$dat_all{$snam} = 0; |
$dat_km{$snam} = 0; |
$dat_um{$snam} = 0; |
my $sign = 1.; |
|
foreach my $val (@_) { |
if ($val eq '+') { $sign = 1.; next;} |
if ($val eq '-') { $sign = -1.; next;} |
die "bad action '$val'" unless defined $snam2num{$val}; |
$dat_all{$snam} += $sign * $dat_all{$val}; |
$dat_km{$snam} += $sign * $dat_km{$val}; |
$dat_um{$snam} += $sign * $dat_um{$val}; |
} |
} |
|
#------------------------------------------------------------------------------- |
|
sub print_help { |
print "usage: dmscntanal file\n"; |
print " --help this message\n"; |
} |
trunk/tools/bin/dmscntanal
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/tools/bin/tmuconv
===================================================================
--- trunk/tools/bin/tmuconv (revision 33)
+++ trunk/tools/bin/tmuconv (revision 34)
@@ -1,5 +1,5 @@
#!/usr/bin/perl -w
-# $Id: tmuconv 676 2015-05-09 16:31:54Z mueller $
+# $Id: tmuconv 712 2015-11-01 22:53:45Z mueller $
#
# Copyright 2008-2015 by Walter F.J. Mueller
#
@@ -14,6 +14,10 @@
#
# Revision History:
# Date Rev Version Comment
+# 2015-11-01 712 1.1.1 BUGFIX: fix '.' handling for br/sob instructions
+# BUGFIX: correct xor (now r,dst, and not src,r)
+# br/sob offsets now octal; assume --t_id if no opts
+# 2015-07-03 697 1.1 adapt to new DM_STAT_(SY|VM); add rhrp vector
# 2010-10-22 334 1.0.9 adapt to ibus V2 signals: req,we,dip->aval,re,we,rmw
# 2010-06-26 309 1.0.8 add ibimres.cacc/racc handling
# 2010-04-26 284 1.0.7 add error check for GetOptions
@@ -54,19 +58,19 @@
# vm.ibsres.ack:b
# vm.ibsres.busy:b
# vm.ibsres.dout:o
+# vm.emmreq.req:b
+# vm.emmreq.we:b
+# vm.emmreq.be:b
+# vm.emmreq.cancel:b
+# vm.emmreq.addr:o
+# vm.emmreq.din:o
+# vm.emsres.ack_r:b
+# vm.emsres.ack_w:b
+# vm.emsres.dout:o
# co.cpugo:b
# co.cpususp:b
# co.suspint:b
# co.suspext:b
-# sy.emmreq.req:b
-# sy.emmreq.we:b
-# sy.emmreq.be:b
-# sy.emmreq.cancel:b
-# sy.emmreq.addr:o
-# sy.emmreq.din:o
-# sy.emsres.ack_r:b
-# sy.emsres.ack_w:b
-# sy.emsres.dout:o
# sy.chit:b
#
@@ -126,15 +130,16 @@
my $ind_vm_ibsres_busy;
my $ind_vm_ibsres_dout;
-my $ind_sy_emmreq_req;
-my $ind_sy_emmreq_we;
-my $ind_sy_emmreq_be;
-my $ind_sy_emmreq_cancel;
-my $ind_sy_emmreq_addr;
-my $ind_sy_emmreq_din;
-my $ind_sy_emsres_ack_r;
-my $ind_sy_emsres_ack_w;
-my $ind_sy_emsres_dout;
+my $ind_vm_emmreq_req;
+my $ind_vm_emmreq_we;
+my $ind_vm_emmreq_be;
+my $ind_vm_emmreq_cancel;
+my $ind_vm_emmreq_addr;
+my $ind_vm_emmreq_din;
+my $ind_vm_emsres_ack_r;
+my $ind_vm_emsres_ack_w;
+my $ind_vm_emsres_dout;
+
my $ind_sy_chit;
my @pdp11_opcode_tbl = (
@@ -151,7 +156,7 @@
{code=>0000230, mask=>0000007, name=>"spl ", type=>"spl"},
{code=>0000240, mask=>0000017, name=>"cl", type=>"ccop"},
{code=>0000260, mask=>0000017, name=>"se", type=>"ccop"},
- {code=>0000300, mask=>0000077, name=>"swap", type=>"1arg"},
+ {code=>0000300, mask=>0000077, name=>"swab", type=>"1arg"},
{code=>0000400, mask=>0000377, name=>"br ", type=>"br"},
{code=>0001000, mask=>0000377, name=>"bne ", type=>"br"},
{code=>0001400, mask=>0000377, name=>"beq ", type=>"br"},
@@ -159,7 +164,7 @@
{code=>0002400, mask=>0000377, name=>"blt ", type=>"br"},
{code=>0003000, mask=>0000377, name=>"bgt ", type=>"br"},
{code=>0003400, mask=>0000377, name=>"ble ", type=>"br"},
- {code=>0004000, mask=>0000777, name=>"jsr ", type=>"jsr"},
+ {code=>0004000, mask=>0000777, name=>"jsr ", type=>"rsrc"},
{code=>0005000, mask=>0000077, name=>"clr ", type=>"1arg"},
{code=>0005100, mask=>0000077, name=>"com ", type=>"1arg"},
{code=>0005200, mask=>0000077, name=>"inc ", type=>"1arg"},
@@ -189,7 +194,7 @@
{code=>0071000, mask=>0000777, name=>"div ", type=>"rdst"},
{code=>0072000, mask=>0000777, name=>"ash ", type=>"rdst"},
{code=>0073000, mask=>0000777, name=>"ashc", type=>"rdst"},
- {code=>0074000, mask=>0000777, name=>"xor ", type=>"rdst"},
+ {code=>0074000, mask=>0000777, name=>"xor ", type=>"rsrc"},
{code=>0077000, mask=>0000777, name=>"sob ", type=>"sob"},
{code=>0100000, mask=>0000377, name=>"bpl ", type=>"br"},
{code=>0100400, mask=>0000377, name=>"bmi ", type=>"br"},
@@ -294,10 +299,10 @@
177574=> "mmr1",
177572=> "mmr0",
177570=> "sdreg", # not a simh name !!
- 177560=> "ti.csr",
- 177562=> "ti.buf",
- 177564=> "to.csr",
- 177566=> "to.buf",
+ 177560=> "tia.csr",
+ 177562=> "tia.buf",
+ 177564=> "toa.csr",
+ 177566=> "toa.buf",
177550=> "pr.csr",
177552=> "pr.buf",
177554=> "pp.csr",
@@ -316,32 +321,32 @@
177414=> "rk.mr ",
177416=> "rk.db ",
177060=> "xor.cs", # XOR Tester
- 176700=> "rpa.cs1",
- 176702=> "rpa.wc ",
- 176704=> "rpa.ba ",
- 176706=> "rpa.da ",
- 176710=> "rpa.cs2",
- 176712=> "rpa.ds ",
- 176714=> "rpa.er1",
- 176716=> "rpa.as ",
- 176720=> "rpa.la ",
- 176722=> "rpa.db ",
- 176724=> "rpa.mr1",
- 176726=> "rpa.dt ",
- 176730=> "rpa.sn ",
- 176732=> "rpa.of ",
- 176734=> "rpa.dc ",
- 176736=> "rpa.m13",
- 176740=> "rpa.m14",
- 176742=> "rpa.m15",
- 176744=> "rpa.ec1",
- 176746=> "rpa.ec2",
- 176750=> "rpa.bae",
- 176752=> "rpa.cs3",
- 176500=> "ti2.cs",
- 176502=> "ti2.bu",
- 176504=> "to2.cs",
- 176506=> "to2.bu",
+ 176700=> "rp.cs1",
+ 176702=> "rp.wc ",
+ 176704=> "rp.ba ",
+ 176706=> "rp.da ",
+ 176710=> "rp.cs2",
+ 176712=> "rp.ds ",
+ 176714=> "rp.er1",
+ 176716=> "rp.as ",
+ 176720=> "rp.la ",
+ 176722=> "rp.db ",
+ 176724=> "rp.mr1",
+ 176726=> "rp.dt ",
+ 176730=> "rp.sn ",
+ 176732=> "rp.of ",
+ 176734=> "rp.dc ",
+ 176736=> "rp.m13",
+ 176740=> "rp.m14",
+ 176742=> "rp.m15",
+ 176744=> "rp.ec1",
+ 176746=> "rp.ec2",
+ 176750=> "rp.bae",
+ 176752=> "rp.cs3",
+ 176500=> "tib.cs",
+ 176502=> "tib.bu",
+ 176504=> "tob.cs",
+ 176506=> "tob.bu",
174400=> "rl.cs ",
174402=> "rl.ba ",
174404=> "rl.da ",
@@ -349,12 +354,12 @@
172540=> "kp.csr",
172542=> "kp.buf",
172544=> "kp.cnt",
- 172520=> "tm.mts",
- 172522=> "tm.mtc",
- 172524=> "tm.brc",
- 172526=> "tm.cma",
- 172530=> "tm.mtd",
- 172532=> "tm.rda",
+ 172520=> "tm.sr",
+ 172522=> "tm.cr",
+ 172524=> "tm.bc",
+ 172526=> "tm.ba",
+ 172530=> "tm.db",
+ 172532=> "tm.rl",
172516=> "mmr3",
172200=> "sipdr0",
172202=> "sipdr1",
@@ -433,6 +438,16 @@
exit 0;
}
+my $nopts = 0; # count options
+$nopts += 1 if $opts{dump};
+$nopts += 1 if $opts{cdump};
+$nopts += 1 if $opts{t_id};
+$nopts += 1 if $opts{t_ru};
+$nopts += 1 if $opts{t_em};
+$nopts += 1 if $opts{t_ib};
+
+$opts{t_id} = 1 if $nopts == 0; # if no opts, assume t_id
+
foreach my $file (@ARGV) {
do_file($file);
}
@@ -505,15 +520,16 @@
$ind_vm_ibsres_busy = $name{'vm.ibsres.busy'}->{ind};
$ind_vm_ibsres_dout = $name{'vm.ibsres.dout'}->{ind};
- $ind_sy_emmreq_req = $name{'sy.emmreq.req'}->{ind};
- $ind_sy_emmreq_we = $name{'sy.emmreq.we'}->{ind};
- $ind_sy_emmreq_be = $name{'sy.emmreq.be'}->{ind};
- $ind_sy_emmreq_cancel = $name{'sy.emmreq.cancel'}->{ind};
- $ind_sy_emmreq_addr = $name{'sy.emmreq.addr'}->{ind};
- $ind_sy_emmreq_din = $name{'sy.emmreq.din'}->{ind};
- $ind_sy_emsres_ack_r = $name{'sy.emsres.ack_r'}->{ind};
- $ind_sy_emsres_ack_w = $name{'sy.emsres.ack_w'}->{ind};
- $ind_sy_emsres_dout = $name{'sy.emsres.dout'}->{ind};
+ $ind_vm_emmreq_req = $name{'vm.emmreq.req'}->{ind};
+ $ind_vm_emmreq_we = $name{'vm.emmreq.we'}->{ind};
+ $ind_vm_emmreq_be = $name{'vm.emmreq.be'}->{ind};
+ $ind_vm_emmreq_cancel = $name{'vm.emmreq.cancel'}->{ind};
+ $ind_vm_emmreq_addr = $name{'vm.emmreq.addr'}->{ind};
+ $ind_vm_emmreq_din = $name{'vm.emmreq.din'}->{ind};
+ $ind_vm_emsres_ack_r = $name{'vm.emsres.ack_r'}->{ind};
+ $ind_vm_emsres_ack_w = $name{'vm.emsres.ack_w'}->{ind};
+ $ind_vm_emsres_dout = $name{'vm.emsres.dout'}->{ind};
+
$ind_sy_chit = $name{'sy.chit'}->{ind};
} else {
@@ -591,7 +607,7 @@
my $code = code2mnemo($ireg);
$id_str = sprintf " %6.6o %6.6o %6.6o %s",
$pc, $psw, $ireg, $code;
- $id_str .= " " x (20-length($code));
+ $id_str .= " " x (22-length($code));
$id_str .= sprintf " (%d)",$cyc_curr-$idec_cyc;
$idec_cyc = $cyc_curr;
}
@@ -641,40 +657,40 @@
}
#
# handle t_em
-# uses cycles with sy_emmreq_req = '1'
-# sy_emsres_ack_r = '1'
-# sy_emsres_ack_w = '1'
-# sy_emsreq_cancel = '1'
+# uses cycles with vm_emmreq_req = '1'
+# vm_emsres_ack_r = '1'
+# vm_emsres_ack_w = '1'
+# vm_emsreq_cancel = '1'
#
if (exists $opts{t_em}) {
- if ($val_curr[$ind_sy_emmreq_req]) {
+ if ($val_curr[$ind_vm_emmreq_req]) {
$emreq_cyc = $cyc_curr;
$emreq_str = sprintf "%s %s %8.8o",
- ($val_curr[$ind_sy_emmreq_we] ? "w" : "r"),
- $val_curr[$ind_sy_emmreq_be],
- $val_curr[$ind_sy_emmreq_addr];
- $emcurr_we = $val_curr[$ind_sy_emmreq_we];
- $emcurr_addr = $val_curr[$ind_sy_emmreq_addr];
+ ($val_curr[$ind_vm_emmreq_we] ? "w" : "r"),
+ $val_curr[$ind_vm_emmreq_be],
+ $val_curr[$ind_vm_emmreq_addr];
+ $emcurr_we = $val_curr[$ind_vm_emmreq_we];
+ $emcurr_addr = $val_curr[$ind_vm_emmreq_addr];
if ($emcurr_we) {
- $emreq_str .= sprintf " %6.6o", $val_curr[$ind_sy_emmreq_din];
+ $emreq_str .= sprintf " %6.6o", $val_curr[$ind_vm_emmreq_din];
} else {
$emreq_str .= " " x 7;
}
}
- if ($val_curr[$ind_sy_emsres_ack_r] ||
- $val_curr[$ind_sy_emsres_ack_w] ||
- $val_curr[$ind_sy_emmreq_cancel]) {
+ if ($val_curr[$ind_vm_emsres_ack_r] ||
+ $val_curr[$ind_vm_emsres_ack_w] ||
+ $val_curr[$ind_vm_emmreq_cancel]) {
$emres_str = sprintf "%s%s%s%s",
- $val_curr[$ind_sy_emmreq_cancel],
- $val_curr[$ind_sy_emsres_ack_r],
- $val_curr[$ind_sy_emsres_ack_w],
+ $val_curr[$ind_vm_emmreq_cancel],
+ $val_curr[$ind_vm_emsres_ack_r],
+ $val_curr[$ind_vm_emsres_ack_w],
$val_curr[$ind_sy_chit];
- if ($val_curr[$ind_sy_emmreq_cancel]) {
+ if ($val_curr[$ind_vm_emmreq_cancel]) {
$emreq_str .= " cancel";
$emcurr_we = undef;
} else {
- if ($val_curr[$ind_sy_emsres_ack_r]) {
- $emreq_str .= sprintf " %6.6o", $val_curr[$ind_sy_emsres_dout];
+ if ($val_curr[$ind_vm_emsres_ack_r]) {
+ $emreq_str .= sprintf " %6.6o", $val_curr[$ind_vm_emsres_dout];
} else {
$emreq_str .= " " x 7;
}
@@ -703,6 +719,7 @@
$emtyp_str .= " 240 PIRQ" if ($emlast_addr == 0240);
$emtyp_str .= " 244 FPP exp" if ($emlast_addr == 0244);
$emtyp_str .= " 250 MMU trap" if ($emlast_addr == 0250);
+ $emtyp_str .= " 254 RHRP" if ($emlast_addr == 0254);
$emtyp_str .= " 260 IIST" if ($emlast_addr == 0260);
$emtyp_str .= " 300 DL11-2-TTI" if ($emlast_addr == 0300);
$emtyp_str .= " 304 DL11-2-TTO" if ($emlast_addr == 0304);
@@ -814,18 +831,29 @@
return "$name $reg_str";
} elsif ($type eq "br") {
+ # Note: in MACRO-11 syntax . refers to the address of the instruction
+ # the opcode has offset relative to PC after instruction fetch
+ # so 000776 --> br .-2
+ # 000777 --> br .
+ # 000400 --> br .+2
+ #
my $off = $code & 0177;
- my $sign = "+";
- if ($code & 0200) {
- $off = -(((~$off) & 0177)+1);
+ my $sign = "?";
+ if ($code & 0200) { # negative offsets
$sign = "-";
- }
- return sprintf "$name .%s%d.", $sign, abs(2*$off);
+ $off = ((~$off) & 0177)+1;
+ $off = $off - 1; # refer to address of instruction
+ } else { # positive offsets
+ $sign = "+";
+ $off = $off + 1; # refer to address of instruction
+ }
+ return sprintf "$name .%s%o", $sign, abs(2*$off);
} elsif ($type eq "sob") {
+ # Note: like in br type instructions, asm syntax and opcode differ by one
my $reg = ($code>>6) & 07;
my $off = $code & 077;
- return sprintf "$name r%d,.-%d.", $reg, 2*$off;
+ return sprintf "$name r%d,.-%o", $reg, 2*($off-1);
} elsif ($type eq "trap") {
my $off = $code & 0377;
@@ -848,7 +876,7 @@
if ($code & 001) { $str .= $del . $name . "c", $del = "+" }
return $str;
- } elsif ($type eq "jsr") {
+ } elsif ($type eq "rsrc") {
my $reg = ($code>>6) & 07;
my $dst = $code & 077;
my $dst_str = regmod($dst);
/trunk/tools/bin/ti_w11
1,5 → 1,5
#!/usr/bin/perl -w |
# $Id: ti_w11 680 2015-05-14 13:29:46Z mueller $ |
# $Id: ti_w11 712 2015-11-01 22:53:45Z mueller $ |
# |
# Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory |
6,6 → 6,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-11-01 712 1.3.2 use sb_cntl pin 12 for tmu; add -ghw option |
# 2015-05-14 680 1.3.1 use now -f1,-f1e,-f2,-f2e (fx now f1e) |
# 2015-04-13 667 1.3 rename -fu->-fc, add -f2,-fx; setup good defaults |
# 2015-01-02 640 1.2.2 BUGFIX: allow 'M' unit in baud rates |
30,6 → 31,7
my $opt_io = ''; |
my $opt_f = ''; |
my $opt_tmu; |
my $opt_ghw; |
my $tirri; |
my $val_term; |
my $val_tb_s3 = "tbw $sysbase/s3board/tb/tb_w11a_s3 -fifo"; |
61,6 → 63,10
$opt_tmu = 1; |
shift @ARGV; |
|
} elsif ($curarg =~ m{^-ghw$} ) { # -ghw |
$opt_ghw = 1; |
shift @ARGV; |
|
} elsif ($curarg =~ m{^-s3$} ) { # -s3 (use -f2 by default) |
$opt_io = 'f'; |
$opt_f = '2'; |
172,7 → 178,13
my $fifoopts = ",noinit"; # fifo always with deferred init |
$fifoopts .= ",xon" if $opt_f eq 'x'; |
push @arglist, "--fifo=$fifoopts"; |
push @arglist, "--run=$val_tb"; |
my $run_opts = ""; |
if ($opt_ghw) { |
my $ghw_stem = "ti_w11"; |
$ghw_stem = $1 if ($val_tb =~ m|^.*\s+.*/(\w*)\s+|); # get stem of tb file |
$run_opts .= " --wave=${ghw_stem}.ghw"; |
} |
push @arglist, "--run=${val_tb}${run_opts}"; |
} elsif ($opt_io eq 't') { |
push @arglist, "--term=$val_term"; |
} elsif ($opt_io eq 'u') { |
200,7 → 212,7
# |
if ($opt_io eq 'f') { |
if ($opt_tmu) { |
push @arglist, 'rlc oob -sbcntl 13 1'; |
push @arglist, 'rlc oob -sbcntl 12 1'; |
} |
if ($opt_f eq 'c') { |
push @arglist, 'rlc oob -sbdata 8 0x4'; # portsel = 0100 -> fx2 |
/trunk/tools/bin/asm-11
1,7 → 1,7
#!/usr/bin/perl -w |
# $Id: asm-11 659 2015-03-22 23:15:51Z mueller $ |
# $Id: asm-11 712 2015-11-01 22:53:45Z mueller $ |
# |
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
14,6 → 14,7
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-11-01 712 1.0.4 BUGFIX: fix '.' handling in instructions |
# 2014-07-26 575 1.0.3 add 'call' and 'return' to pst (as in macro-11) |
# 2013-04-07 503 1.0.2 list dot for .even,.dot,.blkb,.blkw |
# 2013-04-01 502 1.0.1 BUGFIX: -2(r0),@-2(r0) was broken, parser fixed |
75,6 → 76,7
sub pass2_lst_end; |
sub pass2_lst_line; |
sub out_w; |
sub out_wop; |
sub out_b; |
sub out_opcode; |
sub out_opcode_n; |
313,6 → 315,7
|
my @t_pushback; |
|
my $defincdot = 0; # defered increment for '.' |
my $out_dot; # current . for output |
my @out_data; # output data |
my $out_start = 1; # absolute start address |
1148,6 → 1151,7
$lst{'.'}->{val} = $val; |
$psect{$cur_psect}{dot} = $val; |
$psect{$cur_psect}{dotmax} = $val if $psect{$cur_psect}{dotmax} < $val; |
## printf "-- setdot %6.6o\n", $val if $opts{tparse}; |
return; |
} |
|
1163,6 → 1167,7
#------------------------------------------------------------------------------- |
|
sub getdot { |
## printf "-- getdot %6.6o\n", $lst{'.'}{val} if $opts{tparse}; |
return $lst{'.'}{val}; |
} |
|
1767,6 → 1772,9
die "BUGCHECK: unknown opfmt '$opfmt'"; |
} |
|
incdot($defincdot); # inc '.' after instruction done ! |
$defincdot = 0; |
|
# generate data |
} elsif ($$rl{typ} eq 'data') { |
if ($$rl{oper} eq '.word' || $$rl{oper} eq '.byte' ) { |
1952,6 → 1960,15
|
#------------------------------------------------------------------------------- |
|
sub out_wop { |
my ($rl,$word) = @_; |
push @{$$rl{outw}}, $word; |
$defincdot += 2; |
return; |
} |
|
#------------------------------------------------------------------------------- |
|
sub out_b { |
my ($rl,$byte) = @_; |
push @{$$rl{outb}}, $byte; |
1963,7 → 1980,7
|
sub out_opcode { |
my ($rl,$code) = @_; |
out_w($rl, $code); |
out_wop($rl, $code); |
return; |
} |
|
1983,7 → 2000,7
$val &= $mask; |
add_err($rl, 'T'); |
} |
out_w($rl, $code|$val); |
out_wop($rl, $code|$val); |
return; |
} |
|
2015,7 → 2032,7
} |
$off &= 0077; |
} |
out_w($rl, $code|$off); |
out_wop($rl, $code|$off); |
return; |
} |
|
2028,14 → 2045,14
|
my $val = eval_exp($rl,$ebeg,$eend); |
unless (defined $val) { |
out_w($rl, 0); |
out_wop($rl, 0); |
add_err($rl, 'U'); |
return; |
} |
if ($mod>=6 && $reg==7) { |
$val = ($val - (getdot()+2)) & 0177777; |
if ($mod>=6 && $reg==7) { # handle pc relative offsets |
$val = ($val - (getdot()+$defincdot+2)) & 0177777; |
} |
out_w($rl, $val); |
out_wop($rl, $val); |
return; |
} |
|
/trunk/tools/bin/dmscntconv
0,0 → 1,182
#!/usr/bin/perl -w |
# $Id: dmscntconv 721 2015-12-29 17:50:50Z mueller $ |
# |
# Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
# |
# This program is free software; you may redistribute and/or modify it under |
# the terms of the GNU General Public License as published by the Free |
# Software Foundation, either version 2, or at your option any later version. |
# |
# This program is distributed in the hope that it will be useful, but |
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
# for complete details. |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-28 721 1.0.1 adopt to new syntax of STATE2SNUM mapper |
# 2015-06-27 695 1.0 Initial version |
# |
|
use 5.14.0; # require Perl 5.14 or higher |
use strict; # require strict checking |
|
use Getopt::Long; |
|
my %opts = (); |
|
GetOptions(\%opts, "help", "src=s") |
or die "bad options"; |
|
sub print_help; |
sub do_src; |
sub do_file; |
|
my @snum2nam; |
my %snam2num; |
my %dat_all; |
my %dat_km; |
my %dat_um; |
|
autoflush STDOUT 1 if (-p STDOUT); # autoflush if output into pipe |
|
if (exists $opts{help}) { |
print_help; |
exit 0; |
} |
|
if (scalar(@ARGV) == 0) { |
print STDERR "dmscntconv-E: no input file specified\n"; |
print_help; |
exit 1; |
} |
|
$opts{src} = $ENV{RETROBASE} . "/rtl/w11a/pdp11_sequencer.vhd" |
unless defined $opts{src}; |
|
do_src($opts{src}); |
|
foreach my $file (@ARGV) { |
do_file($file); |
} |
|
print "#sn state all km usm" . |
" all% km% usm%\n"; |
|
my $sum_all = 0; |
my $sum_km = 0; |
my $sum_um = 0; |
|
foreach (keys %dat_all) { |
$sum_all += $dat_all{$_}; |
$sum_km += $dat_km{$_}; |
$sum_um += $dat_um{$_}; |
} |
|
my $div_all = ($sum_all>0.) ? $sum_all : 1.; |
my $div_km = ($sum_km >0.) ? $sum_km : 1.; |
my $div_um = ($sum_um >0.) ? $sum_um : 1.; |
|
printf "# sum_all %11.0f %11.0f %11.0f %6.2f %6.2f %6.2f\n", |
$sum_all, $sum_km, $sum_um, |
100., 100.*($sum_km/$sum_all), 100.*($sum_um/$sum_all); |
|
for (my $snum=0; $snum<scalar(@snum2nam); $snum++) { |
my $snam = $snum2nam[$snum]; |
next unless defined $snam; |
my $pc_all = 100. * ($dat_all{$snam} / $div_all); |
my $pc_km = 100. * ($dat_km{$snam} / $div_all); |
my $pc_um = 100. * ($dat_um{$snam} / $div_all); |
printf " %2.2x %-18s %11.0f %11.0f %11.0f %6.2f %6.2f %6.2f\n", |
$snum, $snam, $dat_all{$snam}, $dat_km{$snam}, $dat_um{$snam}, |
$pc_all, $pc_km, $pc_um; |
} |
|
|
#------------------------------------------------------------------------------- |
|
sub do_src { |
my ($file) = @_; |
|
open SFILE,"<$file" or die "failed to open $file"; |
|
my $begin_seen; |
while (<SFILE>) { |
chomp; |
if (m/^\s*-- STATE2SNUM mapper begin/) { |
$begin_seen = 1; |
next; |
} |
next unless $begin_seen; |
last if m/^\s*-- STATE2SNUM mapper end/; |
next if m/^\s*$/; |
if (m/^\s+when |
\s+(\w+) |
\s+=>\s*isnum\s*:= |
\s*x"([[:xdigit:]]+)";/x) { |
my $snam=$1; |
my $snum=hex($2); |
$snum2nam[$snum] = $snam; |
$snam2num{$snam} = $snum; |
} else { |
printf STDERR "bad line: $_\n"; |
} |
|
} |
|
close SFILE; |
} |
|
#------------------------------------------------------------------------------- |
|
sub do_file { |
my ($file) = @_; |
|
%dat_km = (); |
%dat_um = (); |
%dat_all = (); |
|
open IFILE,"<$file" or die "failed to open $file"; |
|
while (<IFILE>) { |
chomp; |
next if m/^#/; |
if (m/^\s*([[:xdigit:]]+) |
\s+([[:xdigit:]]+) |
\s+([[:xdigit:]]+) |
\s+([[:xdigit:]]+)\s*$/x) { |
my $sn = hex($1); |
my $d2 = hex($2); |
my $d1 = hex($3); |
my $d0 = hex($4); |
my $cnt = 1. * $d0; |
$cnt += 65536. * $d1; |
$cnt += 65536.*65536.* $d2; |
my $snum = $sn % 256; |
my $km = $sn < 256; |
my $snam = $snum2nam[$snum]; |
if (defined $snam) { |
$dat_all{$snam} += $cnt; |
if ($km) { |
$dat_km{$snam} += $cnt; |
} else { |
$dat_um{$snam} += $cnt; |
} |
} else { |
printf STDERR "bad snum: $_\n" if $cnt; |
} |
} else { |
printf STDERR "bad line: $_\n"; |
} |
} |
|
close IFILE; |
|
} |
|
#------------------------------------------------------------------------------- |
|
sub print_help { |
print "usage: dmscntconv [--src=source] file\n"; |
print " --help this message\n"; |
} |
trunk/tools/bin/dmscntconv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl
===================================================================
--- trunk/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl (revision 33)
+++ trunk/tools/oskit/xxdp_rl/xxdp22_rl_boot.tcl (revision 34)
@@ -1,4 +1,4 @@
-# $Id: xxdp22_rl_boot.tcl 689 2015-06-05 14:33:18Z mueller $
+# $Id: xxdp22_rl_boot.tcl 704 2015-07-25 14:18:03Z mueller $
#
# Setup file for XXDP V2.2 RL02 based system
#
@@ -13,7 +13,7 @@
puts [rlw]
# setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS)
-rw11::setup_tt "cpu0" {ndl 1 dlrlim 5 to7bit 1}
+rw11::setup_tt "cpu0" ndl 1 dlrlim 5 to7bit 1
rw11::setup_lp
rw11::setup_pp
/trunk/tools/oskit/xxdp_rl/xxdp25_rl_boot.tcl
1,4 → 1,4
# $Id: xxdp25_rl_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: xxdp25_rl_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for XXDP V2.5 RL02 based system |
# |
13,7 → 13,7
puts [rlw] |
|
# setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) |
rw11::setup_tt "cpu0" {ndl 1 dlrlim 5 to7bit 1} |
rw11::setup_tt "cpu0" ndl 1 dlrlim 5 to7bit 1 |
rw11::setup_lp |
rw11::setup_pp |
|
/trunk/tools/oskit/211bsd_rk/211bsd_rk_boot.tcl
1,4 → 1,4
# $Id: 211bsd_rk_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: 211bsd_rk_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for 211bsd RK05 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/211bsd_rl/211bsd_rl_boot.tcl
1,4 → 1,4
# $Id: 211bsd_rl_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: 211bsd_rl_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for 211bsd RL02 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/hook_dmscnt.tcl
0,0 → 1,3
# $Id: hook_dmscnt.tcl 721 2015-12-29 17:50:50Z mueller $ |
puts "hook: start dmscnt" |
rw11::sc_start |
/trunk/tools/oskit/211bsd_tm/211bsd_rm05_boot.tcl
1,4 → 1,4
# $Id: 211bsd_rm05_boot.tcl 690 2015-06-07 18:23:51Z mueller $ |
# $Id: 211bsd_rm05_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for 211bsd RM05 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/211bsd_tm/211bsd_tm_rm05_boot.tcl
1,4 → 1,4
# $Id: 211bsd_tm_rm05_boot.tcl 690 2015-06-07 18:23:51Z mueller $ |
# $Id: 211bsd_tm_rm05_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for creating a 211bsd RM05 system from a TM11 dist kit |
# |
15,7 → 15,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/211bsd_tm/README_211bsd_tmset.txt
1,4 → 1,4
# $Id: README_211bsd_rpset.txt 680 2015-05-14 13:29:46Z mueller $ |
# $Id: README_211bsd_tmset.txt 699 2015-07-05 21:37:26Z mueller $ |
|
Notes on oskit: 2.11BSD system on a TM11 tape distribution kit |
|
/trunk/tools/oskit/211bsd_tm/211bsd_tm_rp06_boot.tcl
1,4 → 1,4
# $Id: 211bsd_tm_rp06_boot.tcl 690 2015-06-07 18:23:51Z mueller $ |
# $Id: 211bsd_tm_rp06_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for creating a 211bsd RP06 system from a TM11 dist kit |
# |
15,7 → 15,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/rsx11mp-30_rp/rsx11mp-30_rp_boot.tcl
1,4 → 1,4
# $Id: rsx11mp-30_rp_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: rsx11mp-30_rp_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for RSX11-M+ V3.0 RP06 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/211bsd_rp/211bsd_rp_boot.tcl
1,4 → 1,4
# $Id: 211bsd_rp_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: 211bsd_rp_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for 211bsd RP06 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp (211bsd uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {to7bit 1} |
rw11::setup_tt "cpu0" to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/hook_ibmon_rka.tcl
1,7 → 1,6
# $Id: hook_ibmon_rka.tcl 690 2015-06-07 18:23:51Z mueller $ |
# $Id: hook_ibmon_rka.tcl 722 2015-12-30 19:45:46Z mueller $ |
puts "hook: start ibmon for rka" |
package require ibd_ibmon |
ibd_ibmon::setup |
ibd_ibmon::stop |
cpu0 cp -wibr im.lolim [cpu0 imap rka.ds] \ |
-wibr im.hilim [cpu0 imap rka.mr] |
/trunk/tools/oskit/rt11-40_rk/rt11-40_rk_boot.tcl
1,4 → 1,4
# $Id: rt11-40_rk_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: rt11-40_rk_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for RT-11 V4.0 RK05 based system |
# |
13,7 → 13,7
puts [rlw] |
|
# setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) |
rw11::setup_tt "cpu0" {ndl 1 dlrlim 5} |
rw11::setup_tt "cpu0" ndl 1 dlrlim 5 |
rw11::setup_lp |
rw11::setup_pp |
|
/trunk/tools/oskit/hook_ibmon_tma.tcl
1,7 → 1,6
# $Id: hook_ibmon_tma.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: hook_ibmon_tma.tcl 722 2015-12-30 19:45:46Z mueller $ |
puts "hook: start ibmon for tma" |
package require ibd_ibmon |
ibd_ibmon::setup |
ibd_ibmon::stop |
cpu0 cp -wibr im.lolim [cpu0 imap tma.sr] \ |
-wibr im.hilim [cpu0 imap tma.rl] |
/trunk/tools/oskit/hook_ibmon_rpa.tcl
1,7 → 1,6
# $Id: hook_ibmon_rpa.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: hook_ibmon_rpa.tcl 722 2015-12-30 19:45:46Z mueller $ |
puts "hook: start ibmon for rpa" |
package require ibd_ibmon |
ibd_ibmon::setup |
ibd_ibmon::stop |
cpu0 cp -wibr im.lolim [cpu0 imap rpa.cs1] \ |
-wibr im.hilim [cpu0 imap rpa.cs3] |
/trunk/tools/oskit/unix-v5_rk/uv5_rk_boot.tcl
1,4 → 1,4
# $Id: uv5_rk_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: uv5_rk_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for Unix V5 RK05 based system |
# |
12,7 → 12,7
puts [rlw] |
|
# setup tt,lp (uses only 1 console; uses parity -> use 7 bit mode) |
rw11::setup_tt "cpu0" {ndl 1 to7bit 1} |
rw11::setup_tt "cpu0" ndl 1 to7bit 1 |
rw11::setup_lp |
|
# mount disks |
/trunk/tools/oskit/rsx11m-31_rk/rsx11m-31_rk_boot.tcl
1,4 → 1,4
# $Id: rsx11m-31_rk_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: rsx11m-31_rk_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for RSX11-M V3.1 RK05 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp,pp (enable rx rate limiter on old DEC OS) |
rw11::setup_tt "cpu0" {dlrlim 5} |
rw11::setup_tt "cpu0" dlrlim 5 |
rw11::setup_lp |
rw11::setup_pp |
|
/trunk/tools/oskit/rsx11m-40_rk/rsx11m-40_rk_boot.tcl
1,4 → 1,4
# $Id: rsx11m-40_rk_boot.tcl 689 2015-06-05 14:33:18Z mueller $ |
# $Id: rsx11m-40_rk_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for RSX11-M V4.0 RK05 based system |
# |
14,7 → 14,7
puts [rlw] |
|
# setup tt,lp,pp (enable rx rate limiter on old DEC OS) |
rw11::setup_tt "cpu0" {dlrlim 5} |
rw11::setup_tt "cpu0" dlrlim 5 |
rw11::setup_lp |
rw11::setup_pp |
|
/trunk/tools/oskit/rt11-53_rl/README_rt11-53_rlset.txt
1,4 → 1,4
# $Id: $ |
# $Id: README_rt11-53_rlset.txt 699 2015-07-05 21:37:26Z mueller $ |
|
Notes on oskit: RT-11 V5.3 system on a RL02 volume |
|
/trunk/tools/oskit/rt11-53_rl/rt11-53_rl_boot.scmd
1,4 → 1,4
; $ Id: $ |
; $Id: rt11-53_rl_boot.scmd 699 2015-07-05 21:37:26Z mueller $ |
; |
; Setup file for RT-11 V5.3 RL02 based system |
; |
/trunk/tools/oskit/rt11-53_rl/rt11-53_rl_boot.tcl
1,4 → 1,4
# $ Id: $ |
# $Id: rt11-53_rl_boot.tcl 704 2015-07-25 14:18:03Z mueller $ |
# |
# Setup file for RT-11 V5.3 RL02 based system |
# |
13,7 → 13,7
puts [rlw] |
|
# setup tt,lp,pp (single console; enable rx rate limiter on old DEC OS) |
rw11::setup_tt "cpu0" {ndl 1 dlrlim 5} |
rw11::setup_tt "cpu0" ndl 1 dlrlim 5 |
rw11::setup_lp |
rw11::setup_pp |
|
/trunk/tools/dox/w11_vhd_all.Doxyfile
5,7 → 5,7
#--------------------------------------------------------------------------- |
DOXYFILE_ENCODING = UTF-8 |
PROJECT_NAME = "w11 - vhd" |
PROJECT_NUMBER = 0.70 |
PROJECT_NUMBER = 0.71 |
PROJECT_BRIEF = "W11 CPU core and support modules" |
PROJECT_LOGO = |
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/vhd |
/trunk/tools/dox/w11_cpp.Doxyfile
5,7 → 5,7
#--------------------------------------------------------------------------- |
DOXYFILE_ENCODING = UTF-8 |
PROJECT_NAME = "w11 - cpp" |
PROJECT_NUMBER = 0.70 |
PROJECT_NUMBER = 0.71 |
PROJECT_BRIEF = "Backend server for Rlink and w11" |
PROJECT_LOGO = |
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/cpp |
/trunk/tools/dox/w11_tcl.Doxyfile
5,7 → 5,7
#--------------------------------------------------------------------------- |
DOXYFILE_ENCODING = UTF-8 |
PROJECT_NAME = "w11 - tcl" |
PROJECT_NUMBER = 0.70 |
PROJECT_NUMBER = 0.71 |
PROJECT_BRIEF = "Backend server for Rlink and w11" |
PROJECT_LOGO = |
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/tcl |
/trunk/rtl/ibus/ibdr_tm11.vhd
1,4 → 1,4
-- $Id: ibdr_tm11.vhd 690 2015-06-07 18:23:51Z mueller $ |
-- $Id: ibdr_tm11.vhd 695 2015-06-28 11:22:52Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
27,6 → 27,7
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-27 695 1.0.1 add missing BESET to sensitivity list |
-- 2015-06-04 686 1.0 Initial version |
-- 2015-05-15 682 0.1 First draft |
------------------------------------------------------------------------------ |
183,7 → 184,7
end if; |
end process proc_regs; |
|
proc_next : process (R_REGS, IB_MREQ, EI_ACK) |
proc_next : process (R_REGS, IB_MREQ, EI_ACK, BRESET) |
variable r : regs_type := regs_init; |
variable n : regs_type := regs_init; |
variable ibhold : slbit := '0'; |
/trunk/rtl/ibus/ibd_ibmon.vhd
1,4 → 1,4
-- $Id: ibd_ibmon.vhd 672 2015-05-02 21:58:28Z mueller $ |
-- $Id: ibd_ibmon.vhd 697 2015-07-05 14:23:26Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
278,7 → 278,7
n.ibsel := '0'; |
if IB_MREQ.aval='1' and IB_MREQ.addr(12 downto 4)=IB_ADDR(12 downto 4) then |
n.ibsel := '1'; |
ibramen := '1'; |
ibramen := '1'; -- ensures bram read before ibus read |
end if; |
|
-- ibus transactions (react only on console (this includes racc)) |
/trunk/rtl/sys_gen/w11a/basys3/sys_conf.vhd
1,4 → 1,4
-- $Id: sys_conf.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: viv 2014.4; ghdl 0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.1.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.1 add sys_conf_ibd_* definitions |
-- 2015-02-08 644 1.0 Initial version (derived from _n4 version) |
------------------------------------------------------------------------------ |
50,8 → 51,11
constant sys_conf_memctl_nblock : positive := 11; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 0; -- no rbmon to save BRAMs |
constant sys_conf_ibmon_awidth : integer := 0; -- no ibmon to save BRAMs |
constant sys_conf_rbmon_awidth : integer := 0; -- no rbmon to save BRAMs |
constant sys_conf_ibmon_awidth : integer := 0; -- no ibmon to save BRAMs |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 0; -- no dmcmon to save BRAMs |
|
-- configure w11 cpu core -------------------------------------------------- |
-- sys_conf_mem_losize is highest 64 byte MMU block number |
/trunk/rtl/sys_gen/w11a/basys3/tb/sys_conf_sim.vhd
1,4 → 1,4
-- $Id: sys_conf_sim.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf_sim.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: viv 2014.4; ghdl 0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.1.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.1 add sys_conf_ibd_* definitions |
-- 2015-02-21 649 1.0 Initial version |
------------------------------------------------------------------------------ |
50,8 → 51,11
constant sys_conf_memctl_nblock : positive := 11; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 0; -- no rbmon to save BRAMs |
constant sys_conf_ibmon_awidth : integer := 0; -- no ibmon to save BRAMs |
constant sys_conf_rbmon_awidth : integer := 0; -- no rbmon to save BRAMs |
constant sys_conf_ibmon_awidth : integer := 0; -- no ibmon to save BRAMs |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 0; -- no dmcmon to save BRAMs |
|
-- configure w11 cpu core -------------------------------------------------- |
-- sys_conf_mem_losize is highest 64 byte MMU block number |
/trunk/rtl/sys_gen/w11a/nexys2/sys_conf.vhd
1,4 → 1,4
-- $Id: sys_conf.vhd 692 2015-06-21 11:53:24Z mueller $ |
-- $Id: sys_conf.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2010-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 11.4-14.7; ghdl 0.26-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.4.2 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-06-21 692 1.4.1 use clksys=52 (no closure after rhrp fixes) |
-- 2015-03-14 658 1.4 add sys_conf_ibd_* definitions |
-- 2015-02-15 647 1.3 drop bram and minisys options |
56,8 → 57,11
constant sys_conf_fx2_ccwidth : positive := 5; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure memory controller --------------------------------------------- |
constant sys_conf_memctl_read0delay : positive := 3; |
/trunk/rtl/sys_gen/w11a/nexys2/tb/sys_conf_sim.vhd
1,4 → 1,4
-- $Id: sys_conf_sim.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf_sim.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2010-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 11.4-14.7; ghdl 0.26-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.4.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.4 add sys_conf_ibd_* definitions |
-- 2015-02-07 643 1.3 drop bram and minisys options |
-- 2014-12-22 619 1.2.1 add _rbmon_awidth |
55,9 → 56,12
constant sys_conf_memctl_writedelay : positive := 4; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
|
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_mem_losize : integer := 8#167777#; -- 4 MByte |
|
/trunk/rtl/sys_gen/w11a/nexys3/sys_conf.vhd
1,4 → 1,4
-- $Id: sys_conf.vhd 692 2015-06-21 11:53:24Z mueller $ |
-- $Id: sys_conf.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 13.1-14.7; ghdl 0.29-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.4.2 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-06-21 692 1.4.1 use clksys=64 (no closure after rhrp fixes) |
-- 2015-03-14 658 1.4 add sys_conf_ibd_* definitions |
-- 2015-02-15 647 1.3 drop bram and minisys options |
67,8 → 68,11
constant sys_conf_memctl_writedelay : positive := 5; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_mem_losize : integer := 8#167777#; -- 4 MByte |
/trunk/rtl/sys_gen/w11a/nexys3/tb/sys_conf_sim.vhd
1,4 → 1,4
-- $Id: sys_conf_sim.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf_sim.vhd 718 2015-12-26 15:59:48Z mueller $ |
-- |
-- Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,8
-- Tool versions: xst 13.1-14.7; ghdl 0.29-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-12-26 718 1.5.2 use clksys=64 (as since r692 in sys_conf.vhd) |
-- 2015-06-26 695 1.5.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.5 add sys_conf_ibd_* definitions |
-- 2015-02-15 647 1.4 drop bram and minisys options |
-- 2014-12-22 619 1.3.1 add _rbmon_awidth |
36,8 → 38,8
|
-- configure clocks -------------------------------------------------------- |
constant sys_conf_clksys_vcodivide : positive := 25; |
constant sys_conf_clksys_vcomultiply : positive := 18; -- dcm 72 MHz |
constant sys_conf_clksys_outdivide : positive := 1; -- sys 72 MHz |
constant sys_conf_clksys_vcomultiply : positive := 16; -- dcm 64 MHz |
constant sys_conf_clksys_outdivide : positive := 1; -- sys 64 MHz |
constant sys_conf_clksys_gentype : string := "DCM"; |
|
-- configure rlink and hio interfaces -------------------------------------- |
49,13 → 51,16
constant sys_conf_fx2_ccwidth : positive := 5; |
|
-- configure memory controller --------------------------------------------- |
constant sys_conf_memctl_read0delay : positive := 4; -- for <75 MHz |
constant sys_conf_memctl_read0delay : positive := 4; -- for <75 MHz (???) |
constant sys_conf_memctl_read1delay : positive := sys_conf_memctl_read0delay; |
constant sys_conf_memctl_writedelay : positive := 5; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_mem_losize : integer := 8#167777#; -- 4 MByte |
/trunk/rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd
1,4 → 1,4
-- $Id: sys_w11a_n3.vhd 692 2015-06-21 11:53:24Z mueller $ |
-- $Id: sys_w11a_n3.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2011-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
34,15 → 34,18
-- |
-- Synthesized (xst): |
-- Date Rev ise Target flop lutl lutm slic t peri |
-- 2015-07-05 698 14.7 131013 xc6slx16-2 2500 4852 161 1782 ok: +dmhbpt 78% |
-- 2015-07-05 697 14.7 131013 xc6slx16-2 2428 4786 161 1756 ok: +dmcmon 77% |
-- 2015-06-27 695 14.7 131013 xc6slx16-2 2281 4638 161 1714 ok: +dmscnt 75% |
-- 2015-06-21 692 14.7 131013 xc6slx16-2 2192 4518 161 1584 ok: rhrp fixes |
-- 2015-06-04 686 14.7 131013 xc6slx16-2 2189 4492 161 1543 ok: +TM11 67% |
-- 2015-05-14 680 14.7 131013 xc6slx16-2 2120 4443 161 1546 ok: +ibmon 67% |
-- 2015-04-06 664 14.7 131013 xc6slx16-2 1991 4350 167 1489 ok: +RHRP 65% |
-- 2015-02-21 649 14.7 131013 xc6slx16-2 1819 3905 160 1380 ok: +RL11 |
-- 2015-06-04 686 14.7 131013 xc6slx16-2 2189 4492 161 1543 ok: +TM11 67% |
-- 2015-05-14 680 14.7 131013 xc6slx16-2 2120 4443 161 1546 ok: +ibmon 67% |
-- 2015-04-06 664 14.7 131013 xc6slx16-2 1991 4350 167 1489 ok: +RHRP 65% |
-- 2015-02-21 649 14.7 131013 xc6slx16-2 1819 3905 160 1380 ok: +RL11 61% |
-- 2014-12-22 619 14.7 131013 xc6slx16-2 1742 3767 150 1350 ok: +rbmon |
-- 2014-12-20 614 14.7 131013 xc6slx16-2 1640 3692 150 1297 ok: -RL11,rlv4 |
-- 2014-06-08 561 14.7 131013 xc6slx16-2 1531 3500 142 1165 ok: +RL11 |
-- 2014-05-29 556 14.7 131013 xc6slx16-2 1459 3342 128 1154 ok: |
-- 2014-05-29 556 14.7 131013 xc6slx16-2 1459 3342 128 1154 ok: 51% |
-- 2013-04-21 509 13.3 O76d xc6slx16-2 1516 3274 140 1184 ok: now + FX2 ! |
-- 2011-12-18 440 13.1 O40d xc6slx16-2 1441 3161 96 1084 ok: LP+PC+DL+II |
-- 2011-11-20 430 13.1 O40d xc6slx16-2 1412 3206 84 1063 ok: LP+PC+DL+II |
/trunk/rtl/sys_gen/w11a/nexys4/sys_conf.vhd
1,4 → 1,4
-- $Id: sys_conf.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: ise 14.5-14.7; viv 2014.4; ghdl 0.29-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.2.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.2 add sys_conf_ibd_* definitions |
-- 2015-02-07 643 1.1 drop bram and minisys options |
-- 2013-09-22 534 1.0 Initial version (derived from _n3 version) |
61,8 → 62,11
constant sys_conf_memctl_writedelay : positive := 5; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_mem_losize : integer := 8#167777#; -- 4 MByte |
/trunk/rtl/sys_gen/w11a/nexys4/tb/sys_conf_sim.vhd
1,4 → 1,4
-- $Id: sys_conf_sim.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf_sim.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 14.5-14.7; ghdl 0.29-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.2.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.2 add sys_conf_ibd_* definitions |
-- 2015-02-07 643 1.1 drop bram and minisys options |
-- 2013-09-34 534 1.0 Initial version (cloned from _n3) |
52,8 → 53,11
constant sys_conf_memctl_writedelay : positive := 7; |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_mem_losize : integer := 8#167777#; -- 4 MByte |
/trunk/rtl/sys_gen/w11a/s3board/sys_conf.vhd
1,4 → 1,4
-- $Id: sys_conf.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2007-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 8.1-14.7; ghdl 0.18-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.2.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.2 add sys_conf_ibd_* definitions |
-- 2014-12-22 619 1.1.2 add _rbmon_awidth |
-- 2010-05-05 288 1.1.1 add sys_conf_hio_debounce |
38,8 → 39,11
constant sys_conf_hio_debounce : boolean := true; -- instantiate debouncers |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_mem_losize : integer := 8#037777#; -- 1 MByte |
/trunk/rtl/sys_gen/w11a/s3board/tb/sys_conf_sim.vhd
1,4 → 1,4
-- $Id: sys_conf_sim.vhd 683 2015-05-17 21:54:35Z mueller $ |
-- $Id: sys_conf_sim.vhd 698 2015-07-05 21:20:18Z mueller $ |
-- |
-- Copyright 2007-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 8.1-14.7; ghdl 0.18-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.2.1 add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
-- 2015-03-14 658 1.2 add sys_conf_ibd_* definitions |
-- 2014-12-22 619 1.1.2 add _rbmon_awidth |
-- 2010-05-05 288 1.1.1 add sys_conf_hio_debounce |
38,8 → 39,11
constant sys_conf_hio_debounce : boolean := false; -- no debouncers |
|
-- configure debug and monitoring units ------------------------------------ |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable rbmon |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_rbmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable |
constant sys_conf_dmscnt : boolean := true; |
constant sys_conf_dmhbpt_nunit : integer := 2; -- use 0 to disable |
constant sys_conf_dmcmon_awidth : integer := 9; -- use 0 to disable |
|
-- configure w11 cpu core -------------------------------------------------- |
constant sys_conf_bram : integer := 0; -- no bram, use cache |
/trunk/rtl/bplib/nxcramlib/nx_cram_memctl_as.vhd
1,6 → 1,6
-- $Id: nx_cram_memctl_as.vhd 644 2015-02-08 22:56:54Z mueller $ |
-- $Id: nx_cram_memctl_as.vhd 718 2015-12-26 15:59:48Z mueller $ |
-- |
-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- Copyright 2010-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
31,6 → 31,7
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-12-26 718 1.2.1 BUGFIX: do_dispatch(): always define imem_oe |
-- 2011-11-26 433 1.2 renamed from n2_cram_memctl_as |
-- 2011-11-19 432 1.1 remove O_FLA_CE_N port |
-- 2011-11-19 427 1.0.5 now numeric_std clean |
74,6 → 75,9
-- 82.19- 89.74 5 6 <-- 85 85 10 17 |
-- 89.74- 95.89 6 6 <-- 90,95 95 10 19 |
-- 95.89-102.56 6 7 <-- 100 100 1 2 |
-- remark added 2015-12-26 |
-- - for sys_w11a_n3 one gets in simulation errors for 72 MHz and RD=4 !! |
-- - so far unclear whether controller or memory model is wrong !! |
-- |
-- Timing of some signals: |
-- |
364,6 → 368,7
iaddr0 := '1'; -- access word 1 |
imem_be := BE(3 downto 2); -- set be's for 1st cycle |
end if; |
imem_oe := '0'; -- oe=0 |
nstate := s_wrinit; -- next: write init part |
end if; |
end procedure do_dispatch; |
394,7 → 399,7
if unsigned(r.cntdly) /= 0 then |
n.cntdly := slv(unsigned(r.cntdly) - 1); |
end if; |
|
|
case r.state is |
when s_idle => -- s_idle: wait for req |
if REQ = '1' then -- if IO requested |
/trunk/rtl/bplib/basys3/basys3_setup.tcl
1,4 → 1,4
# $ Id: $ |
# $Id: basys3_setup.tcl 699 2015-07-05 21:37:26Z mueller $ |
# |
set rvtb_part "xc7a35tcpg236-1" |
set rvtb_board "basys3" |
/trunk/rtl/bplib/micron/mt45w8mw16b.vhd
1,6 → 1,6
-- $Id: mt45w8mw16b.vhd 649 2015-02-21 21:10:16Z mueller $ |
-- $Id: mt45w8mw16b.vhd 718 2015-12-26 15:59:48Z mueller $ |
-- |
-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- Copyright 2010-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
26,6 → 26,7
-- Tool versions: xst 11.4-14.7; ghdl 0.26-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-12-26 718 1.3.3 BUGFIX: initialize L_ADDR with all '1', see comment |
-- 2011-11-19 427 1.3.2 now numeric_std clean |
-- 2010-06-03 299 1.3.1 improved timing model (WE cycle, robust T_apa) |
-- 2010-06-03 298 1.3 add timing model again |
124,7 → 125,7
signal R_BCR_BW : slbit := '1'; -- bw: def: no wrap |
signal R_BCR_BL : slv3 := "111"; -- bl: def: continuous |
|
signal L_ADDR : slv23 := (others=>'0'); |
signal L_ADDR : slv23 := (others=>'1'); -- all '1' for propper 1st access |
signal DOUT_VAL_EN : slbit := '0'; |
signal DOUT_VAL_AA : slbit := '0'; |
signal DOUT_VAL_PA : slbit := '0'; |
154,8 → 155,16
end if; |
end process proc_adv; |
|
-- Notes: |
-- 1. the row change (t_aa) and column change (t_apa) timing depends on the |
-- recognition of address changes and of page changes. To keep the logic |
-- simple L_ADDR and addr_last are initialized with all '1'. This gives |
-- proper behaviour unless the very first access uses the very last |
-- address. In w11a systems, with use only 4 MB, this can't happen, in |
-- most other use cases this is very unlikely. |
|
proc_dout_val: process (CE, OE, WE, BE_L, BE_U, ADV, L_ADDR) |
variable addr_last : slv23 := (others=>'1'); |
variable addr_last : slv23 := (others=>'1');-- all '1' for propper 1st access |
begin |
if (CE'event and CE='1') or |
(BE_L'event and BE_L='1') or |
/trunk/rtl/bplib/nexys4/nexys4_setup.tcl
1,4 → 1,4
# $ Id: $ |
# $Id: nexys4_setup.tcl 699 2015-07-05 21:37:26Z mueller $ |
# |
set rvtb_part "xc7a100tcsg324-1" |
set rvtb_board "nexys4" |
/trunk/rtl/w11a/pdp11_dpath.vhd
1,6 → 1,6
-- $Id: pdp11_dpath.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_dpath.vhd 702 2015-07-19 17:36:09Z mueller $ |
-- |
-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- Copyright 2006-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
28,6 → 28,7
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-07-19 702 1.2.5 set new DM_STAT_DP fields |
-- 2014-08-10 581 1.2.4 use c_cc_f_* |
-- 2014-07-12 569 1.2.3 use DIV_QUIT and S_DIV_SR for pdp11_munit |
-- 2011-11-18 427 1.2.2 now numeric_std clean |
331,12 → 332,17
|
DM_STAT_DP.pc <= GPR_PC; |
DM_STAT_DP.psw <= PSW; |
DM_STAT_DP.psr_we <= CNTL.psr_we; |
DM_STAT_DP.ireg <= R_IREG; |
DM_STAT_DP.ireg_we <= CNTL.ireg_we; |
DM_STAT_DP.dsrc <= R_DSRC; |
DM_STAT_DP.dsrc_we <= CNTL.dsrc_we; |
DM_STAT_DP.ddst <= R_DDST; |
DM_STAT_DP.ddst_we <= CNTL.ddst_we; |
DM_STAT_DP.dtmp <= R_DTMP; |
DM_STAT_DP.dtmp_we <= CNTL.dtmp_we; |
DM_STAT_DP.dres <= DRES; |
DM_STAT_DP.cpdout_we <= CNTL.cpdout_we; |
DM_STAT_DP.gpr_adst <= CNTL.gpr_adst; |
DM_STAT_DP.gpr_mode <= CNTL.gpr_mode; |
DM_STAT_DP.gpr_bytop <= CNTL.gpr_bytop; |
/trunk/rtl/w11a/pdp11_dmscnt.vbom
0,0 → 1,10
# libs |
../vlib/slvtypes.vhd |
../vlib/memlib/memlib.vhd |
../vlib/rbus/rblib.vhd |
pdp11.vbom |
# components |
[sim]../vlib/memlib/ram_2swsr_rfirst_gen.vbom |
[xst,vsyn]../vlib/memlib/ram_2swsr_rfirst_gen_unisim.vbom |
# design |
pdp11_dmscnt.vhd |
/trunk/rtl/w11a/pdp11_dmcmon.vhd
0,0 → 1,869
-- $Id: pdp11_dmcmon.vhd 709 2015-08-06 18:08:49Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
-- Software Foundation, either version 2, or at your option any later version. |
-- |
-- This program is distributed in the hope that it will be useful, but |
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
-- for complete details. |
-- |
------------------------------------------------------------------------------ |
-- Module Name: pdp11_dmcmon- syn |
-- Description: pdp11: debug&moni: cpu monitor |
-- |
-- Dependencies: memlib/ram_2swsr_rfirst_gen |
-- memlib/ram_1swar_1ar_gen |
-- Test bench: - |
-- |
-- Target Devices: generic |
-- Tool versions: ise 14.7; viv 2014.4; ghdl 0.31 |
-- |
-- Synthesized (xst): |
-- Date Rev ise Target flop lutl lutm slic t peri |
-- 2015-08-02 707 14.7 131013 xc6slx16-2 213 233 16 151 s 5.9 |
-- |
-- Revision History: - |
-- Date Rev Version Comment |
-- 2015-08-03 709 1.0 Initial version |
-- 2015-07-05 697 0.1 First draft |
------------------------------------------------------------------------------ |
-- |
-- rbus registers: |
-- |
-- Addr Bits Name r/w/f Function |
-- 000 cntl r/w/f Control register |
-- 04 mwsup r/w/- mem wait suppress (used when start=1) |
-- 03 imode r/w/- instruction mode (used when start=1) |
-- 02 wena r/w/- wrap enabled (") |
-- 01 stop r/w/f writing 1 stops moni |
-- 00 start r/w/f writing 1 starts moni and clears addr |
-- 001 stat r/-/- Status register |
-- 15:13 bsize r/-/- buffer size (AWIDTH-8) |
-- 12:09 malcnt r/-/- valid entries in memory access log |
-- 00 wrap r/-/- line address wrapped (cleared on go) |
-- 010 addr r/w/- Address register (writable when stopped) |
-- *:04 laddr r/w/- line address |
-- 03:00 waddr r/w/- word address (0000 to 1000) |
-- 011 data r/w/- Data register |
-- 100 iaddr r/-/- Last instruction cmon address |
-- *:04 laddr r/-/- line address |
-- 03:00 r/-/- -always zero- |
-- 101 ipc r/-/- Last instruction pc |
-- 110 ireg r/-/- Last instruction |
-- 111 imal r/-/- Last instruction memory access log |
-- |
-- data format: |
-- word 8 15 : vm.vmcntl.req |
-- if req = 1 |
-- 14 : vm.vmcntl.wacc |
-- 13 : vm.vmcntl.macc |
-- 12 : vm.vmcntl.cacc |
-- 11 : vm.vmcntl.bytop |
-- 10 : vm.vmcntl.dspace |
-- if req = 0 |
-- 14 : vm.vmcntl.ack |
-- 13 : vm.vmcntl.err |
-- if ack = 1 and err = 0 |
-- 12 : vm.vmcntl.trap_ysv |
-- 11 : vm.vmcntl.trap_mmu |
-- 10 : mwdrop (signals memwait suppress when mwsup=1) |
-- if ack = 0 and err = 1 |
-- 12:10 : vm error code (priority encoded, but only one anyone) |
-- 000 err_odd = 1 |
-- 001 err_mmu = 1 |
-- 010 err_nxm = 1 |
-- 011 err_iobto = 1 |
-- 100 err_rsv = 1 |
-- |
-- 09 : se.istart |
-- 08 : se.idone |
-- |
-- if imode = 0 |
-- 07:00 : se.snum |
-- if imode = 1 |
-- 07:00 : cnum |
-- |
-- word 7 15:01 : dp.pc (captured at se.istart) |
-- 00 : idecode (is dp.ireg_we delayed by 1 cycle) |
|
-- word 6 15:00 : dp.ireg |
|
-- word 5 15:14 : dp.psw.cmode |
-- 13:12 : dp.psw.pmode |
-- 11 : dp.psw.rset |
-- if imode = 0 |
-- 10 : dp.dres valid |
-- 09 : dp.ddst_we |
-- 08 : dp.dsrc_we |
-- if imode = 1 |
-- 10 : -- unused -- |
-- 09 : -- unused -- |
-- 08 : se.vfetch |
-- always |
-- 07:05 : dp.psw.pri |
-- 04 : dp.psw.tflag |
-- 03:00 : dp.psw.cc |
|
-- word 4 15:00 : dp.dsrc |
-- word 3 15:00 : dp.ddst |
-- word 2 15:00 : dp.dres (reged) |
-- word 1 15:00 : vm.vmaddr (captured at vm.vmcntl.req) |
-- word 0 15:00 : vm.vmdin or vm.vmdout (captured at req or ack) |
-- |
|
library ieee; |
use ieee.std_logic_1164.all; |
use ieee.numeric_std.all; |
|
use work.slvtypes.all; |
use work.memlib.all; |
use work.rblib.all; |
use work.pdp11.all; |
|
-- ---------------------------------------------------------------------------- |
|
-- Note: AWIDTH has type natural to allow AWIDTH=0 can be used in if generates |
-- to control the instantiation. ghdl checks even for not instantiated |
-- entities the validity of generics, that's why natural needed here .... |
|
entity pdp11_dmcmon is -- debug&moni: cpu monitor |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0048#,16)); |
AWIDTH : natural := 8); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : in dm_stat_co_type -- debug and monitor status - core |
); |
end pdp11_dmcmon; |
|
|
architecture syn of pdp11_dmcmon is |
|
constant rbaddr_cntl : slv3 := "000"; -- cntl address offset |
constant rbaddr_stat : slv3 := "001"; -- stat address offset |
constant rbaddr_addr : slv3 := "010"; -- addr address offset |
constant rbaddr_data : slv3 := "011"; -- data address offset |
constant rbaddr_iaddr : slv3 := "100"; -- iaddr address offset |
constant rbaddr_ipc : slv3 := "101"; -- ipc address offset |
constant rbaddr_ireg : slv3 := "110"; -- ireg address offset |
constant rbaddr_imal : slv3 := "111"; -- imal address offset |
|
constant cntl_rbf_mwsup : integer := 4; |
constant cntl_rbf_imode : integer := 3; |
constant cntl_rbf_wena : integer := 2; |
constant cntl_rbf_stop : integer := 1; |
constant cntl_rbf_start : integer := 0; |
subtype stat_rbf_bsize is integer range 15 downto 13; |
subtype stat_rbf_malcnt is integer range 12 downto 09; |
constant stat_rbf_wrap : integer := 0; |
subtype addr_rbf_laddr is integer range 4+AWIDTH-1 downto 4; |
subtype addr_rbf_waddr is integer range 3 downto 0; |
|
subtype bram_mf_port11 is integer range 143 downto 108; |
subtype bram_mf_port10 is integer range 107 downto 72; |
subtype bram_mf_port01 is integer range 71 downto 36; |
subtype bram_mf_port00 is integer range 35 downto 0; |
|
subtype bram_df_word8 is integer range 143 downto 128; |
subtype bram_df_word7 is integer range 127 downto 112; |
subtype bram_df_word6 is integer range 111 downto 96; |
subtype bram_df_word5 is integer range 95 downto 80; |
subtype bram_df_word4 is integer range 79 downto 64; |
subtype bram_df_word3 is integer range 63 downto 48; |
subtype bram_df_word2 is integer range 47 downto 32; |
subtype bram_df_word1 is integer range 31 downto 16; |
subtype bram_df_word0 is integer range 15 downto 0; |
|
constant dat8_ibf_req : integer := 15; |
constant dat8_ibf_wacc : integer := 14; -- if req=1 |
constant dat8_ibf_macc : integer := 13; -- " |
constant dat8_ibf_cacc : integer := 12; -- " |
constant dat8_ibf_bytop : integer := 11; -- " |
constant dat8_ibf_dspace : integer := 10; -- " |
constant dat8_ibf_ack : integer := 14; -- if req=0 |
constant dat8_ibf_err : integer := 13; -- " |
constant dat8_ibf_trap_ysv : integer := 12; -- if req=0 ack=1 err=0 |
constant dat8_ibf_trap_mmu : integer := 11; -- " |
constant dat8_ibf_mwdrop : integer := 10; -- " |
subtype dat8_ibf_vmerr is integer range 12 downto 10;-- if req=0 ack=0 err=1 |
constant dat8_ibf_istart : integer := 9; -- always |
constant dat8_ibf_idone : integer := 8; -- " |
|
constant vmerr_odd : slv3 := "001"; -- vm error code: err_odd |
constant vmerr_mmu : slv3 := "010"; -- vm error code: err_mmu |
constant vmerr_nxm : slv3 := "011"; -- vm error code: err_nxm |
constant vmerr_iobto : slv3 := "100"; -- vm error code: err_iobto |
constant vmerr_rsv : slv3 := "101"; -- vm error code: err_rsv |
|
subtype dat8_ibf_snum is integer range 7 downto 0; |
|
subtype dat8_ibf_cnum is integer range 7 downto 0; |
|
subtype dat7_ibf_pc is integer range 15 downto 1; |
constant dat7_ibf_idecode : integer := 0; |
|
subtype dat5_ibf_cmode is integer range 15 downto 14; |
subtype dat5_ibf_pmode is integer range 13 downto 12; |
constant dat5_ibf_rset : integer := 11; |
|
constant dat5_ibf_dres_val : integer := 10; -- if imode=0 |
constant dat5_ibf_ddst_we : integer := 9; |
constant dat5_ibf_dsrc_we : integer := 8; |
|
constant dat5_ibf_vfetch : integer := 8; -- if imode=1 |
|
subtype dat5_ibf_pri is integer range 7 downto 5; |
constant dat5_ibf_tflag : integer := 4; |
subtype dat5_ibf_cc is integer range 3 downto 0; |
|
constant laddrzero : slv(AWIDTH-1 downto 0) := (others=>'0'); |
constant laddrlast : slv(AWIDTH-1 downto 0) := (others=>'1'); |
|
type regs_type is record |
rbsel : slbit; -- rbus select |
mwsup : slbit; -- mwsup flag (mem wait suppress) |
imode : slbit; -- imode flag |
wena : slbit; -- wena flag (wrap enable) |
go : slbit; -- go flag |
active : slbit; -- active flag |
wrap : slbit; -- laddr wrap flag |
laddr : slv(AWIDTH-1 downto 0); -- line address |
waddr : slv4; -- word address |
cnum : slv8; -- clk counter |
mal_waddr : slv4; -- mem acc log: write address |
mal_raddr : slv4; -- mem acc log: read address |
dp_pc_fet : slv16_1; -- dp.pc_fet (capture on se.istart) |
dp_pc_dec : slv16_1; -- dp.pc_dec (capture on dp.ireg_we + 1) |
dp_ireg : slv16; -- dp.ireg |
dp_ireg_we : slbit; -- dp.ireg_we |
dp_ireg_we_1 : slbit; -- dp.ireg_we last cycle |
dp_dres : slv16; -- dp.dres |
dp_dsrc_we : slbit; -- dp.dsrc_we |
dp_ddst_we : slbit; -- dp.ddst_we |
dp_dres_val : slbit; -- dp.dres valid |
vm_addr : slv16; -- vm.vmaddr |
vm_din : slv16; -- vm.vmdin |
vm_dout : slv16; -- vm.vmdout |
vm_req : slbit; -- vm.vmcntl.req |
vm_wacc : slbit; -- vm.vmcntl.wacc |
vm_macc : slbit; -- vm.vmcntl.macc |
vm_cacc : slbit; -- vm.vmcntl.cacc |
vm_bytop : slbit; -- vm.vmcntl.bytop |
vm_dspace : slbit; -- vm.vmcntl.dspace |
vm_addr_1 : slv16; -- vm.vmaddr last request |
vm_dout_1 : slv16; -- vm.vmdout last request |
vm_wacc_1 : slbit; -- vm.vmcntl.wacc last request |
vm_macc_1 : slbit; -- vm.vmcntl.macc last request |
vm_cacc_1 : slbit; -- vm.vmcntl.cacc last request |
vm_bytop_1 : slbit; -- vm.vmcntl.bytop last request |
vm_dspace_1 : slbit; -- vm.vmcntl.dspace last request |
vm_ack : slbit; -- vm.vmstat.ack |
vm_err : slbit; -- vm.vmstat.err |
vm_err_odd : slbit; -- vm.vmstat.err_odd |
vm_err_mmu : slbit; -- vm.vmstat.err_mmu |
vm_err_nxm : slbit; -- vm.vmstat.err_nxm |
vm_err_iobto : slbit; -- vm.vmstat.err_iobto |
vm_err_rsv : slbit; -- vm.vmstat.err_rsv |
vm_trap_ysv : slbit; -- vm.vmstat.trap_ysv |
vm_trap_mmu : slbit; -- vm.vmstat.trap_mmu |
vm_pend : slbit; -- vm req pending |
se_istart : slbit; -- se.istart |
se_istart_1 : slbit; -- se.istart last cycle |
se_idone : slbit; -- se.idone |
se_vfetch : slbit; -- se.vfetch |
se_snum : slv8; -- se.snum |
mwdrop : slbit; -- mem wait drop flag |
end record regs_type; |
constant regs_init : regs_type := ( |
'0', -- rbsel |
'0','1', -- mwsup,imode |
'1','1','0', -- wena,go,active |
'0', -- wrap |
laddrzero, -- laddr |
"0000", -- waddr |
(others=>'0'), -- cnum |
(others=>'0'), -- macwaddr |
(others=>'0'), -- macraddr |
(others=>'0'), -- dp_pc_fet |
(others=>'0'), -- dp_pc_dec |
(others=>'0'), -- dp_ireq |
'0','0', -- dp_ireq_we,dp_ireq_we_1 |
(others=>'0'), -- dp_dres |
'0','0','0', -- dp_dsrc_we,dp_ddst_we,dp_dres_val |
(others=>'0'), -- vm_addr |
(others=>'0'), -- vm_din |
(others=>'0'), -- vm_dout |
'0','0','0','0','0','0', -- vm_req,..,vm_dspace |
(others=>'0'), -- vm_addr_1 |
(others=>'0'), -- vm_dout_1 |
'0','0','0','0','0', -- vm_wacc_1,..,vm_dspace_1 |
'0','0', -- vm_ack,vm_err |
'0','0','0','0','0', -- vm_err_* |
'0','0', -- vm_trap_* |
'0', -- vm_pend |
'0','0','0','0', -- se_istart(_1),se_idone,se_vfetch |
(others=>'0'), -- se_snum |
'0' -- mwdrop |
); |
|
signal R_REGS : regs_type := regs_init; -- state registers |
signal N_REGS : regs_type := regs_init; -- next value state regs |
|
signal BRAM_EN : slbit := '0'; |
signal BRAM_WE : slbit := '0'; |
signal BRAM_ADDRA : slv(AWIDTH downto 0) := (others=>'0'); |
signal BRAM_ADDRB : slv(AWIDTH downto 0) := (others=>'0'); |
signal BRAM_DI : slv(143 downto 0) := (others=>'0'); |
signal BRAM_DO : slv(143 downto 0) := (others=>'0'); |
|
signal MAL_WE : slbit := '0'; |
signal MAL_DI : slv16 := (others=>'0'); |
signal MAL_DO : slv16 := (others=>'0'); |
|
begin |
|
assert AWIDTH>=8 and AWIDTH<=11 |
report "assert(AWIDTH>=8 and AWIDTH<=11): unsupported AWIDTH" |
severity failure; |
|
BRAM0 : ram_2swsr_rfirst_gen |
generic map ( |
AWIDTH => AWIDTH+1, |
DWIDTH => 36) |
port map ( |
CLKA => CLK, |
CLKB => CLK, |
ENA => BRAM_EN, |
ENB => BRAM_EN, |
WEA => BRAM_WE, |
WEB => BRAM_WE, |
ADDRA => BRAM_ADDRA, |
ADDRB => BRAM_ADDRB, |
DIA => BRAM_DI(bram_mf_port00), |
DIB => BRAM_DI(bram_mf_port01), |
DOA => BRAM_DO(bram_mf_port00), |
DOB => BRAM_DO(bram_mf_port01) |
); |
|
BRAM1 : ram_2swsr_rfirst_gen |
generic map ( |
AWIDTH => AWIDTH+1, |
DWIDTH => 36) |
port map ( |
CLKA => CLK, |
CLKB => CLK, |
ENA => BRAM_EN, |
ENB => BRAM_EN, |
WEA => BRAM_WE, |
WEB => BRAM_WE, |
ADDRA => BRAM_ADDRA, |
ADDRB => BRAM_ADDRB, |
DIA => BRAM_DI(bram_mf_port10), |
DIB => BRAM_DI(bram_mf_port11), |
DOA => BRAM_DO(bram_mf_port10), |
DOB => BRAM_DO(bram_mf_port11) |
); |
|
MAL : ram_1swar_1ar_gen |
generic map ( |
AWIDTH => 4, |
DWIDTH => 16) |
port map ( |
CLK => CLK, |
WE => MAL_WE, |
ADDRA => R_REGS.mal_waddr, |
ADDRB => R_REGS.mal_raddr, |
DI => MAL_DI, |
DOA => open, |
DOB => MAL_DO); |
|
proc_regs: process (CLK) |
begin |
|
if rising_edge(CLK) then |
if RESET = '1' then |
R_REGS <= regs_init; |
else |
R_REGS <= N_REGS; |
end if; |
end if; |
|
end process proc_regs; |
|
proc_next: process (R_REGS, RB_MREQ, DM_STAT_SE, |
DM_STAT_DP, DM_STAT_DP.psw, -- xst needs sub-records |
DM_STAT_VM, DM_STAT_VM.vmcntl, DM_STAT_VM.vmstat, |
DM_STAT_CO, BRAM_DO, MAL_DO) |
|
variable r : regs_type := regs_init; |
variable n : regs_type := regs_init; |
variable irb_ack : slbit := '0'; |
variable irb_err : slbit := '0'; -- FIXME: needed ?? |
variable irb_busy : slbit := '0'; -- FIXME: needed ?? |
variable irb_dout : slv16 := (others=>'0'); |
variable irbena : slbit := '0'; |
variable ibramen : slbit := '0'; -- BRAM enable |
variable ibramwe : slbit := '0'; -- BRAN we |
variable igoeff : slbit := '0'; |
variable iactive : slbit := '0'; |
variable itake : slbit := '0'; |
variable laddr_inc : slbit := '0'; |
variable idat : slv(143 downto 0) := (others=>'0'); |
variable idat8 : slv16 := (others=>'0'); |
variable idat7 : slv16 := (others=>'0'); |
variable idat5 : slv16 := (others=>'0'); |
variable ivmerr : slv3 := (others=>'0'); |
|
variable imal_we : slbit := '0'; |
variable imal_re : slbit := '0'; |
variable imal_di : slv16 := (others=>'0'); |
variable imal_waddr_clr : slbit := '0'; |
variable imal_raddr_clr : slbit := '0'; |
|
begin |
|
r := R_REGS; |
n := R_REGS; |
|
irb_ack := '0'; |
irb_err := '0'; |
irb_busy := '0'; |
irb_dout := (others=>'0'); |
irbena := RB_MREQ.re or RB_MREQ.we; |
|
ibramen := '0'; |
ibramwe := '0'; |
|
igoeff := '0'; |
iactive := '0'; |
itake := '0'; |
|
laddr_inc := '0'; |
|
imal_we := '0'; |
imal_re := '0'; |
imal_di := r.vm_addr; |
imal_waddr_clr := '0'; |
imal_raddr_clr := '0'; |
|
-- rbus address decoder |
n.rbsel := '0'; |
if RB_MREQ.aval='1' and RB_MREQ.addr(12 downto 3)=RB_ADDR(12 downto 3) then |
n.rbsel := '1'; |
ibramen := '1'; -- ensure bram read before rbus read |
end if; |
|
-- rbus transactions |
if r.rbsel = '1' then |
irb_ack := irbena; -- ack all accesses |
case RB_MREQ.addr(2 downto 0) is |
when rbaddr_cntl => -- cntl ------------------ |
if RB_MREQ.we = '1' then |
if RB_MREQ.din(cntl_rbf_start) = '1' then |
n.mwsup := RB_MREQ.din(cntl_rbf_mwsup); |
n.imode := RB_MREQ.din(cntl_rbf_imode); |
n.wena := RB_MREQ.din(cntl_rbf_wena); |
n.go := '1'; |
n.wrap := '0'; |
n.laddr := laddrzero; |
n.waddr := "0000"; |
end if; |
if RB_MREQ.din(cntl_rbf_stop) = '1' then |
n.go := '0'; |
end if; |
end if; |
|
when rbaddr_stat => -- stat ------------------ |
irb_err := RB_MREQ.we; |
|
when rbaddr_addr => -- addr ------------------ |
if RB_MREQ.we = '1' then |
if r.go='0' then |
n.laddr := RB_MREQ.din(addr_rbf_laddr); |
n.waddr := RB_MREQ.din(addr_rbf_waddr); |
else |
irb_err := '1'; -- error |
end if; |
end if; |
|
when rbaddr_data => -- data ------------------ |
if r.go='1' or RB_MREQ.we='1' then |
irb_err := '1'; -- error |
elsif RB_MREQ.re = '1' then |
if r.waddr(3) = '1' then -- equivalent waddr>=1000 |
n.waddr := (others=>'0'); |
laddr_inc := '1'; |
else |
n.waddr := slv(unsigned(r.waddr) + 1); |
end if; |
end if; |
|
when rbaddr_iaddr => -- iaddr ----------------- |
irb_err := RB_MREQ.we; |
|
when rbaddr_ipc => -- ipc ------------------- |
irb_err := RB_MREQ.we; |
|
when rbaddr_ireg => -- ireg ------------------ |
irb_err := RB_MREQ.we; |
|
when rbaddr_imal => -- imal ------------------ |
irb_err := RB_MREQ.we; |
imal_re := RB_MREQ.re; |
|
when others => null; -- <> -------------------- |
end case; |
end if; |
|
-- rbus output driver |
if r.rbsel = '1' then |
case RB_MREQ.addr(2 downto 0) is |
|
when rbaddr_cntl => -- cntl ------------------ |
irb_dout(cntl_rbf_mwsup) := r.mwsup; |
irb_dout(cntl_rbf_imode) := r.imode; |
irb_dout(cntl_rbf_wena) := r.wena; |
irb_dout(cntl_rbf_start) := r.go; |
|
when rbaddr_stat => -- stat ------------------ |
irb_dout(stat_rbf_bsize) := slv(to_unsigned(AWIDTH-8,3)); |
irb_dout(stat_rbf_malcnt) := r.mal_waddr; |
irb_dout(stat_rbf_wrap) := r.wrap; |
|
when rbaddr_addr => -- addr ------------------ |
irb_dout(addr_rbf_laddr) := r.laddr; |
irb_dout(addr_rbf_waddr) := r.waddr; |
|
when rbaddr_data => -- data ------------------ |
case r.waddr is |
when "1000" => irb_dout := BRAM_DO(bram_df_word8); |
when "0111" => irb_dout := BRAM_DO(bram_df_word7); |
when "0110" => irb_dout := BRAM_DO(bram_df_word6); |
when "0101" => irb_dout := BRAM_DO(bram_df_word5); |
when "0100" => irb_dout := BRAM_DO(bram_df_word4); |
when "0011" => irb_dout := BRAM_DO(bram_df_word3); |
when "0010" => irb_dout := BRAM_DO(bram_df_word2); |
when "0001" => irb_dout := BRAM_DO(bram_df_word1); |
when "0000" => irb_dout := BRAM_DO(bram_df_word0); |
when others => irb_dout := (others=>'0'); |
end case; |
|
when rbaddr_iaddr => -- iaddr ----------------- |
null; -- FIXME_code: implement |
|
when rbaddr_ipc => -- ipc ------------------- |
irb_dout(r.dp_pc_dec'range) := r.dp_pc_dec; |
n.mal_raddr := (others=>'0'); |
|
when rbaddr_ireg => -- ireg ------------------ |
irb_dout := r.dp_ireg; |
|
when rbaddr_imal => -- imal ------------------ |
irb_dout := MAL_DO; |
|
when others => null; |
end case; |
end if; |
|
-- cpu monitor |
|
-- capture CPU state signals which are combinatorial logic |
if DM_STAT_SE.istart = '1' then |
n.dp_pc_fet := DM_STAT_DP.pc(15 downto 1); |
end if; |
n.dp_ireg := DM_STAT_DP.ireg; |
n.dp_ireg_we := DM_STAT_DP.ireg_we; |
n.dp_ireg_we_1 := r.dp_ireg_we; |
if r.dp_ireg_we = '1' then -- dp_pc_dec update when dp_ireg changes |
n.dp_pc_dec := r.dp_pc_fet; |
end if; |
|
n.dp_dsrc_we := DM_STAT_DP.dsrc_we; |
n.dp_ddst_we := DM_STAT_DP.ddst_we; |
n.dp_dres_val := '0'; |
if ((DM_STAT_DP.gpr_we or DM_STAT_DP.psr_we or -- capture dres only when |
DM_STAT_DP.dsrc_we or DM_STAT_DP.ddst_we or -- actually used |
DM_STAT_DP.dtmp_we or DM_STAT_DP.cpdout_we or |
DM_STAT_VM.vmcntl.req) = '1') then |
n.dp_dres := DM_STAT_DP.dres; |
n.dp_dres_val := '1'; |
end if; |
|
n.vm_req := DM_STAT_VM.vmcntl.req; |
-- capture vm request data when vm_req asserted, need them in later cycles |
-- don't update vmaddr for write part of rmw sequence |
-- no valid address vmaddr given, address is kept in vmbox |
if DM_STAT_VM.vmcntl.req = '1' then |
n.vm_wacc_1 := r.vm_wacc; |
n.vm_macc_1 := r.vm_macc; |
n.vm_cacc_1 := r.vm_cacc; |
n.vm_bytop_1 := r.vm_bytop; |
n.vm_dspace_1 := r.vm_dspace; |
n.vm_wacc := DM_STAT_VM.vmcntl.wacc; |
n.vm_macc := DM_STAT_VM.vmcntl.macc; |
n.vm_cacc := DM_STAT_VM.vmcntl.cacc; |
n.vm_bytop := DM_STAT_VM.vmcntl.bytop; |
n.vm_dspace := DM_STAT_VM.vmcntl.dspace; |
if (DM_STAT_VM.vmcntl.macc and DM_STAT_VM.vmcntl.wacc) = '0' then |
n.vm_addr_1 := r.vm_addr; |
n.vm_addr := DM_STAT_VM.vmaddr; |
end if; |
n.vm_din := DM_STAT_VM.vmdin; |
end if; |
n.vm_ack := DM_STAT_VM.vmstat.ack; |
n.vm_err := DM_STAT_VM.vmstat.err; |
if DM_STAT_VM.vmstat.ack = '1' then |
n.vm_dout_1 := r.vm_dout; |
n.vm_dout := DM_STAT_VM.vmdout; |
n.vm_trap_ysv := DM_STAT_VM.vmstat.trap_ysv; |
n.vm_trap_mmu := DM_STAT_VM.vmstat.trap_mmu; |
end if; |
if DM_STAT_VM.vmstat.err = '1' then |
n.vm_err_odd := DM_STAT_VM.vmstat.err_odd; |
n.vm_err_mmu := DM_STAT_VM.vmstat.err_mmu; |
n.vm_err_nxm := DM_STAT_VM.vmstat.err_nxm; |
n.vm_err_iobto := DM_STAT_VM.vmstat.err_iobto; |
n.vm_err_rsv := DM_STAT_VM.vmstat.err_rsv; |
end if; |
|
n.se_istart_1 := r.se_istart; |
n.se_istart := DM_STAT_SE.istart; |
n.se_idone := DM_STAT_SE.idone; |
n.se_vfetch := DM_STAT_SE.vfetch; |
n.se_snum := DM_STAT_SE.snum; |
|
-- active state logic |
igoeff := '0'; |
if r.go = '1' then |
if DM_STAT_CO.cpugo='1' and DM_STAT_CO.cpususp='0' then |
igoeff := '1'; |
end if; |
if DM_STAT_CO.cpustep = '1' then |
igoeff := '1'; |
end if; |
end if; |
|
iactive := r.active; |
if unsigned(r.se_snum) = 0 then -- in idle state |
if igoeff = '0' then -- if goeff=0 stop running |
n.active := '0'; |
end if; |
else -- in non-idle state |
if igoeff = '1' then -- if goerr=1 start running |
iactive := '1'; |
n.active := '1'; |
end if; |
end if; |
|
if r.vm_req = '1' then |
n.mwdrop := '0'; |
n.vm_pend := '1'; |
elsif (r.vm_ack or r.vm_err) = '1' then |
n.vm_pend := '0'; |
end if; |
|
itake := '0'; |
if r.imode = '0' then -- imode=0 |
itake := '1'; -- take all |
if r.mwsup = '1' then -- if mem wait suppress |
if (r.vm_pend and not (r.vm_ack or r.vm_err)) = '1' then |
itake := '0'; |
n.mwdrop := '1'; |
end if; |
end if; |
else -- imode=1 |
itake := r.se_idone or r.se_vfetch or r.vm_err; |
end if; |
|
if iactive='1' and itake='1' then -- active and enabled |
ibramen := '1'; |
ibramwe := '1'; |
laddr_inc := '1'; |
end if; |
|
if laddr_inc = '1' then |
n.laddr := slv(unsigned(r.laddr) + 1); |
if r.go='1' and r.laddr=laddrlast then |
if r.wena = '1' then |
n.wrap := '1'; |
else |
n.go := '0'; |
end if; |
end if; |
end if; |
|
-- last but not least: the clock cycle counter |
n.cnum := slv(unsigned(r.cnum) + 1); |
|
-- now build memory data word |
idat := (others=>'0'); |
|
-- encode vm errors |
ivmerr := (others=>'0'); |
if r.vm_err_odd = '1' then |
ivmerr := vmerr_odd; |
elsif r.vm_err_mmu = '1' then |
ivmerr := vmerr_mmu; |
elsif r.vm_err_nxm = '1' then |
ivmerr := vmerr_nxm; |
elsif r.vm_err_iobto = '1' then |
ivmerr := vmerr_iobto; |
elsif r.vm_err_rsv = '1' then |
ivmerr := vmerr_rsv; |
end if; |
|
-- Note for imode=1 |
-- Write vm request data unless there is an error. |
-- If in current or last cycle a ifetch (istart=1) was done use |
-- attributes of previous request. If last cycle was an ifetch |
-- and vm_ack set use also previous data. That ensures that the |
-- values of current instruction are shown, and not of pre-fetch |
|
-- build word8 |
idat8 := (others=>'0'); |
if r.vm_req = '1' or (r.imode='1' and r.vm_err='0') then |
idat8(dat8_ibf_req) := '1'; |
if r.imode = '1' and (r.se_istart='1' or r.se_istart_1='1') then |
idat8(dat8_ibf_wacc) := R_REGS.vm_wacc_1; |
idat8(dat8_ibf_macc) := R_REGS.vm_macc_1; |
idat8(dat8_ibf_cacc) := R_REGS.vm_cacc_1; |
idat8(dat8_ibf_bytop) := R_REGS.vm_bytop_1; |
idat8(dat8_ibf_dspace) := R_REGS.vm_dspace_1; |
else |
idat8(dat8_ibf_wacc) := R_REGS.vm_wacc; |
idat8(dat8_ibf_macc) := R_REGS.vm_macc; |
idat8(dat8_ibf_cacc) := R_REGS.vm_cacc; |
idat8(dat8_ibf_bytop) := R_REGS.vm_bytop; |
idat8(dat8_ibf_dspace) := R_REGS.vm_dspace; |
end if; |
else |
idat8(dat8_ibf_ack) := R_REGS.vm_ack; |
idat8(dat8_ibf_err) := R_REGS.vm_err; |
if r.vm_ack = '1' then |
idat8(dat8_ibf_trap_ysv) := R_REGS.vm_trap_ysv; |
idat8(dat8_ibf_trap_mmu) := R_REGS.vm_trap_mmu; |
idat8(dat8_ibf_mwdrop) := R_REGS.mwdrop; |
elsif r.vm_err = '1' then |
idat8(dat8_ibf_vmerr) := ivmerr; |
end if; |
end if; |
idat8(dat8_ibf_istart) := R_REGS.se_istart; |
idat8(dat8_ibf_idone) := R_REGS.se_idone; |
|
if r.imode = '0' then |
idat8(dat8_ibf_snum) := R_REGS.se_snum; |
else |
idat8(dat8_ibf_cnum) := R_REGS.cnum; |
end if; |
idat(bram_df_word8) := idat8; |
|
-- build word7 |
idat7 := (others=>'0'); |
idat7(dat7_ibf_pc) := R_REGS.dp_pc_dec; |
idat7(dat7_ibf_idecode):= R_REGS.dp_ireg_we_1; |
idat(bram_df_word7) := idat7; |
|
-- build word6 |
idat(bram_df_word6) := R_REGS.dp_ireg; |
|
-- build word5 |
idat5 := (others=>'0'); |
idat5(dat5_ibf_cmode) := DM_STAT_DP.psw.cmode; |
idat5(dat5_ibf_pmode) := DM_STAT_DP.psw.pmode; |
idat5(dat5_ibf_rset) := DM_STAT_DP.psw.rset; |
if r.imode = '0' then |
idat5(dat5_ibf_dres_val) := R_REGS.dp_dres_val; |
idat5(dat5_ibf_ddst_we) := R_REGS.dp_ddst_we; |
idat5(dat5_ibf_dsrc_we) := R_REGS.dp_dsrc_we; |
else |
idat5(dat5_ibf_vfetch) := R_REGS.se_vfetch; |
end if; |
idat5(dat5_ibf_pri) := DM_STAT_DP.psw.pri; |
idat5(dat5_ibf_tflag) := DM_STAT_DP.psw.tflag; |
idat5(dat5_ibf_cc) := DM_STAT_DP.psw.cc; |
idat(bram_df_word5) := idat5; |
|
-- build word4 to word2 |
idat(bram_df_word4) := DM_STAT_DP.dsrc; |
idat(bram_df_word3) := DM_STAT_DP.ddst; |
idat(bram_df_word2) := R_REGS.dp_dres; |
|
-- build word1 |
if r.imode = '1' and (r.se_istart='1' or r.se_istart_1='1') then |
idat(bram_df_word1) := R_REGS.vm_addr_1; |
else |
idat(bram_df_word1) := R_REGS.vm_addr; |
end if; |
|
-- build word0 |
if r.vm_wacc = '1' then |
idat(bram_df_word0) := R_REGS.vm_din; |
else |
if r.imode = '1' and r.se_istart_1 = '1' and r.vm_ack = '1' then |
idat(bram_df_word0) := R_REGS.vm_dout_1; |
else |
idat(bram_df_word0) := R_REGS.vm_dout; |
end if; |
end if; |
|
-- finally memory access log buffer logic |
if r.vm_cacc = '0' then |
if r.vm_req = '1' then |
imal_we := '1'; |
imal_di := r.vm_addr; |
elsif r.vm_ack='1' then |
imal_we := '1'; |
if r.vm_wacc='1' then |
imal_di := r.vm_din; |
else |
imal_di := r.vm_dout; |
end if; |
if r.vm_bytop = '1' then -- for byte read/write data |
imal_di(15 downto 8) := (others=>'0'); -- zero msb (is undefined) |
end if; |
end if; |
end if; |
|
imal_waddr_clr := r.dp_ireg_we; -- FIXME: very preliminary !!! |
|
if imal_waddr_clr = '1' then |
n.mal_waddr := (others=>'0'); |
elsif imal_we = '1' then |
n.mal_waddr := slv(unsigned(r.mal_waddr) + 1); |
end if; |
|
if imal_raddr_clr = '1' then |
n.mal_raddr := (others=>'0'); |
elsif imal_re = '1' then |
n.mal_raddr := slv(unsigned(r.mal_raddr) + 1); |
end if; |
|
N_REGS <= n; |
|
BRAM_EN <= ibramen; |
BRAM_WE <= ibramwe; |
BRAM_ADDRA <= '0' & R_REGS.laddr; |
BRAM_ADDRB <= '1' & R_REGS.laddr; |
BRAM_DI <= idat; |
|
MAL_WE <= imal_we; |
MAL_DI <= imal_di; |
|
RB_SRES.ack <= irb_ack; |
RB_SRES.err <= irb_err; |
RB_SRES.busy <= irb_busy; |
RB_SRES.dout <= irb_dout; |
|
end process proc_next; |
|
end syn; |
/trunk/rtl/w11a/pdp11_core_rbus.vhd
1,4 → 1,4
-- $Id: pdp11_core_rbus.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_core_rbus.vhd 700 2015-07-12 19:28:31Z mueller $ |
-- |
-- Copyright 2007-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
27,6 → 27,7
-- |
-- Revision History: - |
-- Date Rev Version Comment |
-- 2015-07-10 700 1.5.1 add cpuact logic, redefine lam as cpuact 1->0 |
-- 2015-05-09 677 1.5 start/stop/suspend overhaul; reset overhaul |
-- 2014-12-26 621 1.4 use full size 4k word ibus window |
-- 2014-12-21 617 1.3.1 use separate RB_STAT bits for cmderr and cmdmerr |
127,7 → 128,7
architecture syn of pdp11_core_rbus is |
|
type state_type is ( |
s_idle, -- s_idle: wait for rp access |
s_idle, -- s_idle: wait for rbus access |
s_cpwait, -- s_cpwait: wait for cp port ack |
s_cpstep -- s_cpstep: wait for cpustep done |
); |
139,7 → 140,7
rbinit : slbit; -- rbus init seen (1 cycle pulse) |
cpreq : slbit; -- cp request flag |
cpfunc : slv5; -- cp function |
cpugo_1 : slbit; -- prev cycle cpugo |
cpuact_1 : slbit; -- prev cycle cpuact |
addr : slv22_1; -- address register |
ena_22bit : slbit; -- 22bit enable |
ena_ubmap : slbit; -- ubmap enable |
155,7 → 156,7
'0', -- rbinit |
'0', -- cpreq |
(others=>'0'), -- cpfunc |
'0', -- cpugo_1 |
'0', -- cpuact_1 |
(others=>'0'), -- addr |
'0','0', -- ena_22bit, ena_ubmap |
"11",'0', -- membe,membestick |
192,6 → 193,7
variable irb_lam : slbit := '0'; |
variable irbena : slbit := '0'; |
|
variable icpuact : slbit := '0'; |
variable icpreq : slbit := '0'; |
variable icpaddr : cp_addr_type := cp_addr_init; |
|
407,8 → 409,9
icpaddr.ena_ubmap := '0'; |
end if; |
|
n.cpugo_1 := CP_STAT.cpugo; -- delay cpugo |
if CP_STAT.cpugo='0' and r.cpugo_1='1' then -- cpugo 1 -> 0 transition ? |
icpuact := CP_STAT.cpugo and not CP_STAT.suspint; |
n.cpuact_1 := icpuact; -- delay cpuact |
if (r.cpuact_1='1' and icpuact='0') then -- cpuact 1 -> 0 |
irb_lam := '1'; |
end if; |
|
/trunk/rtl/w11a/pdp11_vmbox.vhd
1,4 → 1,4
-- $Id: pdp11_vmbox.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_vmbox.vhd 697 2015-07-05 14:23:26Z mueller $ |
-- |
-- Copyright 2006-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
27,6 → 27,7
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-07-03 697 1.6.5 much wider DM_STAT_VM |
-- 2015-04-04 662 1.6.4 atowidth now 6 (was 5) to support ibdr_rprm reset |
-- 2011-11-18 427 1.6.3 now numeric_std clean |
-- 2010-10-23 335 1.6.2 add r.paddr_iopage, use ib_sel |
167,9 → 168,14
signal UBMAP_MREQ : slbit := '0'; |
signal UBMAP_ADDR_PM : slv22_1 := (others=>'0'); |
|
signal VM_STAT_L : vm_stat_type := vm_stat_init; -- vm status (local) |
signal VM_DOUT_L : slv16 := (others=>'0'); -- vm data out (local) |
|
signal IB_MREQ : ib_mreq_type := ib_mreq_init; -- ibus request (local) |
signal IB_SRES : ib_sres_type := ib_sres_init; -- ibus response (local) |
signal IB_SRES_INT : ib_sres_type := ib_sres_init; -- ibus response (cpu) |
|
signal EM_MREQ_L : em_mreq_type := em_mreq_init; -- ext mem: request (local) |
|
begin |
|
668,17 → 674,27
IB_MREQ.addr <= r.paddr(12 downto 1); |
IB_MREQ.din <= r.mdin; |
|
VM_DOUT <= ivm_dout; |
VM_STAT <= ivm_stat; |
MMU_CNTL <= immu_cntl; |
VM_STAT_L <= ivm_stat; |
VM_DOUT_L <= ivm_dout; |
MMU_CNTL <= immu_cntl; |
|
EM_MREQ <= iem_mreq; |
|
EM_MREQ_L <= iem_mreq; |
|
end process proc_next; |
|
VM_STAT <= VM_STAT_L; |
VM_DOUT <= VM_DOUT_L; |
IB_MREQ_M <= IB_MREQ; -- external drive master port |
|
EM_MREQ <= EM_MREQ_L; |
|
DM_STAT_VM.vmcntl <= VM_CNTL; |
DM_STAT_VM.vmaddr <= VM_ADDR; |
DM_STAT_VM.vmdin <= VM_DIN; |
DM_STAT_VM.vmstat <= VM_STAT_L; |
DM_STAT_VM.vmdout <= VM_DOUT_L; |
DM_STAT_VM.ibmreq <= IB_MREQ; |
DM_STAT_VM.ibsres <= IB_SRES; |
DM_STAT_VM.emmreq <= EM_MREQ_L; |
DM_STAT_VM.emsres <= EM_SRES; |
|
end syn; |
/trunk/rtl/w11a/pdp11_dmhbpt_unit.vbom
0,0 → 1,7
# libs |
../vlib/slvtypes.vhd |
../vlib/rbus/rblib.vhd |
pdp11.vbom |
# components |
# design |
pdp11_dmhbpt_unit.vhd |
/trunk/rtl/w11a/pdp11_dmhbpt.vbom
0,0 → 1,9
# libs |
../vlib/slvtypes.vhd |
../vlib/rbus/rblib.vhd |
pdp11.vbom |
# components |
pdp11_dmhbpt_unit.vbom |
../vlib/rbus/rb_sres_or_4.vbom |
# design |
pdp11_dmhbpt.vhd |
/trunk/rtl/w11a/pdp11_sys70.vbom
11,6 → 11,10
pdp11_mem70.vbom |
../ibus/ibd_ibmon.vbom |
../ibus/ib_sres_or_3.vbom |
pdp11_dmscnt.vbom |
pdp11_dmcmon.vbom |
pdp11_dmhbpt.vbom |
../vlib/rbus/rb_sres_or_4.vbom |
[sim]pdp11_tmu_sb.vbom |
# design |
pdp11_sys70.vhd |
/trunk/rtl/w11a/pdp11_dmcmon.vbom
0,0 → 1,12
# libs |
../vlib/slvtypes.vhd |
../vlib/memlib/memlib.vhd |
../vlib/rbus/rblib.vhd |
pdp11.vbom |
# components |
[sim]../vlib/memlib/ram_2swsr_rfirst_gen.vbom |
[xst,vsyn]../vlib/memlib/ram_2swsr_rfirst_gen_unisim.vbom |
[sim]../vlib/memlib/ram_1swar_1ar_gen.vbom |
[xst,vsyn]../vlib/memlib/ram_1swar_1ar_gen_unisim.vbom |
# design |
pdp11_dmcmon.vhd |
/trunk/rtl/w11a/pdp11_dmhbpt.vhd
0,0 → 1,109
-- $Id: pdp11_dmhbpt.vhd 702 2015-07-19 17:36:09Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
-- Software Foundation, either version 2, or at your option any later version. |
-- |
-- This program is distributed in the hope that it will be useful, but |
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
-- for complete details. |
-- |
------------------------------------------------------------------------------ |
-- Module Name: pdp11_dmhbpt - syn |
-- Description: pdp11: debug&moni: hardware breakpoint |
-- |
-- Dependencies: pdp11_dmhbpt_unit |
-- rbus/rb_sres_or_4 |
-- Test bench: - |
-- |
-- Target Devices: generic |
-- Tool versions: ise 14.7; viv 2014.4; ghdl 0.31 |
-- |
-- Synthesized (xst): |
-- Date Rev ise Target flop lutl lutm slic t peri |
-- 2015-07-12 700 14.7 131013 xc6slx16-2 78 133 0 42 s 3.8 (N=2) |
-- |
-- Revision History: - |
-- Date Rev Version Comment |
-- 2015-07-19 702 1.0 Initial version |
-- 2015-07-05 698 0.1 First draft |
------------------------------------------------------------------------------ |
|
library ieee; |
use ieee.std_logic_1164.all; |
use ieee.numeric_std.all; |
|
use work.slvtypes.all; |
use work.rblib.all; |
use work.pdp11.all; |
|
-- ---------------------------------------------------------------------------- |
|
entity pdp11_dmhbpt is -- debug&moni: hardware breakpoint |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0050#,16)); |
NUNIT : natural := 2); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core |
HBPT : out slbit -- hw break flag |
); |
end pdp11_dmhbpt; |
|
|
architecture syn of pdp11_dmhbpt is |
|
type sres_array_type is array (3 downto 0) of rb_sres_type; |
signal SRES_ARRAY : sres_array_type:= (others=>rb_sres_init); |
signal HBPT_SUM : slv(NUNIT-1 downto 0) := (others=>'0'); |
constant hbptzero : slv(HBPT_SUM'range) := (others=>'0'); |
|
begin |
|
assert NUNIT>=1 and NUNIT<=4 |
report "assert(NUNIT>=1 and NUNIT<=4): unsupported NUNIT" |
severity failure; |
|
GU: for i in NUNIT-1 downto 0 generate |
HBPT : pdp11_dmhbpt_unit |
generic map ( |
RB_ADDR => RB_ADDR, |
INDEX => i) |
port map ( |
CLK => CLK, |
RESET => RESET, |
RB_MREQ => RB_MREQ, |
RB_SRES => SRES_ARRAY(i), |
DM_STAT_SE => DM_STAT_SE, |
DM_STAT_DP => DM_STAT_DP, |
DM_STAT_VM => DM_STAT_VM, |
DM_STAT_CO => DM_STAT_CO, |
HBPT => HBPT_SUM(i) |
); |
end generate GU; |
|
GD: for i in 3 downto NUNIT generate |
SRES_ARRAY(i) <= rb_sres_init; |
end generate GD; |
|
RB_SRES_OR : rb_sres_or_4 |
port map ( |
RB_SRES_1 => SRES_ARRAY(0), |
RB_SRES_2 => SRES_ARRAY(1), |
RB_SRES_3 => SRES_ARRAY(2), |
RB_SRES_4 => SRES_ARRAY(3), |
RB_SRES_OR => RB_SRES |
); |
|
HBPT <= '1' when HBPT_SUM /= hbptzero else '0'; |
|
end syn; |
/trunk/rtl/w11a/tb/tb_pdp11core_stim.dat
1,7 → 1,8
# $Id: tb_pdp11core_stim.dat 675 2015-05-08 21:05:08Z mueller $ |
# $Id: tb_pdp11core_stim.dat 716 2015-12-22 21:44:33Z mueller $ |
# |
# Revision History: |
# Date Rev Version Comment |
# 2015-12-22 716 2.7 comment out test 20.13 (fails since r708) |
# 2015-05-08 675 2.6 start/stop/suspend overhaul |
# 2014-12-26 621 2.5 adopt wmembe,ribr,wibr emulation to new 4k window |
# 2014-12-20 614 2.4 adopted to rlink v4 |
1561,23 → 1562,23
wm 000000 -- clear CPUERR |
#---------- |
C Exec test 20.13 (red stack abort on 2nd word of interrupt/trap push) |
wps 000017 -- psw: set all cc flags |
wsp 000342 -- sp=342 |
wpc 004724 -- pc=4724 |
step -- step (iot): abort to 4 [[s:2]] |
rpc d=000006 -- ! pc=6 (trap 4 catch) |
rsp d=000000 -- ! sp=0 |
wal 000336 -- check stack |
brm 2 |
d=000000 -- ! mem(336) untainted |
d=000017 -- ! mem(340) PS of 1st attempt |
wal 000000 -- check emergency stack at 0,2 |
brm 2 |
d=004726 -- ! mem(0): PC |
d=000000 -- ! mem(2): PS (will be 0, orgininal PS lost !!) |
wal 177766 -- check CPUERR |
rm d=000004 -- ! CPUERR: (rsv=1) |
wm 000000 -- clear CPUERR |
#wps 000017 -- psw: set all cc flags |
#wsp 000342 -- sp=342 |
#wpc 004724 -- pc=4724 |
#step -- step (iot): abort to 4 [[s:2]] |
#rpc d=000006 -- ! pc=6 (trap 4 catch) |
#rsp d=000000 -- ! sp=0 |
#wal 000336 -- check stack |
#brm 2 |
# d=000000 -- ! mem(336) untainted |
# d=000017 -- ! mem(340) PS of 1st attempt |
#wal 000000 -- check emergency stack at 0,2 |
#brm 2 |
# d=004726 -- ! mem(0): PC |
# d=000000 -- ! mem(2): PS (will be 0, orgininal PS lost !!) |
#wal 177766 -- check CPUERR |
#rm d=000004 -- ! CPUERR: (rsv=1) |
#wm 000000 -- clear CPUERR |
#---------- |
C Exec test 20.14 (yellow stack trap when pushing data to stack; sp=400) |
wps 000017 -- psw: set all cc flags |
/trunk/rtl/w11a/tb/tbd_pdp11core.vhd
1,4 → 1,4
-- $Id: tbd_pdp11core.vhd 674 2015-05-04 16:17:40Z mueller $ |
-- $Id: tbd_pdp11core.vhd 712 2015-11-01 22:53:45Z mueller $ |
-- |
-- Copyright 2007-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
41,6 → 41,8
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-11-01 712 1.6.2 use sbcntl_sbf_tmu |
-- 2015-07-03 697 1.6.1 adapt to new DM_STAT_(SY|VM) |
-- 2015-05-03 674 1.6 start/stop/suspend overhaul |
-- 2011-11-18 427 1.5.1 now numeric_std clean |
-- 2010-12-30 351 1.5 rename tbd_pdp11_core -> tbd_pdp11core |
174,8 → 176,7
ESUSP_O => open, -- not tested |
ESUSP_I => '0', -- dito |
ITIMER => open, -- dito |
EBREAK => '0', -- dito |
DBREAK => '0', -- dito |
HBPT => '0', -- dito |
EI_PRI => EI_PRI, |
EI_VECT => EI_VECT, |
EI_ACKM => EI_ACKM, |
215,15 → 216,12
DISPREG => open |
); |
|
DM_STAT_SY.chit <= '0'; |
|
-- synthesis translate_off |
|
DM_STAT_SY.emmreq <= EM_MREQ; |
DM_STAT_SY.emsres <= EM_SRES; |
DM_STAT_SY.chit <= '0'; |
|
TMU : pdp11_tmu_sb |
generic map ( |
ENAPIN => 13) |
ENAPIN => sbcntl_sbf_tmu) |
port map ( |
CLK => CLK, |
DM_STAT_DP => DM_STAT_DP, |
/trunk/rtl/w11a/pdp11_core.vhd
1,4 → 1,4
-- $Id: pdp11_core.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_core.vhd 702 2015-07-19 17:36:09Z mueller $ |
-- |
-- Copyright 2006-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
30,6 → 30,9
-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-07-19 702 1.4.2 add DM_STAT_SE port; re-arrange DM_STAT_CO usage |
-- 2015-07-05 697 1.4.1 wire istart,istop,cpustep to DM_STAT_CO |
-- 2015-06-26 695 1.4.1 connect SNUM (current state number) |
-- 2015-05-09 679 1.4 start/stop/suspend overhaul; reset overhaul |
-- 2015-04-30 670 1.3.2 rename pdp11_sys70 -> pdp11_reg70 |
-- 2011-11-18 427 1.3.1 now numeric_std clean |
74,8 → 77,7
ESUSP_O : out slbit; -- external suspend output |
ESUSP_I : in slbit; -- external suspend input |
ITIMER : out slbit; -- instruction timer |
EBREAK : in slbit; -- execution break |
DBREAK : in slbit; -- data break |
HBPT : in slbit; -- hardware bpt |
EI_PRI : in slv3; -- external interrupt priority |
EI_VECT : in slv9_2; -- external interrupt vector |
EI_ACKM : out slbit; -- external interrupt acknowledge |
85,6 → 87,7
BRESET : out slbit; -- bus reset |
IB_MREQ_M : out ib_mreq_type; -- ibus master request (master) |
IB_SRES_M : in ib_sres_type; -- ibus slave response (master) |
DM_STAT_SE : out dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : out dm_stat_dp_type; -- debug and monitor status - dpath |
DM_STAT_VM : out dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : out dm_stat_co_type -- debug and monitor status - core |
112,6 → 115,7
signal INT_VECT : slv9_2 := (others=>'0'); |
signal CP_STAT_L : cp_stat_type := cp_stat_init; |
signal INT_ACK : slbit := '0'; |
signal SNUM : slv8 := (others=>'0'); |
|
signal IB_SRES_DP : ib_sres_type := ib_sres_init; |
signal IB_SRES_SEQ : ib_sres_type := ib_sres_init; |
194,10 → 198,10
ESUSP_O => ESUSP_O, |
ESUSP_I => ESUSP_I, |
ITIMER => ITIMER, |
EBREAK => EBREAK, |
DBREAK => DBREAK, |
HBPT => HBPT, |
IB_MREQ => IB_MREQ, |
IB_SRES => IB_SRES_SEQ |
IB_SRES => IB_SRES_SEQ, |
DM_STAT_SE => DM_STAT_SE |
); |
|
IRQ : pdp11_irq |
239,6 → 243,7
BRESET <= BRESET_L; |
|
DM_STAT_CO.cpugo <= CP_STAT_L.cpugo; |
DM_STAT_CO.cpustep <= CP_STAT_L.cpustep; |
DM_STAT_CO.cpususp <= CP_STAT_L.cpususp; |
DM_STAT_CO.suspint <= CP_STAT_L.suspint; |
DM_STAT_CO.suspext <= CP_STAT_L.suspext; |
/trunk/rtl/w11a/pdp11_tmu_sb.vhd
1,6 → 1,6
-- $Id: pdp11_tmu_sb.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_tmu_sb.vhd 712 2015-11-01 22:53:45Z mueller $ |
-- |
-- Copyright 2009- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- Copyright 2009-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
20,6 → 20,7
-- Tool versions: xst 8.1-14.7; ghdl 0.18-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-11-01 712 1.0.1 use sbcntl_sbf_tmu |
-- 2009-05-10 214 1.0 Initial version |
------------------------------------------------------------------------------ |
|
33,7 → 34,7
|
entity pdp11_tmu_sb is -- trace and mon. unit; simbus wrapper |
generic ( |
ENAPIN : integer := 13); -- SB_CNTL signal to use for enable |
ENAPIN : integer := sbcntl_sbf_tmu); -- SB_CNTL for tmu |
port ( |
CLK : in slbit; -- clock |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath |
/trunk/rtl/w11a/pdp11_sequencer.vhd
1,4 → 1,4
-- $Id: pdp11_sequencer.vhd 679 2015-05-13 17:38:46Z mueller $ |
-- $Id: pdp11_sequencer.vhd 708 2015-08-03 06:41:43Z mueller $ |
-- |
-- Copyright 2006-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
22,6 → 22,11
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-08-02 708 1.6.5 BUGFIX: proper trap_mmu and trap_ysv handling |
-- 2015-08-01 707 1.6.4 set dm_idone in s_(trap_10|op_trap); add dm_vfetch |
-- 2015-07-19 702 1.6.3 add DM_STAT_SE, drop SNUM port |
-- 2015-07-10 700 1.6.2 use c_cpurust_hbpt |
-- 2015-06-26 695 1.6.1 add SNUM (state number) port |
-- 2015-05-10 678 1.6 start/stop/suspend overhaul; reset overhaul |
-- 2015-02-07 643 1.5.2 s_op_wait: load R0 in DSRC for DR emulation |
-- 2014-07-12 569 1.5.1 rename s_opg_div_zero -> s_opg_div_quit; |
97,10 → 102,10
ESUSP_O : out slbit; -- external suspend output |
ESUSP_I : in slbit; -- external suspend input |
ITIMER : out slbit; -- instruction timer |
EBREAK : in slbit; -- execution break |
DBREAK : in slbit; -- data break |
HBPT : in slbit; -- hardware bpt |
IB_MREQ : in ib_mreq_type; -- ibus request |
IB_SRES : out ib_sres_type -- ibus response |
IB_SRES : out ib_sres_type; -- ibus response |
DM_STAT_SE : out dm_stat_se_type -- debug and monitor status - sequencer |
); |
end pdp11_sequencer; |
|
317,7 → 322,7
proc_next: process (R_STATE, R_STATUS, PSW, PC, CP_CNTL, |
ID_STAT, R_IDSTAT, IREG, VM_STAT, DP_STAT, |
R_CPUERR, R_VMSTAT, IB_MREQ, IBSEL_CPUERR, |
INT_PRI, INT_VECT, ESUSP_I, EBREAK, DBREAK) |
INT_PRI, INT_VECT, ESUSP_I, HBPT) |
|
variable nstate : state_type; |
variable nstatus : cpustat_type := cpustat_init; |
341,6 → 346,9
variable is_dstkstack1246 : slbit := '0'; -- dest is k-stack & mode= 1,2,4,6 |
|
variable int_pending : slbit := '0'; -- an interrupt is pending |
|
variable idm_idone : slbit := '0'; -- idone for dm_stat_se |
variable idm_vfetch : slbit := '0'; -- vfetch for dm_stat_se |
|
alias SRCMOD : slv2 is IREG(11 downto 10); -- src register mode high |
alias SRCDEF : slbit is IREG(9); -- src register mode defered |
424,10 → 432,14
mok := false; |
if VM_STAT.ack = '1' then |
mok := true; |
nstatus.trap_mmu := VM_STAT.trap_mmu; |
if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set |
nstatus.trap_ysv := VM_STAT.trap_ysv; |
if VM_STAT.trap_mmu = '1' then -- remember trap_mmu, may happen on any |
nstatus.trap_mmu := '1'; -- memory access of an instruction |
end if; |
if VM_STAT.trap_ysv = '1' then -- remember trap_ysv (on any access) |
if R_CPUERR.ysv = '0' then -- ysv trap when cpuerr not yet set |
nstatus.trap_ysv := '1'; |
end if; |
end if; |
elsif VM_STAT.err='1' or VM_STAT.fail='1' then |
nstate := s_vmerr; |
end if; |
583,6 → 595,9
if unsigned(INT_PRI) > unsigned(PSW.pri) then |
int_pending := '1'; |
end if; |
|
idm_idone := '0'; |
idm_vfetch := '0'; |
|
imemok := false; |
|
1297,7 → 1312,8
nstate := s_dstw_def_w; |
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_dstw_inc => |
1337,7 → 1353,8
nstatus.do_gprwe := '0'; |
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_dstw_incdef_w => |
1510,6 → 1527,7
-- instruction operate states ----------------------------------------------- |
|
when s_op_halt => -- HALT |
idm_idone := '1'; -- instruction done |
if is_kmode = '1' then -- if in kernel mode execute |
nmmumoni.idone := '1'; |
nstatus.cpugo := '0'; |
1540,6 → 1558,7
end if; |
|
when s_op_trap => -- traps |
idm_idone := '1'; -- instruction done |
lvector := "0000" & R_IDSTAT.trap_vec; -- vector |
do_start_int(nstate, ndpcntl, lvector); |
|
1568,12 → 1587,14
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
ndpcntl.gpr_we := '1'; -- load R with (SP)+ |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_op_spl => -- SPL |
ndpcntl.dres_sel := c_dpath_res_ireg; -- DRES = IREG |
ndpcntl.psr_func := c_psr_func_wspl; |
idm_idone := '1'; -- instruction done |
if is_kmode = '1' then -- active only in kernel mode |
ndpcntl.psr_we := '1'; |
nstate := s_ifetch; -- unconditionally fetch next |
1587,7 → 1608,8
ndpcntl.dres_sel := c_dpath_res_ireg; -- DRES = IREG |
ndpcntl.psr_func := c_psr_func_wcc; |
ndpcntl.psr_we := '1'; |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
when s_op_br => -- BR |
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref |
1617,6 → 1639,7
end case; |
|
ndpcntl.gpr_adst := c_gpr_pc; |
idm_idone := '1'; -- instruction done |
if brcond = brcode(0) then -- this coding creates redundant code |
ndpcntl.gpr_we := '1'; -- but synthesis optimizes this way ! |
do_fork_next(nstate, nstatus, nmmumoni); |
1654,7 → 1677,8
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
ndpcntl.gpr_we := '1'; -- load R5 with (sp)+ |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_op_sob => -- SOB (dec) |
1665,11 → 1689,12
ndpcntl.gpr_adst := SRCREG; |
ndpcntl.gpr_we := '1'; |
|
if DP_STAT.ccout_z = '0' then -- if z=0 branch, if z=1 fall thru |
if DP_STAT.ccout_z = '0' then -- if z=0 branch, if z=1 fall thru |
nstate := s_op_sob1; |
else |
--do_fork_next_pref(nstate, ndpcntl, nvmcntl, nmmumoni); |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_op_sob1 => -- SOB (br) |
1679,7 → 1704,8
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT |
ndpcntl.gpr_adst := c_gpr_pc; |
ndpcntl.gpr_we := '1'; |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
when s_opg_gen => |
nvmcntl.dspace := '0'; -- prepare do_fork_next_pref |
1700,6 → 1726,7
if R_IDSTAT.is_rmwop = '1' then |
do_memwrite(nstate, nvmcntl, s_opg_gen_rmw_w, macc=>'1'); |
else |
idm_idone := '1'; -- instruction done |
if R_STATUS.prefdone = '1' then |
nstatus.prefdone :='0'; |
nstate := s_ifetch_w; |
1721,7 → 1748,8
nstate := s_opg_gen_rmw_w; |
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_opg_mul => -- MUL (oper) |
1741,7 → 1769,8
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg ! |
ndpcntl.gpr_we := '1'; |
ndpcntl.psr_ccwe := '1'; |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
when s_opg_div => -- DIV (load dd_low) |
ndpcntl.munit_s_div := '1'; |
1795,12 → 1824,14
if DP_STAT.div_quit = '1' then |
nstate := s_opg_div_quit; |
else |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_opg_div_quit => -- DIV (0/ or /0 or V=1 aborts) |
ndpcntl.psr_ccwe := '1'; |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
when s_opg_ash => -- ASH (load shc) |
ndpcntl.munit_s_ash := '1'; |
1822,6 → 1853,7
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT |
ndpcntl.gpr_we := '1'; |
ndpcntl.psr_ccwe := '1'; |
idm_idone := '1'; -- instruction done |
do_fork_next_pref(nstate, nstatus, ndpcntl, nvmcntl, nmmumoni); |
end if; |
|
1857,7 → 1889,8
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT |
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg ! |
ndpcntl.gpr_we := '1'; |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
-- dsta mode operations ----------------------------------------------------- |
|
1918,7 → 1951,8
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT |
ndpcntl.gpr_adst := c_gpr_pc; |
ndpcntl.gpr_we := '1'; -- load PC with dsta |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
when s_opa_jmp => |
ndpcntl.ounit_asel := c_ounit_asel_ddst; -- OUNIT A=DDST |
1929,7 → 1963,8
nstate := s_trap_10; -- trap 10 like 11/70 |
else |
ndpcntl.gpr_we := '1'; -- load PC with dsta |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_opa_mtp => |
1965,7 → 2000,8
ndpcntl.psr_ccwe := '1'; -- set cc (from ounit too) |
ndpcntl.gpr_mode := PSW.pmode; -- load reg in pmode |
ndpcntl.gpr_we := '1'; |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
|
when s_opa_mtp_mem => |
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A = DTMP |
1983,7 → 2019,8
nstate := s_opa_mtp_mem_w; |
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
when s_opa_mfp_reg => |
2044,7 → 2081,8
nstate := s_opa_mfp_push_w; |
do_memcheck(nstate, nstatus, imemok); |
if imemok then |
do_fork_next(nstate, nstatus, nmmumoni); |
idm_idone := '1'; -- instruction done |
do_fork_next(nstate, nstatus, nmmumoni); -- fetch next |
end if; |
|
-- trap and interrupt handling states --------------------------------------- |
2054,6 → 2092,7
do_start_int(nstate, ndpcntl, lvector); |
|
when s_trap_10 => |
idm_idone := '1'; -- instruction done |
lvector := "0000010"; -- vector (10) |
do_start_int(nstate, ndpcntl, lvector); |
|
2076,6 → 2115,7
do_start_int(nstate, ndpcntl, lvector); |
|
when s_int_getpc => |
idm_vfetch := '1'; -- signal vfetch |
nvmcntl.mode := c_psw_kmode; -- fetch PC from kernel D space |
do_memread_srcinc(nstate, ndpcntl, nvmcntl, s_int_getpc_w, nmmumoni); |
|
2223,8 → 2263,9
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT |
ndpcntl.gpr_adst := c_gpr_pc; |
ndpcntl.gpr_we := '1'; -- load new PC |
idm_idone := '1'; -- instruction done |
if R_IDSTAT.op_rtt = '1' then -- if RTT instruction |
nstate := s_ifetch; -- force fetch |
nstate := s_ifetch; -- force fetch |
else -- otherwise RTI |
do_fork_next(nstate, nstatus, nmmumoni); |
end if; |
2295,7 → 2336,8
|
end case; |
|
if DBREAK = '1' then -- handle BREAK |
if HBPT = '1' then -- handle hardware bpt |
nstatus.cpurust := c_cpurust_hbpt; |
nstatus.suspint :='1'; |
end if; |
nstatus.suspext := ESUSP_I; |
2330,7 → 2372,11
nmmumoni.regnum := ndpcntl.gpr_adst; |
nmmumoni.delta := ndpcntl.ounit_const(3 downto 0); |
MMU_MONI <= nmmumoni; |
|
|
DM_STAT_SE.istart <= nmmumoni.istart; |
DM_STAT_SE.idone <= idm_idone; |
DM_STAT_SE.vfetch <= idm_vfetch; |
|
end process proc_next; |
|
proc_cpstat : process (R_STATUS) |
2348,6 → 2394,144
CP_STAT.suspint <= R_STATUS.suspint; |
CP_STAT.suspext <= R_STATUS.suspext; |
end process proc_cpstat; |
|
|
proc_snum : process (R_STATE) |
variable isnum : slv8 := (others=>'0'); |
begin |
isnum := (others=>'0'); |
case R_STATE is |
-- STATE2SNUM mapper begin |
when s_idle => isnum := x"00"; |
when s_cp_regread => isnum := x"01"; |
when s_cp_rps => isnum := x"02"; |
when s_cp_memr_w => isnum := x"03"; |
when s_cp_memw_w => isnum := x"04"; |
when s_ifetch => isnum := x"05"; |
when s_ifetch_w => isnum := x"06"; |
when s_idecode => isnum := x"07"; |
|
when s_srcr_def => isnum := x"08"; |
when s_srcr_def_w => isnum := x"09"; |
when s_srcr_inc => isnum := x"0a"; |
when s_srcr_inc_w => isnum := x"0b"; |
when s_srcr_dec => isnum := x"0c"; |
when s_srcr_dec1 => isnum := x"0d"; |
when s_srcr_ind => isnum := x"0e"; |
when s_srcr_ind1_w => isnum := x"0f"; |
when s_srcr_ind2 => isnum := x"10"; |
when s_srcr_ind2_w => isnum := x"11"; |
|
when s_dstr_def => isnum := x"12"; |
when s_dstr_def_w => isnum := x"13"; |
when s_dstr_inc => isnum := x"14"; |
when s_dstr_inc_w => isnum := x"15"; |
when s_dstr_dec => isnum := x"16"; |
when s_dstr_dec1 => isnum := x"17"; |
when s_dstr_ind => isnum := x"18"; |
when s_dstr_ind1_w => isnum := x"19"; |
when s_dstr_ind2 => isnum := x"1a"; |
when s_dstr_ind2_w => isnum := x"1b"; |
|
when s_dstw_def => isnum := x"1c"; |
when s_dstw_def_w => isnum := x"1d"; |
when s_dstw_inc => isnum := x"1e"; |
when s_dstw_inc_w => isnum := x"1f"; |
when s_dstw_incdef_w => isnum := x"20"; |
when s_dstw_dec => isnum := x"21"; |
when s_dstw_dec1 => isnum := x"22"; |
when s_dstw_ind => isnum := x"23"; |
when s_dstw_ind_w => isnum := x"24"; |
when s_dstw_def246 => isnum := x"25"; |
|
when s_dsta_inc => isnum := x"26"; |
when s_dsta_incdef_w => isnum := x"27"; |
when s_dsta_dec => isnum := x"28"; |
when s_dsta_dec1 => isnum := x"29"; |
when s_dsta_ind => isnum := x"2a"; |
when s_dsta_ind_w => isnum := x"2b"; |
|
when s_op_halt => isnum := x"2c"; |
when s_op_wait => isnum := x"2d"; |
when s_op_trap => isnum := x"2e"; |
when s_op_reset => isnum := x"2f"; |
when s_op_rts => isnum := x"30"; |
when s_op_rts_pop => isnum := x"31"; |
when s_op_rts_pop_w => isnum := x"32"; |
when s_op_spl => isnum := x"33"; |
when s_op_mcc => isnum := x"34"; |
when s_op_br => isnum := x"35"; |
when s_op_mark => isnum := x"36"; |
when s_op_mark1 => isnum := x"37"; |
when s_op_mark_pop => isnum := x"38"; |
when s_op_mark_pop_w => isnum := x"39"; |
when s_op_sob => isnum := x"3a"; |
when s_op_sob1 => isnum := x"3b"; |
|
when s_opg_gen => isnum := x"3c"; |
when s_opg_gen_rmw_w => isnum := x"3d"; |
when s_opg_mul => isnum := x"3e"; |
when s_opg_mul1 => isnum := x"3f"; |
when s_opg_div => isnum := x"40"; |
when s_opg_div_cn => isnum := x"41"; |
when s_opg_div_cr => isnum := x"42"; |
when s_opg_div_sq => isnum := x"43"; |
when s_opg_div_sr => isnum := x"44"; |
when s_opg_div_quit => isnum := x"45"; |
when s_opg_ash => isnum := x"46"; |
when s_opg_ash_cn => isnum := x"47"; |
when s_opg_ashc => isnum := x"48"; |
when s_opg_ashc_cn => isnum := x"49"; |
when s_opg_ashc_wl => isnum := x"4a"; |
|
when s_opa_jsr => isnum := x"4b"; |
when s_opa_jsr1 => isnum := x"4c"; |
when s_opa_jsr_push => isnum := x"4d"; |
when s_opa_jsr_push_w => isnum := x"4e"; |
when s_opa_jsr2 => isnum := x"4f"; |
when s_opa_jmp => isnum := x"50"; |
when s_opa_mtp => isnum := x"51"; |
when s_opa_mtp_pop_w => isnum := x"52"; |
when s_opa_mtp_reg => isnum := x"53"; |
when s_opa_mtp_mem => isnum := x"54"; |
when s_opa_mtp_mem_w => isnum := x"55"; |
when s_opa_mfp_reg => isnum := x"56"; |
when s_opa_mfp_mem => isnum := x"57"; |
when s_opa_mfp_mem_w => isnum := x"58"; |
when s_opa_mfp_dec => isnum := x"59"; |
when s_opa_mfp_push => isnum := x"5a"; |
when s_opa_mfp_push_w => isnum := x"5b"; |
|
when s_trap_4 => isnum := x"5c"; |
when s_trap_10 => isnum := x"5d"; |
when s_trap_disp => isnum := x"5e"; |
|
when s_int_ext => isnum := x"5f"; |
|
when s_int_getpc => isnum := x"60"; |
when s_int_getpc_w => isnum := x"61"; |
when s_int_getps => isnum := x"62"; |
when s_int_getps_w => isnum := x"63"; |
when s_int_getsp => isnum := x"64"; |
when s_int_decsp => isnum := x"65"; |
when s_int_pushps => isnum := x"66"; |
when s_int_pushps_w => isnum := x"67"; |
when s_int_pushpc => isnum := x"68"; |
when s_int_pushpc_w => isnum := x"69"; |
|
when s_rti_getpc => isnum := x"6a"; |
when s_rti_getpc_w => isnum := x"6b"; |
when s_rti_getps => isnum := x"6c"; |
when s_rti_getps_w => isnum := x"6d"; |
when s_rti_newpc => isnum := x"6e"; |
|
when s_vmerr => isnum := x"6f"; |
when s_cpufail => isnum := x"70"; |
|
-- STATE2SNUM mapper end |
when others => isnum := x"ff"; |
end case; |
DM_STAT_SE.snum <= isnum; |
end process proc_snum; |
|
end syn; |
|
/trunk/rtl/w11a/pdp11_tmu.vhd
1,4 → 1,4
-- $Id: pdp11_tmu.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_tmu.vhd 697 2015-07-05 14:23:26Z mueller $ |
-- |
-- Copyright 2008-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
23,6 → 23,7
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-07-03 697 1.2.1 adapt to new DM_STAT_SY/DM_STAT_VM |
-- 2015-05-03 674 1.2 start/stop/suspend overhaul |
-- 2011-12-23 444 1.1 use local clkcycle count instead of simbus global |
-- 2011-11-18 427 1.0.7 now numeric_std clean |
85,6 → 86,7
|
if R_FIRST = '1' then |
R_FIRST <= '0'; |
-- sequence of field desciptors must equal the sequence of writes later |
write(oline, string'("#")); |
write(oline, string'(" clkcycle:d")); |
write(oline, string'(" cpu:o")); |
115,6 → 117,15
write(oline, string'(" vm.ibsres.ack:b")); |
write(oline, string'(" vm.ibsres.busy:b")); |
write(oline, string'(" vm.ibsres.dout:o")); |
write(oline, string'(" vm.emmreq.req:b")); |
write(oline, string'(" vm.emmreq.we:b")); |
write(oline, string'(" vm.emmreq.be:b")); |
write(oline, string'(" vm.emmreq.cancel:b")); |
write(oline, string'(" vm.emmreq.addr:o")); |
write(oline, string'(" vm.emmreq.din:o")); |
write(oline, string'(" vm.emsres.ack_r:b")); |
write(oline, string'(" vm.emsres.ack_w:b")); |
write(oline, string'(" vm.emsres.dout:o")); |
|
write(oline, string'(" co.cpugo:b")); |
write(oline, string'(" co.cpususp:b")); |
121,15 → 132,6
write(oline, string'(" co.suspint:b")); |
write(oline, string'(" co.suspext:b")); |
|
write(oline, string'(" sy.emmreq.req:b")); |
write(oline, string'(" sy.emmreq.we:b")); |
write(oline, string'(" sy.emmreq.be:b")); |
write(oline, string'(" sy.emmreq.cancel:b")); |
write(oline, string'(" sy.emmreq.addr:o")); |
write(oline, string'(" sy.emmreq.din:o")); |
write(oline, string'(" sy.emsres.ack_r:b")); |
write(oline, string'(" sy.emsres.ack_w:b")); |
write(oline, string'(" sy.emsres.dout:o")); |
write(oline, string'(" sy.chit:b")); |
|
writeline(ofile, oline); |
147,15 → 149,15
ibaddr(DM_STAT_VM.ibmreq.addr'range) := DM_STAT_VM.ibmreq.addr; |
|
emaddr := (others=>'0'); |
emaddr(DM_STAT_SY.emmreq.addr'range) := DM_STAT_SY.emmreq.addr; |
emaddr(DM_STAT_VM.emmreq.addr'range) := DM_STAT_VM.emmreq.addr; |
|
wcycle := false; |
if dp_ireg_we_last='1' or |
DM_STAT_DP.gpr_we='1' or |
DM_STAT_SY.emmreq.req='1' or |
DM_STAT_SY.emsres.ack_r='1' or |
DM_STAT_SY.emsres.ack_w='1' or |
DM_STAT_SY.emmreq.cancel='1' or |
DM_STAT_VM.emmreq.req='1' or |
DM_STAT_VM.emsres.ack_r='1' or |
DM_STAT_VM.emsres.ack_w='1' or |
DM_STAT_VM.emmreq.cancel='1' or |
DM_STAT_VM.ibmreq.re='1' or |
DM_STAT_VM.ibmreq.we='1' or |
DM_STAT_VM.ibsres.ack='1' |
174,6 → 176,7
end if; |
|
if wcycle then |
-- sequence of writes must equal the sequence of field desciptors above |
write(oline, clkcycle, right, 9); |
write(oline, string'(" 0")); |
writeoct(oline, DM_STAT_DP.pc, right, 7); |
204,20 → 207,21
write(oline, DM_STAT_VM.ibsres.busy, right, 2); |
writeoct(oline, DM_STAT_VM.ibsres.dout, right, 7); |
|
write(oline, DM_STAT_VM.emmreq.req, right, 2); |
write(oline, DM_STAT_VM.emmreq.we, right, 2); |
write(oline, DM_STAT_VM.emmreq.be, right, 3); |
write(oline, DM_STAT_VM.emmreq.cancel, right, 2); |
writeoct(oline, emaddr, right, 9); |
writeoct(oline, DM_STAT_VM.emmreq.din, right, 7); |
write(oline, DM_STAT_VM.emsres.ack_r, right, 2); |
write(oline, DM_STAT_VM.emsres.ack_w, right, 2); |
writeoct(oline, DM_STAT_VM.emsres.dout, right, 7); |
|
write(oline, DM_STAT_CO.cpugo, right, 2); |
write(oline, DM_STAT_CO.cpususp, right, 2); |
write(oline, DM_STAT_CO.suspint, right, 2); |
write(oline, DM_STAT_CO.suspext, right, 2); |
|
write(oline, DM_STAT_SY.emmreq.req, right, 2); |
write(oline, DM_STAT_SY.emmreq.we, right, 2); |
write(oline, DM_STAT_SY.emmreq.be, right, 3); |
write(oline, DM_STAT_SY.emmreq.cancel, right, 2); |
writeoct(oline, emaddr, right, 9); |
writeoct(oline, DM_STAT_SY.emmreq.din, right, 7); |
write(oline, DM_STAT_SY.emsres.ack_r, right, 2); |
write(oline, DM_STAT_SY.emsres.ack_w, right, 2); |
writeoct(oline, DM_STAT_SY.emsres.dout, right, 7); |
|
write(oline, DM_STAT_SY.chit, right, 2); |
|
writeline(ofile, oline); |
/trunk/rtl/w11a/pdp11_dmhbpt_unit.vhd
0,0 → 1,271
-- $Id: pdp11_dmhbpt_unit.vhd 722 2015-12-30 19:45:46Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
-- Software Foundation, either version 2, or at your option any later version. |
-- |
-- This program is distributed in the hope that it will be useful, but |
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
-- for complete details. |
-- |
------------------------------------------------------------------------------ |
-- Module Name: pdp11_dmhbpt_unit - syn |
-- Description: pdp11: dmhbpt - individual unit |
-- |
-- Dependencies: - |
-- Test bench: - |
-- |
-- Target Devices: generic |
-- Tool versions: ise 14.7; viv 2014.4; ghdl 0.31 |
-- |
-- Synthesized (xst): |
-- Date Rev ise Target flop lutl lutm slic t peri |
-- 2015-07-12 700 14.7 131013 xc6slx16-2 39 67 0 21 s 3.8 |
-- |
-- Revision History: - |
-- Date Rev Version Comment |
-- 2015-07-19 702 1.0 Initial version |
-- 2015-07-05 698 0.1 First draft |
------------------------------------------------------------------------------ |
-- |
-- rbus registers: |
-- |
-- Addr Bits Name r/w/f Function |
-- 00 cntl r/w/- Control register |
-- 05:04 mode r/w/- mode select (k=00,s=01,u=11; 10->all) |
-- 02 irena r/w/- enable instruction read bpt |
-- 01 dwena r/w/- enable data write bpt |
-- 00 drena r/w/- enable data read bpt |
-- 01 stat r/w/- Status register |
-- 01 dwseen r/w/- dw bpt seen |
-- 02 irseen r/w/- ir bpt seen |
-- 00 drseen r/w/- dr bpt seen |
-- 10 15:01 hilim r/w/- upper address limit, inclusive (def: 000000) |
-- 11 15:01 lolim r/w/- lower address limit, inclusive (def: 000000) |
-- |
|
library ieee; |
use ieee.std_logic_1164.all; |
use ieee.numeric_std.all; |
|
use work.slvtypes.all; |
use work.rblib.all; |
use work.pdp11.all; |
|
-- ---------------------------------------------------------------------------- |
|
entity pdp11_dmhbpt_unit is -- dmhbpt - indivitial unit |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0050#,16)); |
INDEX : natural := 0); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core |
HBPT : out slbit -- hw break flag |
); |
end pdp11_dmhbpt_unit; |
|
|
architecture syn of pdp11_dmhbpt_unit is |
|
constant rbaddr_cntl : slv2 := "00"; -- cntl address offset |
constant rbaddr_stat : slv2 := "01"; -- stat address offset |
constant rbaddr_hilim : slv2 := "10"; -- hilim address offset |
constant rbaddr_lolim : slv2 := "11"; -- lolim address offset |
|
subtype cntl_rbf_mode is integer range 5 downto 4; |
constant cntl_rbf_irena : integer := 2; |
constant cntl_rbf_dwena : integer := 1; |
constant cntl_rbf_drena : integer := 0; |
|
constant stat_rbf_irseen : integer := 2; |
constant stat_rbf_dwseen : integer := 1; |
constant stat_rbf_drseen : integer := 0; |
|
-- the mode 10 is used a wildcard, cpu only uses 00 (k) 01 (s) and 11 (u) |
constant cntl_mode_all : slv2 := "10"; |
|
subtype lim_rbf is integer range 15 downto 1; |
|
type regs_type is record |
rbsel : slbit; -- rbus select |
mode : slv2; -- mode select |
irena : slbit; -- ir enable |
dwena : slbit; -- dw enable |
drena : slbit; -- dr enable |
irseen : slbit; -- ir seen |
dwseen : slbit; -- dw seen |
drseen : slbit; -- dr seen |
hilim : slv16_1; -- hilim |
lolim : slv16_1; -- lolim |
end record regs_type; |
|
constant regs_init : regs_type := ( |
'0', -- rbsel |
"00", -- mode |
'0','0','0', -- *ena |
'0','0','0', -- *seen |
(others=>'0'), -- hilim |
(others=>'0') -- lolim |
); |
|
signal R_REGS : regs_type := regs_init; -- state registers |
signal N_REGS : regs_type := regs_init; -- next value state regs |
|
begin |
|
proc_regs: process (CLK) |
begin |
|
if rising_edge(CLK) then |
if RESET = '1' then |
R_REGS <= regs_init; |
else |
R_REGS <= N_REGS; |
end if; |
end if; |
|
end process proc_regs; |
|
proc_next: process (R_REGS, RB_MREQ, DM_STAT_SE, DM_STAT_DP, |
DM_STAT_VM, DM_STAT_VM.vmcntl, -- xst needs sub-records |
DM_STAT_CO) |
|
variable r : regs_type := regs_init; |
variable n : regs_type := regs_init; |
variable irb_ack : slbit := '0'; |
variable irb_err : slbit := '0'; -- FIXME: needed ?? |
variable irb_busy : slbit := '0'; -- FIXME: needed ?? |
variable irb_dout : slv16 := (others=>'0'); |
variable irbena : slbit := '0'; |
variable ihbpt : slbit := '0'; |
|
begin |
|
r := R_REGS; |
n := R_REGS; |
|
irb_ack := '0'; |
irb_err := '0'; |
irb_busy := '0'; |
irb_dout := (others=>'0'); |
irbena := RB_MREQ.re or RB_MREQ.we; |
|
-- rbus address decoder |
n.rbsel := '0'; |
if RB_MREQ.aval='1' and -- address valid |
RB_MREQ.addr(12 downto 4)=RB_ADDR(12 downto 4) and -- block address |
RB_MREQ.addr( 3 downto 2)=slv(to_unsigned(INDEX,2)) -- unit address |
then |
n.rbsel := '1'; |
end if; |
|
-- rbus transactions |
if r.rbsel = '1' then |
irb_ack := irbena; -- ack all accesses |
case RB_MREQ.addr(1 downto 0) is |
when rbaddr_cntl => -- cntl ------------------ |
if RB_MREQ.we = '1' then |
n.mode := RB_MREQ.din(cntl_rbf_mode); |
n.irena := RB_MREQ.din(cntl_rbf_irena); |
n.dwena := RB_MREQ.din(cntl_rbf_dwena); |
n.drena := RB_MREQ.din(cntl_rbf_drena); |
end if; |
|
when rbaddr_stat => -- stat ------------------ |
if RB_MREQ.we = '1' then |
n.irseen := RB_MREQ.din(stat_rbf_irseen); |
n.dwseen := RB_MREQ.din(stat_rbf_dwseen); |
n.drseen := RB_MREQ.din(stat_rbf_drseen); |
end if; |
|
when rbaddr_hilim => -- hilim ----------------- |
if RB_MREQ.we = '1' then |
n.hilim := RB_MREQ.din(lim_rbf); |
end if; |
|
when rbaddr_lolim => -- lolim ----------------- |
if RB_MREQ.we = '1' then |
n.lolim := RB_MREQ.din(lim_rbf); |
end if; |
|
when others => null; -- <> -------------------- |
end case; |
end if; |
|
-- rbus output driver |
if r.rbsel = '1' then |
case RB_MREQ.addr(1 downto 0) is |
when rbaddr_cntl => -- cntl ------------------ |
irb_dout(cntl_rbf_mode) := r.mode; |
irb_dout(cntl_rbf_irena) := r.irena; |
irb_dout(cntl_rbf_dwena) := r.dwena; |
irb_dout(cntl_rbf_drena) := r.drena; |
when rbaddr_stat => -- stat ------------------ |
irb_dout(stat_rbf_irseen) := r.irseen; |
irb_dout(stat_rbf_dwseen) := r.dwseen; |
irb_dout(stat_rbf_drseen) := r.drseen; |
when rbaddr_hilim => -- hilim ----------------- |
irb_dout(lim_rbf) := r.hilim; |
when rbaddr_lolim => -- lolim ----------------- |
irb_dout(lim_rbf) := r.lolim; |
when others => null; |
end case; |
end if; |
|
-- breakpoint unit logic |
ihbpt := '0'; |
if DM_STAT_VM.vmcntl.req = '1' and |
DM_STAT_VM.vmcntl.cacc = '0' and |
(DM_STAT_VM.vmcntl.mode = r.mode or r.mode = cntl_mode_all )and |
unsigned(DM_STAT_VM.vmaddr(lim_rbf))>=unsigned(r.lolim) and |
unsigned(DM_STAT_VM.vmaddr(lim_rbf))<=unsigned(r.hilim) then |
|
if r.irena = '1' then |
if DM_STAT_SE.istart = '1' and -- only for instruction fetches ! |
DM_STAT_VM.vmcntl.dspace = '0' and |
DM_STAT_VM.vmcntl.wacc = '0' then |
ihbpt := '1'; |
n.irseen := '1'; |
end if; |
end if; |
|
if r.dwena = '1' then |
if DM_STAT_VM.vmcntl.dspace = '1' and |
DM_STAT_VM.vmcntl.wacc = '1' then |
ihbpt := '1'; |
n.dwseen := '1'; |
end if; |
end if; |
|
if r.drena = '1' then |
if DM_STAT_VM.vmcntl.dspace = '1' and |
DM_STAT_VM.vmcntl.wacc = '0' then |
ihbpt := '1'; |
n.drseen := '1'; |
end if; |
end if; |
|
end if; |
|
N_REGS <= n; |
|
HBPT <= ihbpt; |
|
RB_SRES.ack <= irb_ack; |
RB_SRES.err <= irb_err; |
RB_SRES.busy <= irb_busy; |
RB_SRES.dout <= irb_dout; |
|
end process proc_next; |
|
end syn; |
/trunk/rtl/w11a/sys_conf.vhd
1,4 → 1,4
-- $Id: sys_conf.vhd 672 2015-05-02 21:58:28Z mueller $ |
-- $Id: sys_conf.vhd 695 2015-06-28 11:22:52Z mueller $ |
-- |
-- Copyright 2007-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
19,6 → 19,7
-- Tool versions: xst 8.1-14.7; viv 2014.4; ghdl 0.18-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-06-26 695 1.1.1 add sys_conf_dmscnt |
-- 2015-05-01 672 1.1 adopt to pdp11_sys70 |
-- 2008-02-23 118 1.0 Initial version |
------------------------------------------------------------------------------ |
36,6 → 37,7
constant sys_conf_mem_losize : integer := 8#000777#;-- 32 kByte |
|
constant sys_conf_ibmon_awidth : integer := 9; -- use 0 to disable ibmon |
constant sys_conf_dmscnt : boolean := true; |
|
end package sys_conf; |
|
/trunk/rtl/w11a/pdp11.vhd
1,4 → 1,4
-- $Id: pdp11.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11.vhd 712 2015-11-01 22:53:45Z mueller $ |
-- |
-- Copyright 2006-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
20,6 → 20,11
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-11-01 712 1.6.5 define sbcntl_sbf_tmu := 12; use for pdp11_tmu_sb |
-- 2015-07-19 702 1.6.4 change DM_STAT_(DP|CO); add DM_STAT_SE |
-- 2015-07-10 700 1.6.3 define c_cpurust_hbpt; |
-- 2015-07-04 697 1.6.2 add pdp11_dm(hbpt|cmon); change DM_STAT_(SY|VM|CO) |
-- 2015-06-26 695 1.6.1 add pdp11_dmscnt (add support) |
-- 2015-05-09 677 1.6 start/stop/suspend overhaul; reset overhaul |
-- 2015-05-01 672 1.5.5 add pdp11_sys70, sys_hio70 |
-- 2015-04-30 670 1.5.4 rename pdp11_sys70 -> pdp11_reg70 |
333,6 → 338,7
constant c_cpurust_stop : slv4 := "0011"; -- cpu was stopped |
constant c_cpurust_step : slv4 := "0100"; -- cpu was stepped |
constant c_cpurust_susp : slv4 := "0101"; -- cpu was suspended |
constant c_cpurust_hbpt : slv4 := "0110"; -- cpu had hardware bpt |
constant c_cpurust_runs : slv4 := "0111"; -- cpu running |
constant c_cpurust_vecfet : slv4 := "1000"; -- vector fetch error halt |
constant c_cpurust_recrsv : slv4 := "1001"; -- recursive red-stack halt |
595,22 → 601,32
|
-- debug and monitoring port definitions ------------------------------------- |
|
type dm_cntl_type is record -- debug and monitor control |
dum1 : slbit; -- dummy 1 |
dum2 : slbit; -- dummy 2 |
end record dm_cntl_type; |
type dm_stat_se_type is record -- debug and monitor status - sequencer |
istart : slbit; -- instruction start |
idone : slbit; -- instruction done |
vfetch : slbit; -- vector fetch |
snum : slv8; -- current state number |
end record dm_stat_se_type; |
|
constant dm_cntl_init : dm_cntl_type := (others=>'0'); |
|
constant dm_stat_se_init : dm_stat_se_type := ( |
'0','0','0', -- istart,idone,vfetch |
(others=>'0') -- snum |
); |
|
type dm_stat_dp_type is record -- debug and monitor status - dpath |
pc : slv16; -- pc |
psw : psw_type; -- psw |
psr_we: slbit; -- psr_we |
ireg : slv16; -- ireg |
ireg_we : slbit; -- ireg we |
dsrc : slv16; -- dsrc register |
dsrc_we: slbit; -- dsrc we |
ddst : slv16; -- ddst register |
ddst_we : slbit; -- ddst we |
dtmp : slv16; -- dtmp register |
dtmp_we : slbit; -- dtmp we |
dres : slv16; -- dres bus |
cpdout_we : slbit; -- cpdout we |
gpr_adst : slv3; -- gpr dst regsiter |
gpr_mode : slv2; -- gpr mode |
gpr_bytop : slbit; -- gpr bytop |
619,23 → 635,44
|
constant dm_stat_dp_init : dm_stat_dp_type := ( |
(others=>'0'), -- pc |
psw_init, -- psw |
(others=>'0'),'0', -- ireg, ireg_we |
(others=>'0'),(others=>'0'), -- dsrc, ddst |
(others=>'0'),(others=>'0'), -- dtmp, dres |
psw_init,'0', -- psw,psr_we |
(others=>'0'),'0', -- ireg,ireg_we |
(others=>'0'),'0', -- dsrc,dsrc_we |
(others=>'0'),'0', -- ddst,ddst_we |
(others=>'0'),'0', -- dtmp,dtmp_we |
(others=>'0'), -- dres |
'0', -- cpdout_we |
(others=>'0'),(others=>'0'), -- gpr_adst, gpr_mode |
'0','0' -- gpr_bytop, gpr_we |
); |
|
type dm_stat_vm_type is record -- debug and monitor status - vmbox |
ibmreq : ib_mreq_type; -- ibus master request |
ibsres : ib_sres_type; -- ibus slave response |
vmcntl : vm_cntl_type; -- vmbox: control |
vmaddr : slv16; -- vmbox: address |
vmdin : slv16; -- vmbox: data in |
vmstat : vm_stat_type; -- vmbox: status |
vmdout : slv16; -- vmbox: data out |
ibmreq : ib_mreq_type; -- ibus: request |
ibsres : ib_sres_type; -- ibus: response |
emmreq : em_mreq_type; -- external memory: request |
emsres : em_sres_type; -- external memory: response |
end record dm_stat_vm_type; |
|
constant dm_stat_vm_init : dm_stat_vm_type := (ib_mreq_init,ib_sres_init); |
constant dm_stat_vm_init : dm_stat_vm_type := ( |
vm_cntl_init, -- vmcntl |
(others=>'0'), -- vmaddr |
(others=>'0'), -- vmdin |
vm_stat_init, -- vmstat |
(others=>'0'), -- vmdout |
ib_mreq_init, -- ibmreq |
ib_sres_init, -- ibsres |
em_mreq_init, -- emmreq |
em_sres_init -- emsres |
); |
|
type dm_stat_co_type is record -- debug and monitor status - core |
cpugo : slbit; -- cpugo state flag |
cpustep : slbit; -- cpustep state flag |
cpususp : slbit; -- cpususp state flag |
suspint : slbit; -- suspint state flag |
suspext : slbit; -- suspext state flag |
642,20 → 679,18
end record dm_stat_co_type; |
|
constant dm_stat_co_init : dm_stat_co_type := ( |
'0','0', -- cpu... |
'0','0','0', -- cpu... |
'0','0' -- susp... |
); |
|
type dm_stat_sy_type is record -- debug and monitor status - system |
emmreq : em_mreq_type; -- external memory: request |
emsres : em_sres_type; -- external memory: response |
chit : slbit; -- cache hit |
dummy : slbit; -- ... sorry records must have two ... |
end record dm_stat_sy_type; |
|
constant dm_stat_sy_init : dm_stat_sy_type := ( |
em_mreq_init, -- emmreq |
em_sres_init, -- emsres |
'0' -- chit |
'0', -- chit |
'0' |
); |
|
-- rbus interface definitions ------------------------------------------------ |
966,10 → 1001,10
ESUSP_O : out slbit; -- external suspend output |
ESUSP_I : in slbit; -- external suspend input |
ITIMER : out slbit; -- instruction timer |
EBREAK : in slbit; -- execution break |
DBREAK : in slbit; -- data break |
HBPT : in slbit; -- hardware bpt |
IB_MREQ : in ib_mreq_type; -- ibus request |
IB_SRES : out ib_sres_type -- ibus response |
IB_SRES : out ib_sres_type; -- ibus response |
DM_STAT_SE : out dm_stat_se_type -- debug and monitor status - sequencer |
); |
end component; |
|
1051,8 → 1086,7
ESUSP_O : out slbit; -- external suspend output |
ESUSP_I : in slbit; -- external suspend input |
ITIMER : out slbit; -- instruction timer |
EBREAK : in slbit; -- execution break |
DBREAK : in slbit; -- data break |
HBPT : in slbit; -- hardware bpt |
EI_PRI : in slv3; -- external interrupt priority |
EI_VECT : in slv9_2; -- external interrupt vector |
EI_ACKM : out slbit; -- external interrupt acknowledge |
1062,6 → 1096,7
BRESET : out slbit; -- bus reset |
IB_MREQ_M : out ib_mreq_type; -- ibus master request (master) |
IB_SRES_M : in ib_sres_type; -- ibus slave response (master) |
DM_STAT_SE : out dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : out dm_stat_dp_type; -- debug and monitor status - dpath |
DM_STAT_VM : out dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : out dm_stat_co_type -- debug and monitor status - core |
1079,9 → 1114,13
); |
end component; |
|
-- this definition logically belongs into a 'for test benches' section' |
-- it is here for convenience to simplify instantiations. |
constant sbcntl_sbf_tmu : integer := 12; |
|
component pdp11_tmu_sb is -- trace and mon. unit; simbus wrapper |
generic ( |
ENAPIN : integer := 13); -- SB_CNTL signal to use for enable |
ENAPIN : integer := sbcntl_sbf_tmu); -- SB_CNTL for tmu |
port ( |
CLK : in slbit; -- clock |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath |
1243,6 → 1282,70
); |
end component; |
|
component pdp11_dmscnt is -- debug&moni: state counter |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0040#,16))); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_CO : in dm_stat_co_type -- debug and monitor status - core |
); |
end component; |
|
component pdp11_dmcmon is -- debug&moni: cpu monitor |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0048#,16)); |
AWIDTH : natural := 8); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : in dm_stat_co_type -- debug and monitor status - core |
); |
end component; |
|
component pdp11_dmhbpt is -- debug&moni: hardware breakpoint |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0050#,16)); |
NUNIT : natural := 2); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core |
HBPT : out slbit -- hw break flag |
); |
end component; |
|
component pdp11_dmhbpt_unit is -- dmhbpt - indivitial unit |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0050#,16)); |
INDEX : natural := 0); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox |
DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core |
HBPT : out slbit -- hw break flag |
); |
end component; |
|
-- ----- move later to pdp11_conf -------------------------------------------- |
|
constant conf_vect_pirq : integer := 8#240#; |
/trunk/rtl/w11a/pdp11_sys70.vhd
1,4 → 1,4
-- $Id: pdp11_sys70.vhd 677 2015-05-09 21:52:32Z mueller $ |
-- $Id: pdp11_sys70.vhd 712 2015-11-01 22:53:45Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
21,6 → 21,8
-- w11a/pdp11_mem70 |
-- ibus/ibd_ibmon |
-- ibus/ib_sres_or_3 |
-- w11a/pdp11_dmscnt |
-- rbus/rb_sres_or_4 |
-- w11a/pdp11_tmu_sb [sim only] |
-- |
-- Test bench: tb/tb_pdp11_core (implicit) |
29,6 → 31,10
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-11-01 712 1.1.4 use sbcntl_sbf_tmu |
-- 2015-07-19 702 1.1.3 use DM_STAT_SE |
-- 2015-07-04 697 1.1.2 change DM_STAT_SY setup; add dmcmon, dmhbpt; |
-- 2015-06-26 695 1.1.1 add pdp11_dmscnt support |
-- 2015-05-09 677 1.1 start/stop/suspend overhaul; reset overhaul |
-- 2015-05-01 672 1.0 Initial version (extracted from sys_w11a_*) |
------------------------------------------------------------------------------ |
77,7 → 83,10
|
architecture syn of pdp11_sys70 is |
|
signal RB_SRES_CPU : rb_sres_type := rb_sres_init; |
signal RB_SRES_CORE : rb_sres_type := rb_sres_init; |
signal RB_SRES_DMSCNT : rb_sres_type := rb_sres_init; |
signal RB_SRES_DMHBPT : rb_sres_type := rb_sres_init; |
signal RB_SRES_DMCMON : rb_sres_type := rb_sres_init; |
|
signal CP_CNTL : cp_cntl_type := cp_cntl_init; |
signal CP_ADDR : cp_addr_type := cp_addr_init; |
97,6 → 106,9
signal CACHE_FMISS : slbit := '0'; |
signal CACHE_CHIT : slbit := '0'; |
|
signal HBPT : slbit := '0'; |
|
signal DM_STAT_SE : dm_stat_se_type := dm_stat_se_init; |
signal DM_STAT_DP_L : dm_stat_dp_type := dm_stat_dp_init; |
signal DM_STAT_VM : dm_stat_vm_type := dm_stat_vm_init; |
signal DM_STAT_CO : dm_stat_co_type := dm_stat_co_init; |
120,7 → 132,7
CLK => CLK, |
RESET => RESET, |
RB_MREQ => RB_MREQ, |
RB_SRES => RB_SRES_CPU, |
RB_SRES => RB_SRES_CORE, |
RB_STAT => RB_STAT, |
RB_LAM => RB_LAM_CPU, |
GRESET => GRESET_L, |
143,8 → 155,7
ESUSP_O => open, |
ESUSP_I => '0', |
ITIMER => ITIMER, |
EBREAK => '0', |
DBREAK => '0', |
HBPT => HBPT, |
EI_PRI => EI_PRI, |
EI_VECT => EI_VECT, |
EI_ACKM => EI_ACKM, |
154,6 → 165,7
BRESET => BRESET_L, |
IB_MREQ_M => IB_MREQ_M, |
IB_SRES_M => IB_SRES_M, |
DM_STAT_SE => DM_STAT_SE, |
DM_STAT_DP => DM_STAT_DP_L, |
DM_STAT_VM => DM_STAT_VM, |
DM_STAT_CO => DM_STAT_CO |
214,7 → 226,67
IB_SRES_OR => IB_SRES_M |
); |
|
RB_SRES <= RB_SRES_CPU; -- currently single rbus device |
DMSCNT : if sys_conf_dmscnt generate |
begin |
I0: pdp11_dmscnt |
generic map ( |
RB_ADDR => slv(to_unsigned(16#0040#,16))) |
port map ( |
CLK => CLK, |
RESET => RESET, |
RB_MREQ => RB_MREQ, |
RB_SRES => RB_SRES_DMSCNT, |
DM_STAT_SE => DM_STAT_SE, |
DM_STAT_DP => DM_STAT_DP_L, |
DM_STAT_CO => DM_STAT_CO |
); |
end generate DMSCNT; |
|
DMCMON : if sys_conf_dmcmon_awidth > 0 generate |
begin |
I0: pdp11_dmcmon |
generic map ( |
RB_ADDR => slv(to_unsigned(16#0048#,16))) |
port map ( |
CLK => CLK, |
RESET => RESET, |
RB_MREQ => RB_MREQ, |
RB_SRES => RB_SRES_DMCMON, |
DM_STAT_SE => DM_STAT_SE, |
DM_STAT_DP => DM_STAT_DP_L, |
DM_STAT_VM => DM_STAT_VM, |
DM_STAT_CO => DM_STAT_CO |
); |
end generate DMCMON; |
|
DMHBPT : if sys_conf_dmhbpt_nunit > 0 generate |
begin |
I0: pdp11_dmhbpt |
generic map ( |
RB_ADDR => slv(to_unsigned(16#0050#,16)), |
NUNIT => sys_conf_dmhbpt_nunit) |
port map ( |
CLK => CLK, |
RESET => RESET, |
RB_MREQ => RB_MREQ, |
RB_SRES => RB_SRES_DMHBPT, |
DM_STAT_SE => DM_STAT_SE, |
DM_STAT_DP => DM_STAT_DP_L, |
DM_STAT_VM => DM_STAT_VM, |
DM_STAT_CO => DM_STAT_CO, |
HBPT => HBPT |
); |
end generate DMHBPT; |
|
RB_SRES_OR : rb_sres_or_4 |
port map ( |
RB_SRES_1 => RB_SRES_CORE, |
RB_SRES_2 => RB_SRES_DMSCNT, |
RB_SRES_3 => RB_SRES_DMHBPT, |
RB_SRES_4 => RB_SRES_DMCMON, |
RB_SRES_OR => RB_SRES |
); |
|
IB_MREQ <= IB_MREQ_M; -- setup output signals |
GRESET <= GRESET_L; |
CRESET <= CRESET_L; |
222,14 → 294,13
CP_STAT <= CP_STAT_L; |
DM_STAT_DP <= DM_STAT_DP_L; |
|
DM_STAT_SY.chit <= CACHE_CHIT; |
|
-- synthesis translate_off |
DM_STAT_SY.emmreq <= EM_MREQ; |
DM_STAT_SY.emsres <= EM_SRES; |
DM_STAT_SY.chit <= CACHE_CHIT; |
|
TMU : pdp11_tmu_sb |
generic map ( |
ENAPIN => 13) |
ENAPIN => sbcntl_sbf_tmu) |
port map ( |
CLK => CLK, |
DM_STAT_DP => DM_STAT_DP_L, |
/trunk/rtl/w11a/pdp11_dmscnt.vhd
0,0 → 1,353
-- $Id: pdp11_dmscnt.vhd 721 2015-12-29 17:50:50Z mueller $ |
-- |
-- Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
-- Software Foundation, either version 2, or at your option any later version. |
-- |
-- This program is distributed in the hope that it will be useful, but |
-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
-- for complete details. |
-- |
------------------------------------------------------------------------------ |
-- Module Name: pdp11_dmscnt - syn |
-- Description: pdp11: debug&moni: state counter |
-- |
-- Dependencies: memlib/ram_2swsr_rfirst_gen |
-- Test bench: - |
-- |
-- Target Devices: generic |
-- Tool versions: ise 14.7; viv 2014.4; ghdl 0.31 |
-- |
-- Synthesized (xst): |
-- Date Rev ise Target flop lutl lutm slic t peri |
-- 2015-06-26 695 14.7 131013 xc6slx16-2 91 107 0 41 s 5.4 |
-- |
-- Revision History: - |
-- Date Rev Version Comment |
-- 2015-12-28 721 1.1 use laddr/waddr; use ena instead of cnt; |
-- 2015-07-19 702 1.0 Initial version |
-- 2015-06-26 695 1.0 First draft |
------------------------------------------------------------------------------ |
-- |
-- rbus registers: |
-- |
-- Addr Bits Name r/w/f Function |
-- |
-- 00 cntl r/w/- control |
-- 01 clr r/w/- if 1 starts mem clear |
-- 00 ena r/w/- if 1 enables counting |
-- 01 addr r/w/- memory address |
-- 10:02 laddr r/w/- line address (state number) |
-- 01:00 waddr r/-/- word address (cleared on write) |
-- 10 15:00 data r/-/- memory data |
-- |
|
library ieee; |
use ieee.std_logic_1164.all; |
use ieee.numeric_std.all; |
|
use work.slvtypes.all; |
use work.memlib.all; |
use work.rblib.all; |
use work.pdp11.all; |
|
-- ---------------------------------------------------------------------------- |
|
entity pdp11_dmscnt is -- debug&moni: state counter |
generic ( |
RB_ADDR : slv16 := slv(to_unsigned(16#0040#,16))); |
port ( |
CLK : in slbit; -- clock |
RESET : in slbit; -- reset |
RB_MREQ : in rb_mreq_type; -- rbus: request |
RB_SRES : out rb_sres_type; -- rbus: response |
DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer |
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - data path |
DM_STAT_CO : in dm_stat_co_type -- debug and monitor status - core |
); |
end pdp11_dmscnt; |
|
|
architecture syn of pdp11_dmscnt is |
|
constant rbaddr_cntl : slv2 := "00"; -- cntl address offset |
constant rbaddr_addr : slv2 := "01"; -- addr address offset |
constant rbaddr_data : slv2 := "10"; -- data address offset |
|
constant cntl_rbf_clr : integer := 1; |
constant cntl_rbf_ena : integer := 0; |
subtype addr_rbf_mem is integer range 10 downto 2; |
subtype addr_rbf_word is integer range 1 downto 0; |
|
type state_type is ( |
s_idle, -- s_idle: rbus access or count |
s_mread -- s_mread: memory read |
); |
|
type regs_type is record |
state : state_type; -- state |
rbsel : slbit; -- rbus select |
clr : slbit; -- clr flag |
ena0 : slbit; -- ena flag |
ena1 : slbit; -- ena flag (delayed) |
snum0 : slv9; -- snum stage 0 |
snum1 : slv9; -- snum stage 1 |
same : slbit; -- same snum flag |
laddr : slv9; -- line addr |
waddr : slv2; -- word addr |
scnt : slv(35 downto 0); -- scnt buffer |
mbuf : slv20; -- lsb memory buffer |
end record regs_type; |
|
constant regs_init : regs_type := ( |
s_idle, -- state |
'0', -- rbsel |
'0','0','0', -- clr,ena0,ena1 |
(others=>'0'), -- snum0 |
(others=>'0'), -- snum1 |
'0', -- same |
(others=>'0'), -- laddr |
(others=>'0'), -- waddr |
(others=>'0'), -- scnt |
(others=>'0') -- mbuf |
); |
|
signal R_REGS : regs_type := regs_init; -- state registers |
signal N_REGS : regs_type := regs_init; -- next value state regs |
|
signal CMEM_CEA : slbit := '0'; |
signal CMEM_CEB : slbit := '0'; |
signal CMEM_WEA : slbit := '0'; |
signal CMEM_WEB : slbit := '0'; |
signal CMEM_ADDRA : slv9 := (others=>'0'); |
signal CMEM_DIB : slv(35 downto 0) := (others=>'0'); |
signal CMEM_DOA : slv(35 downto 0) := (others=>'0'); |
|
constant cmem_data_zero : slv(35 downto 0) := (others=>'0'); |
|
begin |
|
CMEM : ram_2swsr_rfirst_gen |
generic map ( |
AWIDTH => 9, |
DWIDTH => 36) |
port map ( |
CLKA => CLK, |
CLKB => CLK, |
ENA => CMEM_CEA, |
ENB => CMEM_CEB, |
WEA => CMEM_WEA, |
WEB => CMEM_WEB, |
ADDRA => CMEM_ADDRA, |
ADDRB => R_REGS.snum1, |
DIA => cmem_data_zero, |
DIB => CMEM_DIB, |
DOA => CMEM_DOA, |
DOB => open |
); |
|
proc_regs: process (CLK) |
begin |
|
if rising_edge(CLK) then |
if RESET = '1' then |
R_REGS <= regs_init; |
else |
R_REGS <= N_REGS; |
end if; |
end if; |
|
end process proc_regs; |
|
proc_next: process (R_REGS, RB_MREQ, DM_STAT_SE, |
DM_STAT_DP, DM_STAT_DP.psw, -- xst needs sub-records |
DM_STAT_CO, CMEM_DOA) |
|
variable r : regs_type := regs_init; |
variable n : regs_type := regs_init; |
|
variable irb_ack : slbit := '0'; |
variable irb_busy : slbit := '0'; |
variable irb_err : slbit := '0'; |
variable irb_dout : slv16 := (others=>'0'); |
variable irbena : slbit := '0'; |
|
variable icea : slbit := '0'; |
variable iwea : slbit := '0'; |
variable iweb : slbit := '0'; |
variable iaddra : slv9 := (others=>'0'); |
variable iscnt0 : slv(35 downto 0) := (others=>'0'); |
variable iscnt1 : slv(35 downto 0) := (others=>'0'); |
|
begin |
|
r := R_REGS; |
n := R_REGS; |
|
irb_ack := '0'; |
irb_busy := '0'; |
irb_err := '0'; |
irb_dout := (others=>'0'); |
irbena := RB_MREQ.re or RB_MREQ.we; |
|
icea := '0'; |
iwea := '0'; |
iweb := '0'; |
iaddra := r.snum0; |
|
-- rbus address decoder |
n.rbsel := '0'; |
if RB_MREQ.aval='1' then |
if RB_MREQ.addr(15 downto 2)=RB_ADDR(15 downto 2) then |
n.rbsel := '1'; |
end if; |
end if; |
|
case r.state is |
|
when s_idle => -- s_idle: rbus access or count ------ |
-- rbus transactions |
if r.rbsel = '1' then |
irb_ack := irbena; -- ack all accesses |
|
case RB_MREQ.addr(1 downto 0) is |
|
when rbaddr_cntl => -- cntl ------------------ |
if RB_MREQ.we = '1' then |
n.clr := RB_MREQ.din(cntl_rbf_clr); |
if RB_MREQ.din(cntl_rbf_clr) = '1' then -- if clr set |
n.laddr := (others=>'0'); -- reset mem addr |
end if; |
n.ena0 := RB_MREQ.din(cntl_rbf_ena); |
end if; |
|
when rbaddr_addr => -- addr ------------------ |
if RB_MREQ.we = '1' then |
if r.clr = '1' then -- if clr active |
irb_err := '1'; -- block addr writes |
else -- otherwise |
n.laddr := RB_MREQ.din(addr_rbf_mem); -- set mem addr |
n.waddr := (others=>'0'); -- clr word addr |
end if; |
end if; |
|
when rbaddr_data => -- data ------------------ |
if RB_MREQ.we = '1' then -- writes not allowed |
irb_err := '1'; |
end if; |
if RB_MREQ.re = '1' then |
if r.clr = '1' then -- if clr active |
irb_err := '1'; -- block data reads |
else -- otherwise |
case r.waddr is -- handle word addr |
when "00" => -- 1st access |
icea := '1'; -- enable mem read |
iaddra := r.laddr; -- of current line |
irb_busy := '1'; |
n.state := s_mread; |
when "01" => -- 2nd part |
n.waddr := "10"; -- inc word addr |
when "10" => -- 3rd part |
n.waddr := "00"; -- wrap to next line |
n.laddr := slv(unsigned(r.laddr) + 1); |
when others => null; |
end case; |
end if; |
end if; |
|
when others => -- <> -------------------- |
irb_err := '1'; |
end case; |
end if; |
|
when s_mread => --s_mread: memory read --------------- |
irb_ack := irbena; -- ack access |
n.waddr := "01"; -- inc word addr |
n.mbuf := CMEM_DOA(35 downto 16); -- capture msb part |
n.state := s_idle; |
|
when others => null; |
|
end case; |
|
-- rbus output driver |
if r.rbsel = '1' then |
case RB_MREQ.addr(1 downto 0) is |
when rbaddr_cntl => -- cntl ------------------ |
irb_dout(cntl_rbf_clr) := r.clr; |
irb_dout(cntl_rbf_ena) := r.ena0; |
when rbaddr_addr => -- addr ------------------ |
irb_dout(addr_rbf_mem) := r.laddr; |
irb_dout(addr_rbf_word) := r.waddr; |
when rbaddr_data => -- data ------------------ |
case r.waddr is |
when "00" => irb_dout := CMEM_DOA(15 downto 0); |
when "01" => irb_dout := r.mbuf(15 downto 0); |
when "10" => irb_dout(3 downto 0) := r.mbuf(19 downto 16); |
when others => null; |
end case; |
when others => null; |
end case; |
end if; |
|
-- latch state number |
-- 1 msb determined from cpu mode: 0 if kernel and 1 when user or super |
-- 8 lsb taken from sequencer snum |
n.snum0(8) := '0'; |
if DM_STAT_DP.psw.cmode /= c_psw_kmode then |
n.snum0(8) := '1'; |
end if; |
n.snum0(7 downto 0) := DM_STAT_SE.snum; |
n.snum1 := r.snum0; |
|
-- incrementer pipeline |
n.same := '0'; |
if r.snum0=r.snum1 and r.ena1 ='1' then -- in same state ? |
n.same := '1'; -- don't read mem and remember |
else -- otherwise |
icea := '1'; -- enable mem read |
end if; |
|
-- increment state count |
if r.same = '0' then -- was mem read ? |
iscnt0 := CMEM_DOA; -- take memory value |
else -- otherwise |
iscnt0 := r.scnt; -- use scnt reg |
end if; |
iscnt1 := slv(unsigned(iscnt0) + 1); -- increment |
n.scnt := iscnt1; -- and store |
|
-- finally setup memory access |
n.ena1 := r.ena0; |
if r.clr = '1' then -- mem clear action |
icea := '1'; |
iwea := '1'; |
iaddra := r.laddr; |
n.laddr := slv(unsigned(r.laddr) + 1); |
if r.laddr = "111111111" then |
n.clr := '0'; |
end if; |
elsif r.ena1 = '1' then -- state count action |
iweb := '1'; |
end if; |
|
N_REGS <= n; |
|
CMEM_CEA <= icea; |
CMEM_CEB <= iweb; |
CMEM_WEA <= iwea; |
CMEM_WEB <= iweb; |
CMEM_ADDRA <= iaddra; |
CMEM_DIB <= iscnt1; |
|
RB_SRES.ack <= irb_ack; |
RB_SRES.err <= irb_err; |
RB_SRES.busy <= irb_busy; |
RB_SRES.dout <= irb_dout; |
|
end process proc_next; |
|
end syn; |
/trunk/rtl/vlib/rlink/tb/tbcore_rlink.vhd
1,6 → 1,6
-- $Id: tbcore_rlink.vhd 649 2015-02-21 21:10:16Z mueller $ |
-- $Id: tbcore_rlink.vhd 712 2015-11-01 22:53:45Z mueller $ |
-- |
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- Copyright 2010-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
23,6 → 23,7
-- Tool versions: xst 11.4-14.7; ghdl 0.26-0.31 |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-11-01 712 3.1.3 proc_stim: drive SB_CNTL from start to avoid 'U' |
-- 2013-01-04 469 3.1.2 use 1ns wait for .sinit to allow simbus debugging |
-- 2011-12-25 445 3.1.1 add SB_ init drivers to avoid SB_VAL='U' at start |
-- 2011-12-23 444 3.1 redo clock handling, remove simclk, CLK now input |
176,7 → 177,8
SB_VAL <= 'Z'; |
SB_ADDR <= (others=>'Z'); |
SB_DATA <= (others=>'Z'); |
|
SB_CNTL <= (others=>'Z'); |
|
-- wait for 10 clock cycles (design run up) |
for i in 0 to 9 loop |
wait until rising_edge(CLK); |
/trunk/rtl/vlib/rlink/rlink_core.vhd
1,6 → 1,6
-- $Id: rlink_core.vhd 641 2015-02-01 22:12:15Z mueller $ |
-- $Id: rlink_core.vhd 718 2015-12-26 15:59:48Z mueller $ |
-- |
-- Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- Copyright 2007-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
-- |
-- This program is free software; you may redistribute and/or modify it under |
-- the terms of the GNU General Public License as published by the Free |
32,6 → 32,7
-- |
-- Synthesized (xst): |
-- Date Rev ise Target flop lutl lutm slic t peri |
-- 2015-12-26 718 14.7 131013 xc6slx16-2 312 460 16 150 s 7.0 ver 4.1 |
-- 2014-12-20 614 14.7 131013 xc6slx16-2 310 453 16 146 s 6.8 ver 4.0 |
-- 2014-08-13 581 14.7 131013 xc6slx16-2 160 230 0 73 s 6.0 ver 3.0 |
-- 2014-08-13 581 14.7 131013 xc3s1000-4 160 358 0 221 s 8.9 ver 3.0 |
38,6 → 39,7
-- |
-- Revision History: |
-- Date Rev Version Comment |
-- 2015-12-26 718 4.1.1 add proc_sres: strip 'x' from RB_SRES.dout |
-- 2014-12-21 617 4.1 use stat(_rbf_rbtout) to signal rbus timeout |
-- 2014-12-20 614 4.0 largely rewritten; 2 FSMs; v3 protocol; 4 bit STAT |
-- 2014-08-15 583 3.5 rb_mreq addr now 16 bit; add s_rxaddrl state |
416,9 → 418,10
|
signal RBSEL : slbit := '0'; |
|
signal RB_MREQ_L : rb_mreq_type := rb_mreq_init; -- internal mreq |
signal RB_SRES_CONF : rb_sres_type := rb_sres_init; -- config sres |
signal RB_SRES_TOT : rb_sres_type := rb_sres_init; -- total sres |
signal RB_MREQ_L : rb_mreq_type := rb_mreq_init; -- internal mreq |
signal RB_SRES_CLEAN : rb_sres_type := rb_sres_init; -- cleaned rb_sres |
signal RB_SRES_CONF : rb_sres_type := rb_sres_init; -- config sres |
signal RB_SRES_TOT : rb_sres_type := rb_sres_init; -- total sres |
|
signal RL_BUSY_L : slbit := '0'; |
signal RL_DO_L : slv9 := (others=>'0'); |
500,11 → 503,31
|
RB_SRES_OR : rb_sres_or_2 |
port map ( |
RB_SRES_1 => RB_SRES, |
RB_SRES_1 => RB_SRES_CLEAN, |
RB_SRES_2 => RB_SRES_CONF, |
RB_SRES_OR => RB_SRES_TOT |
); |
|
proc_sres: process (RB_SRES) |
variable sres : rb_sres_type := rb_sres_init; |
variable datax01 : slv16 := (others=>'0'); |
variable data01 : slv16 := (others=>'0'); |
begin |
sres.ack := to_x01(RB_SRES.ack); |
sres.busy := to_x01(RB_SRES.busy); |
sres.err := to_x01(RB_SRES.err); |
sres.dout := to_x01(RB_SRES.dout); |
|
if sres.ack = '1' and sres.busy = '0' and is_x(sres.dout) then |
assert false |
report "rlink_core: seen 'x' in rb_sres.data" |
severity warning; |
sres.dout := (others=>'1'); |
end if; |
|
RB_SRES_CLEAN <= sres; |
end process proc_sres; |
|
proc_regs: process (CLK) |
begin |
|
/trunk/doc/INSTALL.txt
1,4 → 1,4
# $Id: INSTALL.txt 654 2015-03-01 18:45:38Z mueller $ |
# $Id: INSTALL.txt 722 2015-12-30 19:45:46Z mueller $ |
|
Guide to install and build w11a systems, test benches and support software |
|
65,7 → 65,7
- libusb 1.0 (>= 1.0.6) |
-> package: libusb-1.0-0-dev |
- Perl (>= 5.10) (usually included in base installations) |
- Tcl (>= 8.5), with tclreadline support |
- Tcl (>= 8.6), with tclreadline support |
-> package: tcl tcl-dev tcllib tclreadline |
|
- for VHDL simulations one needs |
114,8 → 114,8
In most cases the boost library version coming with the distribution will |
work, similar for Tcl, in those cases simply use |
|
export TCLINC=/usr/include/tcl8.5 |
export TCLLIBNAME=tcl8.5 |
export TCLINC=/usr/include/tcl8.6 |
export TCLLIBNAME=tcl8.6 |
|
and don't setup BOOSTINC and BOOSTLIB. |
|
/trunk/doc/w11a_tb_guide.txt
1,4 → 1,4
# $Id: w11a_tb_guide.txt 688 2015-06-05 13:15:10Z mueller $ |
# $Id: w11a_tb_guide.txt 722 2015-12-30 19:45:46Z mueller $ |
|
Note: Only ISE based test benches are currently documented ! |
The Vivado test environemnt is still in it's infancy ! |
260,11 → 260,12
cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb |
tbrun_tbwrri --lsuf tbench_dsim --pack rw11 --cuff tb_w11a_n2 \ |
"rw11::setup_cpu" "rw11::tbench @cpu_all.dat" |
-> 2847860.0 ns 142382: DONE |
-> real 0m33.013s user 0m31.870s sys 0m0.569s |
-> 3204500.0 ns 160214: DONE |
-> real 0m44.753s user 0m45.361s sys 0m0.616s |
|
tbrun_tbwrri --lsuf tbench_dsim --pack rw11 --cuff tb_w11a_n2 \ |
"rw11::setup_cpu" "rw11::tbench @dev_all.dat" |
-> 1058440.0 ns 52911: DONE |
-> real 0m15.249s user 0m15.195s sys 0m0.236s |
-> 1369960.0 ns 68487: DONE |
-> real 0m21.399s user 0m21.480s sys 0m0.254s |
|
|
/trunk/doc/README-w11a_V.60-w11a_V0.70.txt
0,0 → 1,620
$Id: README-w11a_V.60-w11a_V0.70.txt 695 2015-06-28 11:22:52Z mueller $ |
|
Release notes for w11a |
|
Table of content: |
|
1. Documentation |
2. Change Log |
|
1. Documentation ------------------------------------------------------------- |
|
More detailed information on installation, build and test can be found |
in the doc directory, specifically |
|
* README.txt: release notes |
* README_known_issues.txt: known issues |
* INSTALL.txt: installation and building test benches and systems |
* FILES.txt: short description of the directory layout, what is where ? |
* w11a_tb_guide.txt: running test benches |
* w11a_os_guide.txt: booting operating systems |
* w11a_known_issues.txt: known differences, limitations and issues |
|
2. Change Log ---------------------------------------------------------------- |
|
- w11a_V0.60 -> w11a_V0.70 cummulative summary of key changes |
- Bugfix for DIV instruction (in w11a_V0.61, see ECO-026-div.txt) |
- revised rbus protocol V4 (in w11a_V0.62, see README_Rlink_V4.txt) |
- add basic Vivado support (in w11a_V0.64) |
- add Nexys4 and Basys3 port of w11a (in w11a_V0.64) |
- add RL11/RL02 disk support (in w11a_V0.64) |
- add RH70+RP/RM disk support (in w11a_V0.65) |
- add TM11/TY10 tape support (in w11a_V0.66) |
- reference system now ISE 14.7, Vivado 2014.4; Ubuntu 14.04 64 bit, ghdl 0.31 |
|
- trunk (2015-06-21: svn rev 33(oc) 693(wfjm); tagged w11a_V0.70) +++++++++++ |
- Preface |
- resolved known issue V0.66-2: operation with multiple RP or RM disks |
under 211bsd works now. Issue was caused by a faulty error check. |
- resolved bug tracker issue 2015-06-06: the tm11 offline function works |
now as expected. Issue was caused by de-referencing a null pointer. |
- resolved bug tracker request 2015-06-05: the values returned as drive |
serial number were interpreted by 211bsd standalone code as a signature |
of SI drives, which made disk partitioning a bit cumbersome. Changed the |
scheme used to generate drive serial numbers such that they never match |
these 3rd party drive characteristics. The 211bsd installation on a |
RM05 is documented with the 211bsd_tm oskit. |
- the w11a designs grow larger, filling the FPGA's on Nexys2 and Nexys3 |
to ~50% (n2) or 67% (n3). To reach timing closure without fine tuning |
constraints the cpu clock had to be reduced to |
sys_w11a_n2 now 52 MHz (was 54 MHz) |
sys_w11a_n3 now 64 MHz (was 68 MHz) |
|
- w11a has now a complete set of mass storage peripherals. This is a good |
reason of a major release, thus go for version V0.70. |
|
- there are many known issues, and in many cases only core functionality |
used by operating systems has been implemented. The missing parts will |
be implemented in the upcoming releases towards V0.80, also much more |
intensive testing, especially with maindecs (aka xxdp) will be done. |
|
- Summary |
- rhrp and tm11 bug fixes |
- no major functionality added |
|
- New features |
|
- Changes |
- renames |
- tools/oskit/211bsd_tm/211bsd_tm_boot.* -> 211bsd_tm_rp06_boot.* |
- functional changes |
- rtl/ibus/ibdr_rhrp - modify sn register to avoid 211bsd issues |
- tools/bin/create_disk - support RM80 disks |
- tools/tcl/rutil/util.tcl - add dohook |
- tools/oskit/*/*_boot.tcl - add preinithook and preboothook |
|
- Bug fixes |
- rtl/ibus/ibdr_rhrp - set er1.rmr only when unit busy |
- set cs2.pge only when controller busy |
- tools/src/librw11 |
- Rw11CntlTM11 - fix crash when offline function was executed |
|
- Known issues |
- all issues: see README_known_issues.txt |
- resolved issues: |
- V0.66-2: operation with multiple RP/RM drives works now under 211bsd |
|
- trunk (2015-06-05: svn rev 31(oc) 687(wfjm); untagged w11a_V0.66) +++++++++ |
- Preface |
|
- Since the previous release a full set of small, medium and large sized |
disks (RK,RL,RP/RM) is available, covering all use cases. Still missing |
was a tape system, which allows to install systems from distribution tapes |
but is also very handy for data exchange. This release adds a TM11/TU10 |
tape controller emulation. This is much simpler to implement than a |
massbus based TU16 or TU78 controller. Because storage is emulated there |
is neither a speed nor a capacity advantage of 1600 or 6250 bpi drives, |
so for all practical purposes the simple 800 bpi TU10 drive emulation is |
fully adequate. |
The TM11/TU10 was tested under 211bsd with creating a tape distribution |
kit and building a RP06 based system from such a tape. A 211bsd_tm |
oskit is provided with a recipe to restore a RP06 from tape. |
|
- bug fixes |
- the ti_rri event loop aborted under heavy load with three devices, seen |
when RP disk, TM tape and DL11 run simultaneously. Was caused by a race |
condition in attention handling and dispatching. |
- the boot command failed when cpu was running and the unit not decoded |
properly, so boots from units other then 0 failed. |
|
- Summary |
- added TM11/TU10 tape support |
|
- New features |
- new modules |
- rtl/ibus/ibdr_rm11 - ibus controller for RM11 |
- tools/bin |
- file2tap - create a tap container from disk files |
- tap2file - split a tap container into disk files |
- tools/src/librw11 |
- Rw11(Cntl|Unit)TM11 - Controller/Unit for TM11 |
- Rw11UnitTape(|Base) - support for tape units |
- Rw11VirtTape(|Tap) - virtual tapes (generic and tap containers) |
- tools/tcl/rw11 |
- tbench.tcl - support sub directories and return in tests |
- new oskits |
- tools/oskit/211bsd_tm - 2.11BSD tape distribution kit (for RP06) |
|
- Changes |
- renames |
- tools/tbench - the text benches were re-organized and |
grouped now in sub directories: |
cp for w11a control port |
w11a for w11a CPU tests |
rhrp for RHRP device tests |
tm11 for TM11 device tests |
- functional changes |
- tools/bin/create_disk - add RM80 support |
|
- Bug fixes |
- tools/src/librlink |
- RlinkServer - fix race condition in attention handling |
- tools/src/librw11 |
- Rw11Cpu - stop cpu before load, proper unit handling |
|
- Known issues |
- all issues: see README_known_issues.txt |
- resolved issues: -- none -- |
- new issues: |
- V0.66-1: the TM11 controller transfers data byte wise (all disk do it |
16bit word wise) and allows for odd byte length transfers. Odd length |
transfers are currently not supported and rejected as invalid command. |
Odd byte length records aren't used by OS, if at all, so in practice |
this limitation isn't relevant. |
- V0.66-2: using two RP06 drives in parallel under 211bsd leads to a |
hangup of the system after a short time. Currently only operation |
of a single drive works reliably. |
|
- trunk (2015-05-14: svn rev 30(oc) 681(wfjm); untagged w11a_V0.65) +++++++++ |
- Preface |
|
- With small RK05 or RL02 sized disks only quite reduced OS setups could |
be booted, full featured systems were beyond reach. Now finally large |
disks are available, with a RH70 + RP/RM disk controller emulation. It |
supports up to four disks and allows now to run full featured 211bsd |
or rsx-11mplus systems. |
|
- to track down issues with ibus devices a 'ibus monitor' was added, it can |
record in the default setup up to 511 ibus transactions. An address filter |
allows to select accesses of one device. The ibd_ibmon tcl package |
contains the appropriate support scripts. |
|
- several cleanups |
- factor out common blocks on sys_w11a_* systems: the core+rbus+cache |
logic of single cpu systems now contained in pdp11_sys70, and the |
human I/O for digilent boards now in pdp11_hio70. |
- cpu start/stop logic cleanup: new command set with simple commands. |
Add also a new suspend/resume mechanism, which allows to hold the cpu |
without leaving the 'run state'. While suspended all timers are frozen. |
Very helpful when debugging, will be the basis for a hardware break |
point logic in a later release. |
- xon/xoff consolidation: escaping now done in cdata2byte/byte2cdata in |
FPGA and in RlinkPacketBufSnd/RlinkPacketBufRcv in backend. The extra |
escaping level in serport_xonrx/serport_xontx isn't used anymore, the |
special code in RlinkPortTerm has been removed. This allows to use |
xon/xoff flow control also in simulation links via RlinkPortFifo. |
- status check cleanup: it is very helpful to have a default status check |
and an easy way to modify it cases where some error flags are expected |
(e.g. on device polls). In the old logic status and data checks were |
done via RlinkCommandExpect. The new logic reflects that status checks |
are the normal case, and store the status check pattern in RlinkCommand. |
The meaning of expect masks for status and data is inverted, now a '1' |
means that the bit is checked (before it meant the bit is ignored). |
The default status check pattern is still in RlinkContext, but will be |
copied to RlinkCommand when the list is processed. RlinkCommandExpect |
handles now only data checks. |
|
- and bug fixes |
- rk11 cleanup: since the first days 211bsd autoconfig printed |
rk ? csr 177400 vector 220 didn't interrupt |
for boots from a RK11 it didn't have consequences, but when booted from |
a RL,RP, or RM disk this prevents that the RK11 disks are configured. |
Was caused by a missing interrupt after device reset. Now fixed. |
|
- Summary |
- added RH70/RP/RM big disk support |
- many cleanups |
|
- New features |
- new directory trees for |
- tools/asm-11/lib - definitions and macros for asm-11 |
- new modules |
- rtl/vlib/serport |
- serport_master - serial port module, master side |
- rtl/ibus/ibd_ibmon - ibus monitor |
- rtl/ibus/ibdr_rhrp - ibus controller for RH70 plus RP/RM drives |
- rtl/w11a/pdp11_sys70 - 11/70 system - single core +rbus,debug,cache |
- rtl/w11a/pdp11_hio70 - hio led and dsp for sys70 |
- tools/src/librw11 |
- Rw11(Cntl|Unit)RHRP - Controller/Unit for RHRP |
- tools/tbench |
- test_rhrp_* - test tbench for RHRP |
- new oskits |
- tools/oskit/211bsd_rp - new oskit for 2.11BSD on RP06 |
- tools/oskit/rsx11mp-30_rp - new oskit for RSX-11Mplus V3.0 on RP06 |
|
- Changes |
- renames |
- rtl/w11a/pdp11_sys70 -> pdp11_reg70 (_sys70 now different function) |
- functional changes |
- rtl/bplib/*/tb/tb_* - use serport_master instead of |
serport_uart_rxtx, allow xon/xoff |
- rtl/bplib/fx2rlink |
- rlink_sp1c_fx2 - add rbd_rbmon (optional via generics) |
- rtl/vlib/rlink/rlink_sp1c - add rbd_rbmon (optional via generics) |
- rtl/ibus/ibd_kw11l - freeze timer when cpu suspended |
- tools/bin/tbrun_tbwrri - add --fusp,--xon |
- tools/bin/ti_w11 - rename -fu->-fc, add -f2,-fx; setup defaults |
- tools/bin/librlink |
- RlinkCommandList - add SetLastExpect() methods |
- RlinkPort - add XonEnable() |
- RlinkPortCuff - add noinit attribute |
- RlinkPort(Fifo|Term) - add xon,noinit attributes |
- tools/src/librw11 |
- Rw11Cpu - add AddRbibr(), AddWbibr(), RAddrMap() |
- tools/bin/librlinktpp |
- RtclRlinkConnect - errcnt: add -increment |
log: add -bare,-info.. |
wtlam: allow tout=0 for attn cleanup |
init: new command |
exec: drop -estatdef |
- RtclRlinkServer - get/set interface added |
- tools/src/librwxxtpp |
- RtclRw11Cntl - start: new command |
- RtclRw11Cpu - cp: add -rbibr, wbibr, -rreg,...,-init |
- cp: add -estat(err|nak|tout), drop estatdef |
- rename amap->imap; add rmap |
|
- Bug fixes |
- rtl/ibus |
- ibdr_rk11 - interrupt after dreset and seek command start |
- tools/src/librlink |
- RlinkConnect - WaitAttn(): return 0. (not -1.) if poll |
- RlinkServer - Stop(): fix race in (could hang) |
|
- Known issues |
- all issues: see README_known_issues.txt |
- resolved issues: -- none -- |
- new issues: |
- V0.65-1: ti_rri sometimes crashes in normal rundown (exit or ^D) when |
a cuff: type rlink is active. One gets |
terminate called after throwing an instance of 'Retro::Rexception' |
what(): RlinkPortCuff::Cleanup(): driver thread failed to stop |
doesn't affect normal operation, will be fixed in upcoming release. |
- V0.65-2: some exotic RH70/RP/RM features and conditions not implemented |
- last block transfered flag (in DS) |
- CS2.BAI currently ignored and not handled |
- read or write 'with header' gives currently ILF |
All this isn't used by any OS, so in practice not relevant. |
|
- trunk (2015-03-01: svn rev 29(oc) 655(wfjm); untagged w11a_V0.64) +++++++++ |
|
- Preface |
- The w11 project started on a Spartan-3 based Digilent S3board, and soon |
moved on to a Nexys2 with much better connectivity. Next step was the |
Spartan-6 based Nexys3. Now is time to continue with 7-Series FPGAs. |
- When Vivado started in 2013 it was immediately clear that the architecture |
is far superior to ISE. But tests with the first versions were sobering, |
the w11a design either didn't compile at all, or produced faulty synthesis |
results. In 2014 Vivado matured, and the current version 2014.4 works |
fine with the w11a code base. |
- The original Nexys4 board allowed to quickly port Nexys3 version because |
both have the same memory chip. The newer Nexys4 DDR will be addressed |
later. |
- The BRAM capacity of FPGAs increased significantly over time. The low |
cost Basys3 board with the second smallest Artix-7 (XC7A35T) has 200 KB |
BRAM. That allows to implement a purely BRAM based w11a system with |
176 kB memory. Not enough for 2.11BSD, but for many other less demanding |
OS available for a PDP11. |
- The Nexyx4 and Basys3 have 16 LEDs. Not quite the 'blinking lights' |
console of the classic 11/45 and 11/70, but enough to display the |
well known OS typical light patterns the veterans remember so well. |
- With a new design tool, a new FPGA generation, two new boards, and a |
new interface for the rlink connection that some of the code and tools |
base had to be re-organized. |
- Last but not least: finally access to a bit bigger disks: RL11 support |
- Many changes, some known issues, some rough edges may still lurke around |
|
- Summary |
- added support for Vivado |
- added support for Nexys4 and Basys3 boards |
- added RL11 disk support |
- lots of documentation updated |
|
- New features |
- new directory trees for |
- rtl/bplib/basys3 - support for Digilent Basys3 board |
- rtl/bplib/nexys4 - support for Digilent Nexys4 board |
- rtl/make_viv - make includes for Vivado |
- new files |
- tools/bin/xviv_ghdl_unisim - ghdl compile Vivado UNISIM & UNIMACRO libs |
- new modules |
- rtl/ibus/ibdr_rl11 - ibus controller for RL11 |
- rtl/vlib/rlink/ioleds_sp1c - io activity leds for rlink+serport_1clk |
- rtl/vlib/xlib |
- s7_cmt_sfs_gsim - Series-7 CMT: simple vhdl model |
- s7_cmt_sfs_unisim - Series-7 CMT: wrapper for UNISIM |
- rtl/w11a |
- pdp11_bram_memctl - simple BRAM based memctl |
- pdp11_dspmux - mux for hio display |
- pdp11_ledmux - mux for hio leds |
- pdp11_statleds - status led generator |
- tools/src/librw11/ |
- Rw11*RL11 - classes for RL11 disk handling |
- tools/src/librwxxtpp |
- RtclRw11*RL11 - tcl iface for RL11 disk handling |
- new systems |
- rtl/sys_gen/tst_rlink - rlink tester |
- basys3/sys_tst_rlink_b3 - for Basys3 |
- nexys4/sys_tst_rlink_n4 - for Nexys4 |
- rtl/sys_gen/tst_serloop - serport loop tester |
- nexys4/sys_tst_serloop_n4 - for Nexys4 |
- rtl/sys_gen/tst_snhumanio - human I/O tester |
- basys3/sys_tst_snhumanio_b3 - for Basys3 |
- nexys4/sys_tst_snhumanio_n4 - for Nexys4 |
- rtl/sys_gen/w11a - w11a |
- basys3/sys_w11a_b3 - small BRAM only (176 kB memory) |
- nexys4/sys_w11a_n4 - with full 4 MB memory using cram |
- new oskits |
- tools/oskit/211bsd_rl - new oskit for 2.11BSD on RL02 |
- tools/oskit/rt11-53_rl - new oskit for RT11 V5.3 on RL02 |
- tools/oskit/xxdp_rl - new oskit for XXDP 22 and 25 on RL02 |
|
- Changes |
- renames |
- ensure that old ISE and new Vivado co-exists, ensure telling names |
- rtl/make -> make_ise |
- rtl/bplib/bpgen/sn_4x7segctl -> sn_7segctl |
- tools/bin/isemsg_filter -> xise_msg_filter |
- tools/bin/xilinx_ghdl_unisim -> xise_ghdl_unisim |
- tools/bin/xilinx_ghdl_simprim -> xise_ghdl_simprim |
|
- retired files |
- rtl/bplib/fx2lib |
- fx2_2fifoctl_as - obsolete, wasn't actively used since long |
- tools/bin |
- set_ftdi_lat - obsolete, since kernel 2.6.32 the default is 1 ms |
- xilinx_vhdl_chop - obsolete, since ISE 11 sources come chopped |
|
- functional changes |
- $RETROBASE/Makefile - re-structured, many new targets |
- rtl/bplib/bpgen |
- sn_7segctl - handle also 8 digit displays |
- sn_humanio - configurable SWI and DSP width |
- sn_humanio_rbus - configurable SWI and DSP width |
- rtl/vlib/serport |
- serport_1clock - export fractional part of divider |
- rtl/ibus |
- ibdr_maxisys - add RL11 (ibdr_rl11) |
- rtl/sys_gen/w11a/* |
- sys_w11a_* - use new led and dsp control modules |
- tools/src/librlink |
- RlinkConnect - drop LogOpts, indivitual getter/setter |
- RlinkPortTerm - support custom baud rates (5M,6M,10M,12M) |
- tools/src/librtcltools |
- RtclGetList - add '?' (key list) and '*' (kv list) |
- RtclSetList - add '?' (key list) |
- RlogFile - Open(): now with cout/cerr support |
- tools/src/librlinktpp |
- RtclRlinkConnect - drop config cmd, use get/set cmd |
- RtclRlinkPort - drop config cmd, use get/set cmd |
- tools/src/librw11 |
- Rw11Rdma - PreExecCB() with nwdone and nwnext |
- Rw11UnitDisk - add Nwrd2Nblk() |
- tools/src/librwxxtpp |
- RtclRw11CntlFactory - add RL11 support |
- tools/bin |
- xise_ghdl_unisim - handle also UNIMACRO lib |
- vbomconv - handle Vivado flows too |
|
- Bug fixes |
- tools/src/librw11 |
- Rw11CntlRK11 - revise RdmaPostExecCB() logic |
|
- Known issues |
- V0.64-7: ghdl simulated OS boots via ti_w11 (-n4 ect options) fail due to |
a flow control issue (likely since V0.63). |
- V0.64-6: IO delays still unconstraint in vivado. All critical IOs use |
explicitly IOB flops, thus timing well defined. |
- V0.64-5: w11a_tb_guide.txt covers only ISE based tests (see also V0.64-4). |
- V0.64-4: No support for the Vivado simulator (xsim) yet. With ghdl only |
functional simulations, post synthesis (_ssim) fails to compile. |
- V0.64-3: Highest baud rate with basys3 and nexys4 is 10 MBaud. 10 MBaud |
is not supported according to FTDI, but works. 12 MBaud in next release. |
- V0.64-2: rlink throughput on basys3/nexys4 limited by serial port stack |
round trip times. Will be overcome by libusb based custom driver. |
- V0.64-1: The large default transfer size for disk accesses leads to bad |
throughput in the DL11 emulation for low speed links, like the |
460kBaud the S3board is limited too. Will be overcome by a DL11 |
controller with more buffering. |
- V0.62-2: rlink v4 error recovery not yet implemented, will crash on error |
- V0.62-1: Command lists aren't split to fit in retransmit buffer size |
{last two issues not relevant for w11 backend over USB usage because |
the backend produces proper command lists and the USB channel is |
usually error free} |
|
- trunk (2015-01-04: svn rev 28(oc) 629(wfjm); untagged w11a_V0.63) +++++++++ |
|
- Summary |
- the w11a rbus interface used so far a narrow dynamically adjusted |
rbus->ibus window. Replaces with a 4k word window for whole IO page. |
- utilize rlink protocol version 4 features in w11a backend |
- use attn notifies to dispatch attn handlers |
- use larger blocks (7*512 rather 1*512 bytes) for rdma transfers |
- use labo and merge csr updates with last block transfer |
- this combined reduces the number of round trips by a factor 2 to 3, |
and in some cases the throughput accordingly. |
|
- Remarks on reference system |
- still using tcl 8.5 (even though 8.6 is now default in Ub 14.04) |
- don't use doxygen 1.8.8 and 1.8.9, it fails to generate vhdl docs |
|
- New features |
- new modules |
- tools/bin |
- ghdl_assert_filter - filter to suppress startup warnings |
- tbrun_tbw - wrapper for tbw based test benches |
- tbrun_tbwrri - wrapper for ti_rri + tbw based test benches |
- tools/src/librw11 |
- Rw11Rdma - Rdma engine base class |
- Rw11RdmaDisk - Rdma engine for disk emulation |
|
- Changes |
- rtl/vlib/rlink |
- rlink_core - use 4th stat bit to signal rbus timeout |
- rtl/vlib/rbus |
- rbd_rbmon - reorganized, supports now 16 bit addresses |
- rtl/w11a |
- pdp11_core_rbus - use full size 4k word ibus window |
- tools/bin/tbw - add -fifo and -verbose options |
- tools/src/librtools |
- Rexception - add ctor from RerrMsg |
- tools/src/librlink |
- RlinkCommandExpect - rblk/wblk done counts now expectable |
- RlinkConnect - cleanups and minor enhancements |
- RlinkServer - use attn notifies to dispatch handlers |
- tools/src/librw11 |
- Rw11CntlRK11 - re-organize, use now Rw11RdmaDisk |
- Rw11Cpu - add ibus address map |
- tools/src/librwxxtpp |
- RtclRw11CntlRK11 - add get/set for ChunkSize |
- RtclRw11Cpu - add amap sub-command for ibus map access |
|
- Resolved known issues from V0.62 |
- the rbus monitor (rbd_rbmon) has been updated to handle 16 bit addresses |
|
- Known issues |
- (V0.62): rlink v4 error recovery not yet implemented, will crash on error |
- (V0.62): command lists aren't split to fit in retransmit buffer size |
{both issues not relevant for w11 backend over USB usage because the |
backend produces proper command lists and the USB channel is error free} |
|
- trunk (2014-12-20: svn rev 27(oc) 614(wfjm); untagged w11a_V0.62) +++++++++ |
|
- Summary |
- migrate to rlink protocol version 4 |
- Goals for rlink v4 |
- 16 bit addresses (instead of 8 bit) |
- more robust encoding, support for error recovery at transport level |
- add features to reduce round trips |
- improved attention handling |
- new 'list abort' command |
- For further details see README_Rlink_V4.txt |
- use own C++ based tcl shell tclshcpp instead of tclsh |
|
Notes: |
1. rlink protocol, core, and backend are updated in this release |
2. error recovery in backend not yet implemented |
3. the designs using rlink are still essentially unchanged |
4. the new rlink v4 features will be exploited in upcoming releases |
|
- New reference system |
The development and test system was upgraded from Kubuntu 12.04 to 14.04. |
The version of several key tools and libraries changed: |
linux kernel 3.13.0 (was 3.2.0) |
gcc/g++ 4.8.2 (was 4.6.3) |
boost 1.54 (was 1.46.1) |
libusb 1.0.17 (was 1.0.9) |
perl 5.18.2 (was 5.14.2) |
tcl 8.5.15 (was 8.5.11) |
sdcc 3.3.0 (was 2.9.0) |
doxygen 1.8.7 {installed from sources; Ub 14.04 has 1.8.6} |
|
Notes: |
1. still using tcl 8.5 (even though 8.6 is now default in Ub 14.04) |
2. sdcc 3.x is not source compatible with sdcc 2.9. The Makefile |
allows to use both, see tools/fx2/src/README.txt . |
3. don't use doxygen 1.8.8, it fails to generate vhdl docs |
|
- New features |
- new environment variables TCLLIB and TCLLIBNAME. TCLLIBNAME must be |
defined, and hold the library name matching the Tcl version already |
specified with TCLINC. |
- new modules |
- rtl/vlib/comlib/crc16 - 16 bit crc generator (replaces crc8) |
- tools/src/tclshcpp/* - new tclshcpp shell |
|
- Changes |
- rtl/vlib/comlib |
- byte2cdata,cdata2byte - re-write, commas now 2 byte sequences |
- rtl/vlib/rlink |
- rlink_core - re-write for rlink v4 |
- rtl/*/* - use new rlink v4 iface and 4 bit STAT |
- rtl/vlib/rbus/rbd* - new addresses in 16 bit rlink space |
- rtl/vlib/simlib/simlib - add simfifo_*, wait_*, writetrace |
- tools/bin/ |
- fx2load_wrapper - use _ic instead of _as as default firmware |
- ti_rri - use tclshcpp (C++ based) rather tclsh |
- tools/fx2/bin/*.ihx - recompiled with sdcc 3.3.0 + bugfixes |
- tools/fx2/src/Makefile - support sdcc 3.3.0 |
- tools/src/ |
- */*.cpp - adopt for rlink v4; use nullptr |
- librlink/RlinkCrc16 - 16 crc, replaces RlinkCrc8 |
- librlink/RlinkConnect - many changes for rlink v4 |
- librlink/RlinkPacketBuf* - re-write for for rlink v4 |
- tools/tcl/*/*.tcl - adopt for rlink v4 |
- renames: |
- tools/bin/telnet_starter -> tools/bin/console_starter |
|
- Bug fixes |
- tools/fx2/src |
- dscr_gen.A51 - correct string 0 descriptor |
- lib/syncdelay.h - handle triple nop now properly |
|
- Known issues |
- rlink v4 error recovery not yet implemented, will crash on error |
- command lists aren't split to fit in retransmit buffer size |
{both issues not relevant for w11 backend over USB usage because the |
backend produces proper command lists and the USB channel is error free} |
- the rbus monitor (rbd_rbmon) not yet handling 16 bit addresses and |
therefore of limited use |
|
- trunk (2014-08-08: svn rev 25(oc) 579(wfjm); tagged w11a_V0.61) +++++++++++ |
|
- Summary |
- The div instruction gave wrong results in some corner cases when either |
divisor or quotient were the largest negative integer (100000 or -32768). |
This is corrected now, for details see ECO-026-div.txt |
- some minor updates and fixes to support scripts |
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt |
|
- New features |
- the Makefile's for in all rtl building block directories allow now to |
configure the target board for a test synthesis via the XTW_BOARD |
environment variable or XTW_BOARD=<board name> make option. |
|
- Changes |
- tools/bin/asm-11 - add call and return opcodes |
- tools/bin/create_disk - add RM02,RM05,RP04,RP07 support |
- tools/bin/tbw - use xtwi to start ISim models |
- tools/bin/ticonv_pdpcp - add --tout and --cmax; support .sdef |
- tools/dox/*.Doxyfile - use now doxygen 1.8.7 |
- tools/src/librw11 |
- Rw11CntlRK11 - add statistics |
|
- Bug fixes |
- rtl/w11a - div bug ECO-026 |
- pdp11_munit - port changes; fix divide logic |
- pdp11_sequencer - s_opg_div_sr: check for late div_quit |
- pdp11_dpath - port changes for pdp11_munit |
- tools/bin/create_disk - repair --boot option (was inaccessible) |
- tools/bin/ti_w11 - split args now into ti_w11 opts and cmds |
- tools/src/librwxxtpp |
- RtclRw11Cpu - redo estatdef logic; avoid LastExpect() |
- tools/dox/make_doxy - create directories, fix 'to view use' text |
|
- w11a_V0.6 (2014-06-06) +++++++++++++++++++++++++++++++++++++++++++++++++++++ |
|
cummulative summary of key changes from w11a_V0.5 to w11a_V0.6 |
- revised ibus protocol V2 (in w11a_V0.51) |
- revised rbus protocol V3 (in w11a_V0.52) |
- backend server rewritten in C++ and Tcl (in w11a_V0.53 and w11a_V0.562) |
- add Nexys3 port of w11a (in w11a_V0.54) |
- add Cypress FX2 support (in w11a_V0.56 and w11a_V0.57) |
- added LP11,PC11 support (in w11a_V0.58) |
- reference system now ISE 14.7 and Ubuntu 12.04 64 bit, ghdl 0.31 |
- many code cleanups; use numeric_std |
- many documentation improvements |
- development status upgraded to beta (from alpha) |
|
for details see README-w11a_V.50-w11a_V0.60.txt |
|
- w11a_V0.5 (2010-07-23) +++++++++++++++++++++++++++++++++++++++++++++++++++++ |
|
Initial release with |
- w11a CPU core |
- basic set of peripherals: kw11l, dl11, lp11, pc11, rk11/rk05 |
- just for fun: iist (not fully implemented and tested yet) |
- two complete system configurations with |
- for a Digilent S3board rtl/sys_gen/w11a/s3board/sys_w11a_s3 |
- for a Digilent Nexys2 rtl/sys_gen/w11a/nexys2/sys_w11a_n2 |
/trunk/doc/man/man1/dmscntanal.1
0,0 → 1,72
.\" -*- nroff -*- |
.\" $Id: dmscntanal.1 721 2015-12-29 17:50:50Z mueller $ |
.\" |
.\" Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
.\" |
.\" ------------------------------------------------------------------ |
. |
.TH DMSCNTANAL 1 2015-12-29 "Retro Project" "Retro Project Manual" |
.\" ------------------------------------------------------------------ |
.SH NAME |
dmscntanal \- analyze dmscnt data |
.\" ------------------------------------------------------------------ |
.SH SYNOPSIS |
. |
.SY dmscntanal |
.I FILE |
. |
.SY dmscntanal |
.B \-\-help |
.YS |
. |
.\" ------------------------------------------------------------------ |
.SH DESCRIPTION |
Analyses converted dmscnt data, which was generated by \fBdmscntconv\fR(1) |
from w11a dmscnt unit raw data. Currently only some build-in statistics |
is shown. |
. |
.\" ------------------------------------------------------------------ |
.SH OPTIONS |
. |
.\" ---------------------------------------------- |
.IP "\fB\-help\fR" |
print full help text and exit. |
. |
.\" ------------------------------------------------------------------ |
.SH EXAMPLES |
.IP "\fBdmscntanal xxx.scnt\fR" 4 |
reads the file \fIxxx.scnt\fR and calculates the build-in summary. |
The output might look like |
|
.EX |
# Ratio all km usm |
cycles busy 100.00% 98.71% 100.00% |
cycles cpmem 0.00% 0.00% 0.00% |
cycles wextra 13.13% 31.91% 13.09% |
cycles jsr+rts 8.69% 2.98% 8.70% |
cycles int+rti 0.00% 1.31% 0.00% |
ifetch/idecode 46.46% 45.12% 46.47% |
flow cntl/idecode 23.24% 27.91% 23.24% |
br/idecode 8.11% 21.12% 8.09% |
sob/idecode 0.00% 0.34% 0.00% |
jmp/idecode 3.03% 1.26% 3.03% |
jsr/idecode 9.08% 3.56% 9.09% |
rts/idecode 3.03% 1.64% 3.03% |
cycles/idecode (cpi) 6.27 7.62 6.26 |
fetdec/idecode 2.29 3.15 2.29 |
srcr/idecode 1.23 1.62 1.23 |
dstr/idecode 0.48 0.75 0.48 |
dstw/idecode 0.76 0.54 0.76 |
dsta/idecode 0.24 0.24 0.24 |
ifetch_w/ifetch 1.79 3.77 1.78 |
wextra/idecode 0.82 2.43 0.82 |
.EE |
|
.\" ------------------------------------------------------------------ |
.SH "SEE ALSO" |
.BR ti_w11 (1), |
.BR dmscntconv (1) |
|
.\" ------------------------------------------------------------------ |
.SH AUTHOR |
Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
/trunk/doc/man/man1/ti_w11.1
1,11 → 1,11
.\" -*- nroff -*- |
.\" $Id: ti_w11.1 680 2015-05-14 13:29:46Z mueller $ |
.\" $Id: ti_w11.1 712 2015-11-01 22:53:45Z mueller $ |
.\" |
.\" Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
.\" |
.\" ------------------------------------------------------------------ |
. |
.TH TI_W11 1 2015-04-12 "Retro Project" "Retro Project Manual" |
.TH TI_W11 1 2015-11-01 "Retro Project" "Retro Project Manual" |
.\" ------------------------------------------------------------------ |
.SH NAME |
ti_w11 \- Quick starter for \fBti_rri\fP with \fBw11\fP CPU designs |
81,6 → 81,10
.RE |
.IP \fB-tmu\fP |
activate trace and monitoring unit |
.PD 0 |
.IP \fB-ghw\fP |
activate ghw wave file writing |
.PD |
. |
.SS "common options" |
.IP \fB-e "\fR=\fIfile"\fR |
/trunk/doc/man/man1/dmscntconv.1
0,0 → 1,84
.\" -*- nroff -*- |
.\" $Id: dmscntconv.1 721 2015-12-29 17:50:50Z mueller $ |
.\" |
.\" Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
.\" |
.\" ------------------------------------------------------------------ |
. |
.TH DMSCNTCONV 1 2015-12-29 "Retro Project" "Retro Project Manual" |
.\" ------------------------------------------------------------------ |
.SH NAME |
dmscntconv \- convert dmscnt data |
.\" ------------------------------------------------------------------ |
.SH SYNOPSIS |
. |
.SY dmscntconv |
.OP \-\-src=seqvhd |
.I FILE |
. |
.SY dmscntconv |
.B \-\-help |
.YS |
. |
.\" ------------------------------------------------------------------ |
.SH DESCRIPTION |
Converts the raw data generated by the w11a dmscnt unit, the embedded |
micro state counter, into a human readable format. The raw data is |
usually generated by a \fBti_w11\fR tcl command \fIrw11::sc_read\fR |
and contains counter index and counter values as hex data. |
\fBdmscntconv\fR will convert this into a human readable table of state |
numbers, state names and state counts for kernel and non-kernel modes. |
The state names are retrieved from the \fIpdp11_sequencer.vhd\fR source file, |
the path to and name of the source file can be specified with the |
\fB\-\-src\fR option. |
. |
.\" ------------------------------------------------------------------ |
.SH OPTIONS |
. |
.\" ---------------------------------------------- |
.IP "\fB\-\-srcf\fR=\fIseqvhd\fR" |
name of the sequencer source file used to determine the state number to |
state name mapping. Default is \fB$RETROBASE/rtl/w11a/pdp11_sequencer.vhd\fR. |
This default should be OK for almost all cases. |
. |
.\" ---------------------------------------------- |
.IP "\fB\-help\fR" |
print full help text and exit. |
. |
.\" ------------------------------------------------------------------ |
.SH EXAMPLES |
.IP "\fBdmscntconv xxx.dat > xxx.scnt\fR" 4 |
reads the file \fIxxx.dat\fR and stores the output in \fIxxx.scnt\fR. |
Because no \fB\-\-src\fR option is given the default sequencer file will used. |
|
The input raw data file is typically generated by a \fBti_w11\fR tcl command |
like |
|
.EX |
tofile xxx.dat [rw11::sc_read] |
.EE |
|
The output might look like |
|
.EX |
#sn state all km usm all% km% usm% |
# sum_all 1289 1289 0 100.00 100.00 0.00 |
00 s_idle 1145 1145 0 88.83 88.83 0.00 |
01 s_cp_regread 9 9 0 0.70 0.70 0.00 |
02 s_cp_rps 1 1 0 0.08 0.08 0.00 |
03 s_cp_memr_w 0 0 0 0.00 0.00 0.00 |
04 s_cp_memw_w 0 0 0 0.00 0.00 0.00 |
05 s_ifetch 17 17 0 1.32 1.32 0.00 |
06 s_ifetch_w 20 20 0 1.55 1.55 0.00 |
07 s_idecode 20 20 0 1.55 1.55 0.00 |
... |
.EE |
|
.\" ------------------------------------------------------------------ |
.SH "SEE ALSO" |
.BR ti_w11 (1), |
.BR dmscntanal (1) |
|
.\" ------------------------------------------------------------------ |
.SH AUTHOR |
Walter F.J. Mueller <W.F.J.Mueller@gsi.de> |
/trunk/doc/README.txt
1,4 → 1,4
$Id: README.txt 693 2015-06-21 14:02:46Z mueller $ |
$Id: README.txt 722 2015-12-30 19:45:46Z mueller $ |
|
Release notes for w11a |
|
22,579 → 22,144
|
2. Change Log ---------------------------------------------------------------- |
|
- w11a_V0.60 -> w11a_V0.70 cummulative summary of key changes |
- Bugfix for DIV instruction (in w11a_V0.61, see ECO-026-div.txt) |
- revised rbus protocol V4 (in w11a_V0.62, see README_Rlink_V4.txt) |
- add basic Vivado support (in w11a_V0.64) |
- add Nexys4 and Basys3 port of w11a (in w11a_V0.64) |
- add RH70+RP/RM disk support (in w11a_V0.65) |
- add TM11/TY10 tape support (in w11a_V0.66) |
- reference system now ISE 14.7, Vivado 2014.4; Ubuntu 14.04 64 bit, ghdl 0.31 |
|
- trunk (2015-06-21: svn rev 33(oc) 693(wfjm); tagged w11a_V0.70) +++++++++++ |
- trunk (2015-12-30: svn rev 34(oc) 722(wfjm); untagged w11a_V0.71) +++++++++ |
- Preface |
- resolved known issue V0.66-2: operation with multiple RP or RM disks |
under 211bsd works now. Issue was caused by a faulty error check. |
- resolved bug tracker issue 2015-06-06: the tm11 offline function works |
now as expected. Issue was caused by de-referencing a null pointer. |
- resolved bug tracker request 2015-06-05: the values returned as drive |
serial number were interpreted by 211bsd standalone code as a signature |
of SI drives, which made disk partitioning a bit cumbersome. Changed the |
scheme used to generate drive serial numbers such that they never match |
these 3rd party drive characteristics. The 211bsd installation on a |
RM05 is documented with the 211bsd_tm oskit. |
- the w11a designs grow larger, filling the FPGA's on Nexys2 and Nexys3 |
to ~50% (n2) or 67% (n3). To reach timing closure without fine tuning |
constraints the cpu clock had to be reduced to |
sys_w11a_n2 now 52 MHz (was 54 MHz) |
sys_w11a_n3 now 64 MHz (was 68 MHz) |
- the w11a so far lacked any 'hardware debugger' support, which made the |
debugging of CPU core issues a bit tedious. This release added a first |
implementation of CPU debugger and monitoring features |
- dmhbpt: hardware break point unit. Allows to set multiple break points |
on instruction fetches (thus code break points) and on data |
reads/writes (thus data access break points). The number of |
breakpoints is configurable between 0 and 4, in current |
designs 2 are available |
- dmcmon: CPU state monitor. A buffer of configurable size which holds |
a wide range of information on execution of the most recent |
instructions. Tracing can be a instruction as well as on |
micro cycle level. |
- dmscnt: micro state counter. A counter array which allows to monitor |
in which micro state the CPU time is spend, separated for |
kernel and supervisor/user mode. |
These three units together with the already existing ibus monitor allow |
a very detailed and specific monitoring and debugging of the CPU. |
|
- w11a has now a complete set of mass storage peripherals. This is a good |
reason of a major release, thus go for version V0.70. |
The w11a CPU core is not functionally modified in this release, the only |
exception is the suspend logic needed to implement hardware break points. |
Both the hardware break point and the instruction level tracing in dmcmon |
require a clean definition of instruction boundaries, which the current |
w11a core does not provide in some cases. This leads to imprecise |
breakpoints (CPU executes one additional instruction) and incomplete |
dmcmon traces (at instruction level when exceptions are taken). |
|
The w11a core will be modified in the next release to handle the above |
mentioned conditions properly. The dmhbpt and dmcmon will be fully |
documented when the w11a core changes are done, they work as expected |
under all conditions, and the full back end integration is completed. |
|
- there are many known issues, and in many cases only core functionality |
used by operating systems has been implemented. The missing parts will |
be implemented in the upcoming releases towards V0.80, also much more |
intensive testing, especially with maindecs (aka xxdp) will be done. |
- bottom line is that this release has little added value for normal w11 |
usage. It is technically necessary to separate the addition of all |
the debug units and modification of the CPU core into two releases. |
|
- Summary |
- rhrp and tm11 bug fixes |
- no major functionality added |
- new reference system |
- switched to Vivado 2015.4 (from 2014.4) |
Note: 2015.4 has WebPACK support for Logic Analyser and HLS. Both are |
not used so far, but the logic analyser may come in handy soon. |
- switched to tcl8.6 (from tcl8.5) |
Note: tcl8.6 is default tcl in Ubuntu 2014.04LTS, but up to now the |
tclshcpp helper was linked against tcl8.5. So far no tcl8.6 |
langauge features are used, but may be in future. |
|
- New features |
|
- Changes |
- renames |
- tools/oskit/211bsd_tm/211bsd_tm_boot.* -> 211bsd_tm_rp06_boot.* |
- functional changes |
- rtl/ibus/ibdr_rhrp - modify sn register to avoid 211bsd issues |
- tools/bin/create_disk - support RM80 disks |
- tools/tcl/rutil/util.tcl - add dohook |
- tools/oskit/*/*_boot.tcl - add preinithook and preboothook |
|
- Bug fixes |
- rtl/ibus/ibdr_rhrp - set er1.rmr only when unit busy |
- set cs2.pge only when controller busy |
- tools/src/librw11 |
- Rw11CntlTM11 - fix crash when offline function was executed |
|
- Known issues |
- all issues: see README_known_issues.txt |
- resolved issues: |
- V0.66-2: operation with multiple RP/RM drives works now under 211bsd |
|
- trunk (2015-06-05: svn rev 31(oc) 687(wfjm); untagged w11a_V0.66) +++++++++ |
- Preface |
|
- Since the previous release a full set of small, medium and large sized |
disks (RK,RL,RP/RM) is available, covering all use cases. Still missing |
was a tape system, which allows to install systems from distribution tapes |
but is also very handy for data exchange. This release adds a TM11/TU10 |
tape controller emulation. This is much simpler to implement than a |
massbus based TU16 or TU78 controller. Because storage is emulated there |
is neither a speed nor a capacity advantage of 1600 or 6250 bpi drives, |
so for all practical purposes the simple 800 bpi TU10 drive emulation is |
fully adequate. |
The TM11/TU10 was tested under 211bsd with creating a tape distribution |
kit and building a RP06 based system from such a tape. A 211bsd_tm |
oskit is provided with a recipe to restore a RP06 from tape. |
|
- bug fixes |
- the ti_rri event loop aborted under heavy load with three devices, seen |
when RP disk, TM tape and DL11 run simultaneously. Was caused by a race |
condition in attention handling and dispatching. |
- the boot command failed when cpu was running and the unit not decoded |
properly, so boots from units other then 0 failed. |
|
- Summary |
- added TM11/TU10 tape support |
|
- New features |
- new modules |
- rtl/ibus/ibdr_rm11 - ibus controller for RM11 |
- rtl/w11a |
- pdp11_dmcmon - pdp11: debug&moni: cpu monitor |
- pdp11_dmhbpt - pdp11: debug&moni: hardware breakpoint |
- pdp11_dmhbpt_unit - pdp11: dmhbpt - individual unit |
- pdp11_dmscnt - pdp11: debug&moni: state counter |
- new files |
- tools/bin |
- file2tap - create a tap container from disk files |
- tap2file - split a tap container into disk files |
- tools/src/librw11 |
- Rw11(Cntl|Unit)TM11 - Controller/Unit for TM11 |
- Rw11UnitTape(|Base) - support for tape units |
- Rw11VirtTape(|Tap) - virtual tapes (generic and tap containers) |
- dmscntanal - analyze dmscnt data |
- dmscntconv - convert dmscnt data |
- tools/asm-11/lib |
- defs_mmu.mac - definitions for mmu registers |
- defs_nzvc.mac - definitions for condition code combos |
- defs_reg70.mac - definitions for 11/70 CPU registers |
- tcode_std_base.mac - Default tcode base code for simple tests |
- tcode_std_start.mac - Default tcode startup code |
- vec_devcatch.mac - vector catcher for device interrupts |
- vec_devcatch_reset.mac - re-write vector catcher |
- tools/tbench |
- w11a_cmon - directory with dmcmon tests |
- w11a_hbpt - directory with dmhbpt tests |
- tools/tcl |
- ibd_(dl|lp|pc|rk|rl)11 - directory with register regdsc's |
- tools/tcl/rutil |
- fileio.tcl - new tofile and fromfile procs |
- tools/tcl/rw11 |
- tbench.tcl - support sub directories and return in tests |
- new oskits |
- tools/oskit/211bsd_tm - 2.11BSD tape distribution kit (for RP06) |
- dmcmon.tcl - support code for dmcmon |
- dmhbpt.tcl - support code for dmhbpt |
- dmscnt.tcl - support code for dmscnt |
- shell.tcl - new w11a tcl shell |
- shell_egd.tcl - code for e,g,d commands |
- tools/tcl/rw11util |
- regmap.tcl - support for 'map of regdsc' definitions |
|
- Changes |
- renames |
- tools/tbench - the text benches were re-organized and |
grouped now in sub directories: |
cp for w11a control port |
w11a for w11a CPU tests |
rhrp for RHRP device tests |
tm11 for TM11 device tests |
- functional changes |
- tools/bin/create_disk - add RM80 support |
|
- Bug fixes |
- tools/src/librlink |
- RlinkServer - fix race condition in attention handling |
- tools/src/librw11 |
- Rw11Cpu - stop cpu before load, proper unit handling |
|
- Known issues |
- all issues: see README_known_issues.txt |
- resolved issues: -- none -- |
- new issues: |
- V0.66-1: the TM11 controller transfers data byte wise (all disk do it |
16bit word wise) and allows for odd byte length transfers. Odd length |
transfers are currently not supported and rejected as invalid command. |
Odd byte length records aren't used by OS, if at all, so in practice |
this limitation isn't relevant. |
- V0.66-2: using two RP06 drives in parallel under 211bsd leads to a |
hangup of the system after a short time. Currently only operation |
of a single drive works reliably. |
|
- trunk (2015-05-14: svn rev 30(oc) 681(wfjm); untagged w11a_V0.65) +++++++++ |
- Preface |
|
- With small RK05 or RL02 sized disks only quite reduced OS setups could |
be booted, full featured systems were beyond reach. Now finally large |
disks are available, with a RH70 + RP/RM disk controller emulation. It |
supports up to four disks and allows now to run full featured 211bsd |
or rsx-11mplus systems. |
|
- to track down issues with ibus devices a 'ibus monitor' was added, it can |
record in the default setup up to 511 ibus transactions. An address filter |
allows to select accesses of one device. The ibd_ibmon tcl package |
contains the appropriate support scripts. |
|
- several cleanups |
- factor out common blocks on sys_w11a_* systems: the core+rbus+cache |
logic of single cpu systems now contained in pdp11_sys70, and the |
human I/O for digilent boards now in pdp11_hio70. |
- cpu start/stop logic cleanup: new command set with simple commands. |
Add also a new suspend/resume mechanism, which allows to hold the cpu |
without leaving the 'run state'. While suspended all timers are frozen. |
Very helpful when debugging, will be the basis for a hardware break |
point logic in a later release. |
- xon/xoff consolidation: escaping now done in cdata2byte/byte2cdata in |
FPGA and in RlinkPacketBufSnd/RlinkPacketBufRcv in backend. The extra |
escaping level in serport_xonrx/serport_xontx isn't used anymore, the |
special code in RlinkPortTerm has been removed. This allows to use |
xon/xoff flow control also in simulation links via RlinkPortFifo. |
- status check cleanup: it is very helpful to have a default status check |
and an easy way to modify it cases where some error flags are expected |
(e.g. on device polls). In the old logic status and data checks were |
done via RlinkCommandExpect. The new logic reflects that status checks |
are the normal case, and store the status check pattern in RlinkCommand. |
The meaning of expect masks for status and data is inverted, now a '1' |
means that the bit is checked (before it meant the bit is ignored). |
The default status check pattern is still in RlinkContext, but will be |
copied to RlinkCommand when the list is processed. RlinkCommandExpect |
handles now only data checks. |
|
- and bug fixes |
- rk11 cleanup: since the first days 211bsd autoconfig printed |
rk ? csr 177400 vector 220 didn't interrupt |
for boots from a RK11 it didn't have consequences, but when booted from |
a RL,RP, or RM disk this prevents that the RK11 disks are configured. |
Was caused by a missing interrupt after device reset. Now fixed. |
|
- Summary |
- added RH70/RP/RM big disk support |
- many cleanups |
|
- New features |
- new directory trees for |
- tools/asm-11/lib - definitions and macros for asm-11 |
- new modules |
- rtl/vlib/serport |
- serport_master - serial port module, master side |
- rtl/ibus/ibd_ibmon - ibus monitor |
- rtl/ibus/ibdr_rhrp - ibus controller for RH70 plus RP/RM drives |
- rtl/w11a/pdp11_sys70 - 11/70 system - single core +rbus,debug,cache |
- rtl/w11a/pdp11_hio70 - hio led and dsp for sys70 |
- tools/src/librw11 |
- Rw11(Cntl|Unit)RHRP - Controller/Unit for RHRP |
- tools/tbench |
- test_rhrp_* - test tbench for RHRP |
- new oskits |
- tools/oskit/211bsd_rp - new oskit for 2.11BSD on RP06 |
- tools/oskit/rsx11mp-30_rp - new oskit for RSX-11Mplus V3.0 on RP06 |
|
- Changes |
- renames |
- rtl/w11a/pdp11_sys70 -> pdp11_reg70 (_sys70 now different function) |
- functional changes |
- rtl/bplib/*/tb/tb_* - use serport_master instead of |
serport_uart_rxtx, allow xon/xoff |
- rtl/bplib/fx2rlink |
- rlink_sp1c_fx2 - add rbd_rbmon (optional via generics) |
- rtl/vlib/rlink/rlink_sp1c - add rbd_rbmon (optional via generics) |
- rtl/ibus/ibd_kw11l - freeze timer when cpu suspended |
- tools/bin/tbrun_tbwrri - add --fusp,--xon |
- tools/bin/ti_w11 - rename -fu->-fc, add -f2,-fx; setup defaults |
- tools/bin/librlink |
- RlinkCommandList - add SetLastExpect() methods |
- RlinkPort - add XonEnable() |
- RlinkPortCuff - add noinit attribute |
- RlinkPort(Fifo|Term) - add xon,noinit attributes |
- tools/src/librw11 |
- Rw11Cpu - add AddRbibr(), AddWbibr(), RAddrMap() |
- tools/bin/librlinktpp |
- RtclRlinkConnect - errcnt: add -increment |
log: add -bare,-info.. |
wtlam: allow tout=0 for attn cleanup |
init: new command |
exec: drop -estatdef |
- RtclRlinkServer - get/set interface added |
- tools/src/librwxxtpp |
- RtclRw11Cntl - start: new command |
- RtclRw11Cpu - cp: add -rbibr, wbibr, -rreg,...,-init |
- cp: add -estat(err|nak|tout), drop estatdef |
- rename amap->imap; add rmap |
|
- Bug fixes |
- rtl/ibus |
- ibdr_rk11 - interrupt after dreset and seek command start |
- tools/src/librlink |
- RlinkConnect - WaitAttn(): return 0. (not -1.) if poll |
- RlinkServer - Stop(): fix race in (could hang) |
|
- Known issues |
- all issues: see README_known_issues.txt |
- resolved issues: -- none -- |
- new issues: |
- V0.65-1: ti_rri sometimes crashes in normal rundown (exit or ^D) when |
a cuff: type rlink is active. One gets |
terminate called after throwing an instance of 'Retro::Rexception' |
what(): RlinkPortCuff::Cleanup(): driver thread failed to stop |
doesn't affect normal operation, will be fixed in upcoming release. |
- V0.65-2: some exotic RH70/RP/RM features and conditions not implemented |
- last block transfered flag (in DS) |
- CS2.BAI currently ignored and not handled |
- read or write 'with header' gives currently ILF |
All this isn't used by any OS, so in practice not relevant. |
|
- trunk (2015-03-01: svn rev 29(oc) 655(wfjm); untagged w11a_V0.64) +++++++++ |
|
- Preface |
- The w11 project started on a Spartan-3 based Digilent S3board, and soon |
moved on to a Nexys2 with much better connectivity. Next step was the |
Spartan-6 based Nexys3. Now is time to continue with 7-Series FPGAs. |
- When Vivado started in 2013 it was immediately clear that the architecture |
is far superior to ISE. But tests with the first versions were sobering, |
the w11a design either didn't compile at all, or produced faulty synthesis |
results. In 2014 Vivado matured, and the current version 2014.4 works |
fine with the w11a code base. |
- The original Nexys4 board allowed to quickly port Nexys3 version because |
both have the same memory chip. The newer Nexys4 DDR will be addressed |
later. |
- The BRAM capacity of FPGAs increased significantly over time. The low |
cost Basys3 board with the second smallest Artix-7 (XC7A35T) has 200 KB |
BRAM. That allows to implement a purely BRAM based w11a system with |
176 kB memory. Not enough for 2.11BSD, but for many other less demanding |
OS available for a PDP11. |
- The Nexyx4 and Basys3 have 16 LEDs. Not quite the 'blinking lights' |
console of the classic 11/45 and 11/70, but enough to display the |
well known OS typical light patterns the veterans remember so well. |
- With a new design tool, a new FPGA generation, two new boards, and a |
new interface for the rlink connection that some of the code and tools |
base had to be re-organized. |
- Last but not least: finally access to a bit bigger disks: RL11 support |
- Many changes, some known issues, some rough edges may still lurke around |
|
- Summary |
- added support for Vivado |
- added support for Nexys4 and Basys3 boards |
- added RL11 disk support |
- lots of documentation updated |
|
- New features |
- new directory trees for |
- rtl/bplib/basys3 - support for Digilent Basys3 board |
- rtl/bplib/nexys4 - support for Digilent Nexys4 board |
- rtl/make_viv - make includes for Vivado |
- new files |
- tools/bin/xviv_ghdl_unisim - ghdl compile Vivado UNISIM & UNIMACRO libs |
- new modules |
- rtl/ibus/ibdr_rl11 - ibus controller for RL11 |
- rtl/vlib/rlink/ioleds_sp1c - io activity leds for rlink+serport_1clk |
- rtl/vlib/xlib |
- s7_cmt_sfs_gsim - Series-7 CMT: simple vhdl model |
- s7_cmt_sfs_unisim - Series-7 CMT: wrapper for UNISIM |
- rtl/w11a |
- pdp11_bram_memctl - simple BRAM based memctl |
- pdp11_dspmux - mux for hio display |
- pdp11_ledmux - mux for hio leds |
- pdp11_statleds - status led generator |
- tools/src/librw11/ |
- Rw11*RL11 - classes for RL11 disk handling |
- tools/src/librwxxtpp |
- RtclRw11*RL11 - tcl iface for RL11 disk handling |
- new systems |
- rtl/sys_gen/tst_rlink - rlink tester |
- basys3/sys_tst_rlink_b3 - for Basys3 |
- nexys4/sys_tst_rlink_n4 - for Nexys4 |
- rtl/sys_gen/tst_serloop - serport loop tester |
- nexys4/sys_tst_serloop_n4 - for Nexys4 |
- rtl/sys_gen/tst_snhumanio - human I/O tester |
- basys3/sys_tst_snhumanio_b3 - for Basys3 |
- nexys4/sys_tst_snhumanio_n4 - for Nexys4 |
- rtl/sys_gen/w11a - w11a |
- basys3/sys_w11a_b3 - small BRAM only (176 kB memory) |
- nexys4/sys_w11a_n4 - with full 4 MB memory using cram |
- new oskits |
- tools/oskit/211bsd_rl - new oskit for 2.11BSD on RL02 |
- tools/oskit/rt11-53_rl - new oskit for RT11 V5.3 on RL02 |
- tools/oskit/xxdp_rl - new oskit for XXDP 22 and 25 on RL02 |
|
- Changes |
- renames |
- ensure that old ISE and new Vivado co-exists, ensure telling names |
- rtl/make -> make_ise |
- rtl/bplib/bpgen/sn_4x7segctl -> sn_7segctl |
- tools/bin/isemsg_filter -> xise_msg_filter |
- tools/bin/xilinx_ghdl_unisim -> xise_ghdl_unisim |
- tools/bin/xilinx_ghdl_simprim -> xise_ghdl_simprim |
|
- retired files |
- rtl/bplib/fx2lib |
- fx2_2fifoctl_as - obsolete, wasn't actively used since long |
- tools/bin |
- set_ftdi_lat - obsolete, since kernel 2.6.32 the default is 1 ms |
- xilinx_vhdl_chop - obsolete, since ISE 11 sources come chopped |
|
- functional changes |
- $RETROBASE/Makefile - re-structured, many new targets |
- rtl/bplib/bpgen |
- sn_7segctl - handle also 8 digit displays |
- sn_humanio - configurable SWI and DSP width |
- sn_humanio_rbus - configurable SWI and DSP width |
- rtl/vlib/serport |
- serport_1clock - export fractional part of divider |
- rtl/ibus |
- ibdr_maxisys - add RL11 (ibdr_rl11) |
- rtl/sys_gen/w11a/* |
- sys_w11a_* - use new led and dsp control modules |
- tools/src/librlink |
- RlinkConnect - drop LogOpts, indivitual getter/setter |
- RlinkPortTerm - support custom baud rates (5M,6M,10M,12M) |
- tools/src/librtcltools |
- RtclGetList - add '?' (key list) and '*' (kv list) |
- RtclSetList - add '?' (key list) |
- RlogFile - Open(): now with cout/cerr support |
- tools/src/librlinktpp |
- RtclRlinkConnect - drop config cmd, use get/set cmd |
- RtclRlinkPort - drop config cmd, use get/set cmd |
- tools/src/librw11 |
- Rw11Rdma - PreExecCB() with nwdone and nwnext |
- Rw11UnitDisk - add Nwrd2Nblk() |
- tools/src/librwxxtpp |
- RtclRw11CntlFactory - add RL11 support |
- tools/bin |
- xise_ghdl_unisim - handle also UNIMACRO lib |
- vbomconv - handle Vivado flows too |
|
- Bug fixes |
- tools/src/librw11 |
- Rw11CntlRK11 - revise RdmaPostExecCB() logic |
|
- Known issues |
- V0.64-7: ghdl simulated OS boots via ti_w11 (-n4 ect options) fail due to |
a flow control issue (likely since V0.63). |
- V0.64-6: IO delays still unconstraint in vivado. All critical IOs use |
explicitly IOB flops, thus timing well defined. |
- V0.64-5: w11a_tb_guide.txt covers only ISE based tests (see also V0.64-4). |
- V0.64-4: No support for the Vivado simulator (xsim) yet. With ghdl only |
functional simulations, post synthesis (_ssim) fails to compile. |
- V0.64-3: Highest baud rate with basys3 and nexys4 is 10 MBaud. 10 MBaud |
is not supported according to FTDI, but works. 12 MBaud in next release. |
- V0.64-2: rlink throughput on basys3/nexys4 limited by serial port stack |
round trip times. Will be overcome by libusb based custom driver. |
- V0.64-1: The large default transfer size for disk accesses leads to bad |
throughput in the DL11 emulation for low speed links, like the |
460kBaud the S3board is limited too. Will be overcome by a DL11 |
controller with more buffering. |
- V0.62-2: rlink v4 error recovery not yet implemented, will crash on error |
- V0.62-1: Command lists aren't split to fit in retransmit buffer size |
{last two issues not relevant for w11 backend over USB usage because |
the backend produces proper command lists and the USB channel is |
usually error free} |
|
- trunk (2015-01-04: svn rev 28(oc) 629(wfjm); untagged w11a_V0.63) +++++++++ |
|
- Summary |
- the w11a rbus interface used so far a narrow dynamically adjusted |
rbus->ibus window. Replaces with a 4k word window for whole IO page. |
- utilize rlink protocol version 4 features in w11a backend |
- use attn notifies to dispatch attn handlers |
- use larger blocks (7*512 rather 1*512 bytes) for rdma transfers |
- use labo and merge csr updates with last block transfer |
- this combined reduces the number of round trips by a factor 2 to 3, |
and in some cases the throughput accordingly. |
|
- Remarks on reference system |
- still using tcl 8.5 (even though 8.6 is now default in Ub 14.04) |
- don't use doxygen 1.8.8 and 1.8.9, it fails to generate vhdl docs |
|
- New features |
- new modules |
- tools/bin |
- ghdl_assert_filter - filter to suppress startup warnings |
- tbrun_tbw - wrapper for tbw based test benches |
- tbrun_tbwrri - wrapper for ti_rri + tbw based test benches |
- tools/src/librw11 |
- Rw11Rdma - Rdma engine base class |
- Rw11RdmaDisk - Rdma engine for disk emulation |
|
- Changes |
- rtl/vlib/rlink |
- rlink_core - use 4th stat bit to signal rbus timeout |
- rtl/vlib/rbus |
- rbd_rbmon - reorganized, supports now 16 bit addresses |
- rlink_core.vhd - add proc_sres: strip 'x' from RB_SRES.dout |
- rtl/vlib/rlink/tb |
- tbcore_rlink - drive SB_CNTL from start to avoid 'U' |
- rtl/w11a |
- pdp11_core_rbus - use full size 4k word ibus window |
- tools/bin/tbw - add -fifo and -verbose options |
- tools/src/librtools |
- Rexception - add ctor from RerrMsg |
- tools/src/librlink |
- RlinkCommandExpect - rblk/wblk done counts now expectable |
- RlinkConnect - cleanups and minor enhancements |
- RlinkServer - use attn notifies to dispatch handlers |
- tools/src/librw11 |
- Rw11CntlRK11 - re-organize, use now Rw11RdmaDisk |
- Rw11Cpu - add ibus address map |
- tools/src/librwxxtpp |
- RtclRw11CntlRK11 - add get/set for ChunkSize |
- RtclRw11Cpu - add amap sub-command for ibus map access |
|
- Resolved known issues from V0.62 |
- the rbus monitor (rbd_rbmon) has been updated to handle 16 bit addresses |
|
- Known issues |
- (V0.62): rlink v4 error recovery not yet implemented, will crash on error |
- (V0.62): command lists aren't split to fit in retransmit buffer size |
{both issues not relevant for w11 backend over USB usage because the |
backend produces proper command lists and the USB channel is error free} |
|
- trunk (2014-12-20: svn rev 27(oc) 614(wfjm); untagged w11a_V0.62) +++++++++ |
|
- Summary |
- migrate to rlink protocol version 4 |
- Goals for rlink v4 |
- 16 bit addresses (instead of 8 bit) |
- more robust encoding, support for error recovery at transport level |
- add features to reduce round trips |
- improved attention handling |
- new 'list abort' command |
- For further details see README_Rlink_V4.txt |
- use own C++ based tcl shell tclshcpp instead of tclsh |
|
Notes: |
1. rlink protocol, core, and backend are updated in this release |
2. error recovery in backend not yet implemented |
3. the designs using rlink are still essentially unchanged |
4. the new rlink v4 features will be exploited in upcoming releases |
|
- New reference system |
The development and test system was upgraded from Kubuntu 12.04 to 14.04. |
The version of several key tools and libraries changed: |
linux kernel 3.13.0 (was 3.2.0) |
gcc/g++ 4.8.2 (was 4.6.3) |
boost 1.54 (was 1.46.1) |
libusb 1.0.17 (was 1.0.9) |
perl 5.18.2 (was 5.14.2) |
tcl 8.5.15 (was 8.5.11) |
sdcc 3.3.0 (was 2.9.0) |
doxygen 1.8.7 {installed from sources; Ub 14.04 has 1.8.6} |
|
Notes: |
1. still using tcl 8.5 (even though 8.6 is now default in Ub 14.04) |
2. sdcc 3.x is not source compatible with sdcc 2.9. The Makefile |
allows to use both, see tools/fx2/src/README.txt . |
3. don't use doxygen 1.8.8, it fails to generate vhdl docs |
|
- New features |
- new environment variables TCLLIB and TCLLIBNAME. TCLLIBNAME must be |
defined, and hold the library name matching the Tcl version already |
specified with TCLINC. |
- new modules |
- rtl/vlib/comlib/crc16 - 16 bit crc generator (replaces crc8) |
- tools/src/tclshcpp/* - new tclshcpp shell |
|
- Changes |
- rtl/vlib/comlib |
- byte2cdata,cdata2byte - re-write, commas now 2 byte sequences |
- rtl/vlib/rlink |
- rlink_core - re-write for rlink v4 |
- rtl/*/* - use new rlink v4 iface and 4 bit STAT |
- rtl/vlib/rbus/rbd* - new addresses in 16 bit rlink space |
- rtl/vlib/simlib/simlib - add simfifo_*, wait_*, writetrace |
- pdp11 - add defs for pdp11_dm(scnt|hbpt|cmon) |
- pdp11_* - add support for pdp11_dm(scnt|hbpt|cmon) |
- rtl/sys_gen/w11a/* |
- sys_conf - add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
- rtl/sys_gen/w11a/*/tb |
- sys_conf_sim - add sys_conf_(dmscnt|dmhbpt*|dmcmon*) |
- tools/bin/ |
- fx2load_wrapper - use _ic instead of _as as default firmware |
- ti_rri - use tclshcpp (C++ based) rather tclsh |
- tools/fx2/bin/*.ihx - recompiled with sdcc 3.3.0 + bugfixes |
- tools/fx2/src/Makefile - support sdcc 3.3.0 |
- tools/src/ |
- */*.cpp - adopt for rlink v4; use nullptr |
- librlink/RlinkCrc16 - 16 crc, replaces RlinkCrc8 |
- librlink/RlinkConnect - many changes for rlink v4 |
- librlink/RlinkPacketBuf* - re-write for for rlink v4 |
- tools/tcl/*/*.tcl - adopt for rlink v4 |
- renames: |
- tools/bin/telnet_starter -> tools/bin/console_starter |
- ti_w11 - add -ghw option |
- tmuconv - fix '.' handling for br/sob instructions |
correct xor (now r,dst, and not src,r) |
- tools/tcl/rutil |
- regdsc.tcl - add regbldkv,reggetkv |
- util.tcl - rename optlist2arr->args2opts, new logic |
- tools/tcl/rw11 |
- asm.tcl - new arg list format in asm(run|treg|tmem) |
- dasm.tcl - add dasm_inst2txt |
- tools/tcl/ibd_ibmon |
- util.tcl - add symbolic register dump |
|
- Bug fixes |
- tools/fx2/src |
- dscr_gen.A51 - correct string 0 descriptor |
- lib/syncdelay.h - handle triple nop now properly |
- rtl/bplib/micron |
- mt45w8mw16b - fix issue when 1st access is to addr 0 |
- rtl/bplib/nxcramlib |
- nx_cram_memctl_as - always define imem_oe in do_dispatch() |
- rtl/ibus |
- ibdr_tm11 - add missing BESET to sensitivity list |
- rtl/w11a |
- pdp11_sequencer - proper trap_mmu and trap_ysv handling |
- tools/bin |
- asm-11 - fix '.' handling in instructions |
|
- Known issues |
- rlink v4 error recovery not yet implemented, will crash on error |
- command lists aren't split to fit in retransmit buffer size |
{both issues not relevant for w11 backend over USB usage because the |
backend produces proper command lists and the USB channel is error free} |
- the rbus monitor (rbd_rbmon) not yet handling 16 bit addresses and |
therefore of limited use |
- all issues: see README_known_issues.txt |
|
- trunk (2014-08-08: svn rev 25(oc) 579(wfjm); tagged w11a_V0.61) +++++++++++ |
- w11a_V0.7 (2015-06-21) +++++++++++++++++++++++++++++++++++++++++++++++++++++ |
cummulative summary of key changes from w11a_V0.6 to w11a_V0.7 |
- Bugfix for DIV instruction (in w11a_V0.61, see ECO-026-div.txt) |
- revised rbus protocol V4 (in w11a_V0.62, see README_Rlink_V4.txt) |
- add basic Vivado support (in w11a_V0.64) |
- add Nexys4 and Basys3 port of w11a (in w11a_V0.64) |
- add RL11/RL02 disk support (in w11a_V0.64) |
- add RH70+RP/RM disk support (in w11a_V0.65) |
- add TM11/TY10 tape support (in w11a_V0.66) |
- reference system now ISE 14.7, Vivado 2014.4; Ubuntu 14.04 64 bit, ghdl 0.31 |
|
- Summary |
- The div instruction gave wrong results in some corner cases when either |
divisor or quotient were the largest negative integer (100000 or -32768). |
This is corrected now, for details see ECO-026-div.txt |
- some minor updates and fixes to support scripts |
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt |
for details see README-w11a_V.60-w11a_V0.70.txt |
|
- New features |
- the Makefile's for in all rtl building block directories allow now to |
configure the target board for a test synthesis via the XTW_BOARD |
environment variable or XTW_BOARD=<board name> make option. |
|
- Changes |
- tools/bin/asm-11 - add call and return opcodes |
- tools/bin/create_disk - add RM02,RM05,RP04,RP07 support |
- tools/bin/tbw - use xtwi to start ISim models |
- tools/bin/ticonv_pdpcp - add --tout and --cmax; support .sdef |
- tools/dox/*.Doxyfile - use now doxygen 1.8.7 |
- tools/src/librw11 |
- Rw11CntlRK11 - add statistics |
|
- Bug fixes |
- rtl/w11a - div bug ECO-026 |
- pdp11_munit - port changes; fix divide logic |
- pdp11_sequencer - s_opg_div_sr: check for late div_quit |
- pdp11_dpath - port changes for pdp11_munit |
- tools/bin/create_disk - repair --boot option (was inaccessible) |
- tools/bin/ti_w11 - split args now into ti_w11 opts and cmds |
- tools/src/librwxxtpp |
- RtclRw11Cpu - redo estatdef logic; avoid LastExpect() |
- tools/dox/make_doxy - create directories, fix 'to view use' text |
|
- w11a_V0.6 (2014-06-06) +++++++++++++++++++++++++++++++++++++++++++++++++++++ |
|
cummulative summary of key changes from w11a_V0.5 to w11a_V0.60 |
cummulative summary of key changes from w11a_V0.5 to w11a_V0.6 |
- revised ibus protocol V2 (in w11a_V0.51) |
- revised rbus protocol V3 (in w11a_V0.52) |
- backend server rewritten in C++ and Tcl (in w11a_V0.53 and w11a_V0.562) |