//--------------------------------------------------------------
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//--------------------------------------------------------------
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// Testbench using Fuse Z80 emulator test vectors
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// Testbench using Fuse Z80 emulator test vectors
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//--------------------------------------------------------------
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//--------------------------------------------------------------
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`include "z80.svh"
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`include "z80.svh"
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module test_bench_fuse(z80_if.tb z);
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module test_bench_fuse(z80_if.tb z);
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assign clk = z.CLK;
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assign clk = z.CLK;
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integer f;
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integer f;
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// Instead of the PC register, we read the address of the next instruction
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// Instead of the PC register, we read the address of the next instruction
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logic [15:0] pc;
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logic [15:0] pc;
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initial begin : init
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initial begin : init
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z.nWAIT <= `CLR;
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z.nWAIT <= `CLR;
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z.nINT <= `CLR;
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z.nINT <= `CLR;
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z.nNMI <= `CLR;
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z.nNMI <= `CLR;
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z.nBUSRQ <= `CLR;
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z.nBUSRQ <= `CLR;
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z.nRESET <= `CLR;
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z.nRESET <= `CLR;
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// Run all the tests and write the result to a file
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// Run all the tests and write the result to a file
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f = $fopen("fuse.result.txt");
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f = $fopen("fuse.result.txt");
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`include "test_fuse.i"
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`include "test_fuse.vh"
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$fclose(f);
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$fclose(f);
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end : init
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end : init
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endmodule
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endmodule
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module test_fuse();
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module test_fuse();
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bit clk = 1;
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bit clk = 1;
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initial repeat (`TOTAL_CLKS) #1 clk = ~clk;
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initial repeat (`TOTAL_CLKS) #1 clk = ~clk;
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z80_if z80(clk); // Instantiate the Z80 bus interface
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z80_if z80(clk); // Instantiate the Z80 bus interface
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z80_top_ifc_n dut(z80); // Create an instance of our Z80 design
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z80_top_ifc_n dut(z80); // Create an instance of our Z80 design
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test_bench_fuse tb(z80); // Create an instance of the test bench
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test_bench_fuse tb(z80); // Create an instance of the test bench
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ram ram( .Address(z80.A), .Data(z80.D), .CS(z80.nMREQ), .WE(z80.nWR), .OE(z80.nRD) );
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ram ram( .Address(z80.A), .Data(z80.D), .CS(z80.nMREQ), .WE(z80.nWR), .OE(z80.nRD) );
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io io( .Address(z80.A), .Data(z80.D), .CS(z80.nIORQ), .WE(z80.nWR), .OE(z80.nRD) );
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io io( .Address(z80.A), .Data(z80.D), .CS(z80.nIORQ), .WE(z80.nWR), .OE(z80.nRD) );
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endmodule
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endmodule
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