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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [interface/] [enable.ITC] - Diff between revs 17 and 48

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Rev 17 Rev 48
$HashRef = bless( {
$HashRef = bless( {
                    'connection_num' => 'single connection',
                    'connection_num' => 'single connection',
                    'name' => 'enable',
                    'name' => 'enable',
                    'modules' => {
                    'modules' => {
                                   'clk_socket' => {},
                                   'clk_socket' => {},
                                   'wb_master_socket' => {},
                                   'wb_master_socket' => {},
                                   'wb_slave_socket' => {},
                                   'wb_slave_socket' => {},
                                   'reset_socket' => {}
                                   'reset_socket' => {}
                                 },
                                 },
                    'ports' => {
                    'ports' => {
                                 'clk_o' => {
                                 'clk_o' => {
                                              'outport_type' => 'concatenate',
                                              'outport_type' => 'concatenate',
                                              'connect_name' => 'enable_o',
                                              'connect_name' => 'enable_o',
                                              'name' => 'enable_i',
                                              'name' => 'enable_i',
                                              'range' => '',
                                              'range' => '',
                                              'connect_type' => 'output',
                                              'connect_type' => 'output',
                                              'connect_range' => '',
                                              'connect_range' => '',
                                              'default_out' => 'Active high',
                                              'default_out' => 'Active high',
                                              'type' => 'input'
                                              'type' => 'input'
                                            }
                                            }
                               },
                               },
                    'file_name' => '/home/alireza/Mywork/mpsoc/perl_gui/lib/verilog/bus.v',
                    'file_name' => 'mpsoc/perl_gui/lib/verilog/bus.v',
                    'module_name' => 'clk_socket',
                    'module_name' => 'clk_socket',
                    'category' => 'source',
                    'category' => 'source',
                    'type' => 'plug'
                    'type' => 'plug'
                  }, 'intfc_gen' );
                  }, 'intfc_gen' );
 
 

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