URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
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| Rev 48 |
Rev 56 |
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function integer log2;
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input integer number; begin
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log2=0;
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while(2**log2<number) begin
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log2=log2+1;
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end
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end
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endfunction // log2
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function [15:0]i2s;
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function [15:0]i2s;
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input integer c; integer i; integer tmp; begin
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input integer c; integer i; integer tmp; begin
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tmp =0;
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tmp =0;
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for (i=0; i<2; i=i+1) begin
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for (i=0; i<2; i=i+1) begin
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tmp = tmp + (((c % 10) + 48) << i*8);
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tmp = tmp + (((c % 10) + 48) << i*8);
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c = c/10;
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c = c/10;
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end
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end
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i2s = tmp[15:0];
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i2s = tmp[15:0];
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end
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end
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endfunction //i2s
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endfunction //i2s
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/*
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/*
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function integer log2;
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input integer number; begin
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log2=0;
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while(2**log2<number) begin
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log2=log2+1;
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end
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end
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endfunction // log2
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function [159:0]f2s;
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function [159:0]f2s;
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input real f; reg s;reg b; integer i; integer j;integer a; real tmp; begin
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input real f; reg s;reg b; integer i; integer j;integer a; real tmp; begin
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s=0;
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s=0;
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b=0;
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b=0;
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f2s={160{1'b0}};
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f2s={160{1'b0}};
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if(f<0)begin
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if(f<0)begin
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s=1;
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s=1;
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f=-f;
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f=-f;
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end
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end
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f=f*1000;
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f=f*1000;
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a=f;
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a=f;
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i=0;
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i=0;
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j=0;
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j=0;
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while(a>0)begin
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while(a>0)begin
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j=j+1;
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j=j+1;
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if((a%10)!=0 || j>3 || b)begin
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if((a%10)!=0 || j>3 || b)begin
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//f2s=(f2s & ~(8'hFF<< (i*8)));
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//f2s=(f2s & ~(8'hFF<< (i*8)));
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f2s=f2s + (((a%10)+48)<< i*8);
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f2s=f2s + (((a%10)+48)<< i*8);
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i=i+1;
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i=i+1;
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b=1;
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b=1;
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end
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end
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a=a/10;
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a=a/10;
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if(j==3 && b==1)begin
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if(j==3 && b==1)begin
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//f2s=(f2s & ~(8'hFF<< (i*8)));
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//f2s=(f2s & ~(8'hFF<< (i*8)));
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f2s=f2s + ("."<< i*8);
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f2s=f2s + ("."<< i*8);
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i=i+1;
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i=i+1;
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j=j+1;
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j=j+1;
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end
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end
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end
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end
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if(s) begin
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if(s) begin
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//f2s=(f2s & ~(8'hFF<< (i*8)));
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//f2s=(f2s & ~(8'hFF<< (i*8)));
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f2s=f2s + ("-"<< i*8);
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f2s=f2s + ("-"<< i*8);
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end
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end
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end
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end
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endfunction //f2s
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endfunction //f2s
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*/
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*/
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