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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [script/] [model.tcl] - Diff between revs 16 and 38

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Rev 16 Rev 38
#!/usr/bin/tclsh
#!/usr/bin/tclsh
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
###################################################################
###################################################################
## Author      : Alireza Monemi
## Author      : Alireza Monemi
## Email       : 
## Email       : 
## Description : Compile all verilog files inside the design folder 
## Description : Compile all verilog files inside the design folder 
##             : using modelsim
##             : using modelsim
###################################################################
###################################################################
set text "###################################################################"
set text "###################################################################"
set text "##                Start Compilation Script "
set text "##                Start Compilation Script "
set text "###################################################################"
set text "###################################################################"
 
 
###################################################################
###################################################################
##---- Specify variables
##---- Specify variables
set text "###################################################################"
set text "###################################################################"
set text "##---- Specify variables"
set text "##---- Specify variables"
 
 
##-- Project path variables
##-- Project path variables
set path                        [pwd]/..
set path                        [pwd]/..
set src_noc_path                        $path/src_noc
set src_noc_path                        $path/src_noc
set src_modelsim_path                   $path/src_modelsim
set src_modelsim_path                   $path/src_modelsim
set comp_path                   $path/../mpsoc_work/modelsim
set comp_path                   $path/../mpsoc_work/modelsim
set work_path                   $comp_path/work
set work_path                   $comp_path/work
 
 
set file_list [glob -directory $src_noc_path *.v]
set file_list [glob -directory $src_noc_path *.v]
set modelsim_file_list [glob -directory $src_modelsim_path *.v]
set modelsim_file_list [glob -directory $src_modelsim_path *.v]
 
 
 
 
##-- change directory
##-- change directory
file mkdir $comp_path
file mkdir $comp_path
 
 
cd $comp_path
cd $comp_path
exec rm -Rf *
exec rm -Rf *
proc r  {} {uplevel #0 source compile.tcl}
proc r  {} {uplevel #0 source compile.tcl}
proc rr {} {global last_compile_time
proc rr {} {global last_compile_time
            set last_compile_time 0
            set last_compile_time 0
            r                            }
            r                            }
proc q  {} {quit -force                  }
proc q  {} {quit -force                  }
 
 
proc sleep {N} {
proc sleep {N} {
    after [expr {int($N * 1000)}]
    after [expr {int($N * 1000)}]
}
}
 
 
 
 
#Does this installation support Tk?
#Does this installation support Tk?
set tk_ok 1
set tk_ok 1
if [catch {package require Tk}] {set tk_ok 0}
if [catch {package require Tk}] {set tk_ok 0}
 
 
###################################################################
###################################################################
##---- 1. Creating working library
##---- 1. Creating working library
set text "###################################################################"
set text "###################################################################"
set text "##---- 1. Creating working library"
set text "##---- 1. Creating working library"
 
 
##-- Create work lib
##-- Create work lib
vlib $work_path
vlib $work_path
 
 
##-- Mapping work lib
##-- Mapping work lib
vmap work $work_path
vmap work $work_path
 
 
 
 
 
 
###################################################################
###################################################################
##---- 3. Compile the Design
##---- 3. Compile the Design
set text "###################################################################"
set text "###################################################################"
set text "##---- 3. Compile the Design"
set text "##---- 3. Compile the Design"
 
 
 
 
# Compile out of date files
# Compile out of date files
set time_now [clock seconds]
set time_now [clock seconds]
 
 
if {[file isfile start_time.txt] != 0} {
if {[file isfile start_time.txt] != 0} {
        set fp [open start_time.txt r]
        set fp [open start_time.txt r]
        set line [gets $fp]
        set line [gets $fp]
        close $fp
        close $fp
        regexp {\d+} $line last_compile_time
        regexp {\d+} $line last_compile_time
        puts "last compiled time is  $last_compile_time"
        puts "last compiled time is  $last_compile_time"
} else {
} else {
        set last_compile_time 0
        set last_compile_time 0
}
}
 
 
set last_compile_time 0
set last_compile_time 0
 
 
foreach f $file_list {
foreach f $file_list {
 
 
                if { $last_compile_time < [file mtime $f] } {
                if { $last_compile_time < [file mtime $f] } {
                        vlog -work  $work_path  +incdir+$src_noc_path  $f
                        vlog -work  $work_path  +incdir+$src_noc_path  $f
                         set last_compile_time 0
                         set last_compile_time 0
                } else {
                } else {
                         puts "$f is uptodate"
                         puts "$f is uptodate"
                }
                }
        }
        }
 
 
foreach f $modelsim_file_list {
foreach f $modelsim_file_list {
 
 
                if { $last_compile_time < [file mtime $f] } {
                if { $last_compile_time < [file mtime $f] } {
                        vlog -work  $work_path  +incdir+$src_modelsim_path  $f
                        vlog -work  $work_path  +incdir+$src_modelsim_path  $f
                         set last_compile_time 0
                         set last_compile_time 0
                } else {
                } else {
                         puts "$f is uptodate"
                         puts "$f is uptodate"
                }
                }
        }
        }
 
 
set last_compile_time $time_now
set last_compile_time $time_now
 
 
 
 
 
 
set text "###################################################################"
set text "###################################################################"
set text "##                       END OF COMPILATION"
set text "##                       END OF COMPILATION"
set text "###################################################################"
set text "###################################################################"
 
 
 
 
#vsim -t ps work.testbench_noc
#vsim -t ps work.testbench_router
vsim  -t ps  work.testbench_modelsim
vsim  -t ps  work.testbench_modelsim
 
 
run 100 ms
run 100 ms
 
 
#save last compile time
#save last compile time
 
 
  set fp [open start_time.txt w]
  set fp [open start_time.txt w]
  puts $fp "Start time was [clock seconds]"
  puts $fp "Start time was [clock seconds]"
  close $fp
  close $fp
 
 
#q
#q
 
 
 
 
#####################################################################################
#####################################################################################
 
 
 
 

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