URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [script/] [verilator_compile_simulator.sh] - Diff between revs 32 and 38

Rev 32	Rev 38
`#!/bin/sh`	`#!/bin/sh`

`set -e`	`set -e`
`# Any subsequent commands which fail will cause the shell script to exit immediately`	`# Any subsequent commands which fail will cause the shell script to exit immediately`

`script_path=$(pwd)`	`script_path=$(pwd)`
`path=$script_path/..`	`path=$script_path/..`
`src_noc_path=$path/src_noc`	`src_noc_path=$path/src_noc`
`src_modelsim_path=$path/src_modelsim`	`src_modelsim_path=$path/src_modelsim`
`src_verilator_path=$path/src_verilator`	`src_verilator_path=$path/src_verilator`
`comp_path=$path/../mpsoc_work/verilator`	`comp_path=$path/../mpsoc_work/verilator`
`work_path=$comp_path/work`	`work_path=$comp_path/work`
`obj_dir_path=$work_path/processed_rtl/obj_dir/`	`obj_dir_path=$work_path/processed_rtl/obj_dir/`

`mkdir -p $work_path/bin`	`mkdir -p $work_path/bin`
`rm -rf $work_path/bin/testbench`	`rm -rf $work_path/bin/testbench`

`cp Makefile $obj_dir_path`	`cp Makefile $obj_dir_path`
`cp $src_verilator_path/simulator.cpp $obj_dir_path/testbench.cpp`	`cp $src_verilator_path/simulator2.cpp $obj_dir_path/testbench.cpp`
`cp $src_verilator_path/parameter.h $obj_dir_path`	`cp $src_verilator_path/parameter.h $obj_dir_path`
`cd $obj_dir_path`	`cd $obj_dir_path`
`make sim`	`make sim`
`cp testbench $work_path/bin`	`cp testbench $work_path/bin`
`echo done!`	`echo done!`