`timescale 1ns/1ps
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`timescale 1ns/1ps
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module mor1k #(
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module mor1k #(
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parameter OPTION_DCACHE_SNOOP = "ENABLED",// "NONE","ENABLED"
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parameter OPTION_DCACHE_SNOOP = "ENABLED",// "NONE","ENABLED"
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parameter FEATURE_INSTRUCTIONCACHE ="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_INSTRUCTIONCACHE ="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_DATACACHE ="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_DATACACHE ="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_IMMU ="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_IMMU ="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_DMMU="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_DMMU="ENABLED",// "NONE","ENABLED"
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parameter FEATURE_MULTIPLIER = "THREESTAGE",//"THREESTAGE", "PIPELINED", "SERIAL", "SIMULATION", "NONE"
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parameter FEATURE_DIVIDER = "SERIAL",// "SERIAL", "SIMULATION", "NONE"
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parameter OPTION_SHIFTER = "BARREL", //"BARREL", "SERIAL"
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parameter OPTION_OPERAND_WIDTH=32,
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parameter OPTION_OPERAND_WIDTH=32,
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parameter IRQ_NUM=32
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parameter IRQ_NUM=32
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)(
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)(
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clk,
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clk,
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rst,
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rst,
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cpu_en,
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cpu_en,
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//snoop_interface
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//snoop_interface
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snoop_adr_i,
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snoop_adr_i,
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snoop_en_i,
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snoop_en_i,
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// Wishbone interface
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// Wishbone interface
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iwbm_adr_o,
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iwbm_adr_o,
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iwbm_stb_o,
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iwbm_stb_o,
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iwbm_cyc_o,
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iwbm_cyc_o,
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iwbm_sel_o,
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iwbm_sel_o,
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iwbm_we_o,
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iwbm_we_o,
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iwbm_cti_o,
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iwbm_cti_o,
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iwbm_bte_o,
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iwbm_bte_o,
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iwbm_dat_o,
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iwbm_dat_o,
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iwbm_err_i,
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iwbm_err_i,
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iwbm_ack_i,
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iwbm_ack_i,
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iwbm_dat_i,
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iwbm_dat_i,
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iwbm_rty_i,
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iwbm_rty_i,
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dwbm_adr_o,
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dwbm_adr_o,
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dwbm_stb_o,
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dwbm_stb_o,
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dwbm_cyc_o,
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dwbm_cyc_o,
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dwbm_sel_o,
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dwbm_sel_o,
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dwbm_we_o,
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dwbm_we_o,
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dwbm_cti_o,
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dwbm_cti_o,
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dwbm_bte_o,
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dwbm_bte_o,
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dwbm_dat_o,
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dwbm_dat_o,
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dwbm_err_i,
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dwbm_err_i,
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dwbm_ack_i,
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dwbm_ack_i,
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dwbm_dat_i,
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dwbm_dat_i,
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dwbm_rty_i,
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dwbm_rty_i,
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irq_i
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irq_i
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);
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);
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input clk;
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input clk;
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input rst;
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input rst;
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input [31:0] snoop_adr_i;
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input [31:0] snoop_adr_i;
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input snoop_en_i;
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input snoop_en_i;
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// Wishbone interface
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// Wishbone interface
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output [31:0] iwbm_adr_o;
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output [31:0] iwbm_adr_o;
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output iwbm_stb_o;
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output iwbm_stb_o;
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output iwbm_cyc_o;
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output iwbm_cyc_o;
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output [3:0] iwbm_sel_o;
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output [3:0] iwbm_sel_o;
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output iwbm_we_o;
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output iwbm_we_o;
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output [2:0] iwbm_cti_o;
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output [2:0] iwbm_cti_o;
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output [1:0] iwbm_bte_o;
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output [1:0] iwbm_bte_o;
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output [31:0] iwbm_dat_o;
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output [31:0] iwbm_dat_o;
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input iwbm_err_i;
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input iwbm_err_i;
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input iwbm_ack_i;
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input iwbm_ack_i;
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input [31:0] iwbm_dat_i;
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input [31:0] iwbm_dat_i;
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input iwbm_rty_i;
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input iwbm_rty_i;
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output [31:0] dwbm_adr_o;
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output [31:0] dwbm_adr_o;
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output dwbm_stb_o;
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output dwbm_stb_o;
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output dwbm_cyc_o;
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output dwbm_cyc_o;
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output [3:0] dwbm_sel_o;
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output [3:0] dwbm_sel_o;
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output dwbm_we_o;
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output dwbm_we_o;
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output [2:0] dwbm_cti_o;
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output [2:0] dwbm_cti_o;
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output [1:0] dwbm_bte_o;
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output [1:0] dwbm_bte_o;
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output [31:0] dwbm_dat_o;
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output [31:0] dwbm_dat_o;
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input dwbm_err_i;
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input dwbm_err_i;
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input dwbm_ack_i;
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input dwbm_ack_i;
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input [31:0] dwbm_dat_i;
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input [31:0] dwbm_dat_i;
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input dwbm_rty_i;
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input dwbm_rty_i;
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input [IRQ_NUM-1:0] irq_i;
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input [IRQ_NUM-1:0] irq_i;
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input cpu_en;
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input cpu_en;
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// Debug interface
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// Debug interface
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wire [15:0] du_addr_i= 16'd0;
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wire [15:0] du_addr_i= 16'd0;
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wire du_stb_i=1'd0;
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wire du_stb_i=1'd0;
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wire [OPTION_OPERAND_WIDTH-1:0] du_dat_i={OPTION_OPERAND_WIDTH{1'b0}};
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wire [OPTION_OPERAND_WIDTH-1:0] du_dat_i={OPTION_OPERAND_WIDTH{1'b0}};
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wire du_we_i=1'b0;
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wire du_we_i=1'b0;
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// Stall control from debug interface
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// Stall control from debug interface
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wire du_stall_i=~cpu_en;
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wire du_stall_i=~cpu_en;
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// wire du_stall_o,
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// wire du_stall_o,
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wire [31:0] dadr_o,iadr_o;
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wire [31:0] dadr_o,iadr_o;
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wire [31:0] snoop_adr_i_byte;
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wire [31:0] snoop_adr_i_byte;
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assign iwbm_adr_o= {2'b00,iadr_o[31:2]};
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assign iwbm_adr_o= {2'b00,iadr_o[31:2]};
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assign dwbm_adr_o= {2'b00,dadr_o[31:2]};
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assign dwbm_adr_o= {2'b00,dadr_o[31:2]};
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assign snoop_adr_i_byte= {snoop_adr_i[29:0],2'b00};
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assign snoop_adr_i_byte= {snoop_adr_i[29:0],2'b00};
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mor1kx #(
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mor1kx #(
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.OPTION_DCACHE_SNOOP(OPTION_DCACHE_SNOOP),
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.OPTION_DCACHE_SNOOP(OPTION_DCACHE_SNOOP),
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.FEATURE_DEBUGUNIT("ENABLED"),
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.FEATURE_DEBUGUNIT("ENABLED"),
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.FEATURE_CMOV("ENABLED"),
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.FEATURE_CMOV("ENABLED"),
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.FEATURE_INSTRUCTIONCACHE(FEATURE_INSTRUCTIONCACHE),
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.FEATURE_INSTRUCTIONCACHE(FEATURE_INSTRUCTIONCACHE),
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.FEATURE_MULTIPLIER(FEATURE_MULTIPLIER),
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.FEATURE_DIVIDER(FEATURE_DIVIDER),
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.OPTION_SHIFTER(OPTION_SHIFTER),
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.OPTION_ICACHE_BLOCK_WIDTH(5),
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.OPTION_ICACHE_BLOCK_WIDTH(5),
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.OPTION_ICACHE_SET_WIDTH(8),
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.OPTION_ICACHE_SET_WIDTH(8),
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.OPTION_ICACHE_WAYS(2),
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.OPTION_ICACHE_WAYS(2),
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.OPTION_ICACHE_LIMIT_WIDTH(32),
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.OPTION_ICACHE_LIMIT_WIDTH(32),
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.FEATURE_IMMU(FEATURE_IMMU),
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.FEATURE_IMMU(FEATURE_IMMU),
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.FEATURE_DATACACHE(FEATURE_DATACACHE),
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.FEATURE_DATACACHE(FEATURE_DATACACHE),
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.OPTION_DCACHE_BLOCK_WIDTH(5),
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.OPTION_DCACHE_BLOCK_WIDTH(5),
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.OPTION_DCACHE_SET_WIDTH(8),
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.OPTION_DCACHE_SET_WIDTH(8),
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.OPTION_DCACHE_WAYS(2),
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.OPTION_DCACHE_WAYS(2),
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.OPTION_DCACHE_LIMIT_WIDTH(31),
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.OPTION_DCACHE_LIMIT_WIDTH(31),
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.FEATURE_DMMU(FEATURE_DMMU),
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.FEATURE_DMMU(FEATURE_DMMU),
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.OPTION_PIC_TRIGGER("LATCHED_LEVEL"),
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.OPTION_PIC_TRIGGER("LATCHED_LEVEL"),
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.IBUS_WB_TYPE("B3_REGISTERED_FEEDBACK"),
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.IBUS_WB_TYPE("B3_REGISTERED_FEEDBACK"),
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.DBUS_WB_TYPE("B3_REGISTERED_FEEDBACK"),
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.DBUS_WB_TYPE("B3_REGISTERED_FEEDBACK"),
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.OPTION_CPU0("CAPPUCCINO")
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.OPTION_CPU0("CAPPUCCINO")
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//.OPTION_RESET_PC(32'hf0000000)
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//.OPTION_RESET_PC(32'hf0000000)
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)
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)
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mor1kx0
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mor1kx0
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(
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(
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.iwbm_adr_o(iadr_o),
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.iwbm_adr_o(iadr_o),
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.iwbm_stb_o(iwbm_stb_o),
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.iwbm_stb_o(iwbm_stb_o),
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.iwbm_cyc_o(iwbm_cyc_o),
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.iwbm_cyc_o(iwbm_cyc_o),
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.iwbm_sel_o(iwbm_sel_o),
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.iwbm_sel_o(iwbm_sel_o),
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.iwbm_we_o(iwbm_we_o),
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.iwbm_we_o(iwbm_we_o),
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.iwbm_cti_o(iwbm_cti_o),
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.iwbm_cti_o(iwbm_cti_o),
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.iwbm_bte_o(iwbm_bte_o),
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.iwbm_bte_o(iwbm_bte_o),
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.iwbm_dat_o(iwbm_dat_o),
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.iwbm_dat_o(iwbm_dat_o),
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.iwbm_err_i(iwbm_err_i),
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.iwbm_err_i(iwbm_err_i),
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.iwbm_ack_i(iwbm_ack_i),
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.iwbm_ack_i(iwbm_ack_i),
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.iwbm_dat_i(iwbm_dat_i),
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.iwbm_dat_i(iwbm_dat_i),
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.iwbm_rty_i(iwbm_rty_i),
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.iwbm_rty_i(iwbm_rty_i),
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.dwbm_adr_o(dadr_o),
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.dwbm_adr_o(dadr_o),
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.dwbm_stb_o(dwbm_stb_o),
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.dwbm_stb_o(dwbm_stb_o),
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.dwbm_cyc_o(dwbm_cyc_o),
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.dwbm_cyc_o(dwbm_cyc_o),
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.dwbm_sel_o(dwbm_sel_o),
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.dwbm_sel_o(dwbm_sel_o),
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.dwbm_we_o(dwbm_we_o),
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.dwbm_we_o(dwbm_we_o),
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.dwbm_cti_o(dwbm_cti_o),
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.dwbm_cti_o(dwbm_cti_o),
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.dwbm_bte_o(dwbm_bte_o),
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.dwbm_bte_o(dwbm_bte_o),
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.dwbm_dat_o(dwbm_dat_o),
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.dwbm_dat_o(dwbm_dat_o),
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.dwbm_err_i(dwbm_err_i),
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.dwbm_err_i(dwbm_err_i),
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.dwbm_ack_i(dwbm_ack_i),
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.dwbm_ack_i(dwbm_ack_i),
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.dwbm_dat_i(dwbm_dat_i),
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.dwbm_dat_i(dwbm_dat_i),
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.dwbm_rty_i(dwbm_rty_i),
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.dwbm_rty_i(dwbm_rty_i),
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.clk(clk),
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.clk(clk),
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.rst(rst),
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.rst(rst),
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.avm_d_address_o (),
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.avm_d_address_o (),
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.avm_d_byteenable_o (),
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.avm_d_byteenable_o (),
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.avm_d_read_o (),
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.avm_d_read_o (),
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.avm_d_readdata_i (32'h00000000),
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.avm_d_readdata_i (32'h00000000),
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.avm_d_burstcount_o (),
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.avm_d_burstcount_o (),
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.avm_d_write_o (),
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.avm_d_write_o (),
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.avm_d_writedata_o (),
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.avm_d_writedata_o (),
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.avm_d_waitrequest_i (1'b0),
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.avm_d_waitrequest_i (1'b0),
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.avm_d_readdatavalid_i (1'b0),
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.avm_d_readdatavalid_i (1'b0),
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.avm_i_address_o (),
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.avm_i_address_o (),
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.avm_i_byteenable_o (),
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.avm_i_byteenable_o (),
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.avm_i_read_o (),
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.avm_i_read_o (),
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.avm_i_readdata_i (32'h00000000),
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.avm_i_readdata_i (32'h00000000),
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.avm_i_burstcount_o (),
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.avm_i_burstcount_o (),
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.avm_i_waitrequest_i (1'b0),
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.avm_i_waitrequest_i (1'b0),
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.avm_i_readdatavalid_i (1'b0),
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.avm_i_readdatavalid_i (1'b0),
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.irq_i(irq_i),
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.irq_i(irq_i),
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.traceport_exec_valid_o (),
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.traceport_exec_valid_o (),
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.traceport_exec_pc_o (),
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.traceport_exec_pc_o (),
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.traceport_exec_insn_o (),
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.traceport_exec_insn_o (),
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.traceport_exec_wbdata_o (),
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.traceport_exec_wbdata_o (),
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.traceport_exec_wbreg_o (),
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.traceport_exec_wbreg_o (),
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.traceport_exec_wben_o (),
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.traceport_exec_wben_o (),
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.multicore_coreid_i (32'd0),
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.multicore_coreid_i (32'd0),
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.multicore_numcores_i (32'd0),
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.multicore_numcores_i (32'd0),
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.snoop_adr_i (snoop_adr_i_byte),
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.snoop_adr_i (snoop_adr_i_byte),
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.snoop_en_i (snoop_en_i),
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.snoop_en_i (snoop_en_i),
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.du_addr_i(du_addr_i),
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.du_addr_i(du_addr_i),
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.du_stb_i(du_stb_i),
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.du_stb_i(du_stb_i),
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.du_dat_i(du_dat_i),
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.du_dat_i(du_dat_i),
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.du_we_i(du_we_i),
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.du_we_i(du_we_i),
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.du_dat_o( ),
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.du_dat_o( ),
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.du_ack_o( ),
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.du_ack_o( ),
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.du_stall_i(du_stall_i),
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.du_stall_i(du_stall_i),
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.du_stall_o( )
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.du_stall_o( )
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);
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);
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endmodule
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endmodule
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