Subversion Repositories bustap-jtag

//**************************************************************

//**************************************************************

// Module             : jtag_bfm_sv.v

// Module             : jtag_bfm_sv.v

// Platform           : Windows xp sp2

// Platform           : Windows xp sp2

// Simulator          : Modelsim 6.5b

// Simulator          : Modelsim 6.5b

// Synthesizer        : 

// Synthesizer        : 

// Place and Route    : 

// Place and Route    : 

// Targets device     : 

// Targets device     : 

// Author             : Bibo Yang  (ash_riple@hotmail.com)

// Author             : Bibo Yang  (ash_riple@hotmail.com)

// Organization       : www.opencores.org

// Organization       : www.opencores.org

// Description        : JTAG Stimulus monitor

// Description        : JTAG Stimulus monitor

//**************************************************************

//**************************************************************

`timescale 1ns/1ns

`timescale 1ns/1ns

`include "jtag_sim_define.h"

`include "jtag_sim_define.h"

module jtag_bfm_sv (

module jtag_bfm_sv (

);

);

reg jtag_sim_done;

reg jtag_sim_done;

initial begin

initial begin

        jtag_sim_done = 0;

        jtag_sim_done = 0;

        fork

        fork

                @(posedge up_monitor_tb.MON_LO.inst.u_virtual_jtag_adda_fifo.sld_virtual_jtag_component.user_input.vj_sim_done);

                @(posedge up_monitor_tb.MON_LO.inst.u_virtual_jtag_adda_fifo.sld_virtual_jtag_component.user_input.vj_sim_done);

                @(posedge up_monitor_tb.MON_LO.inst.u_virtual_jtag_addr_mask.sld_virtual_jtag_component.user_input.vj_sim_done);

                @(posedge up_monitor_tb.MON_LO.inst.u_virtual_jtag_addr_mask.sld_virtual_jtag_component.user_input.vj_sim_done);

                @(posedge up_monitor_tb.MON_LO.inst.u_virtual_jtag_adda_trig.sld_virtual_jtag_component.user_input.vj_sim_done);

                @(posedge up_monitor_tb.MON_LO.inst.u_virtual_jtag_adda_trig.sld_virtual_jtag_component.user_input.vj_sim_done);

        join

        join

        $display("All JTAG stimulus excercised");

        $display("All JTAG stimulus excercised");

        jtag_sim_done = 1;

        jtag_sim_done = 1;

end

end

endmodule

endmodule