////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: cpuscope.cpp
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// Filename: cpuscope.cpp
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//
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//
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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// Project: XuLA2-LX25 SoC based upon the ZipCPU
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//
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//
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// Purpose: To read out, and decompose, the results of the wishbone scope
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// Purpose: To read out, and decompose, the results of the wishbone scope
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// as applied to the ZipCPU internal operation.
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// as applied to the ZipCPU internal operation.
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//
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//
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// Creator: Dan Gisselquist, Ph.D.
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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//
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <strings.h>
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#include <strings.h>
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#include <ctype.h>
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#include <ctype.h>
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#include <string.h>
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#include <string.h>
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#include <signal.h>
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#include <signal.h>
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#include <assert.h>
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#include <assert.h>
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#include "port.h"
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#include "port.h"
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#include "llcomms.h"
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#include "llcomms.h"
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#include "regdefs.h"
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#include "regdefs.h"
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#include "scopecls.h"
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#include "scopecls.h"
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#define WBSCOPE R_CPUSCOPE
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#define WBSCOPE R_CPUSCOPE
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#define WBSCOPEDATA R_CPUSCOPED
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#define WBSCOPEDATA R_CPUSCOPED
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FPGA *m_fpga;
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FPGA *m_fpga;
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void closeup(int v) {
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void closeup(int v) {
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m_fpga->kill();
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m_fpga->kill();
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exit(0);
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exit(0);
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}
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}
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const char *regstr[] = {
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const char *regstr[] = {
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"R0","R1","R2","R3","R4","R5","R6","R7","R8","R9","RA","RB","RC",
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"R0","R1","R2","R3","R4","R5","R6","R7","R8","R9","RA","RB","RC",
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"SP","CC","PC"
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"SP","CC","PC"
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};
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};
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class CPUSCOPE : public SCOPE {
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class CPUSCOPE : public SCOPE {
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public:
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public:
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CPUSCOPE(FPGA *fpga, unsigned addr, bool vecread)
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CPUSCOPE(FPGA *fpga, unsigned addr, bool vecread)
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: SCOPE(fpga, addr, false, false) {};
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: SCOPE(fpga, addr, false, false) {};
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~CPUSCOPE(void) {}
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~CPUSCOPE(void) {}
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virtual void decode(DEVBUS::BUSW val) const {
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virtual void decode(DEVBUS::BUSW val) const {
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if (val & 0x80000000)
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if (val & 0x80000000)
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printf("TRIG ");
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printf("TRIG ");
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else
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else
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printf(" ");
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printf(" ");
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if (true) {
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if ((val & 0x40000000)==0) {
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if ((val & 0x40000000)==0) {
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printf("%s <- 0x.%08x", regstr[(val>>32-6)&0xf], val&0x03ffffff);
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printf("%s <- 0x.%08x", regstr[(val>>32-6)&0xf], val&0x03ffffff);
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} else if ((val & 0x60000000)==0x60000000) {
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} else if ((val & 0x60000000)==0x60000000) {
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if (val&0x08000000)
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if (val&0x08000000)
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printf("MEM-W[0x........] <- 0x.%07x %s",
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printf("MEM-W[0x........] <- 0x.%07x %s",
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(val&0x07ffffff),
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(val&0x07ffffff),
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(val&0x10000000)?"(GBL)":"");
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(val&0x10000000)?"(GBL)":"");
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else
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else
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printf("MEM-R[0x.%07x] -> (Not Givn) %s",
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printf("MEM-R[0x.%07x] -> (Not Givn) %s",
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(val&0x07ffffff),
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(val&0x07ffffff),
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(val&0x10000000)?"(GBL)":"");
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(val&0x10000000)?"(GBL)":"");
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} else if ((val & 0x70000000)==0x40000000)
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} else if ((val & 0x70000000)==0x40000000)
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printf("JMP 0x%08x", (val&0x0fffffff));
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printf("JMP 0x%08x", (val&0x0fffffff));
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else {
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else {
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int master, halt, brk, sleep, gie, buserr, trap,
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int master, halt, brk, sleep, gie, buserr, trap,
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ill, clri, pfv, pfi, dcdce, dcdv, dcdstall,
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ill, clri, pfv, pfi, dcdce, dcdv, dcdstall,
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opce, opvalid, oppipe, aluce, alubsy, aluwr,
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opce, opvalid, oppipe, aluce, alubsy, aluwr,
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aluill, aluwrf, memce, memwe, membsy;
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aluill, aluwrf, memce, memwe, membsy;
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master = (val>>27)&1;
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master = (val>>27)&1;
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halt = (val>>26)&1;
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halt = (val>>26)&1;
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brk = (val>>25)&1;
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brk = (val>>25)&1;
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sleep = (val>>24)&1;
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sleep = (val>>24)&1;
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gie = (val>>23)&1;
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gie = (val>>23)&1;
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buserr = (val>>22)&1;
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buserr = (val>>22)&1;
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trap = (val>>21)&1;
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trap = (val>>21)&1;
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ill = (val>>20)&1;
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ill = (val>>20)&1;
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clri = (val>>19)&1;
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clri = (val>>19)&1;
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pfv = (val>>18)&1;
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pfv = (val>>18)&1;
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pfi = (val>>17)&1;
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pfi = (val>>17)&1;
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dcdce = (val>>16)&1;
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dcdce = (val>>16)&1;
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dcdv = (val>>15)&1;
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dcdv = (val>>15)&1;
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dcdstall=(val>>14)&1;
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dcdstall=(val>>14)&1;
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opce = (val>>13)&1;
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opce = (val>>13)&1;
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opvalid= (val>>12)&1;
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opvalid= (val>>12)&1;
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oppipe = (val>>11)&1;
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oppipe = (val>>11)&1;
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aluce = (val>>10)&1;
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aluce = (val>>10)&1;
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alubsy = (val>> 9)&1;
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alubsy = (val>> 9)&1;
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aluwr = (val>> 8)&1;
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aluwr = (val>> 8)&1;
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aluill = (val>> 7)&1;
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aluill = (val>> 7)&1;
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aluwrf = (val>> 6)&1;
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aluwrf = (val>> 6)&1;
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memce = (val>> 5)&1;
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memce = (val>> 5)&1;
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memwe = (val>> 4)&1;
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memwe = (val>> 4)&1;
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membsy = (val>> 3)&1;
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membsy = (val>> 3)&1;
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printf("FLAGS %08x", val);
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printf("FLAGS %08x", val);
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printf(" CE[%c%c%c%c]",
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printf(" CE[%c%c%c%c]",
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(dcdce)?'D':' ',
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(dcdce)?'D':' ',
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(opce)?'O':' ',
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(opce)?'O':' ',
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(aluce)?'A':' ',
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(aluce)?'A':' ',
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(memce)?'M':' ');
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(memce)?'M':' ');
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printf(" V[%c%c%c%c]",
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printf(" V[%c%c%c%c]",
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(pfv)?'P':' ',
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(pfv)?'P':' ',
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(dcdv)?'D':' ',
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(dcdv)?'D':' ',
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(opvalid)?'O':' ',
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(opvalid)?'O':' ',
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(aluwr)?'A':' ');
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(aluwr)?'A':' ');
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if (master) printf(" MCE");
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if (master) printf(" MCE");
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if (halt) printf(" I-HALT");
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if (halt) printf(" I-HALT");
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if (brk) printf(" O-BREAK");
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if (brk) printf(" O-BREAK");
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if (sleep) printf(" SLP");
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if (sleep) printf(" SLP");
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if (GIE) printf(" GIE");
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if (GIE) printf(" GIE");
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if (buserr) printf(" BE");
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if (buserr) printf(" BE");
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if (trap) printf(" TRAP");
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if (trap) printf(" TRAP");
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if (ill) printf(" ILL");
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if (ill) printf(" ILL");
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if (clri) printf(" CLR-I");
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if (clri) printf(" CLR-I");
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if (pfi) printf(" PF-ILL");
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if (pfi) printf(" PF-ILL");
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if (dcdstall)printf(" DCD-STALL");
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if (dcdstall)printf(" DCD-STALL");
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if (oppipe) printf(" OP-PIPE");
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if (oppipe) printf(" OP-PIPE");
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if (alubsy) printf(" ALU-BUSY");
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if (alubsy) printf(" ALU-BUSY");
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if (memwe) printf(" MEM-WE");
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if (memwe) printf(" MEM-WE");
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if (membsy) printf(" MEM-BUSY");
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if (membsy) printf(" MEM-BUSY");
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//
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//
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}}
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if (false) {
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// CPU internal bus_debug
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int mce, mwe, mbsy, mpip,
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gcyc, gstb, lcyc, lstb, we, ack, stall, err,
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pcyc, pstb, pack, pstall, perr,
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mcycg, mstbg, mcycl, mstbl, mack, mstall, merr;
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mce = (val>>24)&1;
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//
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mbsy = (val>>22)&1;
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mpip = (val>>21)&1;
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gcyc = (val>>20)&1;
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gstb = (val>>19)&1;
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lcyc = (val>>18)&1;
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lstb = (val>>17)&1;
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we = (val>>16)&1;
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ack = (val>>15)&1;
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stall = (val>>14)&1;
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err = (val>>13)&1;
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pcyc = (val>>12)&1;
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pstb = (val>>11)&1;
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pack = (val>>10)&1;
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pstall = (val>> 9)&1;
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perr = (val>> 8)&1;
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mcycg = (val>> 7)&1;
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mstbg = (val>> 6)&1;
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mcycl = (val>> 5)&1;
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mstbl = (val>> 4)&1;
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mwe = (val>> 3)&1;
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mack = (val>> 2)&1;
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mstall = (val>> 1)&1;
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merr = (val&1);
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printf("P[%s%s%s%s%s]",
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(pcyc)?"C":" ",
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(pstb)?"S":" ",
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(pack)?"A":" ",
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(pstall)?"S":" ",
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(perr)?"E":" ");
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printf("M[(%s%s)(%s%s)%s%s%s%s]",
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(mcycg)?"C":" ", (mstbg)?"S":" ",
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(mcycl)?"C":" ", (mstbl)?"S":" ",
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(mwe)?"W":"R", (mack)?"A":" ",
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(mstall)?"S":" ",
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(merr)?"E":" ");
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printf("O[(%s%s)(%s%s)%s%s%s%s]",
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(gcyc)?"C":" ", (gstb)?"S":" ",
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(lcyc)?"C":" ", (lstb)?"S":" ",
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(we)?"W":"R", (ack)?"A":" ",
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(stall)?"S":" ",
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(err)?"E":" ");
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if (mbsy) printf("M-BUSY ");
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if (mpip) printf("M-PIPE ");
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if (mce) printf("M-CE ");
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}
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}
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}
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}
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};
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};
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int main(int argc, char **argv) {
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int main(int argc, char **argv) {
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FPGAOPEN(m_fpga);
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FPGAOPEN(m_fpga);
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signal(SIGSTOP, closeup);
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signal(SIGSTOP, closeup);
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signal(SIGHUP, closeup);
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signal(SIGHUP, closeup);
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CPUSCOPE *scope = new CPUSCOPE(m_fpga, WBSCOPE, false);
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CPUSCOPE *scope = new CPUSCOPE(m_fpga, WBSCOPE, false);
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if (!scope->ready()) {
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if (!scope->ready()) {
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printf("Scope is not yet ready:\n");
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printf("Scope is not yet ready:\n");
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scope->decode_control();
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scope->decode_control();
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scope->decode(WBSCOPEDATA);
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scope->decode(WBSCOPEDATA);
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printf("\n");
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printf("\n");
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} else
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} else
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scope->read();
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scope->read();
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delete m_fpga;
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delete m_fpga;
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}
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}
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