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----------------------------------------------------------------------------------
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-- Engineer: Joao Carlos Nunes Bittencourt
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----------------------------------------------------------------------------------
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-- Create Date: 13:18:18 03/06/2012
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----------------------------------------------------------------------------------
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-- Design Name: Opcode Package
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-- Package Name: flags
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----------------------------------------------------------------------------------
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-- Project Name: 16-bit uRISC Processor
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----------------------------------------------------------------------------------
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-- Revision:
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-- 1.0 - File Created
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-- 2.0 - Project refactoring
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--
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--
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-- Package File Template
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----------------------------------------------------------------------------------
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--
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-- Purpose: This package defines supplemental types, subtypes,
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-- constants, and functions
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--
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-- To use any of the example code shown below, uncomment the lines and modify as necessary
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--
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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package Operations is
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package operations is
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constant add: std_logic_vector (4 downto 0) := "00000";
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constant add: std_logic_vector (4 downto 0) := "00000";
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constant addinc: std_logic_vector (4 downto 0) := "00001";
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constant addinc: std_logic_vector (4 downto 0) := "00001";
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constant inca: std_logic_vector (4 downto 0) := "00011";
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constant inca: std_logic_vector (4 downto 0) := "00011";
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constant subdec: std_logic_vector (4 downto 0) := "00100";
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constant subdec: std_logic_vector (4 downto 0) := "00100";
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constant sub: std_logic_vector (4 downto 0) := "00101";
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constant sub: std_logic_vector (4 downto 0) := "00101";
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constant deca: std_logic_vector (4 downto 0) := "00110";
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constant deca: std_logic_vector (4 downto 0) := "00110";
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constant lsl: std_logic_vector (4 downto 0) := "01000"; -- Left shift logic
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constant lsl: std_logic_vector (4 downto 0) := "01000"; -- Left shift logic
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constant asr: std_logic_vector (4 downto 0) := "01001"; -- Aritmetic shift right
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constant asr: std_logic_vector (4 downto 0) := "01001"; -- Aritmetic shift right
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constant zeros: std_logic_vector (4 downto 0) := "10000";
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constant zeros: std_logic_vector (4 downto 0) := "10000";
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constant land: std_logic_vector (4 downto 0) := "10001"; -- Logic and
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constant land: std_logic_vector (4 downto 0) := "10001"; -- Logic and
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constant andnota: std_logic_vector (4 downto 0) := "10010";
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constant andnota: std_logic_vector (4 downto 0) := "10010";
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constant passb: std_logic_vector (4 downto 0) := "10011";
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constant passb: std_logic_vector (4 downto 0) := "10011";
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constant andnotb: std_logic_vector (4 downto 0) := "10100";
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constant andnotb: std_logic_vector (4 downto 0) := "10100";
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constant passa: std_logic_vector (4 downto 0) := "10101";
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constant passa: std_logic_vector (4 downto 0) := "10101";
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constant lxor: std_logic_vector (4 downto 0) := "10110"; -- Logic XOR
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constant lxor: std_logic_vector (4 downto 0) := "10110"; -- Logic XOR
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constant lor: std_logic_vector (4 downto 0) := "10111"; -- Logic OR
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constant lor: std_logic_vector (4 downto 0) := "10111"; -- Logic OR
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constant lnor: std_logic_vector (4 downto 0) := "11000"; -- Logic NOR
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constant lnor: std_logic_vector (4 downto 0) := "11000"; -- Logic NOR
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constant lxnor: std_logic_vector (4 downto 0) := "11001"; -- Logic XOR
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constant lxnor: std_logic_vector (4 downto 0) := "11001"; -- Logic XOR
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constant passnota: std_logic_vector (4 downto 0) := "11010";
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constant passnota: std_logic_vector (4 downto 0) := "11010";
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constant ornota: std_logic_vector (4 downto 0) := "11011";
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constant ornota: std_logic_vector (4 downto 0) := "11011";
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constant passnotb: std_logic_vector (4 downto 0) := "11100";
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constant passnotb: std_logic_vector (4 downto 0) := "11100";
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constant ornotb: std_logic_vector (4 downto 0) := "11101";
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constant ornotb: std_logic_vector (4 downto 0) := "11101";
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constant lnand: std_logic_vector (4 downto 0) := "11110"; -- Logic NAND
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constant lnand: std_logic_vector (4 downto 0) := "11110"; -- Logic NAND
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constant ones: std_logic_vector (4 downto 0) := "11111";
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constant ones: std_logic_vector (4 downto 0) := "11111";
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constant lcl: std_logic_vector (4 downto 0) := "00010"; -- Load constant low
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constant lcl: std_logic_vector (4 downto 0) := "00010"; -- Load constant low
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constant lch: std_logic_vector (4 downto 0) := "00111"; -- Load constant high
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constant lch: std_logic_vector (4 downto 0) := "00111"; -- Load constant high
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end Operations;
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end operations;
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