//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// CALL NEAR Indirect
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// CALL NEAR Indirect
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//
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//
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// 2009-2012 Robert Finch
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// 2009-2012 Robert Finch
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// robfinch<remove>@opencores.org
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// robfinch<remove>@finitron.ca
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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// (at your option) any later version.
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//
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//
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// This source file is distributed in the hope that it will be useful,
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// GNU General Public License for more details.
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//
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//
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// You should have received a copy of the GNU General Public License
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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//- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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//
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//
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CALL_IN:
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CALL_IN:
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if (!cyc_o) begin
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if (!cyc_o)
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cyc_type <= `CT_WRMEM;
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write(`CT_WRMEM,sssp,ip[15:8]);
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
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we_o <= 1'b1;
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adr_o <= sssp;
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dat_o <= ip[15:8];
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end
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else if (ack_i) begin
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else if (ack_i) begin
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cyc_type <= `CT_PASSIVE;
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pause_stack_push();
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state <= CALL_IN1;
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state <= CALL_IN1;
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sp <= sp_dec;
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stb_o <= 1'b0;
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we_o <= 1'b0;
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end
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end
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CALL_IN1:
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CALL_IN1:
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if (!stb_o) begin
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if (!stb_o)
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cyc_type <= `CT_WRMEM;
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write(`CT_WRMEM,sssp,ip[7:0]);
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
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we_o <= 1'b1;
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adr_o <= sssp;
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dat_o <= ip[7:0];
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end
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else if (ack_i) begin
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else if (ack_i) begin
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cyc_type <= `CT_PASSIVE;
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nack();
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ea <= {cs,`SEG_SHIFT}+b;
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ea <= {cs,`SEG_SHIFT}+b;
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if (mod==2'b11) begin
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if (mod==2'b11) begin
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ip <= b;
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ip <= b;
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state <= IFETCH;
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state <= IFETCH;
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end
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end
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else
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else
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state <= CALL_IN2;
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state <= CALL_IN2;
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cyc_o <= 1'b0;
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stb_o <= 1'b0;
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we_o <= 1'b0;
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end
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end
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CALL_IN2:
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CALL_IN2:
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if (!cyc_o) begin
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if (!cyc_o)
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cyc_type <= `CT_RDMEM;
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read(`CT_RDMEM,ea);
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cyc_o <= 1'b1;
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stb_o <= 1'b1;
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we_o <= 1'b0;
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adr_o <= ea;
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end
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else if (ack_i) begin
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else if (ack_i) begin
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cyc_type <= `CT_PASSIVE;
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pause_read();
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stb_o <= 1'b0;
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state <= CALL_IN3;
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state <= CALL_IN3;
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b[7:0] <= dat_i;
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b[7:0] <= dat_i;
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end
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end
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CALL_IN3:
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CALL_IN3:
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if (!stb_o) begin
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if (!stb_o)
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cyc_type <= `CT_RDMEM;
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read(`CT_RDMEM,ea_inc);
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stb_o <= 1'b1;
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adr_o <= ea_inc;
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end
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else if (ack_i) begin
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else if (ack_i) begin
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cyc_type <= `CT_PASSIVE;
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nack();
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state <= CALL_IN4;
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state <= CALL_IN4;
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cyc_o <= 1'b0;
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stb_o <= 1'b0;
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b[15:8] <= dat_i;
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b[15:8] <= dat_i;
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end
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end
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CALL_IN4:
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CALL_IN4:
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begin
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begin
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state <= IFETCH;
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state <= IFETCH;
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ip <= b;
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ip <= b;
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end
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end
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