Simply RISC S1 Core - Support and References
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S1 Core - Support and References
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The S1 Core has been developed by Simply RISC LLP and
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The S1 Core has been developed by Fabrizio Fazzino and
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the OpenCores community, and it's been released as
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the OpenCores community, and it's been released as
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Free Hardware Design under the GPL license version 2.
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Free Hardware Design under the GPL license version 2.
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You have all the freedom granted by this license, but
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You have all the freedom granted by this license, but
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to avoid legal problems we have to state clearly that:
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to avoid legal problems we have to state clearly that:
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1) all the files bundled with this package come
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1) all the files bundled with this package come
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WITHOUT WARRANTY, so USE THEM AT YOUR OWN RISK;
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WITHOUT WARRANTY, so USE THEM AT YOUR OWN RISK;
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2) you do NOT have the right to pretend the support
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2) you do NOT have the right to demand the support
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you need from Simply RISC LLP.
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you need from Fabrizio Fazzino.
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Anyway we will try to provide all the free support
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Anyway we will try to provide all the free support
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that we can, and now we try to list how to ask for
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that we can, and now we try to list how to ask for
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it.
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it.
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Basically since the S1 Core is based upon the OpenSPARC
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Basically since the S1 Core is based upon the OpenSPARC
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T1 microprocessor released by Sun Microsystems, for
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T1 microprocessor released by Sun Microsystems, for
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issues related with the SPARC Core inside the S1 you
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issues related with the SPARC Core inside the S1 you
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can refer to the OpenSPARC website:
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can refer to the OpenSPARC website:
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http://www.opensparc.net
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http://www.opensparc.net
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In the documentation section of this site you will
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In the documentation section of this site you will
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find several documents about the SPARC v9 64-bit
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find several documents about the SPARC v9 64-bit
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Instruction Set Architecture (you should be able to
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Instruction Set Architecture (you should be able to
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read them without registration).
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read them without registration).
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For the specification of the T1 implementation of
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For the specification of the T1 implementation of
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the 64-bit SPARC ISA you need a free registration
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the 64-bit SPARC ISA you need a free registration
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to download the full design (it's a very large file)
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to download the full design (it's a very large file)
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that contains also the full specification of the T1
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that contains also the full specification of the T1
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microprocessor.
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microprocessor.
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On the OpenSPARC website listed above there are also
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On the OpenSPARC website listed above there are also
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public forums online where you can ask for free
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public forums online where you can ask for free
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support.
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support.
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If you need support about the Wishbone Interconnect,
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If you need support about the Wishbone Interconnect,
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the URL you need is:
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the URL you need is:
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http://www.opencores.org
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http://www.opencores.org
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Here you will find also several other cores that can
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Here you will find also several other cores that can
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be connected to the S1 seamlessly; again, there are
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be connected to the S1 seamlessly; again, there are
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mailing lists available from this site when you can
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mailing lists available from this site when you can
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discuss with real experts about your problems with
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discuss with real experts about your problems with
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the Wishbone interconnect protocol.
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the Wishbone interconnect protocol.
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If you still need support or you want to take part
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in the development of the S1 Core, then you can
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contact us at
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support@srisc.com
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and we will try to help you if possible. If you find
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something that can be corrected and/or improved in
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the design or in the documentation please let us know
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and we will fix it in the next release.
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To see if there is a new release available just check
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from time to time on the Simply RISC website:
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http://www.srisc.com
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