// Header file for trace analyzer
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// Header file for trace analyzer
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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const int LEN_REQ = 125;
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const int LEN_REQ = 125;
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const int LEN_RET = 146;
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const int LEN_RET = 146;
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// Symbols used in trace.vcd generated from official OpenSPARC T1 sims
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// Symbols used in trace.vcd generated from official OpenSPARC T1 sims
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const char VCD_ID_PCX_REQ = '!';
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const char VCD_ID_PCX_REQ = '!';
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const char VCD_ID_PCX_ATOM = '^';
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const char VCD_ID_PCX_ATOM = '^';
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const char VCD_ID_PCX_DATA = '"';
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const char VCD_ID_PCX_DATA = '"';
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const char VCD_ID_PCX_GRANT = 'f';
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const char VCD_ID_PCX_GRANT = 'f';
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const char VCD_ID_CPX_READY = '#';
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const char VCD_ID_CPX_READY = '#';
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const char VCD_ID_CPX_DATA = '$';
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const char VCD_ID_CPX_DATA = '$';
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// From T1 defs
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// From T1 defs
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#define PCX_VLD 123 //PCX packet valid
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#define PCX_VLD 123 //PCX packet valid
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#define PCX_RQ_HI 122 //PCX request type field
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#define PCX_RQ_HI 122 //PCX request type field
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#define PCX_RQ_LO 118
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#define PCX_RQ_LO 118
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#define PCX_NC 117 //PCX non-cacheable bit
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#define PCX_NC 117 //PCX non-cacheable bit
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#define PCX_R 117 //PCX read/!write bit
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#define PCX_R 117 //PCX read/!write bit
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#define PCX_CP_HI 116 //PCX cpu_id field
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#define PCX_CP_HI 116 //PCX cpu_id field
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#define PCX_CP_LO 114
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#define PCX_CP_LO 114
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#define PCX_TH_HI 113 //PCX Thread field
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#define PCX_TH_HI 113 //PCX Thread field
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#define PCX_TH_LO 112
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#define PCX_TH_LO 112
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#define PCX_BF_HI 111 //PCX buffer id field
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#define PCX_BF_HI 111 //PCX buffer id field
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#define PCX_INVALL 111
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#define PCX_INVALL 111
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#define PCX_BF_LO 109
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#define PCX_BF_LO 109
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#define PCX_WY_HI 108 //PCX replaced L1 way field
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#define PCX_WY_HI 108 //PCX replaced L1 way field
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#define PCX_WY_LO 107
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#define PCX_WY_LO 107
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#define PCX_P_HI 108 //PCX packet ID, 1st STQ - 10, 2nd - 01
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#define PCX_P_HI 108 //PCX packet ID, 1st STQ - 10, 2nd - 01
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#define PCX_P_LO 107
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#define PCX_P_LO 107
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#define PCX_SZ_HI 106 //PCX load/store size field
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#define PCX_SZ_HI 106 //PCX load/store size field
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#define PCX_SZ_LO 104
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#define PCX_SZ_LO 104
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#define PCX_ERR_HI 106 //PCX error field
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#define PCX_ERR_HI 106 //PCX error field
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#define PCX_ERR_LO 104
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#define PCX_ERR_LO 104
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#define PCX_AD_HI 103 //PCX address field
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#define PCX_AD_HI 103 //PCX address field
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#define PCX_AD_LO 64
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#define PCX_AD_LO 64
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#define PCX_DA_HI 63 //PCX Store data
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#define PCX_DA_HI 63 //PCX Store data
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#define PCX_DA_LO 0
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#define PCX_DA_LO 0
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#define PCX_SZ_1B 0x0
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#define PCX_SZ_1B 0x0
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#define PCX_SZ_2B 0x1
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#define PCX_SZ_2B 0x1
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#define PCX_SZ_4B 0x2
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#define PCX_SZ_4B 0x2
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#define PCX_SZ_8B 0x3
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#define PCX_SZ_8B 0x3
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#define PCX_SZ_16B 0x7
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#define PCX_SZ_16B 0x7
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#define CPX_VLD 144 //CPX payload packet valid
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#define CPX_VLD 144 //CPX payload packet valid
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#define CPX_RQ_HI 143 //CPX Request type
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#define CPX_RQ_HI 143 //CPX Request type
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#define CPX_RQ_LO 140
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#define CPX_RQ_LO 140
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#define CPX_ERR_HI 139 //CPX error field
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#define CPX_ERR_HI 139 //CPX error field
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#define CPX_ERR_LO 137
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#define CPX_ERR_LO 137
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#define CPX_NC 136 //CPX non-cacheable
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#define CPX_NC 136 //CPX non-cacheable
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#define CPX_R 136 //CPX read/!write bit
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#define CPX_R 136 //CPX read/!write bit
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#define CPX_TH_HI 135 //CPX thread ID field
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#define CPX_TH_HI 135 //CPX thread ID field
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#define CPX_TH_LO 134
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#define CPX_TH_LO 134
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//bits 133:128 are shared by different fields
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//bits 133:128 are shared by different fields
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//for different packet types.
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//for different packet types.
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#define CPX_IN_HI 133 //CPX Interrupt source
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#define CPX_IN_HI 133 //CPX Interrupt source
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#define CPX_IN_LO 128
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#define CPX_IN_LO 128
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#define CPX_WYVLD 133 //CPX replaced way valid
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#define CPX_WYVLD 133 //CPX replaced way valid
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#define CPX_WY_HI 132 //CPX replaced I$/D$ way
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#define CPX_WY_HI 132 //CPX replaced I$/D$ way
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#define CPX_WY_LO 131
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#define CPX_WY_LO 131
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#define CPX_BF_HI 130 //CPX buffer ID field - 3 bits
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#define CPX_BF_HI 130 //CPX buffer ID field - 3 bits
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#define CPX_BF_LO 128
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#define CPX_BF_LO 128
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#define CPX_SI_HI 132 //L1 set ID - PA[10:6]- 5 bits
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#define CPX_SI_HI 132 //L1 set ID - PA[10:6]- 5 bits
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#define CPX_SI_LO 128 //used for invalidates
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#define CPX_SI_LO 128 //used for invalidates
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#define CPX_P_HI 131 //CPX packet ID, 1st STQ - 10, 2nd - 01
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#define CPX_P_HI 131 //CPX packet ID, 1st STQ - 10, 2nd - 01
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#define CPX_P_LO 130
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#define CPX_P_LO 130
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#define CPX_ASI 130 //CPX forward request to ASI
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#define CPX_ASI 130 //CPX forward request to ASI
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#define CPX_IF4B 130
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#define CPX_IF4B 130
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#define CPX_IINV 124
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#define CPX_IINV 124
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#define CPX_DINV 123
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#define CPX_DINV 123
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#define CPX_INVPA5 122
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#define CPX_INVPA5 122
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#define CPX_INVPA4 121
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#define CPX_INVPA4 121
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#define CPX_CPUID_HI 120
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#define CPX_CPUID_HI 120
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#define CPX_CPUID_LO 118
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#define CPX_CPUID_LO 118
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#define CPX_INV_PA_HI 116
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#define CPX_INV_PA_HI 116
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#define CPX_INV_PA_LO 112
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#define CPX_INV_PA_LO 112
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#define CPX_INV_IDX_HI 117
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#define CPX_INV_IDX_HI 117
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#define CPX_INV_IDX_LO 112
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#define CPX_INV_IDX_LO 112
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#define CPX_DA_HI 127 //CPX data payload
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#define CPX_DA_HI 127 //CPX data payload
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#define CPX_DA_LO 0
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#define CPX_DA_LO 0
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#define LOAD_RQ 0x00
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#define LOAD_RQ 0x00
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#define IMISS_RQ 0x10
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#define IMISS_RQ 0x10
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#define STORE_RQ 0x01
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#define STORE_RQ 0x01
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#define CAS1_RQ 0x02
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#define CAS1_RQ 0x02
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#define CAS2_RQ 0x03
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#define CAS2_RQ 0x03
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#define SWAP_RQ 0x06
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#define SWAP_RQ 0x06
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#define STRLOAD_RQ 0x04
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#define STRLOAD_RQ 0x04
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#define STRST_RQ 0x05
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#define STRST_RQ 0x05
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#define STQ_RQ 0x07 // Not found in official waves
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#define STQ_RQ 0x07 // Not found in official waves
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#define INT_RQ 0x09 // NF
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#define INT_RQ 0x09 // NF
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#define FWD_RQ 0x0D // NF
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#define FWD_RQ 0x0D // NF
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#define FWD_RPY 0x0E // NF
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#define FWD_RPY 0x0E // NF
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#define RSVD_RQ 0x1F // NF
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#define RSVD_RQ 0x1F // NF
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// Added by Simply RISC
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// Added for S1 Core
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#define ATOM_REQ_A 0x0A
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#define ATOM_REQ_A 0x0A
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#define ATOM_REQ_B 0x0B
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#define ATOM_REQ_B 0x0B
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#define LOAD_RET 0x0
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#define LOAD_RET 0x0
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#define INV_RET 0x3 // Not found in official waves
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#define INV_RET 0x3 // Not found in official waves
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#define ST_ACK 0x4
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#define ST_ACK 0x4
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#define AT_ACK 0x3 // NF
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#define AT_ACK 0x3 // NF
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#define INT_RET 0x7
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#define INT_RET 0x7
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#define TEST_RET 0x5 // NF
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#define TEST_RET 0x5 // NF
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#define FP_RET 0x8
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#define FP_RET 0x8
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#define IFILL_RET 0x1
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#define IFILL_RET 0x1
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#define EVICT_REQ 0x3 // NF
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#define EVICT_REQ 0x3 // NF
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#define ERR_RET 0xC // NF
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#define ERR_RET 0xC // NF
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#define STRLOAD_RET 0x2
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#define STRLOAD_RET 0x2
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#define STRST_ACK 0x6
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#define STRST_ACK 0x6
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#define FWD_RQ_RET 0xA // NF
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#define FWD_RQ_RET 0xA // NF
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#define FWD_RPY_RET 0xB // NF
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#define FWD_RPY_RET 0xB // NF
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#define RSVD_RET 0xF // NF
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#define RSVD_RET 0xF // NF
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//End cache crossbar defines
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//End cache crossbar defines
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