URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [flash_memcontrl/] [componentCfg.xml] - Diff between revs 134 and 135

Rev 134	Rev 135

	`-->`

`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`	`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
`xmlns:socgen="http://opencores.org"`	`xmlns:socgen="http://opencores.org"`
`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`	`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`

`opencores.org`	`opencores.org`
`logic`	`logic`
`flash_memcontrl`	`flash_memcontrl`


`2`	`2`
`_`	`_`
`_`	`_`
`_`	`_`
`VARIANT`	`VARIANT`



	`TestBenches`
	`sim`
	`testbenches`
	`testbench`
	`version`


	`Fpgas`
	`syn`
	`ise`
	`chip`
	`variant`







`/doc`	`/doc`







`default`	`default`
`def`	`def`
`def_tb`	`def_tb`
`def_lint`	`def_lint`

`ADDR_BITS24`	`ADDR_BITS24`











`flash_memcontrl/sim`	`flash_memcontrl/sim`









`flash_memcontrl_def_tb`	`flash_memcontrl_def_tb`
`def_tb`	`def_tb`

`PERIOD40`	`PERIOD40`
`TIMEOUT100000`	`TIMEOUT100000`



`flash_memcontrl_defTB.test.dut`	`flash_memcontrl_defTB.test.dut`



`icaruscoverage`	`icaruscoverage`





`flash_memcontrl_def_lint`	`flash_memcontrl_def_lint`
`def_lint`	`def_lint`

`rtl_check`	`rtl_check`

















`default`	`default`
`flash_memcontrl_def_lint`	`flash_memcontrl_def_lint`












`default`	`default`
`flash_memcontrl_def_tb`	`flash_memcontrl_def_tb`