URL
https://opencores.org/ocsvn/socgen/socgen/trunk
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Rev 134 |
Rev 135 |
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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opencores.org
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opencores.org
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cde
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cde
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sram
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sram
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3
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3
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_
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_
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_
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_
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_
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VARIANT
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VARIANT
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/ip/sram/doc
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/ip/sram/doc
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sram/doc
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sram/doc
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def
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def
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Synchronous one-port ram
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Synchronous one-port ram
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dp
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dp
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Synchronous two-port ram with seperate read/write ports
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Synchronous two-port ram with seperate read/write ports
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byte
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byte
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Synchronous one-port byte wide ram with byte enable
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Synchronous one-port byte wide ram with byte enable
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word
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word
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Synchronous one-port word wide ram with byte enable
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Synchronous one-port word wide ram with byte enable
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ADDR
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ADDR
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Number of address bits
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Number of address bits
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WIDTH
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WIDTH
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Number of data bits
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Number of data bits
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WORDS
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WORDS
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Number of memory words. Must be fully addressable by ADDR address bits
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Number of memory words. Must be fully addressable by ADDR address bits
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WRITETHRU
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WRITETHRU
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If a read and write occur to the same address on the same cycle then 0 reads old data while 1 reads new
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If a read and write occur to the same address on the same cycle then 0 reads old data while 1 reads new
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addr
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addr
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Memory address bits
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Memory address bits
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raddr
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raddr
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Memory read address bits
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Memory read address bits
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waddr
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waddr
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Memory write address bits
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Memory write address bits
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clk
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clk
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Active high clock
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Active high clock
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cs
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cs
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Active high chip select
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Active high chip select
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rd
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rd
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Active high read enable
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Active high read enable
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wr
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wr
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Active high write enable
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Active high write enable
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be
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be
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Active high byte enable
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Active high byte enable
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rdata
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rdata
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read data out
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read data out
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wdata
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wdata
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write data in
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write data in
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default
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default
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def
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def
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dp
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dp
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ADDR8
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ADDR8
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WORDS256
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WORDS256
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WIDTH8
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WIDTH8
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WRITETHRU1
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WRITETHRU1
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byte
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byte
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byte
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byte
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ADDR8
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ADDR8
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WORDS256
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WORDS256
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WRITETHRU1
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WRITETHRU1
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word
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word
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word
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word
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ADDR8
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ADDR8
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WORDS256
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WORDS256
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WRITETHRU1
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WRITETHRU1
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sram/sim
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sram_sys_lint
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sys_lint
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rtl_check
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default
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sram_sys_lint
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