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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [sram/] [componentCfg.xml] - Diff between revs 134 and 135

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Rev 134 Rev 135
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
opencores.org
opencores.org
cde
cde
sram
sram
3
3
_
_
_
_
_
_
VARIANT
VARIANT
/ip/sram/doc
/ip/sram/doc
sram/doc
sram/doc
  
  
   def
   def
   Synchronous one-port ram
   Synchronous one-port ram
  
  
  
  
   dp
   dp
   Synchronous two-port ram with seperate read/write ports
   Synchronous two-port ram with seperate read/write ports
  
  
  
  
   byte
   byte
   Synchronous one-port byte wide ram with byte enable
   Synchronous one-port byte wide ram with byte enable
  
  
  
  
   word
   word
   Synchronous one-port word wide ram with byte enable
   Synchronous one-port word wide ram with byte enable
  
  
  
  
   ADDR
   ADDR
   Number of address bits
   Number of address bits
  
  
  
  
   WIDTH
   WIDTH
   Number of data bits
   Number of data bits
  
  
  
  
   WORDS
   WORDS
   Number of memory words. Must be fully addressable by ADDR address bits
   Number of memory words. Must be fully addressable by ADDR address bits
  
  
  
  
   WRITETHRU
   WRITETHRU
   If a read and write occur to the same address on the same cycle then 0 reads old data while 1 reads new
   If a read and write occur to the same address on the same cycle then 0 reads old data while 1 reads new
  
  
  
  
   addr
   addr
   Memory address bits
   Memory address bits
  
  
  
  
   raddr
   raddr
   Memory read address bits
   Memory read address bits
  
  
  
  
   waddr
   waddr
   Memory write address bits
   Memory write address bits
  
  
  
  
   clk
   clk
   Active high clock
   Active high clock
  
  
  
  
   cs
   cs
   Active high chip select
   Active high chip select
  
  
  
  
   rd
   rd
   Active high read enable
   Active high read enable
  
  
  
  
   wr
   wr
   Active high write enable
   Active high write enable
  
  
  
  
   be
   be
   Active high byte enable
   Active high byte enable
  
  
  
  
   rdata
   rdata
   read data out
   read data out
  
  
  
  
   wdata
   wdata
   write data in
   write data in
  
  
 
 
 default
 default
 def
 def
 dp
 dp
 
 
    ADDR8
    ADDR8
    WORDS256
    WORDS256
    WIDTH8
    WIDTH8
    WRITETHRU1
    WRITETHRU1
 
 
 
 
 
 
 byte
 byte
 byte
 byte
 
 
    ADDR8
    ADDR8
    WORDS256
    WORDS256
    WRITETHRU1
    WRITETHRU1
 
 
 
 
 word
 word
 word
 word
 
 
    ADDR8
    ADDR8
    WORDS256
    WORDS256
    WRITETHRU1
    WRITETHRU1
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
sram/sim
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
sram_sys_lint
 
sys_lint
 
 
 
  rtl_check
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
default
 
sram_sys_lint
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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