-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- SD/MMC Bootloader
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-- SD/MMC Bootloader
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-- Chip toplevel design with SD feature set
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-- Chip toplevel design with SD feature set
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--
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--
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-- $Id: chip-sd-a.vhd,v 1.7 2007-08-06 23:31:42 arniml Exp $
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-- $Id: chip-sd-a.vhd 77 2009-04-01 19:53:14Z arniml $
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--
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--
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-- Copyright (c) 2005, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2005, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved, see COPYING.
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-- All rights reserved, see COPYING.
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--
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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-- modification, are permitted provided that the following conditions are met:
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--
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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-- this list of conditions and the following disclaimer.
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--
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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-- documentation and/or other materials provided with the distribution.
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--
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--
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-- Neither the name of the author nor the names of other contributors may
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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-- specific prior written permission.
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--
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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--
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-- Please report bugs to the author, but before you do so, please
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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-- you have the latest version of this file.
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--
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--
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-- The latest version of this file can be found at:
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-- The latest version of this file can be found at:
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-- http://www.opencores.org/projects.cgi/web/spi_boot/overview
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-- http://www.opencores.org/projects.cgi/web/spi_boot/overview
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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architecture sd of chip is
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architecture sd of chip is
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|
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component spi_boot
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component spi_boot
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generic (
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generic (
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width_bit_cnt_g : integer := 6;
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width_bit_cnt_g : integer := 6;
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width_img_cnt_g : integer := 2;
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width_img_cnt_g : integer := 2;
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num_bits_per_img_g : integer := 18;
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num_bits_per_img_g : integer := 18;
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sd_init_g : integer := 0;
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sd_init_g : integer := 0;
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mmc_compat_clk_div_g : integer := 0;
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mmc_compat_clk_div_g : integer := 0;
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width_mmc_clk_div_g : integer := 0;
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width_mmc_clk_div_g : integer := 0;
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reset_level_g : integer := 0
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reset_level_g : integer := 0
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);
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);
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port (
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port (
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clk_i : in std_logic;
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clk_i : in std_logic;
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reset_i : in std_logic;
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reset_i : in std_logic;
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set_sel_i : in std_logic_vector(31-width_img_cnt_g-num_bits_per_img_g
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set_sel_i : in std_logic_vector(31-width_img_cnt_g-num_bits_per_img_g
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downto 0);
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downto 0);
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spi_clk_o : out std_logic;
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spi_clk_o : out std_logic;
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spi_cs_n_o : out std_logic;
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spi_cs_n_o : out std_logic;
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spi_data_in_i : in std_logic;
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spi_data_in_i : in std_logic;
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spi_data_out_o : out std_logic;
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spi_data_out_o : out std_logic;
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spi_en_outs_o : out std_logic;
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spi_en_outs_o : out std_logic;
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start_i : in std_logic;
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start_i : in std_logic;
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mode_i : in std_logic;
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mode_i : in std_logic;
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config_n_o : out std_logic;
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config_n_o : out std_logic;
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detached_o : out std_logic;
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detached_o : out std_logic;
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cfg_init_n_i : in std_logic;
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cfg_init_n_i : in std_logic;
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cfg_done_i : in std_logic;
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cfg_done_i : in std_logic;
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dat_done_i : in std_logic;
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dat_done_i : in std_logic;
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cfg_clk_o : out std_logic;
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cfg_clk_o : out std_logic;
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cfg_dat_o : out std_logic
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cfg_dat_o : out std_logic
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);
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);
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end component;
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end component;
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signal spi_clk_s : std_logic;
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signal spi_clk_s : std_logic;
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signal spi_cs_n_s : std_logic;
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signal spi_cs_n_s : std_logic;
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signal spi_data_out_s : std_logic;
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signal spi_data_out_s : std_logic;
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signal spi_en_outs_s : std_logic;
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signal spi_en_outs_s : std_logic;
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constant width_img_cnt_c : integer := 2; -- 4 images
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constant width_img_cnt_c : integer := 2; -- 4 images
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constant num_bits_per_img_c : integer := 18; -- 256 kByte per image
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constant num_bits_per_img_c : integer := 18; -- 256 kByte per image
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constant set_sel_width_c : integer := 31-width_img_cnt_c-num_bits_per_img_c;
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constant set_sel_width_c : integer := 31-width_img_cnt_c-num_bits_per_img_c;
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signal set_sel_s : std_logic_vector(set_sel_width_c downto 0);
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signal set_sel_s : std_logic_vector(set_sel_width_c downto 0);
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begin
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begin
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|
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set_sel_s <= (3 => not set_sel_n_i(3),
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set_sel_s <= (3 => not set_sel_n_i(3),
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2 => not set_sel_n_i(2),
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2 => not set_sel_n_i(2),
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1 => not set_sel_n_i(1),
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1 => not set_sel_n_i(1),
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0 => not set_sel_n_i(0),
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0 => not set_sel_n_i(0),
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others => '0');
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others => '0');
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spi_boot_b : spi_boot
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spi_boot_b : spi_boot
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generic map (
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generic map (
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width_bit_cnt_g => 12, -- 512 bytes per block
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width_bit_cnt_g => 12, -- 512 bytes per block
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width_img_cnt_g => width_img_cnt_c,
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width_img_cnt_g => width_img_cnt_c,
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num_bits_per_img_g => num_bits_per_img_c,
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num_bits_per_img_g => num_bits_per_img_c,
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sd_init_g => 1, -- SD specific initialization
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sd_init_g => 1, -- SD specific initialization
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mmc_compat_clk_div_g => 0, -- no MMC compatibility
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mmc_compat_clk_div_g => 0, -- no MMC compatibility
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width_mmc_clk_div_g => 0 -- no MMC compatibility
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width_mmc_clk_div_g => 0 -- no MMC compatibility
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)
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)
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port map (
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port map (
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clk_i => clk_i,
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clk_i => clk_i,
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reset_i => reset_i,
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reset_i => reset_i,
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set_sel_i => set_sel_s,
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set_sel_i => set_sel_s,
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spi_clk_o => spi_clk_s,
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spi_clk_o => spi_clk_s,
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spi_cs_n_o => spi_cs_n_s,
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spi_cs_n_o => spi_cs_n_s,
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spi_data_in_i => spi_data_in_i,
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spi_data_in_i => spi_data_in_i,
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spi_data_out_o => spi_data_out_s,
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spi_data_out_o => spi_data_out_s,
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spi_en_outs_o => spi_en_outs_s,
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spi_en_outs_o => spi_en_outs_s,
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start_i => start_i,
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start_i => start_i,
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mode_i => mode_i,
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mode_i => mode_i,
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config_n_o => config_n_o,
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config_n_o => config_n_o,
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detached_o => detached_o,
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detached_o => detached_o,
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cfg_init_n_i => cfg_init_n_i,
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cfg_init_n_i => cfg_init_n_i,
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cfg_done_i => cfg_done_i,
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cfg_done_i => cfg_done_i,
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dat_done_i => dat_done_i,
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dat_done_i => dat_done_i,
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cfg_clk_o => cfg_clk_o,
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cfg_clk_o => cfg_clk_o,
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cfg_dat_o => cfg_dat_o
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cfg_dat_o => cfg_dat_o
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);
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);
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Three state drivers for SPI outputs.
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-- Three state drivers for SPI outputs.
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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spi_clk_o <= spi_clk_s
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spi_clk_o <= spi_clk_s
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when spi_en_outs_s = '1' else
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when spi_en_outs_s = '1' else
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'Z';
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'Z';
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spi_cs_n_o <= spi_cs_n_s
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spi_cs_n_o <= spi_cs_n_s
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when spi_en_outs_s = '1' else
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when spi_en_outs_s = '1' else
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'Z';
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'Z';
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spi_data_out_o <= spi_data_out_s
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spi_data_out_o <= spi_data_out_s
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when spi_en_outs_s = '1' else
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when spi_en_outs_s = '1' else
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'Z';
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'Z';
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end sd;
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end sd;
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-------------------------------------------------------------------------------
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|
-- File History:
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|
--
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|
-- $Log: not supported by cvs2svn $
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-- Revision 1.6 2005/04/07 20:44:23 arniml
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-- add new port detached_o
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--
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-- Revision 1.5 2005/03/09 19:48:34 arniml
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-- invert level of set_sel input
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--
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-- Revision 1.4 2005/03/08 22:07:12 arniml
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-- added set selection
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--
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-- Revision 1.3 2005/02/18 06:42:14 arniml
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-- clarify wording for images
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--
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-- Revision 1.2 2005/02/16 18:54:39 arniml
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-- added tri-state drivers for spi outputs
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--
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-- Revision 1.1 2005/02/08 20:41:32 arniml
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-- initial check-in
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--
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|
-------------------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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