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https://opencores.org/ocsvn/xilinx_virtex_fp_library/xilinx_virtex_fp_library/trunk
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| Rev 11 |
Rev 19 |
`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Company: UPT
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// Engineer:
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// Engineer: Constantina-Elena Gavriliu
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//
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//
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// Create Date: 17:41:11 11/04/2013
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// Create Date: 17:41:11 11/04/2013
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// Design Name:
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// Design Name:
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// Module Name: effective_op
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// Module Name: effective_op
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// Project Name:
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// Project Name:
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// Target Devices:
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// Target Devices:
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// Tool versions:
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// Tool versions:
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// Description:
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// Description: Compute effective operation
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//
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//
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// Dependencies:
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// Dependencies:
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//
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//
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// Revision:
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// Revision:
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// Revision 0.01 - File Created
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// Revision 0.01 - File Created
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// Additional Comments:
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// Additional Comments:
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//
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//
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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module effective_op( input a_sign,
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module effective_op( input a_sign,
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input b_sign,
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input b_sign,
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input sub,
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input sub,
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output reg eff_op);
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output reg eff_op);
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always
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always
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@(*)
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@(*)
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begin
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begin
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case ({sub,a_sign, b_sign})
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case ({sub,a_sign, b_sign})
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3'b000: eff_op = 0;
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3'b000: eff_op = 0;
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3'b001: eff_op = 1;
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3'b001: eff_op = 1;
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3'b010: eff_op = 1;
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3'b010: eff_op = 1;
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3'b011: eff_op = 0;
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3'b011: eff_op = 0;
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3'b100: eff_op = 1;
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3'b100: eff_op = 1;
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3'b101: eff_op = 0;
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3'b101: eff_op = 0;
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3'b110: eff_op = 0;
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3'b110: eff_op = 0;
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3'b111: eff_op = 1;
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3'b111: eff_op = 1;
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endcase
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endcase
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end
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end
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endmodule
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endmodule
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