/*******************************************************************************************/
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/*******************************************************************************************/
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/** **/
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/** **/
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/** COPYRIGHT (C) 2010, SYSTEMYDE INTERNATIONAL CORPORATION, ALL RIGHTS RESERVED **/
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/** COPYRIGHT (C) 2010, SYSTEMYDE INTERNATIONAL CORPORATION, ALL RIGHTS RESERVED **/
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/** **/
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/** **/
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/** version definition file Rev 0.0 03/28/2010 **/
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/** version definition file Rev 0.0 03/28/2010 **/
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/** **/
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/** **/
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/*******************************************************************************************/
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/*******************************************************************************************/
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/*******************************************************************************************/
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/*******************************************************************************************/
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/* */
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/* */
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/* SELECT ONLY ONE OPTION PER GROUP! default is first option */
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/* SELECT ONLY ONE OPTION PER GROUP! default is first option */
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/* */
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/* */
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/*******************************************************************************************/
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/*******************************************************************************************/
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/*******************************************************************************************/
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/*******************************************************************************************/
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/* */
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/* */
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/* enable/disable refresh register emulation (if enabled then breaks testbench) */
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/* */
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/*******************************************************************************************/
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// `define RREG_EMU /* enable emulation */
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/*******************************************************************************************/
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/* */
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/* select CPU or MPU */
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/* select CPU or MPU */
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/* */
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/* */
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/*******************************************************************************************/
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/*******************************************************************************************/
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// `define Y90_CPU /* stand-alone cpu only */
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// `define Y90_CPU /* stand-alone cpu only */
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// `define Y90_MPU /* integrated version */
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// `define Y90_MPU /* integrated version */
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`define Y90_180 /* clone version */
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`define Y90_180 /* clone version */
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/*******************************************************************************************/
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/*******************************************************************************************/
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/* */
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/* */
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/* select the operation of the H flag for the CCF instruction */
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/* select the operation of the H flag for the CCF instruction */
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/* */
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/* */
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/*******************************************************************************************/
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/*******************************************************************************************/
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`define Z80_CCF /* z80 CCF operation */
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`define Z80_CCF /* z80 CCF operation */
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// `define Z180_CCF /* z180 CCF operation */
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// `define Z180_CCF /* z180 CCF operation */
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/*******************************************************************************************/
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/*******************************************************************************************/
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/* */
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/* */
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/* select the implementation of the MLT instruction */
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/* select the implementation of the MLT instruction */
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/* */
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/* */
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/*******************************************************************************************/
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/*******************************************************************************************/
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`define MUL_NORM /* parallel multiplier */
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`define MUL_NORM /* parallel multiplier */
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// `define MUL_FAST /* serial multiplier */
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// `define MUL_FAST /* serial multiplier */
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/*******************************************************************************************/
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/*******************************************************************************************/
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/* */
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/* */
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/* select the value reported in the System Status Block for dreq_bus (Y90 MPU Only) */
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/* select the value reported in the System Status Block for dreq_bus (Y90 MPU Only) */
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/* */
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/* */
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/*******************************************************************************************/
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/*******************************************************************************************/
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`define DREQ_LOG /* log dreq timeouts */
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`define DREQ_LOG /* log dreq timeouts */
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// `define DREQ_ACC /* count dreq timeouts */
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// `define DREQ_ACC /* count dreq timeouts */
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/*******************************************************************************************/
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/*******************************************************************************************/
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/* */
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/* */
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/* select the value reported in the System Status Block for wait_req (Y90 MPU Only) */
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/* select the value reported in the System Status Block for wait_req (Y90 MPU Only) */
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/* */
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/* */
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/*******************************************************************************************/
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/*******************************************************************************************/
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`define WAIT_LOG /* log wait timeouts */
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`define WAIT_LOG /* log wait timeouts */
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// `define WAIT_ACC /* count wait timeouts */
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// `define WAIT_ACC /* count wait timeouts */
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