URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [regblock.v] - Diff between revs 9 and 10

Rev 9	Rev 10
Line 120...	Line 120...

assign right_reg = (inc_pc \| write_pc) ? `RN_PC:exg_dest_r;	assign right_reg = (inc_pc \| write_pc) ? `RN_PC:exg_dest_r;

`always @(posedge clk_in)`	`always @(posedge clk_in)`
`begin`	`begin`
`if (write_exg \| inc_pc \| write_pc)`	`if (write_exg \| inc_pc)// \| write_pc)`
`case (right_reg)`	`case (right_reg)`
0: `ACCD <= right;	0: `ACCD <= right;
`1: IX <= right;`	`1: IX <= right;`
`2: IY <= right;`	`2: IY <= right;`
`3: SU <= right;`	`3: SU <= right;`