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[/] [6809_6309_compatible_core/] [trunk/] [sim/] [README.txt] - Diff between revs 2 and 4

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MC6809/HD6309 compatible core.
MC6809/HD6309 compatible core.
 
 
Simulation can be done with icarus verilog.
Simulation can be done with icarus verilog.
 
 
$ iverilog tb.v ../rtl/verilog/*.v
$ ./runsim.sh
$ vvp a.out
 
 
 
a dump file dump.vcd will be created. This file can be viewed with GTKWave.
a dump file dump.vcd will be created. This file can be viewed with GTKWave.
 
The file debug_ea.gtkw can be loaded with GTKWave, some pre-set traces will be shown.
Simulation with other tools is also possible.
Simulation with other tools is also possible.
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