URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
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MC6809/HD6309 compatible core.
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MC6809/HD6309 compatible core.
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Simulation can be done with icarus verilog.
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Simulation can be done with icarus verilog.
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$ iverilog tb.v ../rtl/verilog/*.v
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$ ./runsim.sh
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$ vvp a.out
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a dump file dump.vcd will be created. This file can be viewed with GTKWave.
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a dump file dump.vcd will be created. This file can be viewed with GTKWave.
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The file debug_ea.gtkw can be loaded with GTKWave, some pre-set traces will be shown.
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Simulation with other tools is also possible.
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Simulation with other tools is also possible.
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