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#-- Lattice Semiconductor Corporation Ltd.
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#-- Lattice Semiconductor Corporation Ltd.
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#-- Synplify OEM project file /home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/P6809/launch_synplify.tcl
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#-- Synplify OEM project file /home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/P6809/launch_synplify.tcl
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#-- Written on Sun Dec 29 07:16:20 2013
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#-- Written on Sun Jun 22 08:17:11 2014
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project -close
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project -close
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set filename "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/P6809/P6809_syn.prj"
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set filename "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/P6809/P6809_syn.prj"
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if ([file exists "$filename"]) {
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if ([file exists "$filename"]) {
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project -load "$filename"
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project -load "$filename"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/decoders.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/decoders.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/defs.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/defs.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/MC6809_cpu.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/MC6809_cpu.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/regblock.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/rtl/verilog/regblock.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/bios2k.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/bios2k.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/vgatext.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/fontrom.v"
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add_file -verilog "/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/textmem4k.v"
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#-- top module name
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set_option -top_module CC3_top
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project -result_file {/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/P6809/P6809.edi}
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project -result_file {/home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/P6809/P6809.edi}
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project -save "$filename"
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project -save "$filename"
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No newline at end of file
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No newline at end of file
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