OpenCores

URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [test1.mem] - Diff between revs 7 and 10

Show entire file | Details | Blame | View Log

Rev 7	Rev 10
Line 2...	Line 2...
`#Depth=2048`	`#Depth=2048`
`#Width=8`	`#Width=8`
`#AddrRadix=3`	`#AddrRadix=3`
`#DataRadix=3`	`#DataRadix=3`
`#Data`	`#Data`
`000:8E 00 64# ldx #100`	`000:8E E0 64# ldx #100`
`003:CC 41 00# _loop0 ldd #$4100`	`003:CC 41 00# _loop0 ldd #$4100`
`006:A7 85 # _loop1 sta b,x`	`006:A7 85 # _loop1 sta b,x`
`008:5C # incb`	`008:A6 85 # lda b,x`
`009:C1 10 # cmpb #16`	`00A:5C # incb`
`00B:26 F9 # bne _loop1`	`00B:C1 10 # cmpb #16`
`00D:4C # inca`	`00D:26 F7 # bne _loop1`
`00E:5C # _loop2 incb`	`00F:4C # inca`
`00F:26 FD # bne _loop2 ; delay`	`010:5C # _loop2 incb`
`011:81 80 # cmpa #128`	`011:26 FD # bne _loop2 ; delay`
`013:27 F1 # beq _loop1 ; another`	`013:81 80 # cmpa #128`
`015:20 EC # bra _loop0`	`015:26 EF # bne _loop1 ; another`
	`017:20 EA # bra _loop0`
`7FE:F0 00`	`7FE:F0 00`
`#`	`#`
`#000:c6 00 # ldb #00`	`#000:c6 00 # ldb #00`
`#002:86 00 # lda #00`	`#002:86 00 # lda #00`
`#004:4C # inca`	`#004:4C # inca`

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.