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[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_acc.v] - Diff between revs 37 and 38

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Rev 37 Rev 38
Line 72... Line 72... 
 
 
 
 
output p, bit_out;
 
output p, bit_out;
 
output [7:0] data_out;
 
output [7:0] data_out;
 
 
 
 
 
reg [7:0] data_out;
 
reg [7:0] data_out;
 
reg bit_out, wr_x_buff;
 
reg bit_out;
 
 
 
 
 
//
 
//
 
//calculates parity
 
//calculates parity
 
assign p = ^data_out;
 
assign p = ^data_out;
 
 
 
 

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