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[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_defines.v] - Diff between revs 139 and 141

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Rev 139 Rev 141
Line 337... Line 337...
`define OC8051_AS1_DC   3'b000 //
`define OC8051_AS1_DC   3'b000 //
 
 
//
//
// alu source 2 select
// alu source 2 select
//
//
`define OC8051_AS2_RAM   3'b000 // RAM
`define OC8051_AS2_RAM   3'b00 // RAM
`define OC8051_AS2_ACC   3'b001 // accumulator
`define OC8051_AS2_ACC   3'b01 // accumulator
`define OC8051_AS2_ZERO  3'b010 // 8'h00
`define OC8051_AS2_ZERO  3'b10 // 8'h00
`define OC8051_AS2_OP2   3'b011 //
`define OC8051_AS2_OP2   3'b11 //
`define OC8051_AS2_PCL   3'b100 //
 
 
 
`define OC8051_AS2_DC    3'b000 //
`define OC8051_AS2_DC    3'b00 //
 
 
//
//
// alu source 3 select
// alu source 3 select
//
//
`define OC8051_AS3_DP   1'b0 // data pointer
`define OC8051_AS3_DP   1'b0 // data pointer

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