| Line 110... |
Line 110... |
endcase
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endcase
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end
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end
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end
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end
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end
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end
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|
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always @(p0_out or p0_in or p1_out or p1_in or p2_out or p2_in or p3_out or p3_in or rmw)
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//always @(p0_out or p0_in or p1_out or p1_in or p2_out or p2_in or p3_out or p3_in or rmw)
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always @(posedge clk or posedge rst)
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begin
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begin
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if (rmw) begin
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if (rst)
|
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data_out <= #1 8'h0;
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else if (rmw) begin
|
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if ((rd_addr==wr_addr) & wr & !wr_bit)
|
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data_out <= #1 data_in;
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else begin
|
case (rd_addr[5:4])
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case (rd_addr[5:4])
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2'b00: data_out = p0_out;
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2'b00: data_out <= #1 p0_out;
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2'b01: data_out = p1_out;
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2'b01: data_out <= #1 p1_out;
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2'b10: data_out = p2_out;
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2'b10: data_out <= #1 p2_out;
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2'b11: data_out = p3_out;
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2'b11: data_out <= #1 p3_out;
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endcase
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endcase
|
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end
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end else
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end else
|
case (rd_addr[5:4])
|
case (rd_addr[5:4])
|
2'b00: data_out = p0_in;
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2'b00: data_out <= #1 p0_in;
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2'b01: data_out = p1_in;
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2'b01: data_out <= #1 p1_in;
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2'b10: data_out = p2_in;
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2'b10: data_out <= #1 p2_in;
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2'b11: data_out = p3_in;
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2'b11: data_out <= #1 p3_in;
|
endcase
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endcase
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end
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end
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|
|
always @(rmw or rd_addr or p0_out or p1_out or p2_out or p3_out or p0_in or p1_in or p2_in or p3_in)
|
//always @(rmw or rd_addr or p0_out or p1_out or p2_out or p3_out or p0_in or p1_in or p2_in or p3_in)
|
|
always @(posedge clk or posedge rst)
|
begin
|
begin
|
if (rmw) begin
|
if (rst)
|
|
bit_out <= #1 1'b0;
|
|
else if (rmw) begin
|
|
if ((wr_addr==rd_addr) & wr & wr_bit)
|
|
bit_out <= #1 bit_in;
|
|
else begin
|
case (rd_addr[7:3])
|
case (rd_addr[7:3])
|
`OC8051_SFR_B_P0: bit_out = p0_out[rd_addr[2:0]];
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`OC8051_SFR_B_P0: bit_out <= #1 p0_out[rd_addr[2:0]];
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`OC8051_SFR_B_P1: bit_out = p1_out[rd_addr[2:0]];
|
`OC8051_SFR_B_P1: bit_out <= #1 p1_out[rd_addr[2:0]];
|
`OC8051_SFR_B_P2: bit_out = p2_out[rd_addr[2:0]];
|
`OC8051_SFR_B_P2: bit_out <= #1 p2_out[rd_addr[2:0]];
|
default: bit_out = p3_out[rd_addr[2:0]];
|
default: bit_out <= #1 p3_out[rd_addr[2:0]];
|
endcase
|
endcase
|
|
end
|
end else begin
|
end else begin
|
case (rd_addr[7:3])
|
case (rd_addr[7:3])
|
`OC8051_SFR_B_P0: bit_out = p0_in[rd_addr[2:0]];
|
`OC8051_SFR_B_P0: bit_out <= #1 p0_in[rd_addr[2:0]];
|
`OC8051_SFR_B_P1: bit_out = p1_in[rd_addr[2:0]];
|
`OC8051_SFR_B_P1: bit_out <= #1 p1_in[rd_addr[2:0]];
|
`OC8051_SFR_B_P2: bit_out = p2_in[rd_addr[2:0]];
|
`OC8051_SFR_B_P2: bit_out <= #1 p2_in[rd_addr[2:0]];
|
default: bit_out = p3_in[rd_addr[2:0]];
|
default: bit_out <= #1 p3_in[rd_addr[2:0]];
|
endcase
|
endcase
|
end
|
end
|
end
|
end
|
|
|
endmodule
|
endmodule
|
