| Line 30... |
Line 30... |
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// DWCR bits
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// DWCR bits
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`define OR1200_DU_DWCR_COUNT 15:0
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`define OR1200_DU_DWCR_COUNT 15:0
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--- /cygdrive/c/Projects/Bennu/Hardware/or1200v1/rtl/verilog/or1200_top.v 2010-08-25 23:25:40.000000000 -0500
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--- /cygdrive/c/Projects/Bennu/Hardware/or1200v1/rtl/verilog/or1200_top.v 2010-08-25 23:25:40.000000000 -0500
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+++ ./or1200_top.v 2010-06-12 16:59:02.000000000 -0500
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+++ ./or1200_top.v 2010-06-12 16:59:02.000000000 -0500
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@@ -43,7 +43,10 @@
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//
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// CVS Revision History
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//
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-// $Log: or1200v1_hwbkpt.patch,v $
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-// Revision 1.1 2010-08-27 02:43:07 Nathan
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-// Moved patches for third-party software to a separate, dedicated directory structure.
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-//
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+// $Log: or1200v1_hwbkpt.patch,v $
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+// Revision 1.1 2010-08-27 02:43:07 Nathan
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+// Moved patches for third-party software to a separate, dedicated directory structure.
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+//
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+// Revision 1.13 2004/06/08 18:17:36 lampret
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+// Non-functional changes. Coding style fixes.
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+//
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// Revision 1.12 2004/04/05 08:29:57 lampret
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// Merged branch_qmem into main tree.
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//
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@@ -933,6 +936,7 @@ or1200_du or1200_du(
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@@ -933,6 +936,7 @@ or1200_du or1200_du(
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.dcpu_cycstb_i(dcpu_cycstb_cpu),
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.dcpu_cycstb_i(dcpu_cycstb_cpu),
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.dcpu_we_i(dcpu_we_cpu),
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.dcpu_we_i(dcpu_we_cpu),
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.dcpu_adr_i(dcpu_adr_cpu),
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.dcpu_adr_i(dcpu_adr_cpu),
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+ .dcpu_be_i(dcpu_sel_cpu),
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+ .dcpu_be_i(dcpu_sel_cpu),
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