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Line 9... |
#define DBG_MAX_MODULES 4 // used to size an array
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#define DBG_MAX_MODULES 4 // used to size an array
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#define DC_WISHBONE 0
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#define DC_WISHBONE 0
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#define DC_CPU0 1
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#define DC_CPU0 1
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#define DC_CPU1 2
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#define DC_CPU1 2
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#define DC_JSP 3
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// Polynomial for the CRC calculation
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// Polynomial for the CRC calculation
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// Yes, it's backwards. Yes, this is on purpose.
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// Yes, it's backwards. Yes, this is on purpose.
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// The hardware is designed this way to save on logic and routing,
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// The hardware is designed this way to save on logic and routing,
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// and it's really all the same to us here.
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// and it's really all the same to us here.
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| Line 67... |
Line 68... |
int adbg_ctrl_write(unsigned long regidx, uint32_t *cmd_data, int length_bits);
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int adbg_ctrl_write(unsigned long regidx, uint32_t *cmd_data, int length_bits);
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int adbg_ctrl_read(unsigned long regidx, uint32_t *data, int databits);
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int adbg_ctrl_read(unsigned long regidx, uint32_t *data, int databits);
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int adbg_burst_command(unsigned int opcode, unsigned long address, int length_words);
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int adbg_burst_command(unsigned int opcode, unsigned long address, int length_words);
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int adbg_wb_burst_read(int word_size_bytes, int word_count, unsigned long start_address, void *data);
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int adbg_wb_burst_read(int word_size_bytes, int word_count, unsigned long start_address, void *data);
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int adbg_wb_burst_write(void *data, int word_size_bytes, int word_count, unsigned long start_address);
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int adbg_wb_burst_write(void *data, int word_size_bytes, int word_count, unsigned long start_address);
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int adbg_jsp_transact(unsigned int *bytes_to_send, const char *data_to_send, unsigned int *bytes_received, char *data_received);
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#endif
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#endif
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No newline at end of file
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No newline at end of file
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