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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [perl/] [hdr_file_gen.pl] - Diff between revs 17 and 24

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Rev 17 Rev 24
Line 11... Line 11...
#     header file gen
#     header file gen
##################
##################
 
 
 
 
 
 
 
sub get_instance_global_variable{
 
        my ($soc,$id)   = @_;
 
        my $module      =$soc->soc_get_module($id);
 
        my $module_name =$soc->soc_get_module_name($id);
 
        my $category    =$soc->soc_get_category($id);
 
        my $inst        =$soc->soc_get_instance_name($id);
 
        my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
 
        my %params= $soc->soc_get_module_param($id);
 
        #add two extra variable the instance name and base addresses
 
        $params{IP}=$inst;
 
        $params{CORE}=$id;
 
        foreach my $plug (@plugs){
 
                my @nums=$soc->soc_list_plug_nums($id,$plug);
 
                foreach my $num (@nums){
 
                        my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
 
                        #wishbone slave address
 
                        if((defined $connect_socket) && ($connect_socket eq 'wb_slave')){
 
                                #print "$addr,$base,$end,$connect_id,$connect_socket,$connect_socket_num\n";
 
                                my $base_hex=sprintf("0X%08x", $base);
 
                                my $end_hex=sprintf("0X%08x", $end);
 
                                my $val="BASE".$num;
 
                                $params{$val}=$base_hex;
 
 
 
                        }
 
 
 
 
 
                }
 
        }
 
        $params{BASE}=$params{BASE0} if(defined $params{BASE0});
 
 
 
 
 
        return (\%params);
 
}
 
 
 
 
 
sub replace_golb_var{
 
        my ($hdr,$ref)=@_;
 
        my %params= %{$ref};
 
        foreach my $p (sort keys %params){
 
                my $pattern=  '\$\{?' . $p . '(\}|\b)';
 
                ($hdr=$hdr)=~s/$pattern/$params{$p}/g;
 
        }
 
        return $hdr;
 
 
 
}
 
 
 
 
 
 
sub generate_header_file{
sub generate_header_file{
        my ($soc)= @_;
        my ($soc,$project_dir,$target_dir,$dir)= @_;
        my $soc_name=$soc->soc_get_soc_name();
        my $soc_name=$soc->soc_get_soc_name();
        $soc_name = uc($soc_name);
        $soc_name = uc($soc_name);
        if(!defined $soc_name){$soc_name='soc'};
        if(!defined $soc_name){$soc_name='soc'};
 
 
        my @instances=$soc->soc_get_all_instances();
        my @instances=$soc->soc_get_all_instances();
Line 36... Line 83...
 
 
                add_text_to_string(\$system_h,"\n \n /*  $inst   */ \n");
                add_text_to_string(\$system_h,"\n \n /*  $inst   */ \n");
                $inst=uc($inst);
                $inst=uc($inst);
                # print base address
                # print base address
                my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
                my @plugs= $soc->soc_get_all_plugs_of_an_instance($id);
                foreach my $plug (@plugs){
 
                        my @nums=$soc->soc_list_plug_nums($id,$plug);
 
                        foreach my $num (@nums){
 
                                my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
 
                                        #wishbone slave address
 
                                        if((defined $connect_socket) && ($connect_socket eq 'wb_slave')){
 
 
 
                                                #print "$addr,$base,$end,$connect_id,$connect_socket,$connect_socket_num\n";
 
                                                my $base_hex=sprintf("0X%08x", $base);
 
                                                my $end_hex=sprintf("0X%08x", $end);
 
 
 
                                                add_text_to_string(\$system_h,"#define $inst\_BASE_ADDR$num \t\t        $base_hex\n");
                my %params= %{get_instance_global_variable($soc,$id)};
                                                add_text_to_string(\$system_h,"#define $inst\_BASE_ADDR \t\t    $inst\_BASE_ADDR0\n") if ($num==0);
 
 
 
 
 
                                        }
                foreach my $plug (@plugs){
 
                        my @nums=$soc->soc_list_plug_nums($id,$plug);
 
                        foreach my $num (@nums){
 
                                my ($addr,$base,$end,$name,$connect_id,$connect_socket,$connect_socket_num)=$soc->soc_get_plug($id,$plug,$num);
                                        #intrrupt 
                                        #intrrupt 
                                        if((defined $connect_socket) && ($connect_socket eq 'interrupt_peripheral')){
                                        if((defined $connect_socket) && ($connect_socket eq 'interrupt_peripheral')){
                                                add_text_to_string(\$system_h,"//intrrupt flag location\n");
                                                add_text_to_string(\$system_h,"//intrrupt flag location\n");
                                                add_text_to_string(\$system_h," #define $inst\_INT (1<<$connect_socket_num)\n") if(scalar (@nums)==1);
                                                add_text_to_string(\$system_h," #define $inst\_INT (1<<$connect_socket_num)\n") if(scalar (@nums)==1);
                                                add_text_to_string(\$system_h," #define $inst\_$num\_INT    (1<<$connect_socket_num)\n") if(scalar (@nums)>1);
                                                add_text_to_string(\$system_h," #define $inst\_$num\_INT    (1<<$connect_socket_num)\n") if(scalar (@nums)>1);
Line 63... Line 103...
 
 
                        }
                        }
                }
                }
 
 
 
 
                my $hdr                 =$ip->ip_get_hdr($category,$module);
                my $hdr                 =$ip->ip_get($category,$module,"system_h");
                if(defined $hdr){
                #print "$hdr";
                        #replace IP name
 
                        my $key='\$IP\\\\';
 
                        ($hdr=$hdr)=~s/$key/$inst/g;
 
 
 
                        $key='\$IP';
 
                        ($hdr=$hdr)=~s/$key/$inst/g;
 
 
 
                        #replace BASE addr
 
                        $key='\$BASE';
 
                        ($hdr=$hdr)=~s/$key/$inst\_BASE_ADDR/g;
 
 
 
 
 
 
                #   \$\{?IP(\b|\})
 
                if(defined $hdr){
 
                        $hdr=replace_golb_var($hdr,\%params);
                        add_text_to_string(\$system_h,"$hdr\n");
                        add_text_to_string(\$system_h,"$hdr\n");
                }
                }
 
 
 
                # Write Software gen files
 
                my @sw_file_gen = $ip->ip_get_list($category,$module,"gen_sw_files");
 
                foreach my $file (@sw_file_gen){
 
                        if(defined $file ){
 
                                my ($path,$rename)=split('frename_sep_t',$file);
 
                                $rename=replace_golb_var($rename,\%params);
 
                                #read the file content
 
                                my $content=read_file_cntent($path,$project_dir);
 
                                $content=replace_golb_var($content,\%params);
 
 
 
 
 
                                if(defined $rename){
 
 
 
                                        open(FILE,  ">lib/verilog/$rename") || die "Can not open: $!";
 
                                        print FILE $content;
 
                                        close(FILE) || die "Error closing file: $!";
 
                                        move ("$dir/lib/verilog/$rename","$target_dir/sw/");
 
 
 
 
 
                                }
 
                        }
 
                }
 
 
 
 
        }
        }
 
 
        add_text_to_string(\$system_h,"#endif\n");
        add_text_to_string(\$system_h,"#endif\n");
        return $system_h;
        my $name=$soc->soc_get_soc_name();
 
        open(FILE,  ">lib/verilog/$name.h") || die "Can not open: $!";
 
                        print FILE $system_h;
 
                        close(FILE) || die "Error closing file: $!";
 
                        move ("$dir/lib/verilog/$name.h","$target_dir/sw/");
 
 
 
 
 
 
 
 
}
}
 
 
 
 
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