| Line 150... |
Line 150... |
$row++;
|
$row++;
|
foreach my $p (@parameters){
|
foreach my $p (@parameters){
|
my ($default,$type,$content,$info)= $ip->ip_get_parameter($category,$module,$p);
|
my ($default,$type,$content,$info)= $ip->ip_get_parameter($category,$module,$p);
|
|
|
my $value=$param_value{$p};
|
my $value=$param_value{$p};
|
|
#$value = $default if (!defined $value && defined $default);
|
|
#print "$value\n";
|
if ($type eq "File_Entry"){
|
if ($type eq "File_Entry"){
|
my $entry=gen_entry($value);
|
my $entry=gen_entry($value);
|
my $brows=get_file_name(undef,undef,$entry,undef,undef,undef,undef,undef);
|
my $brows=get_file_name(undef,undef,$entry,undef,undef,undef,undef,undef);
|
my $box=def_hbox(TRUE,0);
|
my $box=def_hbox(TRUE,0);
|
$box->pack_start($entry,FALSE,FALSE,3);
|
$box->pack_start($entry,FALSE,FALSE,3);
|
| Line 979... |
Line 981... |
# Write memory prog file
|
# Write memory prog file
|
open(FILE, ">lib/verilog/write_memory.sh") || die "Can not open: $!";
|
open(FILE, ">lib/verilog/write_memory.sh") || die "Can not open: $!";
|
print FILE $prog;
|
print FILE $prog;
|
close(FILE) || die "Error closing file: $!";
|
close(FILE) || die "Error closing file: $!";
|
|
|
|
#generate prog_mem
|
|
open(FILE, ">lib/verilog/program.sh") || die "Can not open: $!";
|
|
print FILE soc_mem_prog();
|
|
close(FILE) || die "Error closing file: $!";
|
|
|
|
|
|
|
my $dir = Cwd::getcwd();
|
my $dir = Cwd::getcwd();
|
my $project_dir = abs_path("$dir/../../");
|
my $project_dir = abs_path("$dir/../../");
|
if($gen_hw_lib){
|
if($gen_hw_lib){
|
|
|
#make target dir
|
#make target dir
|
| Line 1003... |
Line 1012... |
copy_file_and_folders(\@jtags,$project_dir,$hw_lib);
|
copy_file_and_folders(\@jtags,$project_dir,$hw_lib);
|
move ("$dir/lib/verilog/$name.v","$hw_path/");
|
move ("$dir/lib/verilog/$name.v","$hw_path/");
|
move ("$dir/lib/verilog/${name}_top.v","$hw_path/");
|
move ("$dir/lib/verilog/${name}_top.v","$hw_path/");
|
move ("$dir/lib/verilog/README" ,"$sw_path/");
|
move ("$dir/lib/verilog/README" ,"$sw_path/");
|
move ("$dir/lib/verilog/write_memory.sh" ,"$sw_path/");
|
move ("$dir/lib/verilog/write_memory.sh" ,"$sw_path/");
|
|
move ("$dir/lib/verilog/program.sh" ,"$sw_path/");
|
}
|
}
|
|
|
# Copy Software files
|
# Copy Software files
|
my ($file_ref,$warnings)= get_all_files_list($soc,"sw_files");
|
my ($file_ref,$warnings)= get_all_files_list($soc,"sw_files");
|
copy_file_and_folders($file_ref,$project_dir,$sw_path);
|
copy_file_and_folders($file_ref,$project_dir,$sw_path);
|
|
|
# Write system.h and Software gen files
|
# Write system.h and Software gen files
|
generate_header_file($soc,$project_dir,$sw_path,$dir);
|
generate_header_file($soc,$project_dir,$sw_path,$hw_path,$dir);
|
|
|
|
|
|
|
|
|
|
|
| Line 1494... |
Line 1504... |
my $new_v=$ip->ip_get($category,$module,"version");
|
my $new_v=$ip->ip_get($category,$module,"version");
|
$new_v=0 if(!defined $new_v);
|
$new_v=0 if(!defined $new_v);
|
return ($old_v,$new_v);
|
return ($old_v,$new_v);
|
}
|
}
|
|
|
|
sub check_for_ni{
|
|
my $self=shift;
|
|
my $ckeck=0;
|
|
my @instances=$self->soc_get_all_instances();
|
|
foreach my $id (@instances){
|
|
my $category = $self->soc_get_category($id);
|
|
if ($category eq 'NoC') {
|
|
$ckeck=1;
|
|
}
|
|
}
|
|
return $ckeck;
|
|
|
|
}
|
|
|
|
|
sub get_ram_init{
|
sub get_ram_init{
|
my $soc=shift;
|
my $soc=shift;
|
my $window = def_popwin_size(80,50,"Memory initial file setting setting",'percent');
|
my $window = def_popwin_size(80,50,"Memory initial file setting setting",'percent');
|
| Line 1538... |
Line 1560... |
|
|
sub software_edit_soc {
|
sub software_edit_soc {
|
my $soc=shift;
|
my $soc=shift;
|
my $name=$soc->object_get_attribute('soc_name');
|
my $name=$soc->object_get_attribute('soc_name');
|
if (length($name)==0){
|
if (length($name)==0){
|
message_dialog("Please define the SoC name!");
|
message_dialog("Please define the Tile name!");
|
return ;
|
return ;
|
}
|
}
|
my $target_dir = "$ENV{'PRONOC_WORK'}/SOC/$name";
|
my $target_dir = "$ENV{'PRONOC_WORK'}/SOC/$name";
|
my $sw = "$target_dir/sw";
|
my $sw = "$target_dir/sw";
|
my ($app,$table,$tview) = software_main($sw);
|
my ($app,$table,$tview) = software_main($sw);
|
| Line 1550... |
Line 1572... |
|
|
|
|
|
|
my $make = def_image_button('icons/gen.png','Compile');
|
my $make = def_image_button('icons/gen.png','Compile');
|
my $regen=def_image_button('icons/refresh.png','Regenerate main.c');
|
my $regen=def_image_button('icons/refresh.png','Regenerate main.c');
|
|
my $prog= def_image_button('icons/write.png','Program the memory');
|
|
|
$table->attach ($regen,0, 1, 1,2,'shrink','shrink',0,0);
|
$table->attach ($regen,0, 1, 1,2,'shrink','shrink',0,0);
|
$table->attach ($make,9, 10, 1,2,'shrink','shrink',0,0);
|
$table->attach ($make,5, 6, 1,2,'shrink','shrink',0,0);
|
|
$table->attach ($prog,9, 10, 1,2,'shrink','shrink',0,0);
|
$regen -> signal_connect ("clicked" => sub{
|
$regen -> signal_connect ("clicked" => sub{
|
my $dialog = Gtk2::MessageDialog->new (my $window,
|
my $dialog = Gtk2::MessageDialog->new (my $window,
|
'destroy-with-parent',
|
'destroy-with-parent',
|
'question', # message type
|
'question', # message type
|
'yes-no', # which set of buttons?
|
'yes-no', # which set of buttons?
|
"Are you sure you want to regenaret the Top.v file? Note that any changes you have made will be lost");
|
"Are you sure you want to regenaret the main.c file? Note that any changes you have made will be lost");
|
my $response = $dialog->run;
|
my $response = $dialog->run;
|
if ($response eq 'yes') {
|
if ($response eq 'yes') {
|
|
|
save_file ("$sw/main.c",main_c_template($name));
|
save_file ("$sw/main.c",main_c_template($name));
|
$app->load_source("$sw/main.c");
|
$app->load_source("$sw/main.c");
|
}
|
}
|
|
$dialog->destroy;
|
|
|
});
|
});
|
|
|
$make -> signal_connect("clicked" => sub{
|
$make -> signal_connect("clicked" => sub{
|
$app->do_save();
|
$app->do_save();
|
run_make_file($sw,$tview);
|
run_make_file($sw,$tview);
|
|
|
});
|
});
|
|
|
|
#Programe the board
|
|
$prog-> signal_connect("clicked" => sub{
|
|
my $error = 0;
|
|
my $bash_file="$target_dir/sw/program.sh";
|
|
|
|
add_info(\$tview,"Programe the board using quartus_pgm and $bash_file file\n");
|
|
#check if the programming file exists
|
|
unless (-f $bash_file) {
|
|
add_colored_info(\$tview,"\tThe $bash_file does not exists! \n", 'red');
|
|
$error=1;
|
|
}
|
|
|
|
return if($error);
|
|
my $command = "cd $target_dir/sw; sh program.sh";
|
|
add_info(\$tview,"$command\n");
|
|
my ($stdout,$exit,$stderr)=run_cmd_in_back_ground_get_stdout($command);
|
|
if(length $stderr>1){
|
|
add_colored_info(\$tview,"$stderr\n",'red');
|
|
add_colored_info(\$tview,"Memory was not programed successfully!\n",'red');
|
|
}else {
|
|
|
|
if($exit){
|
|
add_colored_info(\$tview,"$stdout\n",'red');
|
|
add_colored_info(\$tview,"Memory was not programed successfully!\n",'red');
|
|
}else{
|
|
add_info(\$tview,"$stdout\n");
|
|
add_colored_info(\$tview,"Memory is programed successfully!\n",'blue');
|
|
|
|
}
|
|
|
|
}
|
|
});
|
|
|
|
}
|
|
|
|
|
|
sub soc_mem_prog {
|
|
my $string='
|
|
#!/bin/sh
|
|
|
|
|
|
#JTAG_INTFC="$PRONOC_WORK/toolchain/bin/JTAG_INTFC"
|
|
source ./jtag_intfc.sh
|
|
|
|
#reset and disable cpus, then release the reset but keep the cpus disabled
|
|
|
|
$JTAG_INTFC -n 127 -d "I:1,D:2:3,D:2:2,I:0"
|
|
|
|
# jtag instruction
|
|
# 0: bypass
|
|
# 1: getting data
|
|
# jtag data :
|
|
# bit 0 is reset
|
|
# bit 1 is disable
|
|
# I:1 set jtag_enable in active mode
|
|
# D:2:3 load jtag_enable data register with 0x3 reset=1 disable=1
|
|
# D:2:2 load jtag_enable data register with 0x2 reset=0 disable=1
|
|
# I:0 set jtag_enable in bypass mode
|
|
|
|
|
|
|
|
#programe the memory
|
|
|
|
sh write_memory.sh
|
|
|
|
|
|
#Enable the cpu
|
|
$JTAG_INTFC -n 127 -d "I:1,D:2:0,I:0"
|
|
# I:1 set jtag_enable in active mode
|
|
# D:2:0 load jtag_enable data register with 0x0 reset=0 disable=0
|
|
# I:0 set jtag_enable in bypass mode
|
|
';
|
|
return $string;
|
|
|
}
|
}
|
|
|
|
|
|
|
|
|
| Line 1588... |
Line 1687... |
|
|
my $infc = interface->interface_new();
|
my $infc = interface->interface_new();
|
my $ip = ip->lib_new ();
|
my $ip = ip->lib_new ();
|
my $soc = soc->soc_new();
|
my $soc = soc->soc_new();
|
set_gui_status($soc,"ideal",0);
|
set_gui_status($soc,"ideal",0);
|
|
|
#my $soc= eval { do 'lib/soc/soc.SOC' };
|
#my $soc= eval { do 'lib/soc/soc.SOC' };
|
#message_dialog("$ENV{'PRONOC_WORK'}\n");
|
#message_dialog("$ENV{'PRONOC_WORK'}\n");
|
|
|
# main window
|
# main window
|
#my $window = def_win_size(1000,800,"Top");
|
#my $window = def_win_size(1000,800,"Top");
|
| Line 1614... |
Line 1714... |
|
|
my $device_win=show_active_dev($soc,$ip,$infc,\$refresh_dev_win,$info);
|
my $device_win=show_active_dev($soc,$ip,$infc,\$refresh_dev_win,$info);
|
|
|
|
|
my $generate = def_image_button('icons/gen.png','Generate RTL');
|
my $generate = def_image_button('icons/gen.png','Generate RTL');
|
my $compile = def_image_button('icons/gate.jpg','Compile RTL');
|
my $compile = def_image_button('icons/gate.png','Compile RTL');
|
my $software = def_image_button('icons/binary.png','Software');
|
my $software = def_image_button('icons/binary.png','Software');
|
my $diagram = def_image_button('icons/diagram.png','Diagram');
|
my $diagram = def_image_button('icons/diagram.png','Diagram');
|
my $ram = def_image_button('icons/RAM.png','Memory');
|
my $ram = def_image_button('icons/RAM.png','Memory');
|
|
|
|
|
| Line 1672... |
Line 1772... |
|
|
$generate-> signal_connect("clicked" => sub{
|
$generate-> signal_connect("clicked" => sub{
|
my $name=$soc->object_get_attribute('soc_name');
|
my $name=$soc->object_get_attribute('soc_name');
|
|
|
if (length($name)==0){
|
if (length($name)==0){
|
message_dialog("Please define the SoC name!");
|
message_dialog("Please define the Tile name!");
|
return ;
|
return ;
|
}
|
}
|
|
|
|
|
my @tmp=split('_',$name);
|
my @tmp=split('_',$name);
|
| Line 1695... |
Line 1795... |
my $sw_path = "$target_dir/sw";
|
my $sw_path = "$target_dir/sw";
|
|
|
$soc->object_add_attribute('global_param','CORE_ID',0);
|
$soc->object_add_attribute('global_param','CORE_ID',0);
|
generate_soc($soc,$info,$target_dir,$hw_dir,$sw_path,1,1);
|
generate_soc($soc,$info,$target_dir,$hw_dir,$sw_path,1,1);
|
#message_dialog("SoC \"$name\" has been created successfully at $target_dir/ " );
|
#message_dialog("SoC \"$name\" has been created successfully at $target_dir/ " );
|
|
my $has_ni= check_for_ni($soc);
|
|
if($has_ni){
|
my $dialog = Gtk2::MessageDialog->new (my $window,
|
my $dialog = Gtk2::MessageDialog->new (my $window,
|
'destroy-with-parent',
|
'destroy-with-parent',
|
'question', # message type
|
'question', # message type
|
'yes-no', # which set of buttons?
|
'yes-no', # which set of buttons?
|
"Processing Tile \"$name\" has been created successfully at $target_dir/. In order to see this tile in MPSoC Generator you need to restar the ProNoC. Do you ant to reset the ProNoC now?");
|
"Processing Tile \"$name\" has been created successfully at $target_dir/. In order to include this tile in MPSoC Generator you need to restar the ProNoC. Do you ant to reset the ProNoC now?");
|
my $response = $dialog->run;
|
my $response = $dialog->run;
|
if ($response eq 'yes') {
|
if ($response eq 'yes') {
|
exec($^X, $0, @ARGV);# reset ProNoC to apply changes
|
exec($^X, $0, @ARGV);# reset ProNoC to apply changes
|
}
|
}
|
$dialog->destroy;
|
$dialog->destroy;
|
|
} else {
|
|
message_dialog("Processing Tile \"$name\" has been created successfully at $target_dir/.");
|
|
|
|
}
|
|
|
|
|
|
|
|
|
});
|
});
|
| Line 1725... |
Line 1829... |
|
|
});
|
});
|
|
|
|
|
$compile -> signal_connect("clicked" => sub{
|
$compile -> signal_connect("clicked" => sub{
|
|
$soc->object_add_attribute('compile','compilers',"QuartusII,Verilator,Modelsim");
|
my $name=$soc->object_get_attribute('soc_name');
|
my $name=$soc->object_get_attribute('soc_name');
|
if (length($name)==0){
|
if (length($name)==0){
|
message_dialog("Please define the SoC name!");
|
message_dialog("Please define the Tile name!");
|
return ;
|
return ;
|
}
|
}
|
my $target_dir = "$ENV{'PRONOC_WORK'}/SOC/$name";
|
my $target_dir = "$ENV{'PRONOC_WORK'}/SOC/$name";
|
|
my $hw_dir = "$target_dir/src_verilog";
|
|
my $sw_path = "$target_dir/sw";
|
my $top = "$target_dir/src_verilog/${name}_top.v";
|
my $top = "$target_dir/src_verilog/${name}_top.v";
|
if (-f $top){
|
if (-f $top){
|
|
generate_soc($soc,$info,$target_dir,$hw_dir,$sw_path,1,1);
|
select_compiler($soc,$name,$top,$target_dir);
|
select_compiler($soc,$name,$top,$target_dir);
|
} else {
|
} else {
|
message_dialog("Cannot find $top file. Please run RTL Generator first!");
|
message_dialog("Cannot find $top file. Please run RTL Generator first!");
|
return;
|
return;
|
}
|
}
|
