URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [lm32/] [sw/] [linker.ld] - Diff between revs 17 and 48

Rev 17	Rev 48
Line 1...	Line 1...
`OUTPUT_FORMAT("elf32-lm32")`	`OUTPUT_FORMAT("elf32-lm32")`
	`SEARCH_DIR(.)`
`ENTRY(_start)`	`ENTRY(_start)`

`__DYNAMIC = 0;`	`__DYNAMIC = 0;`

	`INCLUDE linkvar.ld;`


`_RAM_START = 0x0000000;`
`_RAM_SIZE = 0x4000;`
`_RAM_END = _RAM_START + _RAM_SIZE;`

`MEMORY {`
`ram : ORIGIN = 0x00000000, LENGTH = 0x4000 /* 16k */`
`}`

`SECTIONS`	`SECTIONS`
`{`	`{`
	`. = ALIGN(4);`
`.text :`	`.text :`
`{`	`{`
`_ftext = .;`	`_ftext = .;`
`(.text .stub .text. .gnu.linkonce.t.*)`	`(.text .stub .text. .gnu.linkonce.t.*)`
`_etext = .;`	`_etext = .;`
`} > ram`	`} > rom`

`.rodata :`	`.rodata :`
`{`	`{`
`. = ALIGN(4);`	`. = ALIGN(4);`
`_frodata = .;`	`_frodata = .;`
`(.rodata .rodata. .gnu.linkonce.r.*)`	`(.rodata .rodata. .gnu.linkonce.r.*)`
`*(.rodata1)`	`*(.rodata1)`
	`. = ALIGN(0x10);`
`_erodata = .;`	`_erodata = .;`
`} > ram`	`} > rom`

`.data :`	`.data :`
`{`	`{`
`. = ALIGN(4);`	`. = ALIGN(4);`
`_fdata = .;`	`_fdata = .;`
`(.data .data. .gnu.linkonce.d.*)`	`(.data .data. .gnu.linkonce.d.*)`
`*(.data1)`	`*(.data1)`
`_gp = ALIGN(16);`	`_gp = ALIGN(16);`
`(.sdata .sdata. .gnu.linkonce.s.*)`	`(.sdata .sdata. .gnu.linkonce.s.*)`
`_edata = .;`	`_edata = .;`
`} > ram`	`} > ram AT > rom /* "> ram" is the VMA, "> rom" is the LMA */`

`.bss :`	`.bss :`
`{`	`{`
`. = ALIGN(4);`	`. = ALIGN(4);`
`_fbss = .;`	`_fbss = .;`