URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_verilator/] [simulator.cpp] - Diff between revs 38 and 41

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Rev 38	Rev 41
Line 1...	Line 1...
`#include <stdlib.h>`	`#include <stdlib.h>`
`#include <stdio.h>`	`#include <stdio.h>`
`#include <unistd.h>`	`#include <unistd.h>`
`#include <string.h>`	`#include <string.h>`
	`#include <limits.h>`



`#include <ctype.h>`	`#include <ctype.h>`
`#include <stdint.h>`	`#include <stdint.h>`

`#include <inttypes.h>`	`#include <inttypes.h>`


`#include <verilated.h> // Defines common routines`	`#include <verilated.h> // Defines common routines`
`#include "Vrouter.h" // From Verilating "router.v"`	`#include "Vrouter.h" // From Verilating "router.v"`
Line 21...	Line 17...


`#ifndef NC`	`#ifndef NC`
`#define NC (NX*NY)`	`#define NC (NX*NY)`
`#endif`	`#endif`

`#define RATIO_INIT 2`	`#define RATIO_INIT 2`

`#define SYNTHETIC 0`	`#define SYNTHETIC 0`
`#define CUSTOM 1`	`#define CUSTOM 1`
`#define DISABLE -1`	`#define DISABLE -1`

	`#define MY_VL_SETBIT_W(data,bit) (data[VL_BITWORD_I(bit)] \|= (VL_UL(1) << VL_BITBIT_I(bit)))`

`#include "traffic_task_graph.h"`	`#include "traffic_task_graph.h"`




Line 410...	Line 409...
`}//if`	`}//if`
`else`	`else`
`{`	`{`

`clk = 0;`	`clk = 0;`
	`#if (NC<=64)`
`noc->ni_flit_in_wr =0;`	`noc->ni_flit_in_wr =0;`
	`#else`
	`for(j=0;j<(sizeof(noc->ni_flit_in_wr)/sizeof(noc->ni_flit_in_wr[0])); j++) noc->ni_flit_in_wr[j]=0;`
	`#endif`
`for(x=0;x<NX;x++)for(y=0;y<NY;y++){`	`for(x=0;x<NX;x++)for(y=0;y<NY;y++){`
`i=(y*NX)+x;`	`i=(y*NX)+x;`


`router[i]->flit_in_we_all = noc->router_flit_out_we_all[i];`	`router[i]->flit_in_we_all = noc->router_flit_out_we_all[i];`
Line 430...	Line 432...
`noc->router_credit_in_all[i] = router[i]->credit_out_all;`	`noc->router_credit_in_all[i] = router[i]->credit_out_all;`
`noc->router_congestion_in_all[i]= router[i]->congestion_out_all;`	`noc->router_congestion_in_all[i]= router[i]->congestion_out_all;`
`//noc->router_iport_weight_in_all[i]= router[i]->iport_weight_out_all;`	`//noc->router_iport_weight_in_all[i]= router[i]->iport_weight_out_all;`

`for(j=0;j<flit_out_all_size;j++) noc->router_flit_in_all[i][j] = router[i]->flit_out_all[j] ;`	`for(j=0;j<flit_out_all_size;j++) noc->router_flit_in_all[i][j] = router[i]->flit_out_all[j] ;`
	`#if (Fpay<=32)`
`traffic[i]->flit_in = noc->ni_flit_out [i];`	`traffic[i]->flit_in = noc->ni_flit_out [i];`
	`#else`
	`for(j=0;j<(sizeof(traffic[i]->flit_out)/sizeof(traffic[i]->flit_out[0])); j++) traffic[i]->flit_in[j] = noc->ni_flit_out [i][j];`
	`#endif`
`traffic[i]->credit_in= noc->ni_credit_out[i];`	`traffic[i]->credit_in= noc->ni_credit_out[i];`


`noc->ni_credit_in[i] = traffic[i]->credit_out;`	`noc->ni_credit_in[i] = traffic[i]->credit_out;`
	`#if (Fpay<=32)`
`noc->ni_flit_in [i] = traffic[i]->flit_out;`	`noc->ni_flit_in [i] = traffic[i]->flit_out;`
	`#else`
	`for(j=0;j<(sizeof(traffic[i]->flit_out)/sizeof(traffic[i]->flit_out[0])); j++) noc->ni_flit_in [i][j] = traffic[i]->flit_out[j];`
	`#endif`

	`#if (NC<=64)`
`if(traffic[i]->flit_out_wr) noc->ni_flit_in_wr = noc->ni_flit_in_wr \| ((vluint64_t)1<<i);`	`if(traffic[i]->flit_out_wr) noc->ni_flit_in_wr = noc->ni_flit_in_wr \| ((vluint64_t)1<<i);`

`traffic[i]->flit_in_wr= ((noc->ni_flit_out_wr >> i) & 0x01);`	`traffic[i]->flit_in_wr= ((noc->ni_flit_out_wr >> i) & 0x01);`
	`#else`
	`if(traffic[i]->flit_out_wr) MY_VL_SETBIT_W(noc->ni_flit_in_wr ,i);`
	`traffic[i]->flit_in_wr= (VL_BITISSET_W(noc->ni_flit_out_wr,i)>0);`
	`#endif`



`}//for`	`}//for`


Line 457...	Line 471...
`noc-> clk = clk;`	`noc-> clk = clk;`
`noc-> reset = reset;`	`noc-> reset = reset;`


`for(i=0;i<NC;i++) {`	`for(i=0;i<NC;i++) {`
	`#if (NC<=64)`
`traffic[i]->start= ((noc->start_o >>i)& 0x01);`	`traffic[i]->start= ((noc->start_o >>i)& 0x01);`
	`#else`
	`traffic[i]->start= (VL_BITISSET_W(noc->start_o, i)>0);`
	`#endif`
`traffic[i]->reset= reset;`	`traffic[i]->reset= reset;`
`traffic[i]->clk = clk;`	`traffic[i]->clk = clk;`
`router[i]->reset= reset;`	`router[i]->reset= reset;`
`router[i]->clk= clk ;`	`router[i]->clk= clk ;`

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_verilator/] [simulator.cpp] - Diff between revs 38 and 41