OpenCores

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`<p><a href="classalu-members.html">List of all members.</a></p>`	`<p><a href="classalu-members.html">List of all members.</a></p>`
`<table class="memberdecls">`	`<table class="memberdecls">`
`<tr><td colspan="2"><h2><a name="Always Constructs"></a>`	`<tr><td colspan="2"><h2><a name="Always Constructs"></a>`
`Always Constructs</h2></td></tr>`	`Always Constructs</h2></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a833db0d5eda614d712b846b259c0f4d3">ALWAYS_30</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a833db0d5eda614d712b846b259c0f4d3">ALWAYS_30</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>`
	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a04b10dc82e8a06c3856bfd16a7e18d06">ALWAYS_31</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>`
`<tr><td colspan="2"><h2><a name="Defines"></a>`	`<tr><td colspan="2"><h2><a name="Defines"></a>`
`Defines</h2></td></tr>`	`Defines</h2></td></tr>`
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">Sm</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>	<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">Dm</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>	<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">Dm</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a427db1cde5547577da8b980693d9bf64">Rm</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>	<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a942f3773659fb9e9e38101743237144a">Rm</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">Z</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">8'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">16'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">32'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>	<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">8'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">16'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">32'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>
`<tr><td colspan="2"><h2><a name="Inputs"></a>`	`<tr><td colspan="2"><h2><a name="Inputs"></a>`
`Inputs</h2></td></tr>`	`Inputs</h2></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a>  </td><td class="memItemRight" valign="bottom"></td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a>  </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ad5077564c06a917e134e2be4f7f63650">address</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a379cf0ab5b30f07c291e327fc5bb194f">address</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab9e3f505c78e6c0b2340a5e1b364514b">interrupt_mask</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aaec5e2b3f347a2651f6456b7d0dafe16">interrupt_mask</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab0c0bd4569a63b8d08b2e7a1d27cf177">alu_control</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td colspan="2"><h2><a name="Outputs"></a>`	`<tr><td colspan="2"><h2><a name="Outputs"></a>`
`Outputs</h2></td></tr>`	`Outputs</h2></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>`
	`<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab6a8e15c686ee360ddad15cd4d995ea9">alu_mult_div_ready</a>  </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td colspan="2"><h2><a name="Module Instances"></a>`	`<tr><td colspan="2"><h2><a name="Module Instances"></a>`
`Module Instances</h2></td></tr>`	`Module Instances</h2></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a663a13286f43eb65ddc36752990daf91">lpm_divide::divu_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">lpm_mult::muls</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a63937f247c96f23cecbf16343afc85c6">lpm_divide::divs_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a971600ecbf5096805b63eedb9e8c57e2">lpm_mult::mulu_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a26728d930b96d3b4eb3777152250aa48">lpm_mult::muls_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>`
`<tr><td colspan="2"><h2><a name="Signals"></a>`	`<tr><td colspan="2"><h2><a name="Signals"></a>`
`Signals</h2></td></tr>`	`Signals</h2></td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a8cef22afb37b55eea85eda4c20f9b1b7">divu_remainder</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">16</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a0723b9ed6da6c9a2d2b68b36563b42e3">divs_remainder</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a23c8e6648d0b07c6593402658bf83095">mulu_result</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a37551519218b05f156135f78f2ee2fe1">muls_result</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">32</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a8d11b113e74362e74035541da1b0a02e">div_overflow</a> </td></tr>`
`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> </td></tr>`	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#af65ee78a38f09889c3b8c9efc759f559">div_quotient</a> </td></tr>`
	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ad32bb10563baa2d2d78c2a23e8f2219e">div_remainder</a> </td></tr>`
	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">33</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#aff5530027f36561324e060e703004b6b">mult_result</a> </td></tr>`
	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a> </td></tr>`
	`<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> </td></tr>`
`</table>`	`</table>`
`<hr/><a name="_details"></a><h2>Detailed Description</h2>`	`<hr/><a name="_details"></a><h2>Detailed Description</h2>`
`<p>Arithmetic and Logic Unit. </p>`	`<p>Arithmetic and Logic Unit. </p>`
`<p>The alu module is responsible for performing all of the arithmetic and logic operations of the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> processor. It operates on two 32-bit registers: operand1 and operand2 from the registers module. The output is saved into a result 32-bit register. This register is located in the alu module.</p>`	`<p>The alu module is responsible for performing all of the arithmetic and logic operations of the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> processor. It operates on two 32-bit registers: operand1 and operand2 from the registers module. The output is saved into a result 32-bit register. This register is located in the alu module.</p>`
`<p>The alu module also contains the status register (SR) with the condition code register. The microcode decides what operation the alu performs. </p>`	`<p>The alu module also contains the status register (SR) with the condition code register. The microcode decides what operation the alu performs. </p>`

`<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02547">2547</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>`	`<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02591">2591</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>`
`<hr/><h2>Member Function Documentation</h2>`	`<hr/><h2>Member Function Documentation</h2>`
`<a class="anchor" id="a833db0d5eda614d712b846b259c0f4d3"></a><!-- doxytag: member="alu::ALWAYS_30" ref="a833db0d5eda614d712b846b259c0f4d3" args="clock, reset_n" -->`	`<a class="anchor" id="a833db0d5eda614d712b846b259c0f4d3"></a><!-- doxytag: member="alu::ALWAYS_30" ref="a833db0d5eda614d712b846b259c0f4d3" args="clock, reset_n" -->`
`<div class="memitem">`	`<div class="memitem">`
`<div class="memproto">`	`<div class="memproto">`
`<table class="memname">`	`<table class="memname">`
`<tr>`	`<tr>`
`<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_30 <td></td>`	`<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_30 <td></td>`
`<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>`	`<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>`
`</tr>`	`</tr>`
`<tr>`	`<tr>`
`<td class="paramkey"></td>`	`<td class="paramkey"></td>`
`<td></td>`	`<td></td>`
`<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>`	`<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>`
`</tr>`	`</tr>`
`<code> [Always Construct]</code></td>`	`<code> [Always Construct]</code></td>`
`</tr>`	`</tr>`
`</table>`	`</table>`
`</div>`	`</div>`
`<div class="memdoc">`	`<div class="memdoc">`

`<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02666">2666</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>`	`<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02652">2652</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>`
`<div class="fragment"><pre class="fragment">`	`<div class="fragment"><pre class="fragment">`
`<a name="l02666"></a>02666 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a>) <span class="vhdlkeyword">begin</span>`	`<a name="l02652"></a>02652 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a>) <span class="vhdlkeyword">begin</span>`
`<a name="l02667"></a>02667 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>`	`<a name="l02653"></a>02653 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>`
`<a name="l02668"></a>02668 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> <= { <span class="vhdllogic">1'b0</span>, <span class="vhdllogic">1'b0</span>, <span class="vhdllogic">1'b1</span>, <span class="vhdllogic">2'b0</span>, <span class="vhdllogic">3'b111</span>, <span class="vhdllogic">8'b0</span> };`	`<a name="l02654"></a>02654 <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> <= <span class="vhdllogic">5'd0</span>;`
`<a name="l02669"></a>02669 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> <= <span class="vhdllogic">32'd0</span>;`	`<a name="l02655"></a>02655 <span class="vhdlkeyword">end</span>`
`<a name="l02670"></a>02670 <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> <= <span class="vhdllogic">2'b0</span>;`	`<a name="l02656"></a>02656 <span class="keyword">// Cycle #0 : load the registers</span>`
`<a name="l02671"></a>02671 <a class="code" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a> <= <span class="vhdllogic">3'b0</span>;`	<a name="l02657"></a>02657 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1000</span> && <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> == <span class="vhdllogic">5'd0</span>) <span class="vhdlkeyword">begin</span>
`<a name="l02672"></a>02672 <a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> <= <span class="vhdllogic">1'b0</span>;`	`<a name="l02658"></a>02658 <span class="keyword">// 17 cycles to finish + wait state</span>`
`<a name="l02673"></a>02673 <span class="vhdlkeyword">end</span>`	`<a name="l02659"></a>02659 <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> <= <span class="vhdllogic">5'd18</span>;`
`<a name="l02674"></a>02674 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`	`<a name="l02660"></a>02660 <span class="keyword">// Clear the quotient</span>`
`<a name="l02675"></a>02675 <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#ab0c0bd4569a63b8d08b2e7a1d27cf177">alu_control</a>)`	`<a name="l02661"></a>02661 <a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> <= <span class="vhdllogic">17'd0</span>;`
<a name="l02676"></a>02676 <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02662"></a>02662`
`<a name="l02677"></a>02677 <a class="code" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a> <= <a class="code" href="classalu.html#ab9e3f505c78e6c0b2340a5e1b364514b">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];`	`<a name="l02663"></a>02663 <span class="keyword">// Unsigned divide or positive numerator</span>`
`<a name="l02678"></a>02678 <a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> <= <span class="vhdllogic">1'b1</span>;`	`<a name="l02664"></a>02664 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a>) \|\| (!<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>])) <a class="code" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;`
`<a name="l02679"></a>02679 <span class="vhdlkeyword">end</span>`	`<a name="l02665"></a>02665 <span class="keyword">// Negative numerator</span>`
`<a name="l02680"></a>02680`	`<a name="l02666"></a>02666 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> <= -<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;`
<a name="l02681"></a>02681 <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02667"></a>02667`
`<a name="l02682"></a>02682 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>`	`<a name="l02668"></a>02668 <span class="keyword">// Unsigned divide or positive denominator</span>`
<a name="l02683"></a>02683 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> <= { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1'b1</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };	<a name="l02669"></a>02669 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a>) \|\| (!<a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>])) <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> <= {<a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16'd0</span>};
	`<a name="l02670"></a>02670 <span class="keyword">// Negative denominator</span>`
	`<a name="l02671"></a>02671 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> <= {-<a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16'd0</span>};`
	`<a name="l02672"></a>02672 <span class="vhdlkeyword">end</span>`
	`<a name="l02673"></a>02673 <span class="keyword">// Cycles #1-17 : division calculation</span>`
	`<a name="l02674"></a>02674 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> > <span class="vhdllogic">5'd1</span>) <span class="vhdlkeyword">begin</span>`
	`<a name="l02675"></a>02675 <span class="keyword">// Check difference's sign</span>`
	`<a name="l02676"></a>02676 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a>[<span class="vhdllogic">32</span>]) <span class="vhdlkeyword">begin</span>`
	`<a name="l02677"></a>02677 <span class="keyword">// Difference is positive : shift a one</span>`
	`<a name="l02678"></a>02678 <a class="code" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> <= <a class="code" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];`
	`<a name="l02679"></a>02679 <a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> <= {<a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b1</span>};`
	`<a name="l02680"></a>02680 <span class="vhdlkeyword">end</span>`
	`<a name="l02681"></a>02681 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
	`<a name="l02682"></a>02682 <span class="keyword">// Difference is negative : shift a zero</span>`
	`<a name="l02683"></a>02683 <a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> <= {<a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span>};`
`<a name="l02684"></a>02684 <span class="vhdlkeyword">end</span>`	`<a name="l02684"></a>02684 <span class="vhdlkeyword">end</span>`
`<a name="l02685"></a>02685 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`	`<a name="l02685"></a>02685 <span class="keyword">// Shift right divider</span>`
`<a name="l02686"></a>02686 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> <= { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1'b1</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };`	`<a name="l02686"></a>02686 <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> <= {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};`
`<a name="l02687"></a>02687 <span class="vhdlkeyword">end</span>`	`<a name="l02687"></a>02687 <span class="keyword">// Count one bit</span>`
`<a name="l02688"></a>02688 <a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> <= <span class="vhdllogic">1'b0</span>;`	`<a name="l02688"></a>02688 <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> <= <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> - <span class="vhdllogic">5'd1</span>;`
`<a name="l02689"></a>02689 <span class="vhdlkeyword">end</span>`	`<a name="l02689"></a>02689 <span class="vhdlkeyword">end</span>`
`<a name="l02690"></a>02690`	`<a name="l02690"></a>02690 <span class="keyword">// result read</span>`
<a name="l02691"></a>02691 <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	<a name="l02691"></a>02691 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1000</span> && <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> == <span class="vhdllogic">5'd1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02692"></a>02692 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];	`<a name="l02692"></a>02692 <span class="keyword">// goto idle</span>`
`<a name="l02693"></a>02693 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`	`<a name="l02693"></a>02693 <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> <= <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> - <span class="vhdllogic">5'd1</span>;`
`<a name="l02694"></a>02694 <span class="keyword">//CCR: no change</span>`	`<a name="l02694"></a>02694 <span class="vhdlkeyword">end</span>`
`<a name="l02695"></a>02695 <span class="vhdlkeyword">end</span>`	`<a name="l02695"></a>02695 <span class="vhdlkeyword">end</span>`
<a name="l02696"></a>02696 <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`</pre></div>`
<a name="l02697"></a>02697 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];	`</div>`
`<a name="l02698"></a>02698 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`	`</div>`
`<a name="l02699"></a>02699 <span class="keyword">//CCR: no change</span>`	`<a class="anchor" id="a04b10dc82e8a06c3856bfd16a7e18d06"></a><!-- doxytag: member="alu::ALWAYS_31" ref="a04b10dc82e8a06c3856bfd16a7e18d06" args="clock, reset_n" -->`
`<a name="l02700"></a>02700 <span class="vhdlkeyword">end</span>`	`<div class="memitem">`
<a name="l02701"></a>02701 <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<div class="memproto">`
<a name="l02702"></a>02702 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];	`<table class="memname">`
`<a name="l02703"></a>02703 <span class="keyword">//CCR: no change</span>`	`<tr>`
`<a name="l02704"></a>02704 <span class="vhdlkeyword">end</span>`	`<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_31 <td></td>`
<a name="l02705"></a>02705 <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>`
<a name="l02706"></a>02706 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];	`</tr>`
`<a name="l02707"></a>02707 <span class="keyword">//CCR: no change</span>`	`<tr>`
`<a name="l02708"></a>02708 <span class="vhdlkeyword">end</span>`	`<td class="paramkey"></td>`
`<a name="l02709"></a>02709`	`<td></td>`
`<a name="l02710"></a>02710`	`<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>`
<a name="l02711"></a>02711 <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`</tr>`
<a name="l02712"></a>02712 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];	`<code> [Always Construct]</code></td>`
`<a name="l02713"></a>02713 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];`	`</tr>`
`<a name="l02714"></a>02714 <span class="keyword">// CCR: no change</span>`	`</table>`
`<a name="l02715"></a>02715 <span class="vhdlkeyword">end</span>`	`</div>`
<a name="l02716"></a>02716 <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<div class="memdoc">`
<a name="l02717"></a>02717 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
`<a name="l02718"></a>02718 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`	`<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02807">2807</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>`
`<a name="l02719"></a>02719 <span class="keyword">// CCR: no change</span>`	`<div class="fragment"><pre class="fragment">`
`<a name="l02720"></a>02720 <span class="vhdlkeyword">end</span>`	`<a name="l02807"></a>02807 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a>) <span class="vhdlkeyword">begin</span>`
<a name="l02721"></a>02721 <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02808"></a>02808 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>`
`<a name="l02722"></a>02722 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];`	`<a name="l02809"></a>02809 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> <= { <span class="vhdllogic">1'b0</span>, <span class="vhdllogic">1'b0</span>, <span class="vhdllogic">1'b1</span>, <span class="vhdllogic">2'b0</span>, <span class="vhdllogic">3'b111</span>, <span class="vhdllogic">8'b0</span> };`
`<a name="l02723"></a>02723 <span class="keyword">// CCR: no change</span>`	`<a name="l02810"></a>02810 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> <= <span class="vhdllogic">32'd0</span>;`
`<a name="l02724"></a>02724 <span class="vhdlkeyword">end</span>`	`<a name="l02811"></a>02811 <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> <= <span class="vhdllogic">1'b0</span>;`
<a name="l02725"></a>02725 <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02812"></a>02812 <a class="code" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a> <= <span class="vhdllogic">3'b0</span>;`
`<a name="l02726"></a>02726 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`	`<a name="l02813"></a>02813 <a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> <= <span class="vhdllogic">1'b0</span>;`
`<a name="l02727"></a>02727 <span class="keyword">// CCR: no change</span>`	`<a name="l02814"></a>02814 <span class="vhdlkeyword">end</span>`
`<a name="l02728"></a>02728 <span class="vhdlkeyword">end</span>`	`<a name="l02815"></a>02815 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
`<a name="l02729"></a>02729`	`<a name="l02816"></a>02816 <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a>)`
`<a name="l02730"></a>02730`	<a name="l02817"></a>02817 <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02731"></a>02731`	`<a name="l02818"></a>02818 <a class="code" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a> <= <a class="code" href="classalu.html#aaec5e2b3f347a2651f6456b7d0dafe16">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];`
<a name="l02732"></a>02732 <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02819"></a>02819 <a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> <= <span class="vhdllogic">1'b1</span>;`
`<a name="l02733"></a>02733 <span class="keyword">// move operand1 with sign-extension to result</span>`	`<a name="l02820"></a>02820 <span class="vhdlkeyword">end</span>`
`<a name="l02734"></a>02734 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b01</span>) <span class="vhdlkeyword">begin</span>`	`<a name="l02821"></a>02821`
`<a name="l02735"></a>02735 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> <= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };`	<a name="l02822"></a>02822 <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02736"></a>02736 <span class="vhdlkeyword">end</span>`	`<a name="l02823"></a>02823 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>`
`<a name="l02737"></a>02737 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`	<a name="l02824"></a>02824 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> <= { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1'b1</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
`<a name="l02738"></a>02738 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;`	`<a name="l02825"></a>02825 <span class="vhdlkeyword">end</span>`
`<a name="l02739"></a>02739 <span class="vhdlkeyword">end</span>`	`<a name="l02826"></a>02826 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
`<a name="l02740"></a>02740 <span class="keyword">// CCR: no change</span>`	`<a name="l02827"></a>02827 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> <= { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1'b1</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };`
`<a name="l02741"></a>02741 <span class="vhdlkeyword">end</span>`	`<a name="l02828"></a>02828 <span class="vhdlkeyword">end</span>`
`<a name="l02742"></a>02742`	`<a name="l02829"></a>02829 <a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> <= <span class="vhdllogic">1'b0</span>;`
<a name="l02743"></a>02743 <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02830"></a>02830 <span class="vhdlkeyword">end</span>`
`<a name="l02744"></a>02744`
`<a name="l02745"></a>02745 <span class="keyword">// OR,OR to mem,OR to Dn</span>`
`<a name="l02746"></a>02746 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b000</span>) \|\|`
`<a name="l02747"></a>02747 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1000</span>)`
<a name="l02748"></a>02748 ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] \| <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02749"></a>02749 <span class="keyword">// AND,AND to mem,AND to Dn</span>`
<a name="l02750"></a>02750 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b001</span>) \|\|
`<a name="l02751"></a>02751 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1100</span>)`
<a name="l02752"></a>02752 ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] & <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02753"></a>02753 <span class="keyword">// EORI,EOR</span>`
<a name="l02754"></a>02754 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b101</span>) \|\|
<a name="l02755"></a>02755 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b100</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b101</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b110</span>) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3'b001</span>)
<a name="l02756"></a>02756 ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02757"></a>02757 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>`
<a name="l02758"></a>02758 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b011</span>) \|\|
`<a name="l02759"></a>02759 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1101</span>) \|\|`
`<a name="l02760"></a>02760 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>)`
<a name="l02761"></a>02761 ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02762"></a>02762 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>`
<a name="l02763"></a>02763 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b010</span>) \|\|
`<a name="l02764"></a>02764 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b110</span>) \|\|`
<a name="l02765"></a>02765 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b100</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b101</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b110</span>) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3'b001</span>) \|\|
`<a name="l02766"></a>02766 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1001</span>) \|\|`
<a name="l02767"></a>02767 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b000</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b001</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b010</span>)) \|\|
`<a name="l02768"></a>02768 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>)`
<a name="l02769"></a>02769 ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02770"></a>02770`
`<a name="l02771"></a>02771 <span class="keyword">// Z</span>`
<a name="l02772"></a>02772 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;
`<a name="l02773"></a>02773 <span class="keyword">// N</span>`
<a name="l02774"></a>02774 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;
`<a name="l02775"></a>02775`
`<a name="l02776"></a>02776 <span class="keyword">// CMPI,CMPM,CMP</span>`
`<a name="l02777"></a>02777 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b110</span>) \|\|`
<a name="l02778"></a>02778 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b100</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b101</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b110</span>) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3'b001</span>) \|\|
<a name="l02779"></a>02779 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b000</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b001</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b010</span>))
`<a name="l02780"></a>02780 ) <span class="vhdlkeyword">begin</span>`
`<a name="l02781"></a>02781 <span class="keyword">// C,V</span>`
<a name="l02782"></a>02782 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);
<a name="l02783"></a>02783 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);
`<a name="l02784"></a>02784 <span class="keyword">// X not affected</span>`
`<a name="l02785"></a>02785 <span class="vhdlkeyword">end</span>`
`<a name="l02786"></a>02786 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>`
<a name="l02787"></a>02787 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b011</span>) \|\|
`<a name="l02788"></a>02788 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1101</span>) \|\|`
`<a name="l02789"></a>02789 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>)`
`<a name="l02790"></a>02790 ) <span class="vhdlkeyword">begin</span>`
`<a name="l02791"></a>02791 <span class="keyword">// C,X,V</span>`
<a name="l02792"></a>02792 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);
<a name="l02793"></a>02793 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02794"></a>02794 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);
`<a name="l02795"></a>02795 <span class="vhdlkeyword">end</span>`
`<a name="l02796"></a>02796 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>`
<a name="l02797"></a>02797 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b010</span>) \|\|
`<a name="l02798"></a>02798 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1001</span>) \|\|`
`<a name="l02799"></a>02799 (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>)`
`<a name="l02800"></a>02800 ) <span class="vhdlkeyword">begin</span>`
`<a name="l02801"></a>02801 <span class="keyword">// C,X,V</span>`
<a name="l02802"></a>02802 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);
<a name="l02803"></a>02803 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02804"></a>02804 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);
`<a name="l02805"></a>02805 <span class="vhdlkeyword">end</span>`
`<a name="l02806"></a>02806 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>`
`<a name="l02807"></a>02807 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
`<a name="l02808"></a>02808 <span class="keyword">// C,V</span>`
`<a name="l02809"></a>02809 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;`
`<a name="l02810"></a>02810 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>;`
`<a name="l02811"></a>02811 <span class="keyword">// X not affected</span>`
`<a name="l02812"></a>02812 <span class="vhdlkeyword">end</span>`
`<a name="l02813"></a>02813 <span class="vhdlkeyword">end</span>`
`<a name="l02814"></a>02814`
<a name="l02815"></a>02815 <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 259 LE</span>
`<a name="l02816"></a>02816 <span class="keyword">// ABCD</span>`
`<a name="l02817"></a>02817 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b100</span> ) <span class="vhdlkeyword">begin</span>`
<a name="l02818"></a>02818 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4'b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02819"></a>02819 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
`<a name="l02820"></a>02820`
<a name="l02821"></a>02821 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7'b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};
`<a name="l02822"></a>02822`
<a name="l02823"></a>02823 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] > <span class="vhdllogic">6'd9</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02824"></a>02824 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] > <span class="vhdllogic">6'h1F</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6'd2</span>) :
`<a name="l02825"></a>02825 (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] > <span class="vhdllogic">6'h0F</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6'd1</span>) :`
`<a name="l02826"></a>02826 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];`
<a name="l02827"></a>02827 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] > <span class="vhdllogic">6'd9</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
`<a name="l02828"></a>02828`
`<a name="l02829"></a>02829 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];`
`<a name="l02830"></a>02830 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];`
`<a name="l02831"></a>02831`	`<a name="l02831"></a>02831`
`<a name="l02832"></a>02832 <span class="keyword">// C</span>`	<a name="l02832"></a>02832 <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02833"></a>02833 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] > <span class="vhdllogic">6'd9</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`	<a name="l02833"></a>02833 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
`<a name="l02834"></a>02834 <span class="keyword">// X = C</span>`	`<a name="l02834"></a>02834 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`
`<a name="l02835"></a>02835 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] > <span class="vhdllogic">6'd9</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`	`<a name="l02835"></a>02835 <span class="keyword">//CCR: no change</span>`
`<a name="l02836"></a>02836`	`<a name="l02836"></a>02836 <span class="vhdlkeyword">end</span>`
`<a name="l02837"></a>02837 <span class="keyword">// V</span>`	<a name="l02837"></a>02837 <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02838"></a>02838 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1'b1</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;	<a name="l02838"></a>02838 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
`<a name="l02839"></a>02839 <span class="vhdlkeyword">end</span>`	`<a name="l02839"></a>02839 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`
`<a name="l02840"></a>02840 <span class="keyword">// SBCD</span>`	`<a name="l02840"></a>02840 <span class="keyword">//CCR: no change</span>`
`<a name="l02841"></a>02841 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b000</span> ) <span class="vhdlkeyword">begin</span>`	`<a name="l02841"></a>02841 <span class="vhdlkeyword">end</span>`
`<a name="l02842"></a>02842`	<a name="l02842"></a>02842 <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02843"></a>02843 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6'd32</span> + {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5'b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};	<a name="l02843"></a>02843 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02844"></a>02844 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6'd32</span> + {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};	`<a name="l02844"></a>02844 <span class="keyword">//CCR: no change</span>`
`<a name="l02845"></a>02845`	`<a name="l02845"></a>02845 <span class="vhdlkeyword">end</span>`
<a name="l02846"></a>02846 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7'b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};	<a name="l02846"></a>02846 <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02847"></a>02847`	<a name="l02847"></a>02847 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02848"></a>02848 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] < <span class="vhdllogic">6'd32</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];	`<a name="l02848"></a>02848 <span class="keyword">//CCR: no change</span>`
<a name="l02849"></a>02849 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] < <span class="vhdllogic">6'd16</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6'd2</span>) :	`<a name="l02849"></a>02849 <span class="vhdlkeyword">end</span>`
`<a name="l02850"></a>02850 (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] < <span class="vhdllogic">6'd32</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6'd1</span>) :`	`<a name="l02850"></a>02850`
`<a name="l02851"></a>02851 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];`	`<a name="l02851"></a>02851`
<a name="l02852"></a>02852 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] < <span class="vhdllogic">6'd32</span> && <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1'b1</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];	<a name="l02852"></a>02852 <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02853"></a>02853`	<a name="l02853"></a>02853 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];
`<a name="l02854"></a>02854 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];`	`<a name="l02854"></a>02854 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];`
`<a name="l02855"></a>02855 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];`	`<a name="l02855"></a>02855 <span class="keyword">// CCR: no change</span>`
`<a name="l02856"></a>02856`	`<a name="l02856"></a>02856 <span class="vhdlkeyword">end</span>`
`<a name="l02857"></a>02857 <span class="keyword">// C</span>`	<a name="l02857"></a>02857 <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02858"></a>02858 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] < <span class="vhdllogic">6'd32</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`	<a name="l02858"></a>02858 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
`<a name="l02859"></a>02859 <span class="keyword">// X = C</span>`	`<a name="l02859"></a>02859 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`
`<a name="l02860"></a>02860 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] < <span class="vhdllogic">6'd32</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`	`<a name="l02860"></a>02860 <span class="keyword">// CCR: no change</span>`
`<a name="l02861"></a>02861`	`<a name="l02861"></a>02861 <span class="vhdlkeyword">end</span>`
`<a name="l02862"></a>02862 <span class="keyword">// V</span>`	<a name="l02862"></a>02862 <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02863"></a>02863 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1'b0</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;	`<a name="l02863"></a>02863 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];`
`<a name="l02864"></a>02864 <span class="vhdlkeyword">end</span>`	`<a name="l02864"></a>02864 <span class="keyword">// CCR: no change</span>`
`<a name="l02865"></a>02865 <span class="keyword">// ADDX</span>`	`<a name="l02865"></a>02865 <span class="vhdlkeyword">end</span>`
<a name="l02866"></a>02866 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b101</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];	<a name="l02866"></a>02866 <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02867"></a>02867 <span class="keyword">// SUBX</span>`	`<a name="l02867"></a>02867 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];`
<a name="l02868"></a>02868 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b001</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];	`<a name="l02868"></a>02868 <span class="keyword">// CCR: no change</span>`
`<a name="l02869"></a>02869`	`<a name="l02869"></a>02869 <span class="vhdlkeyword">end</span>`
`<a name="l02870"></a>02870 <span class="keyword">// Z</span>`	`<a name="l02870"></a>02870`
<a name="l02871"></a>02871 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] & <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;	`<a name="l02871"></a>02871`
`<a name="l02872"></a>02872 <span class="keyword">// N</span>`	`<a name="l02872"></a>02872`
<a name="l02873"></a>02873 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;	<a name="l02873"></a>02873 <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l02874"></a>02874`	`<a name="l02874"></a>02874 <span class="keyword">// move operand1 with sign-extension to result</span>`
`<a name="l02875"></a>02875 <span class="keyword">// ADDX</span>`	`<a name="l02875"></a>02875 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>`
`<a name="l02876"></a>02876 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b101</span> ) <span class="vhdlkeyword">begin</span>`	`<a name="l02876"></a>02876 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> <= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };`
`<a name="l02877"></a>02877 <span class="keyword">// C,X,V</span>`	`<a name="l02877"></a>02877 <span class="vhdlkeyword">end</span>`
<a name="l02878"></a>02878 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);	`<a name="l02878"></a>02878 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
<a name="l02879"></a>02879 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>	`<a name="l02879"></a>02879 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> <= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;`
<a name="l02880"></a>02880 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);	`<a name="l02880"></a>02880 <span class="vhdlkeyword">end</span>`
`<a name="l02881"></a>02881 <span class="vhdlkeyword">end</span>`	`<a name="l02881"></a>02881 <span class="keyword">// CCR: no change</span>`
`<a name="l02882"></a>02882 <span class="keyword">// SUBX</span>`	`<a name="l02882"></a>02882 <span class="vhdlkeyword">end</span>`
`<a name="l02883"></a>02883 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b001</span> ) <span class="vhdlkeyword">begin</span>`	`<a name="l02883"></a>02883`
`<a name="l02884"></a>02884 <span class="keyword">// C,X,V</span>`	<a name="l02884"></a>02884 <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02885"></a>02885 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);	`<a name="l02885"></a>02885`
<a name="l02886"></a>02886 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>	`<a name="l02886"></a>02886 <span class="keyword">// OR,OR to mem,OR to Dn</span>`
<a name="l02887"></a>02887 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);	`<a name="l02887"></a>02887 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b000</span>) \|\|`
`<a name="l02888"></a>02888 <span class="vhdlkeyword">end</span>`	`<a name="l02888"></a>02888 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1000</span>)`
`<a name="l02889"></a>02889 <span class="vhdlkeyword">end</span>`	<a name="l02889"></a>02889 ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] \| <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02890"></a>02890`	`<a name="l02890"></a>02890 <span class="keyword">// AND,AND to mem,AND to Dn</span>`
<a name="l02891"></a>02891 <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	<a name="l02891"></a>02891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b001</span>) \|\|
`<a name="l02892"></a>02892`	`<a name="l02892"></a>02892 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1100</span>)`
<a name="l02893"></a>02893 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b00</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];	<a name="l02893"></a>02893 ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] & <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02894"></a>02894 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b01</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];	`<a name="l02894"></a>02894 <span class="keyword">// EORI,EOR</span>`
<a name="l02895"></a>02895 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b10</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];	<a name="l02895"></a>02895 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b101</span>) \|\|
`<a name="l02896"></a>02896`	<a name="l02896"></a>02896 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b100</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b101</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b110</span>) && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3'b001</span>)
`<a name="l02897"></a>02897 <span class="keyword">// X for ASL</span>`	<a name="l02897"></a>02897 ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02898"></a>02898 <span class="keyword">//if(operand2[5:0] > 6'b0 && ir[8] == 1'b1 && ((ir[7:6] == 2'b11 && ir[10:9] == 2'b00) \|\| (ir[7:6] != 2'b11 && ir[4:3] == 2'b00)) ) begin</span>`	`<a name="l02898"></a>02898 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>`
`<a name="l02899"></a>02899 <span class="keyword">// X set to Dm</span>`	<a name="l02899"></a>02899 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b011</span>) \|\|
<a name="l02900"></a>02900 <span class="keyword">// sr[4] <= `Dm;</span>	`<a name="l02900"></a>02900 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1101</span>) \|\|`
`<a name="l02901"></a>02901 <span class="keyword">//end</span>`	`<a name="l02901"></a>02901 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>)`
`<a name="l02902"></a>02902 <span class="keyword">// else X not affected</span>`	<a name="l02902"></a>02902 ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02903"></a>02903`	`<a name="l02903"></a>02903 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>`
`<a name="l02904"></a>02904 <span class="keyword">// V cleared</span>`	<a name="l02904"></a>02904 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b010</span>) \|\|
`<a name="l02905"></a>02905 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>;`	`<a name="l02905"></a>02905 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b110</span>) \|\|`
`<a name="l02906"></a>02906 <span class="keyword">// C for ROXL,ROXR: set to X</span>`	<a name="l02906"></a>02906 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b100</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b101</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b110</span>) && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3'b001</span>) \|\|
<a name="l02907"></a>02907 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b10</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b10</span>) ) <span class="vhdlkeyword">begin</span>	`<a name="l02907"></a>02907 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1001</span>) \|\|`
`<a name="l02908"></a>02908 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];`	<a name="l02908"></a>02908 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b000</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b001</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b010</span>)) \|\|
`<a name="l02909"></a>02909 <span class="vhdlkeyword">end</span>`	`<a name="l02909"></a>02909 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>)`
`<a name="l02910"></a>02910 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`	<a name="l02910"></a>02910 ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l02911"></a>02911 <span class="keyword">// C cleared</span>`	`<a name="l02911"></a>02911`
`<a name="l02912"></a>02912 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;`	`<a name="l02912"></a>02912 <span class="keyword">// Z</span>`
`<a name="l02913"></a>02913 <span class="vhdlkeyword">end</span>`	<a name="l02913"></a>02913 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
`<a name="l02914"></a>02914`	`<a name="l02914"></a>02914 <span class="keyword">// N</span>`
`<a name="l02915"></a>02915 <span class="keyword">// N set</span>`	<a name="l02915"></a>02915 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02916"></a>02916 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;	`<a name="l02916"></a>02916`
`<a name="l02917"></a>02917 <span class="keyword">// Z set</span>`	`<a name="l02917"></a>02917 <span class="keyword">// CMPI,CMPM,CMP</span>`
<a name="l02918"></a>02918 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;	`<a name="l02918"></a>02918 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b110</span>) \|\|`
`<a name="l02919"></a>02919 <span class="vhdlkeyword">end</span>`	<a name="l02919"></a>02919 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b100</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b101</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b110</span>) && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3'b001</span>) \|\|
`<a name="l02920"></a>02920`	<a name="l02920"></a>02920 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> && (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b000</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b001</span> \|\| <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3'b010</span>))
<a name="l02921"></a>02921 <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l02921"></a>02921 ) <span class="vhdlkeyword">begin</span>`
`<a name="l02922"></a>02922`	`<a name="l02922"></a>02922 <span class="keyword">// C,V</span>`
`<a name="l02923"></a>02923 <span class="keyword">// ASL</span>`	<a name="l02923"></a>02923 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02924"></a>02924 <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b00</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b00</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>	<a name="l02924"></a>02924 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
`<a name="l02925"></a>02925 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span>};`	`<a name="l02925"></a>02925 <span class="keyword">// X not affected</span>`
`<a name="l02926"></a>02926`	`<a name="l02926"></a>02926 <span class="vhdlkeyword">end</span>`
<a name="l02927"></a>02927 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1'b1</span>; <span class="keyword">// V</span>	`<a name="l02927"></a>02927 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>`
<a name="l02928"></a>02928 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C</span>	<a name="l02928"></a>02928 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b011</span>) \|\|
<a name="l02929"></a>02929 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X</span>	`<a name="l02929"></a>02929 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1101</span>) \|\|`
`<a name="l02930"></a>02930 <span class="vhdlkeyword">end</span>`	`<a name="l02930"></a>02930 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>)`
`<a name="l02931"></a>02931 <span class="keyword">// LSL</span>`	`<a name="l02931"></a>02931 ) <span class="vhdlkeyword">begin</span>`
<a name="l02932"></a>02932 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b01</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b01</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>	`<a name="l02932"></a>02932 <span class="keyword">// C,X,V</span>`
`<a name="l02933"></a>02933 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span>};`	<a name="l02933"></a>02933 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
`<a name="l02934"></a>02934`	<a name="l02934"></a>02934 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
`<a name="l02935"></a>02935 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	<a name="l02935"></a>02935 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02936"></a>02936 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C</span>	`<a name="l02936"></a>02936 <span class="vhdlkeyword">end</span>`
<a name="l02937"></a>02937 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X</span>	`<a name="l02937"></a>02937 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>`
`<a name="l02938"></a>02938 <span class="vhdlkeyword">end</span>`	<a name="l02938"></a>02938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0000</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3'b010</span>) \|\|
`<a name="l02939"></a>02939 <span class="keyword">// ROL</span>`	`<a name="l02939"></a>02939 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1001</span>) \|\|`
<a name="l02940"></a>02940 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b11</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b11</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>	`<a name="l02940"></a>02940 (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>)`
<a name="l02941"></a>02941 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>};	`<a name="l02941"></a>02941 ) <span class="vhdlkeyword">begin</span>`
`<a name="l02942"></a>02942`	`<a name="l02942"></a>02942 <span class="keyword">// C,X,V</span>`
`<a name="l02943"></a>02943 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	<a name="l02943"></a>02943 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02944"></a>02944 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C</span>	<a name="l02944"></a>02944 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
`<a name="l02945"></a>02945 <span class="keyword">// X not affected</span>`	<a name="l02945"></a>02945 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
`<a name="l02946"></a>02946 <span class="vhdlkeyword">end</span>`	`<a name="l02946"></a>02946 <span class="vhdlkeyword">end</span>`
`<a name="l02947"></a>02947 <span class="keyword">// ROXL</span>`	`<a name="l02947"></a>02947 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>`
<a name="l02948"></a>02948 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b10</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b10</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>	`<a name="l02948"></a>02948 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
`<a name="l02949"></a>02949 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};`	`<a name="l02949"></a>02949 <span class="keyword">// C,V</span>`
`<a name="l02950"></a>02950`	`<a name="l02950"></a>02950 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;`
`<a name="l02951"></a>02951 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	`<a name="l02951"></a>02951 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>;`
<a name="l02952"></a>02952 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C</span>	`<a name="l02952"></a>02952 <span class="keyword">// X not affected</span>`
<a name="l02953"></a>02953 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X</span>	`<a name="l02953"></a>02953 <span class="vhdlkeyword">end</span>`
`<a name="l02954"></a>02954 <span class="vhdlkeyword">end</span>`	`<a name="l02954"></a>02954 <span class="vhdlkeyword">end</span>`
`<a name="l02955"></a>02955 <span class="keyword">// ASR</span>`	`<a name="l02955"></a>02955`
<a name="l02956"></a>02956 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b00</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b00</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>	<a name="l02956"></a>02956 <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 259 LE</span>
<a name="l02957"></a>02957 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b00</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };	`<a name="l02957"></a>02957 <span class="keyword">// ABCD</span>`
<a name="l02958"></a>02958 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b01</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };	`<a name="l02958"></a>02958 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b100</span> ) <span class="vhdlkeyword">begin</span>`
<a name="l02959"></a>02959 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b10</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };	<a name="l02959"></a>02959 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4'b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};
`<a name="l02960"></a>02960`	<a name="l02960"></a>02960 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
`<a name="l02961"></a>02961 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	`<a name="l02961"></a>02961`
`<a name="l02962"></a>02962 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C</span>`	<a name="l02962"></a>02962 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7'b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};
`<a name="l02963"></a>02963 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X</span>`	`<a name="l02963"></a>02963`
`<a name="l02964"></a>02964 <span class="vhdlkeyword">end</span>`	<a name="l02964"></a>02964 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] > <span class="vhdllogic">6'd9</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
`<a name="l02965"></a>02965 <span class="keyword">// LSR</span>`	<a name="l02965"></a>02965 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] > <span class="vhdllogic">6'h1F</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6'd2</span>) :
<a name="l02966"></a>02966 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b01</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b01</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>	`<a name="l02966"></a>02966 (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] > <span class="vhdllogic">6'h0F</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6'd1</span>) :`
<a name="l02967"></a>02967 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b00</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };	`<a name="l02967"></a>02967 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];`
<a name="l02968"></a>02968 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b01</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };	<a name="l02968"></a>02968 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] > <span class="vhdllogic">6'd9</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02969"></a>02969 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b10</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1'b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };	`<a name="l02969"></a>02969`
`<a name="l02970"></a>02970`	`<a name="l02970"></a>02970 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];`
`<a name="l02971"></a>02971 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	`<a name="l02971"></a>02971 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];`
`<a name="l02972"></a>02972 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C</span>`	`<a name="l02972"></a>02972`
`<a name="l02973"></a>02973 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X</span>`	`<a name="l02973"></a>02973 <span class="keyword">// C</span>`
`<a name="l02974"></a>02974 <span class="vhdlkeyword">end</span>`	`<a name="l02974"></a>02974 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] > <span class="vhdllogic">6'd9</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`
`<a name="l02975"></a>02975 <span class="keyword">// ROR</span>`	`<a name="l02975"></a>02975 <span class="keyword">// X = C</span>`
<a name="l02976"></a>02976 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b11</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b11</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>	`<a name="l02976"></a>02976 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] > <span class="vhdllogic">6'd9</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`
<a name="l02977"></a>02977 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b00</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };	`<a name="l02977"></a>02977`
<a name="l02978"></a>02978 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b01</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };	`<a name="l02978"></a>02978 <span class="keyword">// V</span>`
<a name="l02979"></a>02979 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b10</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };	<a name="l02979"></a>02979 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1'b1</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
`<a name="l02980"></a>02980`	`<a name="l02980"></a>02980 <span class="vhdlkeyword">end</span>`
`<a name="l02981"></a>02981 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	`<a name="l02981"></a>02981 <span class="keyword">// SBCD</span>`
`<a name="l02982"></a>02982 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C</span>`	`<a name="l02982"></a>02982 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b000</span> ) <span class="vhdlkeyword">begin</span>`
`<a name="l02983"></a>02983 <span class="keyword">// X not affected</span>`	`<a name="l02983"></a>02983`
`<a name="l02984"></a>02984 <span class="vhdlkeyword">end</span>`	<a name="l02984"></a>02984 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6'd32</span> + {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5'b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};
`<a name="l02985"></a>02985 <span class="keyword">// ROXR</span>`	<a name="l02985"></a>02985 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6'd32</span> + {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2'b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02986"></a>02986 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b10</span>) \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b10</span>)) && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>	`<a name="l02986"></a>02986`
<a name="l02987"></a>02987 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b00</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>]};	<a name="l02987"></a>02987 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7'b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02988"></a>02988 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b01</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>]};	`<a name="l02988"></a>02988`
<a name="l02989"></a>02989 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2'b10</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};	<a name="l02989"></a>02989 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] < <span class="vhdllogic">6'd32</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
`<a name="l02990"></a>02990`	<a name="l02990"></a>02990 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] < <span class="vhdllogic">6'd16</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6'd2</span>) :
`<a name="l02991"></a>02991 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>; <span class="keyword">// V</span>`	`<a name="l02991"></a>02991 (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] < <span class="vhdllogic">6'd32</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6'd1</span>) :`
`<a name="l02992"></a>02992 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C</span>`	`<a name="l02992"></a>02992 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];`
`<a name="l02993"></a>02993 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X</span>`	<a name="l02993"></a>02993 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] < <span class="vhdllogic">6'd32</span> && <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1'b1</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6'd6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
`<a name="l02994"></a>02994 <span class="vhdlkeyword">end</span>`	`<a name="l02994"></a>02994`
`<a name="l02995"></a>02995`	`<a name="l02995"></a>02995 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];`
`<a name="l02996"></a>02996 <span class="keyword">// N set</span>`	`<a name="l02996"></a>02996 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];`
<a name="l02997"></a>02997 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;	`<a name="l02997"></a>02997`
`<a name="l02998"></a>02998 <span class="keyword">// Z set</span>`	`<a name="l02998"></a>02998 <span class="keyword">// C</span>`
<a name="l02999"></a>02999 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;	`<a name="l02999"></a>02999 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] < <span class="vhdllogic">6'd32</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`
`<a name="l03000"></a>03000 <span class="vhdlkeyword">end</span>`	`<a name="l03000"></a>03000 <span class="keyword">// X = C</span>`
`<a name="l03001"></a>03001`	`<a name="l03001"></a>03001 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] < <span class="vhdllogic">6'd32</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;`
<a name="l03002"></a>03002 <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l03002"></a>03002`
`<a name="l03003"></a>03003 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;`	`<a name="l03003"></a>03003 <span class="keyword">// V</span>`
`<a name="l03004"></a>03004`	<a name="l03004"></a>03004 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1'b0</span>) ? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>;
`<a name="l03005"></a>03005 <span class="keyword">// X not affected</span>`	`<a name="l03005"></a>03005 <span class="vhdlkeyword">end</span>`
`<a name="l03006"></a>03006 <span class="keyword">// C cleared</span>`	`<a name="l03006"></a>03006 <span class="keyword">// ADDX</span>`
`<a name="l03007"></a>03007 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;`	<a name="l03007"></a>03007 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b101</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>];
`<a name="l03008"></a>03008 <span class="keyword">// V cleared</span>`	`<a name="l03008"></a>03008 <span class="keyword">// SUBX</span>`
`<a name="l03009"></a>03009 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>;`	<a name="l03009"></a>03009 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b001</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>];
`<a name="l03010"></a>03010`	`<a name="l03010"></a>03010`
`<a name="l03011"></a>03011 <span class="keyword">// N set</span>`	`<a name="l03011"></a>03011 <span class="keyword">// Z</span>`
<a name="l03012"></a>03012 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;	<a name="l03012"></a>03012 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] & <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
`<a name="l03013"></a>03013 <span class="keyword">// Z set</span>`	`<a name="l03013"></a>03013 <span class="keyword">// N</span>`
<a name="l03014"></a>03014 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;	<a name="l03014"></a>03014 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
`<a name="l03015"></a>03015 <span class="vhdlkeyword">end</span>`	`<a name="l03015"></a>03015`
`<a name="l03016"></a>03016`	`<a name="l03016"></a>03016 <span class="keyword">// ADDX</span>`
<a name="l03017"></a>03017 <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l03017"></a>03017 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b101</span> ) <span class="vhdlkeyword">begin</span>`
`<a name="l03018"></a>03018 <span class="keyword">// ADDA: 1101</span>`	`<a name="l03018"></a>03018 <span class="keyword">// C,X,V</span>`
`<a name="l03019"></a>03019 <span class="keyword">// CMPA: 1011</span>`	<a name="l03019"></a>03019 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
`<a name="l03020"></a>03020 <span class="keyword">// SUBA: 1001</span>`	<a name="l03020"></a>03020 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
`<a name="l03021"></a>03021 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>`	<a name="l03021"></a>03021 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
`<a name="l03022"></a>03022 <span class="keyword">// operation requires that operand2 was sign extended</span>`	`<a name="l03022"></a>03022 <span class="vhdlkeyword">end</span>`
`<a name="l03023"></a>03023`	`<a name="l03023"></a>03023 <span class="keyword">// SUBX</span>`
`<a name="l03024"></a>03024 <span class="keyword">// ADDA,ADDQ</span>`	`<a name="l03024"></a>03024 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3'b001</span> ) <span class="vhdlkeyword">begin</span>`
<a name="l03025"></a>03025 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1101</span> \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b0</span>) )	`<a name="l03025"></a>03025 <span class="keyword">// C,X,V</span>`
<a name="l03026"></a>03026 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];	<a name="l03026"></a>03026 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
`<a name="l03027"></a>03027 <span class="keyword">// SUBA,CMPA,SUBQ</span>`	<a name="l03027"></a>03027 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l03028"></a>03028 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1001</span> \|\| <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> \|\| (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b0101</span> && <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>) )	<a name="l03028"></a>03028 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03029"></a>03029 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];	`<a name="l03029"></a>03029 <span class="vhdlkeyword">end</span>`
`<a name="l03030"></a>03030`	`<a name="l03030"></a>03030 <span class="vhdlkeyword">end</span>`
`<a name="l03031"></a>03031 <span class="keyword">// for CMPA</span>`	`<a name="l03031"></a>03031`
`<a name="l03032"></a>03032 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4'b1011</span> ) <span class="vhdlkeyword">begin</span>`	<a name="l03032"></a>03032 <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l03033"></a>03033 <span class="keyword">// Z</span>`	`<a name="l03033"></a>03033`
<a name="l03034"></a>03034 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;	<a name="l03034"></a>03034 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
`<a name="l03035"></a>03035 <span class="keyword">// N</span>`	<a name="l03035"></a>03035 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l03036"></a>03036 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;	<a name="l03036"></a>03036 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
`<a name="l03037"></a>03037`	`<a name="l03037"></a>03037`
`<a name="l03038"></a>03038 <span class="keyword">// C,V</span>`	`<a name="l03038"></a>03038 <span class="keyword">// X for ASL</span>`
<a name="l03039"></a>03039 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] <= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);	`<a name="l03039"></a>03039 <span class="keyword">//if(operand2[5:0] > 6'b0 && ir[8] == 1'b1 && ((ir[7:6] == 2'b11 && ir[10:9] == 2'b00) \|\| (ir[7:6] != 2'b11 && ir[4:3] == 2'b00)) ) begin</span>`
<a name="l03040"></a>03040 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] <= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);	`<a name="l03040"></a>03040 <span class="keyword">// X set to Dm</span>`
`<a name="l03041"></a>03041 <span class="keyword">// X not affected</span>`	<a name="l03041"></a>03041 <span class="keyword">// sr[4] <= `Dm;</span>
`<a name="l03042"></a>03042 <span class="vhdlkeyword">end</span>`	`<a name="l03042"></a>03042 <span class="keyword">//end</span>`
`<a name="l03043"></a>03043 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>`	`<a name="l03043"></a>03043 <span class="keyword">// else X not affected</span>`
`<a name="l03044"></a>03044 <span class="vhdlkeyword">end</span>`	`<a name="l03044"></a>03044`
`<a name="l03045"></a>03045`	`<a name="l03045"></a>03045 <span class="keyword">// V cleared</span>`
<a name="l03046"></a>03046 <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>	`<a name="l03046"></a>03046 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= <span class="vhdllogic">1'b0</span>;`
<a name="l03047"></a>03047 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];	`<a name="l03047"></a>03047 <span class="keyword">// C for ROXL,ROXR: set to X</span>`
`<a name="l03048"></a>03048`	<a name="l03048"></a>03048 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b10</span>) \|\| (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b10</span>) ) <span class="vhdlkeyword">begin</span>
`<a name="l03049"></a>03049 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>`	`<a name="l03049"></a>03049 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>];`
`<a name="l03050"></a>03050 <span class="keyword">//sr[2] <= (operand1[15:0] == 16'b0) ? 1'b1 : 1'b0;</span>`	`<a name="l03050"></a>03050 <span class="vhdlkeyword">end</span>`
`<a name="l03051"></a>03051 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>`	`<a name="l03051"></a>03051 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>`
`<a name="l03052"></a>03052 <span class="keyword">//sr[0] <= 1'b0;</span>`	`<a name="l03052"></a>03052 <span class="keyword">// C cleared</span>`
`<a name="l03053"></a>03053 <span class="keyword">//sr[1] <= 1'b0;</span>`	`<a name="l03053"></a>03053 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= <span class="vhdllogic">1'b0</span>;`
`<a name="l03054"></a>03054`	`<a name="l03054"></a>03054 <span class="vhdlkeyword">end</span>`
`<a name="l03055"></a>03055 <span class="keyword">// C,X,V</span>`	`<a name="l03055"></a>03055`
<a name="l03056"></a>03056 <span class="keyword">// sr[0] <= (`Sm & ~`Dm) \| (`Rm & ~`Dm) \| (`Sm & `Rm);</span>	`<a name="l03056"></a>03056 <span class="keyword">// N set</span>`
<a name="l03057"></a>03057 <span class="keyword">// sr[4] <= (`Sm & ~`Dm) \| (`Rm & ~`Dm) \| (`Sm & `Rm); //=ccr[0];</span>	<a name="l03057"></a>03057 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] <= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03058"></a>03058 <span class="keyword">// sr[1] <= (~`Sm & `Dm & ~`Rm) \| (`Sm & ~`Dm & `Rm);</span>	`<a name="l03058"></a>03058 <span class="keyword">// Z set</span>`
`<a name="l03059"></a>03059 <span class="keyword">// +: 0-1, 0-0=0, 1-1=0</span>`	<a name="l03059"></a>03059 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] <= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
`<a name="l03060"></a>03060 <span class="keyword">// -: 0-0=1, 1-0, 1-1=1</span>`	`<a name="l03060"></a>03060 <span class="vhdlkeyword">end</span>`
`<a name="l03061"></a>03061 <span class="keyword">// operand1 - operand2 > 0</span>`	`<a name="l03061"></a>03061`
<a name="l03062"></a>03062 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] && ((~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span>) \| (~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) \| (<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> & <a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> & ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1'b1</span> ) <span class="vhdlkeyword">begin</span>	<a name="l03062"></a>03062 <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
`<a name="l03063"></a>03063 <span class="keyword">// clear N</span>`	`<a name="l03063"></a>03063`
`<a name="l03064"></a>03064 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <span class="vhdllogic">1'b0</span>;`	`<a name="l03064"></a>03064 <span class="keyword">// ASL</span>`
`<a name="l03065"></a>03065 <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> <= <span class="vhdllogic">2'b01</span>;`	<a name="l03065"></a>03065 <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2'b00</span>) \|\| (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2'b11</span> && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2'b00</span>)) && <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
`<a name="l03066"></a>03066 <span class="vhdlkeyword">end</span>`	`<a name="l03066"></a>03066 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span>};`
`<a name="l03067"></a>03067 <span class="keyword">// operand1 < 0</span>`	`<a name="l03067"></a>03067`
`<a name="l03068"></a>03068 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1'b1</span> ) <span class="vhdlkeyword">begin</span>`	<a name="l03068"></a>03068 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] <= (<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1'b1</span>; <span class="keyword">// V</span>
`<a name="l03069"></a>03069 <span class="keyword">// set N</span>`	<a name="l03069"></a>03069 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] <= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C</span>
`<a name="l03070"></a>03070 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] <= <span class="vhdllogic">1'b1</span>;`	<a name="l03070"></a>03070 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] <= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X</span>
`<a name="l03071"></a>03071 <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> <= <span class="vhdllogic">2'b01</span>;`	`<a name="l03071"></a>03071 <span class="vhdlkeyword">end</span>`

Line 52...

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<tr><td colspan="2"><h2><a name="Always Constructs"></a>

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Always Constructs</h2></td></tr>

Always Constructs</h2></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a833db0d5eda614d712b846b259c0f4d3">ALWAYS_30</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a833db0d5eda614d712b846b259c0f4d3">ALWAYS_30</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a04b10dc82e8a06c3856bfd16a7e18d06">ALWAYS_31</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>

<tr><td colspan="2"><h2><a name="Defines"></a>

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Defines</h2></td></tr>

Defines</h2></td></tr>

 <tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">Sm</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

 <tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand2</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">Dm</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">Dm</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?operand1</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a427db1cde5547577da8b980693d9bf64">Rm</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a942f3773659fb9e9e38101743237144a">Rm</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?result</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">]</span><span class="vhdlchar">:</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">]</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">Z</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b00</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">8'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></b> <span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">2'b01</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">16'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">32'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">(</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">8'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">1'b1</span><span class="vhdlchar">)</span><span class="vhdlchar">?</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">16'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">:</span><span class="vhdlchar">(</span><b><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></b> <span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar">=</span><span class="vhdlchar">=</span><span class="vhdldigit">32'b0</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></b></td></tr>

<tr><td colspan="2"><h2><a name="Inputs"></a>

<tr><td colspan="2"><h2><a name="Inputs"></a>

Inputs</h2></td></tr>

Inputs</h2></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ad5077564c06a917e134e2be4f7f63650">address</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a379cf0ab5b30f07c291e327fc5bb194f">address</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab9e3f505c78e6c0b2340a5e1b364514b">interrupt_mask</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aaec5e2b3f347a2651f6456b7d0dafe16">interrupt_mask</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab0c0bd4569a63b8d08b2e7a1d27cf177">alu_control</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td colspan="2"><h2><a name="Outputs"></a>

<tr><td colspan="2"><h2><a name="Outputs"></a>

Outputs</h2></td></tr>

Outputs</h2></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classalu.html#ab6a8e15c686ee360ddad15cd4d995ea9">alu_mult_div_ready</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td colspan="2"><h2><a name="Module Instances"></a>

<tr><td colspan="2"><h2><a name="Module Instances"></a>

Module Instances</h2></td></tr>

Module Instances</h2></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a663a13286f43eb65ddc36752990daf91">lpm_divide::divu_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">lpm_mult::muls</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a63937f247c96f23cecbf16343afc85c6">lpm_divide::divs_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a971600ecbf5096805b63eedb9e8c57e2">lpm_mult::mulu_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classalu.html#a26728d930b96d3b4eb3777152250aa48">lpm_mult::muls_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>

<tr><td colspan="2"><h2><a name="Signals"></a>

<tr><td colspan="2"><h2><a name="Signals"></a>

Signals</h2></td></tr>

Signals</h2></td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a> </td></tr>

 <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a8cef22afb37b55eea85eda4c20f9b1b7">divu_remainder</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">16</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a0723b9ed6da6c9a2d2b68b36563b42e3">divs_remainder</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a23c8e6648d0b07c6593402658bf83095">mulu_result</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a37551519218b05f156135f78f2ee2fe1">muls_result</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">32</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a8d11b113e74362e74035541da1b0a02e">div_overflow</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#af65ee78a38f09889c3b8c9efc759f559">div_quotient</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ad32bb10563baa2d2d78c2a23e8f2219e">div_remainder</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">33</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#aff5530027f36561324e060e703004b6b">mult_result</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a> </td></tr>

<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> </td></tr>

</table>

</table>

<hr/><a name="_details"></a><h2>Detailed Description</h2>

<hr/><a name="_details"></a><h2>Detailed Description</h2>

<p>Arithmetic and Logic Unit. </p>

<p>Arithmetic and Logic Unit. </p>

<p>The alu module is responsible for performing all of the arithmetic and logic operations of the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> processor. It operates on two 32-bit registers: operand1 and operand2 from the registers module. The output is saved into a result 32-bit register. This register is located in the alu module.</p>

<p>The alu module is responsible for performing all of the arithmetic and logic operations of the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> processor. It operates on two 32-bit registers: operand1 and operand2 from the registers module. The output is saved into a result 32-bit register. This register is located in the alu module.</p>

<p>The alu module also contains the status register (SR) with the condition code register. The microcode decides what operation the alu performs. </p>

<p>The alu module also contains the status register (SR) with the condition code register. The microcode decides what operation the alu performs. </p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02547">2547</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02591">2591</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<hr/><h2>Member Function Documentation</h2>

<hr/><h2>Member Function Documentation</h2>

<a class="anchor" id="a833db0d5eda614d712b846b259c0f4d3"></a><!-- doxytag: member="alu::ALWAYS_30" ref="a833db0d5eda614d712b846b259c0f4d3" args="clock, reset_n" -->

<a class="anchor" id="a833db0d5eda614d712b846b259c0f4d3"></a><!-- doxytag: member="alu::ALWAYS_30" ref="a833db0d5eda614d712b846b259c0f4d3" args="clock, reset_n" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

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          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_30          <td></td>

          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_30          <td></td>

          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>

          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>

        </tr>

        </tr>

        <tr>

        <tr>

          <td class="paramkey"></td>

          <td class="paramkey"></td>

          <td></td>

          <td></td>

          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>

          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>

        </tr>

        </tr>

<code> [Always Construct]</code></td>

<code> [Always Construct]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02666">2666</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02652">2652</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<div class="fragment"><pre class="fragment">

<div class="fragment"><pre class="fragment">

<a name="l02666"></a>02666 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a>) <span class="vhdlkeyword">begin</span>

<a name="l02652"></a>02652 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a>) <span class="vhdlkeyword">begin</span>

<a name="l02667"></a>02667     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02653"></a>02653     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02668"></a>02668         <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b1</span>, <span class="vhdllogic">2&#39;b0</span>, <span class="vhdllogic">3&#39;b111</span>, <span class="vhdllogic">8&#39;b0</span> };

<a name="l02654"></a>02654         <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> &lt;= <span class="vhdllogic">5&#39;d0</span>;

<a name="l02669"></a>02669         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;

<a name="l02655"></a>02655     <span class="vhdlkeyword">end</span>

<a name="l02670"></a>02670         <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b0</span>;

<a name="l02656"></a>02656     <span class="keyword">// Cycle #0 : load the registers</span>

<a name="l02671"></a>02671         <a class="code" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a> &lt;= <span class="vhdllogic">3&#39;b0</span>;

<a name="l02657"></a>02657     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02672"></a>02672         <a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02658"></a>02658         <span class="keyword">// 17 cycles to finish + wait state</span>

<a name="l02673"></a>02673     <span class="vhdlkeyword">end</span>

<a name="l02659"></a>02659         <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a>   &lt;= <span class="vhdllogic">5&#39;d18</span>;

<a name="l02674"></a>02674     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02660"></a>02660         <span class="keyword">// Clear the quotient</span>

<a name="l02675"></a>02675         <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#ab0c0bd4569a63b8d08b2e7a1d27cf177">alu_control</a>)

<a name="l02661"></a>02661         <a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a>    &lt;= <span class="vhdllogic">17&#39;d0</span>;

<a name="l02676"></a>02676             <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02662"></a>02662

<a name="l02677"></a>02677                 <a class="code" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a> &lt;= <a class="code" href="classalu.html#ab9e3f505c78e6c0b2340a5e1b364514b">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];

<a name="l02663"></a>02663         <span class="keyword">// Unsigned divide or positive numerator</span>

<a name="l02678"></a>02678                 <a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l02664"></a>02664         <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>]))    <a class="code" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l02679"></a>02679             <span class="vhdlkeyword">end</span>

<a name="l02665"></a>02665         <span class="keyword">// Negative numerator</span>

<a name="l02680"></a>02680

<a name="l02666"></a>02666         <span class="vhdlkeyword">else</span>                                        <a class="code" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> &lt;= -<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l02681"></a>02681             <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02667"></a>02667

<a name="l02682"></a>02682                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02668"></a>02668         <span class="keyword">// Unsigned divide or positive denominator</span>

<a name="l02683"></a>02683                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };

<a name="l02669"></a>02669         <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a>) || (!<a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>]))    <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> &lt;= {<a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};

<a name="l02670"></a>02670         <span class="keyword">// Negative denominator</span>

<a name="l02671"></a>02671         <span class="vhdlkeyword">else</span>                                        <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> &lt;= {-<a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};

<a name="l02672"></a>02672     <span class="vhdlkeyword">end</span>

<a name="l02673"></a>02673     <span class="keyword">// Cycles #1-17 : division calculation</span>

<a name="l02674"></a>02674     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> &gt; <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02675"></a>02675         <span class="keyword">// Check difference&#39;s sign</span>

<a name="l02676"></a>02676         <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a>[<span class="vhdllogic">32</span>]) <span class="vhdlkeyword">begin</span>

<a name="l02677"></a>02677           <span class="keyword">// Difference is positive : shift a one</span>

<a name="l02678"></a>02678           <a class="code" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a> &lt;= <a class="code" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02679"></a>02679           <a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> &lt;= {<a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b1</span>};

<a name="l02680"></a>02680         <span class="vhdlkeyword">end</span>

<a name="l02681"></a>02681         <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02682"></a>02682           <span class="keyword">// Difference is negative : shift a zero</span>

<a name="l02683"></a>02683           <a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a> &lt;= {<a class="code" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};

<a name="l02684"></a>02684                 <span class="vhdlkeyword">end</span>

<a name="l02684"></a>02684                 <span class="vhdlkeyword">end</span>

<a name="l02685"></a>02685                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02685"></a>02685         <span class="keyword">// Shift right divider</span>

<a name="l02686"></a>02686                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };

<a name="l02686"></a>02686         <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a> &lt;= {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};

<a name="l02687"></a>02687                 <span class="vhdlkeyword">end</span>

<a name="l02687"></a>02687         <span class="keyword">// Count one bit</span>

<a name="l02688"></a>02688                 <a class="code" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02688"></a>02688         <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> &lt;= <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;

<a name="l02689"></a>02689             <span class="vhdlkeyword">end</span>

<a name="l02689"></a>02689             <span class="vhdlkeyword">end</span>

<a name="l02690"></a>02690

<a name="l02690"></a>02690     <span class="keyword">// result read</span>

<a name="l02691"></a>02691             <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02691"></a>02691     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> == <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02692"></a>02692                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02692"></a>02692         <span class="keyword">// goto idle</span>

<a name="l02693"></a>02693                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02693"></a>02693         <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> &lt;= <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;

<a name="l02694"></a>02694                 <span class="keyword">//CCR: no change</span>

<a name="l02694"></a>02694     <span class="vhdlkeyword">end</span>

<a name="l02695"></a>02695             <span class="vhdlkeyword">end</span>

<a name="l02695"></a>02695             <span class="vhdlkeyword">end</span>

<a name="l02696"></a>02696             <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

</pre></div>

<a name="l02697"></a>02697                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

</div>

<a name="l02698"></a>02698                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

</div>

<a name="l02699"></a>02699                 <span class="keyword">//CCR: no change</span>

<a class="anchor" id="a04b10dc82e8a06c3856bfd16a7e18d06"></a><!-- doxytag: member="alu::ALWAYS_31" ref="a04b10dc82e8a06c3856bfd16a7e18d06" args="clock, reset_n" -->

<a name="l02700"></a>02700             <span class="vhdlkeyword">end</span>

<div class="memitem">

<a name="l02701"></a>02701             <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<div class="memproto">

<a name="l02702"></a>02702                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

      <table class="memname">

<a name="l02703"></a>02703                 <span class="keyword">//CCR: no change</span>

        <tr>

<a name="l02704"></a>02704             <span class="vhdlkeyword">end</span>

          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_31          <td></td>

<a name="l02705"></a>02705             <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>

<a name="l02706"></a>02706                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

        </tr>

<a name="l02707"></a>02707                 <span class="keyword">//CCR: no change</span>

        <tr>

<a name="l02708"></a>02708             <span class="vhdlkeyword">end</span>

          <td class="paramkey"></td>

<a name="l02709"></a>02709

          <td></td>

<a name="l02710"></a>02710

          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>

<a name="l02711"></a>02711             <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

        </tr>

<a name="l02712"></a>02712                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];

<code> [Always Construct]</code></td>

<a name="l02713"></a>02713                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];

        </tr>

<a name="l02714"></a>02714                 <span class="keyword">// CCR: no change</span>

      </table>

<a name="l02715"></a>02715             <span class="vhdlkeyword">end</span>

</div>

<a name="l02716"></a>02716             <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<div class="memdoc">

<a name="l02717"></a>02717                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];

<a name="l02718"></a>02718                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02807">2807</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<a name="l02719"></a>02719                 <span class="keyword">// CCR: no change</span>

<div class="fragment"><pre class="fragment">

<a name="l02720"></a>02720             <span class="vhdlkeyword">end</span>

<a name="l02807"></a>02807 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a>) <span class="vhdlkeyword">begin</span>

<a name="l02721"></a>02721             <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02808"></a>02808     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02722"></a>02722                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];

<a name="l02809"></a>02809         <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b1</span>, <span class="vhdllogic">2&#39;b0</span>, <span class="vhdllogic">3&#39;b111</span>, <span class="vhdllogic">8&#39;b0</span> };

<a name="l02723"></a>02723                 <span class="keyword">// CCR: no change</span>

<a name="l02810"></a>02810         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;

<a name="l02724"></a>02724             <span class="vhdlkeyword">end</span>

<a name="l02811"></a>02811         <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02725"></a>02725             <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02812"></a>02812         <a class="code" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a> &lt;= <span class="vhdllogic">3&#39;b0</span>;

<a name="l02726"></a>02726                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02813"></a>02813         <a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02727"></a>02727                 <span class="keyword">// CCR: no change</span>

<a name="l02814"></a>02814     <span class="vhdlkeyword">end</span>

<a name="l02728"></a>02728             <span class="vhdlkeyword">end</span>

<a name="l02815"></a>02815     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02729"></a>02729

<a name="l02816"></a>02816         <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a>)

<a name="l02730"></a>02730

<a name="l02817"></a>02817             <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02731"></a>02731

<a name="l02818"></a>02818                 <a class="code" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a> &lt;= <a class="code" href="classalu.html#aaec5e2b3f347a2651f6456b7d0dafe16">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];

<a name="l02732"></a>02732             <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02819"></a>02819                 <a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l02733"></a>02733                 <span class="keyword">// move operand1 with sign-extension to result</span>

<a name="l02820"></a>02820             <span class="vhdlkeyword">end</span>

<a name="l02734"></a>02734                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>

<a name="l02821"></a>02821

<a name="l02735"></a>02735                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };

<a name="l02822"></a>02822             <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02736"></a>02736                 <span class="vhdlkeyword">end</span>

<a name="l02823"></a>02823                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02737"></a>02737                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02824"></a>02824                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };

<a name="l02738"></a>02738                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;

<a name="l02825"></a>02825                 <span class="vhdlkeyword">end</span>

<a name="l02739"></a>02739                 <span class="vhdlkeyword">end</span>

<a name="l02826"></a>02826                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02740"></a>02740                 <span class="keyword">// CCR: no change</span>

<a name="l02827"></a>02827                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };

<a name="l02741"></a>02741             <span class="vhdlkeyword">end</span>

<a name="l02828"></a>02828                 <span class="vhdlkeyword">end</span>

<a name="l02742"></a>02742

<a name="l02829"></a>02829                 <a class="code" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02743"></a>02743             <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02830"></a>02830             <span class="vhdlkeyword">end</span>

<a name="l02744"></a>02744

<a name="l02745"></a>02745                 <span class="keyword">// OR,OR to mem,OR to Dn</span>

<a name="l02746"></a>02746                 <span class="vhdlkeyword">if</span>(         (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ||

<a name="l02747"></a>02747                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>)

<a name="l02748"></a>02748                 )             <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] | <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02749"></a>02749                 <span class="keyword">// AND,AND to mem,AND to Dn</span>

<a name="l02750"></a>02750                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b001</span>) ||

<a name="l02751"></a>02751                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span>)

<a name="l02752"></a>02752                 )             <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02753"></a>02753                 <span class="keyword">// EORI,EOR</span>

<a name="l02754"></a>02754                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b101</span>) ||

<a name="l02755"></a>02755                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>)

<a name="l02756"></a>02756                 )            <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02757"></a>02757                 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>

<a name="l02758"></a>02758                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b011</span>) ||

<a name="l02759"></a>02759                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>) ||

<a name="l02760"></a>02760                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)

<a name="l02761"></a>02761                 )             <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02762"></a>02762                 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>

<a name="l02763"></a>02763                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b010</span>) ||

<a name="l02764"></a>02764                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span>) ||

<a name="l02765"></a>02765                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>)     ||

<a name="l02766"></a>02766                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) ||

<a name="l02767"></a>02767                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>)) ||

<a name="l02768"></a>02768                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>)

<a name="l02769"></a>02769                 )            <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02770"></a>02770

<a name="l02771"></a>02771                 <span class="keyword">// Z</span>

<a name="l02772"></a>02772                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l02773"></a>02773                 <span class="keyword">// N</span>

<a name="l02774"></a>02774                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l02775"></a>02775

<a name="l02776"></a>02776                 <span class="keyword">// CMPI,CMPM,CMP</span>

<a name="l02777"></a>02777                 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span>) ||

<a name="l02778"></a>02778                     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>) ||

<a name="l02779"></a>02779                     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>))

<a name="l02780"></a>02780                 ) <span class="vhdlkeyword">begin</span>

<a name="l02781"></a>02781                     <span class="keyword">// C,V</span>

<a name="l02782"></a>02782                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02783"></a>02783                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02784"></a>02784                     <span class="keyword">// X not affected</span>

<a name="l02785"></a>02785                 <span class="vhdlkeyword">end</span>

<a name="l02786"></a>02786                 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>

<a name="l02787"></a>02787                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b011</span>) ||

<a name="l02788"></a>02788                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>) ||

<a name="l02789"></a>02789                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)

<a name="l02790"></a>02790                 ) <span class="vhdlkeyword">begin</span>

<a name="l02791"></a>02791                     <span class="keyword">// C,X,V</span>

<a name="l02792"></a>02792                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02793"></a>02793                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l02794"></a>02794                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02795"></a>02795                 <span class="vhdlkeyword">end</span>

<a name="l02796"></a>02796                 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>

<a name="l02797"></a>02797                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b010</span>) ||

<a name="l02798"></a>02798                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) ||

<a name="l02799"></a>02799                             (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>)

<a name="l02800"></a>02800                 ) <span class="vhdlkeyword">begin</span>

<a name="l02801"></a>02801                     <span class="keyword">// C,X,V</span>

<a name="l02802"></a>02802                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02803"></a>02803                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l02804"></a>02804                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02805"></a>02805                 <span class="vhdlkeyword">end</span>

<a name="l02806"></a>02806                 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>

<a name="l02807"></a>02807                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02808"></a>02808                     <span class="keyword">// C,V</span>

<a name="l02809"></a>02809                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02810"></a>02810                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02811"></a>02811                     <span class="keyword">// X not affected</span>

<a name="l02812"></a>02812                 <span class="vhdlkeyword">end</span>

<a name="l02813"></a>02813             <span class="vhdlkeyword">end</span>

<a name="l02814"></a>02814

<a name="l02815"></a>02815             <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 259 LE</span>

<a name="l02816"></a>02816                 <span class="keyword">// ABCD</span>

<a name="l02817"></a>02817                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span> ) <span class="vhdlkeyword">begin</span>

<a name="l02818"></a>02818                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4&#39;b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02819"></a>02819                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};

<a name="l02820"></a>02820

<a name="l02821"></a>02821                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02822"></a>02822

<a name="l02823"></a>02823                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];

<a name="l02824"></a>02824                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h1F</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d2</span>) :

<a name="l02825"></a>02825                                     (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h0F</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d1</span>) :

<a name="l02826"></a>02826                                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02827"></a>02827                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02828"></a>02828

<a name="l02829"></a>02829                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];

<a name="l02830"></a>02830                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];

<a name="l02831"></a>02831

<a name="l02831"></a>02831

<a name="l02832"></a>02832                     <span class="keyword">// C</span>

<a name="l02832"></a>02832             <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02833"></a>02833                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02833"></a>02833                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02834"></a>02834                     <span class="keyword">// X = C</span>

<a name="l02834"></a>02834                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02835"></a>02835                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02835"></a>02835                 <span class="keyword">//CCR: no change</span>

<a name="l02836"></a>02836

<a name="l02836"></a>02836             <span class="vhdlkeyword">end</span>

<a name="l02837"></a>02837                     <span class="keyword">// V</span>

<a name="l02837"></a>02837             <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02838"></a>02838                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02838"></a>02838                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02839"></a>02839                 <span class="vhdlkeyword">end</span>

<a name="l02839"></a>02839                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02840"></a>02840                 <span class="keyword">// SBCD</span>

<a name="l02840"></a>02840                 <span class="keyword">//CCR: no change</span>

<a name="l02841"></a>02841                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l02841"></a>02841             <span class="vhdlkeyword">end</span>

<a name="l02842"></a>02842

<a name="l02842"></a>02842             <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02843"></a>02843                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5&#39;b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02843"></a>02843                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02844"></a>02844                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};

<a name="l02844"></a>02844                 <span class="keyword">//CCR: no change</span>

<a name="l02845"></a>02845

<a name="l02845"></a>02845             <span class="vhdlkeyword">end</span>

<a name="l02846"></a>02846                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02846"></a>02846             <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02847"></a>02847

<a name="l02847"></a>02847                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02848"></a>02848                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];

<a name="l02848"></a>02848                 <span class="keyword">//CCR: no change</span>

<a name="l02849"></a>02849                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d16</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d2</span>) :

<a name="l02849"></a>02849             <span class="vhdlkeyword">end</span>

<a name="l02850"></a>02850                                     (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d1</span>) :

<a name="l02850"></a>02850

<a name="l02851"></a>02851                                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02851"></a>02851

<a name="l02852"></a>02852                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span> &amp;&amp; <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02852"></a>02852             <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02853"></a>02853

<a name="l02853"></a>02853                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];

<a name="l02854"></a>02854                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];

<a name="l02854"></a>02854                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];

<a name="l02855"></a>02855                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];

<a name="l02855"></a>02855                 <span class="keyword">// CCR: no change</span>

<a name="l02856"></a>02856

<a name="l02856"></a>02856             <span class="vhdlkeyword">end</span>

<a name="l02857"></a>02857                     <span class="keyword">// C</span>

<a name="l02857"></a>02857             <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02858"></a>02858                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02858"></a>02858                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>)   <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];

<a name="l02859"></a>02859                     <span class="keyword">// X = C</span>

<a name="l02859"></a>02859                 <span class="vhdlkeyword">else</span>                <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02860"></a>02860                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02860"></a>02860                 <span class="keyword">// CCR: no change</span>

<a name="l02861"></a>02861

<a name="l02861"></a>02861             <span class="vhdlkeyword">end</span>

<a name="l02862"></a>02862                     <span class="keyword">// V</span>

<a name="l02862"></a>02862             <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02863"></a>02863                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02863"></a>02863                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];

<a name="l02864"></a>02864                 <span class="vhdlkeyword">end</span>

<a name="l02864"></a>02864                 <span class="keyword">// CCR: no change</span>

<a name="l02865"></a>02865                 <span class="keyword">// ADDX</span>

<a name="l02865"></a>02865             <span class="vhdlkeyword">end</span>

<a name="l02866"></a>02866                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];

<a name="l02866"></a>02866             <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02867"></a>02867                 <span class="keyword">// SUBX</span>

<a name="l02867"></a>02867                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02868"></a>02868                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];

<a name="l02868"></a>02868                 <span class="keyword">// CCR: no change</span>

<a name="l02869"></a>02869

<a name="l02869"></a>02869             <span class="vhdlkeyword">end</span>

<a name="l02870"></a>02870                 <span class="keyword">// Z</span>

<a name="l02870"></a>02870

<a name="l02871"></a>02871                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l02871"></a>02871

<a name="l02872"></a>02872                 <span class="keyword">// N</span>

<a name="l02872"></a>02872

<a name="l02873"></a>02873                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l02873"></a>02873             <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02874"></a>02874

<a name="l02874"></a>02874                 <span class="keyword">// move operand1 with sign-extension to result</span>

<a name="l02875"></a>02875                 <span class="keyword">// ADDX</span>

<a name="l02875"></a>02875                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02876"></a>02876                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <span class="vhdlkeyword">begin</span>

<a name="l02876"></a>02876                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };

<a name="l02877"></a>02877                     <span class="keyword">// C,X,V</span>

<a name="l02877"></a>02877                 <span class="vhdlkeyword">end</span>

<a name="l02878"></a>02878                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02878"></a>02878                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02879"></a>02879                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l02879"></a>02879                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l02880"></a>02880                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02880"></a>02880                 <span class="vhdlkeyword">end</span>

<a name="l02881"></a>02881                 <span class="vhdlkeyword">end</span>

<a name="l02881"></a>02881                 <span class="keyword">// CCR: no change</span>

<a name="l02882"></a>02882                 <span class="keyword">// SUBX</span>

<a name="l02882"></a>02882             <span class="vhdlkeyword">end</span>

<a name="l02883"></a>02883                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <span class="vhdlkeyword">begin</span>

<a name="l02883"></a>02883

<a name="l02884"></a>02884                     <span class="keyword">// C,X,V</span>

<a name="l02884"></a>02884             <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02885"></a>02885                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02885"></a>02885

<a name="l02886"></a>02886                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l02886"></a>02886                 <span class="keyword">// OR,OR to mem,OR to Dn</span>

<a name="l02887"></a>02887                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l02887"></a>02887                 <span class="vhdlkeyword">if</span>(         (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ||

<a name="l02888"></a>02888                 <span class="vhdlkeyword">end</span>

<a name="l02888"></a>02888                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>)

<a name="l02889"></a>02889             <span class="vhdlkeyword">end</span>

<a name="l02889"></a>02889                 )             <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] | <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02890"></a>02890

<a name="l02890"></a>02890                 <span class="keyword">// AND,AND to mem,AND to Dn</span>

<a name="l02891"></a>02891             <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02891"></a>02891                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b001</span>) ||

<a name="l02892"></a>02892

<a name="l02892"></a>02892                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span>)

<a name="l02893"></a>02893                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b00</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l02893"></a>02893                 )             <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02894"></a>02894                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b01</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];

<a name="l02894"></a>02894                 <span class="keyword">// EORI,EOR</span>

<a name="l02895"></a>02895                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b10</span>) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02895"></a>02895                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b101</span>) ||

<a name="l02896"></a>02896

<a name="l02896"></a>02896                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>)

<a name="l02897"></a>02897                 <span class="keyword">// X for ASL</span>

<a name="l02897"></a>02897                 )            <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02898"></a>02898                 <span class="keyword">//if(operand2[5:0] &gt; 6&#39;b0 &amp;&amp; ir[8] == 1&#39;b1 &amp;&amp; ((ir[7:6] == 2&#39;b11 &amp;&amp; ir[10:9] == 2&#39;b00) || (ir[7:6] != 2&#39;b11 &amp;&amp; ir[4:3] == 2&#39;b00)) ) begin</span>

<a name="l02898"></a>02898                 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>

<a name="l02899"></a>02899                     <span class="keyword">// X set to Dm</span>

<a name="l02899"></a>02899                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b011</span>) ||

<a name="l02900"></a>02900                 <span class="keyword">//    sr[4] &lt;= `Dm;</span>

<a name="l02900"></a>02900                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>) ||

<a name="l02901"></a>02901                 <span class="keyword">//end</span>

<a name="l02901"></a>02901                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)

<a name="l02902"></a>02902                 <span class="keyword">// else X not affected</span>

<a name="l02902"></a>02902                 )             <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02903"></a>02903

<a name="l02903"></a>02903                 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>

<a name="l02904"></a>02904                 <span class="keyword">// V cleared</span>

<a name="l02904"></a>02904                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b010</span>) ||

<a name="l02905"></a>02905                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02905"></a>02905                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span>) ||

<a name="l02906"></a>02906                 <span class="keyword">// C for ROXL,ROXR: set to X</span>

<a name="l02906"></a>02906                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>)     ||

<a name="l02907"></a>02907                 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>) ) <span class="vhdlkeyword">begin</span>

<a name="l02907"></a>02907                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) ||

<a name="l02908"></a>02908                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];

<a name="l02908"></a>02908                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>)) ||

<a name="l02909"></a>02909                 <span class="vhdlkeyword">end</span>

<a name="l02909"></a>02909                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>)

<a name="l02910"></a>02910                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02910"></a>02910                 )            <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l02911"></a>02911                     <span class="keyword">// C cleared</span>

<a name="l02911"></a>02911

<a name="l02912"></a>02912                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02912"></a>02912                 <span class="keyword">// Z</span>

<a name="l02913"></a>02913                 <span class="vhdlkeyword">end</span>

<a name="l02913"></a>02913                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l02914"></a>02914

<a name="l02914"></a>02914                 <span class="keyword">// N</span>

<a name="l02915"></a>02915                 <span class="keyword">// N set</span>

<a name="l02915"></a>02915                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l02916"></a>02916                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l02916"></a>02916

<a name="l02917"></a>02917                 <span class="keyword">// Z set</span>

<a name="l02917"></a>02917                 <span class="keyword">// CMPI,CMPM,CMP</span>

<a name="l02918"></a>02918                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l02918"></a>02918                 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span>) ||

<a name="l02919"></a>02919             <span class="vhdlkeyword">end</span>

<a name="l02919"></a>02919                     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>) ||

<a name="l02920"></a>02920

<a name="l02920"></a>02920                     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>))

<a name="l02921"></a>02921             <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l02921"></a>02921                 ) <span class="vhdlkeyword">begin</span>

<a name="l02922"></a>02922

<a name="l02922"></a>02922                     <span class="keyword">// C,V</span>

<a name="l02923"></a>02923                 <span class="keyword">// ASL</span>

<a name="l02923"></a>02923                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l02924"></a>02924                 <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02924"></a>02924                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l02925"></a>02925                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};

<a name="l02925"></a>02925                     <span class="keyword">// X not affected</span>

<a name="l02926"></a>02926

<a name="l02926"></a>02926                 <span class="vhdlkeyword">end</span>

<a name="l02927"></a>02927                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">// V</span>

<a name="l02927"></a>02927                 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>

<a name="l02928"></a>02928                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l02928"></a>02928                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b011</span>) ||

<a name="l02929"></a>02929                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// X</span>

<a name="l02929"></a>02929                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>) ||

<a name="l02930"></a>02930                 <span class="vhdlkeyword">end</span>

<a name="l02930"></a>02930                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)

<a name="l02931"></a>02931                 <span class="keyword">// LSL</span>

<a name="l02931"></a>02931                 ) <span class="vhdlkeyword">begin</span>

<a name="l02932"></a>02932                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02932"></a>02932                     <span class="keyword">// C,X,V</span>

<a name="l02933"></a>02933                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};

<a name="l02933"></a>02933                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l02934"></a>02934

<a name="l02934"></a>02934                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l02935"></a>02935                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02935"></a>02935                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l02936"></a>02936                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l02936"></a>02936                 <span class="vhdlkeyword">end</span>

<a name="l02937"></a>02937                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// X</span>

<a name="l02937"></a>02937                 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>

<a name="l02938"></a>02938                 <span class="vhdlkeyword">end</span>

<a name="l02938"></a>02938                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b010</span>) ||

<a name="l02939"></a>02939                 <span class="keyword">// ROL</span>

<a name="l02939"></a>02939                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) ||

<a name="l02940"></a>02940                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02940"></a>02940                             (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>)

<a name="l02941"></a>02941                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>};

<a name="l02941"></a>02941                 ) <span class="vhdlkeyword">begin</span>

<a name="l02942"></a>02942

<a name="l02942"></a>02942                     <span class="keyword">// C,X,V</span>

<a name="l02943"></a>02943                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02943"></a>02943                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l02944"></a>02944                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l02944"></a>02944                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l02945"></a>02945                                             <span class="keyword">// X not affected</span>

<a name="l02945"></a>02945                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l02946"></a>02946                 <span class="vhdlkeyword">end</span>

<a name="l02946"></a>02946                 <span class="vhdlkeyword">end</span>

<a name="l02947"></a>02947                 <span class="keyword">// ROXL</span>

<a name="l02947"></a>02947                 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>

<a name="l02948"></a>02948                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l02948"></a>02948                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l02949"></a>02949                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02949"></a>02949                     <span class="keyword">// C,V</span>

<a name="l02950"></a>02950

<a name="l02950"></a>02950                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02951"></a>02951                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02951"></a>02951                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l02952"></a>02952                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l02952"></a>02952                     <span class="keyword">// X not affected</span>

<a name="l02953"></a>02953                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// X</span>

<a name="l02953"></a>02953                 <span class="vhdlkeyword">end</span>

<a name="l02954"></a>02954                 <span class="vhdlkeyword">end</span>

<a name="l02954"></a>02954                 <span class="vhdlkeyword">end</span>

<a name="l02955"></a>02955                 <span class="keyword">// ASR</span>

<a name="l02955"></a>02955

<a name="l02956"></a>02956                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02956"></a>02956             <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 259 LE</span>

<a name="l02957"></a>02957                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b00</span>)         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };

<a name="l02957"></a>02957                 <span class="keyword">// ABCD</span>

<a name="l02958"></a>02958                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b01</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };

<a name="l02958"></a>02958                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span> ) <span class="vhdlkeyword">begin</span>

<a name="l02959"></a>02959                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b10</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };

<a name="l02959"></a>02959                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4&#39;b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02960"></a>02960

<a name="l02960"></a>02960                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};

<a name="l02961"></a>02961                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02961"></a>02961

<a name="l02962"></a>02962                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l02962"></a>02962                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02963"></a>02963                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// X</span>

<a name="l02963"></a>02963

<a name="l02964"></a>02964                 <span class="vhdlkeyword">end</span>

<a name="l02964"></a>02964                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];

<a name="l02965"></a>02965                 <span class="keyword">// LSR</span>

<a name="l02965"></a>02965                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h1F</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d2</span>) :

<a name="l02966"></a>02966                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02966"></a>02966                                     (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h0F</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d1</span>) :

<a name="l02967"></a>02967                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b00</span>)         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };

<a name="l02967"></a>02967                                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02968"></a>02968                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b01</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };

<a name="l02968"></a>02968                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02969"></a>02969                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b10</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };

<a name="l02969"></a>02969

<a name="l02970"></a>02970

<a name="l02970"></a>02970                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];

<a name="l02971"></a>02971                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02971"></a>02971                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];

<a name="l02972"></a>02972                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l02972"></a>02972

<a name="l02973"></a>02973                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// X</span>

<a name="l02973"></a>02973                     <span class="keyword">// C</span>

<a name="l02974"></a>02974                 <span class="vhdlkeyword">end</span>

<a name="l02974"></a>02974                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02975"></a>02975                 <span class="keyword">// ROR</span>

<a name="l02975"></a>02975                     <span class="keyword">// X = C</span>

<a name="l02976"></a>02976                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02976"></a>02976                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02977"></a>02977                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b00</span>)         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };

<a name="l02977"></a>02977

<a name="l02978"></a>02978                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b01</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };

<a name="l02978"></a>02978                     <span class="keyword">// V</span>

<a name="l02979"></a>02979                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b10</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };

<a name="l02979"></a>02979                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l02980"></a>02980

<a name="l02980"></a>02980                 <span class="vhdlkeyword">end</span>

<a name="l02981"></a>02981                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02981"></a>02981                 <span class="keyword">// SBCD</span>

<a name="l02982"></a>02982                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l02982"></a>02982                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l02983"></a>02983                     <span class="keyword">// X not affected</span>

<a name="l02983"></a>02983

<a name="l02984"></a>02984                 <span class="vhdlkeyword">end</span>

<a name="l02984"></a>02984                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5&#39;b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02985"></a>02985                 <span class="keyword">// ROXR</span>

<a name="l02985"></a>02985                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};

<a name="l02986"></a>02986                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l02986"></a>02986

<a name="l02987"></a>02987                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b00</span>)         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>]};

<a name="l02987"></a>02987                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l02988"></a>02988                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b01</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>]};

<a name="l02988"></a>02988

<a name="l02989"></a>02989                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a> == <span class="vhdllogic">2&#39;b10</span>)    <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};

<a name="l02989"></a>02989                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];

<a name="l02990"></a>02990

<a name="l02990"></a>02990                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d16</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d2</span>) :

<a name="l02991"></a>02991                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l02991"></a>02991                                     (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d1</span>) :

<a name="l02992"></a>02992                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l02992"></a>02992                                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02993"></a>02993                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// X</span>

<a name="l02993"></a>02993                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span> &amp;&amp; <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];

<a name="l02994"></a>02994                 <span class="vhdlkeyword">end</span>

<a name="l02994"></a>02994

<a name="l02995"></a>02995

<a name="l02995"></a>02995                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];

<a name="l02996"></a>02996                 <span class="keyword">// N set</span>

<a name="l02996"></a>02996                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];

<a name="l02997"></a>02997                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l02997"></a>02997

<a name="l02998"></a>02998                 <span class="keyword">// Z set</span>

<a name="l02998"></a>02998                     <span class="keyword">// C</span>

<a name="l02999"></a>02999                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l02999"></a>02999                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l03000"></a>03000             <span class="vhdlkeyword">end</span>

<a name="l03000"></a>03000                     <span class="keyword">// X = C</span>

<a name="l03001"></a>03001

<a name="l03001"></a>03001                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l03002"></a>03002             <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03002"></a>03002

<a name="l03003"></a>03003                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;

<a name="l03003"></a>03003                     <span class="keyword">// V</span>

<a name="l03004"></a>03004

<a name="l03004"></a>03004                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;

<a name="l03005"></a>03005                 <span class="keyword">// X not affected</span>

<a name="l03005"></a>03005                 <span class="vhdlkeyword">end</span>

<a name="l03006"></a>03006                 <span class="keyword">// C cleared</span>

<a name="l03006"></a>03006                 <span class="keyword">// ADDX</span>

<a name="l03007"></a>03007                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03007"></a>03007                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>];

<a name="l03008"></a>03008                 <span class="keyword">// V cleared</span>

<a name="l03008"></a>03008                 <span class="keyword">// SUBX</span>

<a name="l03009"></a>03009                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03009"></a>03009                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>];

<a name="l03010"></a>03010

<a name="l03010"></a>03010

<a name="l03011"></a>03011                 <span class="keyword">// N set</span>

<a name="l03011"></a>03011                 <span class="keyword">// Z</span>

<a name="l03012"></a>03012                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03012"></a>03012                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03013"></a>03013                 <span class="keyword">// Z set</span>

<a name="l03013"></a>03013                 <span class="keyword">// N</span>

<a name="l03014"></a>03014                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l03014"></a>03014                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03015"></a>03015             <span class="vhdlkeyword">end</span>

<a name="l03015"></a>03015

<a name="l03016"></a>03016

<a name="l03016"></a>03016                 <span class="keyword">// ADDX</span>

<a name="l03017"></a>03017             <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03017"></a>03017                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03018"></a>03018                 <span class="keyword">// ADDA: 1101</span>

<a name="l03018"></a>03018                     <span class="keyword">// C,X,V</span>

<a name="l03019"></a>03019                 <span class="keyword">// CMPA: 1011</span>

<a name="l03019"></a>03019                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l03020"></a>03020                 <span class="keyword">// SUBA: 1001</span>

<a name="l03020"></a>03020                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l03021"></a>03021                 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>

<a name="l03021"></a>03021                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l03022"></a>03022                 <span class="keyword">// operation requires that operand2 was sign extended</span>

<a name="l03022"></a>03022                 <span class="vhdlkeyword">end</span>

<a name="l03023"></a>03023

<a name="l03023"></a>03023                 <span class="keyword">// SUBX</span>

<a name="l03024"></a>03024                 <span class="keyword">// ADDA,ADDQ</span>

<a name="l03024"></a>03024                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03025"></a>03025                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) )

<a name="l03025"></a>03025                     <span class="keyword">// C,X,V</span>

<a name="l03026"></a>03026                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03026"></a>03026                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l03027"></a>03027                 <span class="keyword">// SUBA,CMPA,SUBQ</span>

<a name="l03027"></a>03027                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>

<a name="l03028"></a>03028                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> || (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) )

<a name="l03028"></a>03028                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l03029"></a>03029                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03029"></a>03029                 <span class="vhdlkeyword">end</span>

<a name="l03030"></a>03030

<a name="l03030"></a>03030             <span class="vhdlkeyword">end</span>

<a name="l03031"></a>03031                 <span class="keyword">// for CMPA</span>

<a name="l03031"></a>03031

<a name="l03032"></a>03032                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03032"></a>03032             <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03033"></a>03033                     <span class="keyword">// Z</span>

<a name="l03033"></a>03033

<a name="l03034"></a>03034                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l03034"></a>03034                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>)         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];

<a name="l03035"></a>03035                     <span class="keyword">// N</span>

<a name="l03035"></a>03035                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];

<a name="l03036"></a>03036                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03036"></a>03036                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03037"></a>03037

<a name="l03037"></a>03037

<a name="l03038"></a>03038                     <span class="keyword">// C,V</span>

<a name="l03038"></a>03038                 <span class="keyword">// X for ASL</span>

<a name="l03039"></a>03039                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l03039"></a>03039                 <span class="keyword">//if(operand2[5:0] &gt; 6&#39;b0 &amp;&amp; ir[8] == 1&#39;b1 &amp;&amp; ((ir[7:6] == 2&#39;b11 &amp;&amp; ir[10:9] == 2&#39;b00) || (ir[7:6] != 2&#39;b11 &amp;&amp; ir[4:3] == 2&#39;b00)) ) begin</span>

<a name="l03040"></a>03040                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>);

<a name="l03040"></a>03040                     <span class="keyword">// X set to Dm</span>

<a name="l03041"></a>03041                     <span class="keyword">// X not affected</span>

<a name="l03041"></a>03041                 <span class="keyword">//    sr[4] &lt;= `Dm;</span>

<a name="l03042"></a>03042                 <span class="vhdlkeyword">end</span>

<a name="l03042"></a>03042                 <span class="keyword">//end</span>

<a name="l03043"></a>03043                 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>

<a name="l03043"></a>03043                 <span class="keyword">// else X not affected</span>

<a name="l03044"></a>03044             <span class="vhdlkeyword">end</span>

<a name="l03044"></a>03044

<a name="l03045"></a>03045

<a name="l03045"></a>03045                 <span class="keyword">// V cleared</span>

<a name="l03046"></a>03046             <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03046"></a>03046                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03047"></a>03047                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];

<a name="l03047"></a>03047                 <span class="keyword">// C for ROXL,ROXR: set to X</span>

<a name="l03048"></a>03048

<a name="l03048"></a>03048                 <span class="vhdlkeyword">if</span>( (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>) ) <span class="vhdlkeyword">begin</span>

<a name="l03049"></a>03049                 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>

<a name="l03049"></a>03049                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>];

<a name="l03050"></a>03050                 <span class="keyword">//sr[2] &lt;= (operand1[15:0] == 16&#39;b0) ? 1&#39;b1 : 1&#39;b0;</span>

<a name="l03050"></a>03050                 <span class="vhdlkeyword">end</span>

<a name="l03051"></a>03051                 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>

<a name="l03051"></a>03051                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l03052"></a>03052                 <span class="keyword">//sr[0] &lt;= 1&#39;b0;</span>

<a name="l03052"></a>03052                     <span class="keyword">// C cleared</span>

<a name="l03053"></a>03053                 <span class="keyword">//sr[1] &lt;= 1&#39;b0;</span>

<a name="l03053"></a>03053                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03054"></a>03054

<a name="l03054"></a>03054                 <span class="vhdlkeyword">end</span>

<a name="l03055"></a>03055                 <span class="keyword">// C,X,V</span>

<a name="l03055"></a>03055

<a name="l03056"></a>03056                 <span class="keyword">//    sr[0] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm);</span>

<a name="l03056"></a>03056                 <span class="keyword">// N set</span>

<a name="l03057"></a>03057                 <span class="keyword">//    sr[4] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm); //=ccr[0];</span>

<a name="l03057"></a>03057                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03058"></a>03058                 <span class="keyword">//    sr[1] &lt;= (~`Sm &amp; `Dm &amp; ~`Rm) | (`Sm &amp; ~`Dm &amp; `Rm);</span>

<a name="l03058"></a>03058                 <span class="keyword">// Z set</span>

<a name="l03059"></a>03059                 <span class="keyword">// +: 0-1,    0-0=0, 1-1=0</span>

<a name="l03059"></a>03059                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03060"></a>03060                 <span class="keyword">// -: 0-0=1,  1-0,   1-1=1</span>

<a name="l03060"></a>03060             <span class="vhdlkeyword">end</span>

<a name="l03061"></a>03061                 <span class="keyword">// operand1 - operand2 &gt; 0</span>

<a name="l03061"></a>03061

<a name="l03062"></a>03062                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &amp;&amp; ((~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03062"></a>03062             <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03063"></a>03063                     <span class="keyword">// clear N</span>

<a name="l03063"></a>03063

<a name="l03064"></a>03064                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03064"></a>03064                 <span class="keyword">// ASL</span>

<a name="l03065"></a>03065                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b01</span>;

<a name="l03065"></a>03065                 <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l03066"></a>03066                 <span class="vhdlkeyword">end</span>

<a name="l03066"></a>03066                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};

<a name="l03067"></a>03067                 <span class="keyword">// operand1 &lt; 0</span>

<a name="l03067"></a>03067

<a name="l03068"></a>03068                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03068"></a>03068                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">// V</span>

<a name="l03069"></a>03069                     <span class="keyword">// set N</span>

<a name="l03069"></a>03069                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l03070"></a>03070                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03070"></a>03070                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// X</span>

<a name="l03071"></a>03071                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b01</span>;

<a name="l03071"></a>03071                 <span class="vhdlkeyword">end</span>

<a name="l03072"></a>03072                 <span class="vhdlkeyword">end</span>

<a name="l03072"></a>03072                 <span class="keyword">// LSL</span>

<a name="l03073"></a>03073                 <span class="keyword">// no trap</span>

<a name="l03073"></a>03073                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l03074"></a>03074                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l03074"></a>03074                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};

<a name="l03075"></a>03075                     <span class="keyword">// N undefined: not affected</span>

<a name="l03075"></a>03075

<a name="l03076"></a>03076                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b00</span>;

<a name="l03076"></a>03076                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03077"></a>03077                 <span class="vhdlkeyword">end</span>

<a name="l03077"></a>03077                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l03078"></a>03078

<a name="l03078"></a>03078                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// X</span>

<a name="l03079"></a>03079                 <span class="keyword">// X not affected</span>

<a name="l03079"></a>03079                 <span class="vhdlkeyword">end</span>

<a name="l03080"></a>03080             <span class="vhdlkeyword">end</span>

<a name="l03080"></a>03080                 <span class="keyword">// ROL</span>

<a name="l03081"></a>03081

<a name="l03081"></a>03081                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l03082"></a>03082             <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 2206 LE, 106 MHz</span>

<a name="l03082"></a>03082                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>};

<a name="l03083"></a>03083

<a name="l03083"></a>03083

<a name="l03084"></a>03084                 <span class="keyword">// division by 0</span>

<a name="l03084"></a>03084                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03085"></a>03085                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03085"></a>03085                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l03086"></a>03086                     <span class="keyword">// X not affected</span>

<a name="l03086"></a>03086                     <span class="keyword">// X not affected</span>

<a name="l03087"></a>03087                     <span class="keyword">// C cleared</span>

<a name="l03087"></a>03087                 <span class="vhdlkeyword">end</span>

<a name="l03088"></a>03088                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03088"></a>03088                 <span class="keyword">// ROXL</span>

<a name="l03089"></a>03089                     <span class="keyword">// V,Z,N undefined: cleared</span>

<a name="l03089"></a>03089                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l03090"></a>03090                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03090"></a>03090                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>]};

<a name="l03091"></a>03091                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03091"></a>03091

<a name="l03092"></a>03092                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03092"></a>03092                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03093"></a>03093

<a name="l03093"></a>03093                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// C</span>

<a name="l03094"></a>03094                     <span class="keyword">// set trap</span>

<a name="l03094"></a>03094                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>;           <span class="keyword">// X</span>

<a name="l03095"></a>03095                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b01</span>;

<a name="l03095"></a>03095                 <span class="vhdlkeyword">end</span>

<a name="l03096"></a>03096                 <span class="vhdlkeyword">end</span>

<a name="l03096"></a>03096                 <span class="keyword">// ASR</span>

<a name="l03097"></a>03097                 <span class="keyword">// division overflow: divu, divs</span>

<a name="l03097"></a>03097                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03098"></a>03098                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) &amp;&amp; (<a class="code" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] != <span class="vhdllogic">16&#39;d0</span>)) ||

<a name="l03098"></a>03098                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>)         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };

<a name="l03099"></a>03099                             ((<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) &amp;&amp; (<a class="code" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] != {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a>[<span class="vhdllogic">15</span>]}}))

<a name="l03099"></a>03099                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };

<a name="l03100"></a>03100                 ) <span class="vhdlkeyword">begin</span>

<a name="l03100"></a>03100                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };

<a name="l03101"></a>03101                     <span class="keyword">// X not affected</span>

<a name="l03101"></a>03101

<a name="l03102"></a>03102                     <span class="keyword">// C cleared</span>

<a name="l03102"></a>03102                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03103"></a>03103                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03103"></a>03103                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l03104"></a>03104                     <span class="keyword">// V set</span>

<a name="l03104"></a>03104                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// X</span>

<a name="l03105"></a>03105                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03105"></a>03105                 <span class="vhdlkeyword">end</span>

<a name="l03106"></a>03106                     <span class="keyword">// Z,N undefined: cleared and set</span>

<a name="l03106"></a>03106                 <span class="keyword">// LSR</span>

<a name="l03107"></a>03107                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03107"></a>03107                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03108"></a>03108                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03108"></a>03108                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>)         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };

<a name="l03109"></a>03109

<a name="l03109"></a>03109                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };

<a name="l03110"></a>03110                     <span class="keyword">// set trap</span>

<a name="l03110"></a>03110                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };

<a name="l03111"></a>03111                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b10</span>;

<a name="l03111"></a>03111

<a name="l03112"></a>03112                 <span class="vhdlkeyword">end</span>

<a name="l03112"></a>03112                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03113"></a>03113                 <span class="keyword">// division</span>

<a name="l03113"></a>03113                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l03114"></a>03114                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03114"></a>03114                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// X</span>

<a name="l03115"></a>03115                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)? {<a class="code" href="classalu.html#a8cef22afb37b55eea85eda4c20f9b1b7">divu_remainder</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>]} : {<a class="code" href="classalu.html#a0723b9ed6da6c9a2d2b68b36563b42e3">divs_remainder</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>]};

<a name="l03115"></a>03115                 <span class="vhdlkeyword">end</span>

<a name="l03116"></a>03116

<a name="l03116"></a>03116                 <span class="keyword">// ROR</span>

<a name="l03117"></a>03117                     <span class="keyword">// X not affected</span>

<a name="l03117"></a>03117                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03118"></a>03118                     <span class="keyword">// C cleared</span>

<a name="l03118"></a>03118                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>)         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>] };

<a name="l03119"></a>03119                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03119"></a>03119                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };

<a name="l03120"></a>03120                     <span class="keyword">// V cleared</span>

<a name="l03120"></a>03120                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>] };

<a name="l03121"></a>03121                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03121"></a>03121

<a name="l03122"></a>03122                     <span class="keyword">// Z</span>

<a name="l03122"></a>03122                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03123"></a>03123                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) : (<a class="code" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>);

<a name="l03123"></a>03123                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l03124"></a>03124                     <span class="keyword">// N</span>

<a name="l03124"></a>03124                     <span class="keyword">// X not affected</span>

<a name="l03125"></a>03125                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>) : (<a class="code" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>);

<a name="l03125"></a>03125                 <span class="vhdlkeyword">end</span>

<a name="l03126"></a>03126

<a name="l03126"></a>03126                 <span class="keyword">// ROXR</span>

<a name="l03127"></a>03127                     <span class="keyword">// set trap</span>

<a name="l03127"></a>03127                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03128"></a>03128                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b00</span>;

<a name="l03128"></a>03128                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>)         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>]};

<a name="l03129"></a>03129                 <span class="vhdlkeyword">end</span>

<a name="l03129"></a>03129                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>]};

<a name="l03130"></a>03130                 <span class="keyword">// multiplication</span>

<a name="l03130"></a>03130                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)    <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};

<a name="l03131"></a>03131                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03131"></a>03131

<a name="l03132"></a>03132                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)? <a class="code" href="classalu.html#a23c8e6648d0b07c6593402658bf83095">mulu_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : <a class="code" href="classalu.html#a37551519218b05f156135f78f2ee2fe1">muls_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03132"></a>03132                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;          <span class="keyword">// V</span>

<a name="l03133"></a>03133

<a name="l03133"></a>03133                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// C</span>

<a name="l03134"></a>03134                     <span class="keyword">// X not affected</span>

<a name="l03134"></a>03134                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">0</span>];   <span class="keyword">// X</span>

<a name="l03135"></a>03135                     <span class="keyword">// C cleared</span>

<a name="l03135"></a>03135                 <span class="vhdlkeyword">end</span>

<a name="l03136"></a>03136                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03136"></a>03136

<a name="l03137"></a>03137                     <span class="keyword">// V cleared</span>

<a name="l03137"></a>03137                 <span class="keyword">// N set</span>

<a name="l03138"></a>03138                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03138"></a>03138                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03139"></a>03139                     <span class="keyword">// Z</span>

<a name="l03139"></a>03139                 <span class="keyword">// Z set</span>

<a name="l03140"></a>03140                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a23c8e6648d0b07c6593402658bf83095">mulu_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>) : (<a class="code" href="classalu.html#a37551519218b05f156135f78f2ee2fe1">muls_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>);

<a name="l03140"></a>03140                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03141"></a>03141                     <span class="keyword">// N</span>

<a name="l03141"></a>03141             <span class="vhdlkeyword">end</span>

<a name="l03142"></a>03142                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a23c8e6648d0b07c6593402658bf83095">mulu_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) : (<a class="code" href="classalu.html#a37551519218b05f156135f78f2ee2fe1">muls_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>);

<a name="l03142"></a>03142

<a name="l03143"></a>03143

<a name="l03143"></a>03143             <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03144"></a>03144                     <span class="keyword">// set trap</span>

<a name="l03144"></a>03144                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l03145"></a>03145                     <a class="code" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a> &lt;= <span class="vhdllogic">2&#39;b00</span>;

<a name="l03145"></a>03145

<a name="l03146"></a>03146                 <span class="vhdlkeyword">end</span>

<a name="l03146"></a>03146                 <span class="keyword">// X not affected</span>

<a name="l03147"></a>03147             <span class="vhdlkeyword">end</span>

<a name="l03147"></a>03147                 <span class="keyword">// C cleared</span>

<a name="l03148"></a>03148

<a name="l03148"></a>03148                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03149"></a>03149

<a name="l03149"></a>03149                 <span class="keyword">// V cleared</span>

<a name="l03150"></a>03150             <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">`ALU_BCHG_BCLR_BSET_BTST</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 97 LE</span>

<a name="l03150"></a>03150                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03151"></a>03151                 <span class="keyword">// byte</span>

<a name="l03151"></a>03151

<a name="l03152"></a>03152                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03152"></a>03152                 <span class="keyword">// N set</span>

<a name="l03153"></a>03153                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]);

<a name="l03153"></a>03153                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03154"></a>03154                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;

<a name="l03154"></a>03154                 <span class="keyword">// Z set</span>

<a name="l03155"></a>03155                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;

<a name="l03155"></a>03155                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03156"></a>03156                 <span class="vhdlkeyword">end</span>

<a name="l03156"></a>03156                 <span class="vhdlkeyword">end</span>

<a name="l03157"></a>03157                 <span class="keyword">// long</span>

<a name="l03157"></a>03157

<a name="l03158"></a>03158                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03158"></a>03158             <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03159"></a>03159                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]);

<a name="l03159"></a>03159                 <span class="keyword">// ADDA: 1101</span>

<a name="l03160"></a>03160                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;

<a name="l03160"></a>03160                 <span class="keyword">// CMPA: 1011</span>

<a name="l03161"></a>03161                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[ <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;

<a name="l03161"></a>03161                 <span class="keyword">// SUBA: 1001</span>

<a name="l03162"></a>03162                 <span class="vhdlkeyword">end</span>

<a name="l03162"></a>03162                 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>

<a name="l03163"></a>03163

<a name="l03163"></a>03163                 <span class="keyword">// operation requires that operand2 was sign extended</span>

<a name="l03164"></a>03164                 <span class="keyword">// C,V,N,X not affected</span>

<a name="l03164"></a>03164

<a name="l03165"></a>03165             <span class="vhdlkeyword">end</span>

<a name="l03165"></a>03165                 <span class="keyword">// ADDA,ADDQ</span>

<a name="l03166"></a>03166

<a name="l03166"></a>03166                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>) )

<a name="l03167"></a>03167             <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">`ALU_TAS</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03167"></a>03167                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03168"></a>03168                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= { <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] };

<a name="l03168"></a>03168                 <span class="keyword">// SUBA,CMPA,SUBQ</span>

<a name="l03169"></a>03169

<a name="l03169"></a>03169                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>) )

<a name="l03170"></a>03170                 <span class="keyword">// X not affected</span>

<a name="l03170"></a>03170                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03171"></a>03171                 <span class="keyword">// C cleared</span>

<a name="l03171"></a>03171

<a name="l03172"></a>03172                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03172"></a>03172                 <span class="keyword">// for CMPA</span>

<a name="l03173"></a>03173                 <span class="keyword">// V cleared</span>

<a name="l03173"></a>03173                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03174"></a>03174                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03174"></a>03174                     <span class="keyword">// Z</span>

<a name="l03175"></a>03175

<a name="l03175"></a>03175                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03176"></a>03176                 <span class="keyword">// N set</span>

<a name="l03176"></a>03176                     <span class="keyword">// N</span>

<a name="l03177"></a>03177                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>);

<a name="l03177"></a>03177                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03178"></a>03178                 <span class="keyword">// Z set</span>

<a name="l03178"></a>03178

<a name="l03179"></a>03179                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>);

<a name="l03179"></a>03179                     <span class="keyword">// C,V</span>

<a name="l03180"></a>03180             <span class="vhdlkeyword">end</span>

<a name="l03180"></a>03180                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l03181"></a>03181

<a name="l03181"></a>03181                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);

<a name="l03182"></a>03182

<a name="l03182"></a>03182                     <span class="keyword">// X not affected</span>

<a name="l03183"></a>03183             <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">`ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03183"></a>03183                 <span class="vhdlkeyword">end</span>

<a name="l03184"></a>03184                 <span class="keyword">// NEGX</span>

<a name="l03184"></a>03184                 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>

<a name="l03185"></a>03185                 <span class="vhdlkeyword">if</span>(    <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <span class="vhdllogic">32&#39;b0</span> - <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>];

<a name="l03185"></a>03185             <span class="vhdlkeyword">end</span>

<a name="l03186"></a>03186                 <span class="keyword">// CLR</span>

<a name="l03186"></a>03186

<a name="l03187"></a>03187                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <span class="vhdllogic">32&#39;b0</span>;

<a name="l03187"></a>03187             <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03188"></a>03188                 <span class="keyword">// NEG</span>

<a name="l03188"></a>03188                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];

<a name="l03189"></a>03189                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = <span class="vhdllogic">32&#39;b0</span> - <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03189"></a>03189

<a name="l03190"></a>03190                 <span class="keyword">// NOT</span>

<a name="l03190"></a>03190                 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>

<a name="l03191"></a>03191                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = ~<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03191"></a>03191                 <span class="keyword">//sr[2] &lt;= (operand1[15:0] == 16&#39;b0) ? 1&#39;b1 : 1&#39;b0;</span>

<a name="l03192"></a>03192                 <span class="keyword">// NBCD</span>

<a name="l03192"></a>03192                 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>

<a name="l03193"></a>03193                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03193"></a>03193                 <span class="keyword">//sr[0] &lt;= 1&#39;b0;</span>

<a name="l03194"></a>03194

<a name="l03194"></a>03194                 <span class="keyword">//sr[1] &lt;= 1&#39;b0;</span>

<a name="l03195"></a>03195                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>];

<a name="l03195"></a>03195

<a name="l03196"></a>03196                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = (<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">4&#39;d9</span>) ? (<span class="vhdllogic">5&#39;d24</span> - <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]) : (<span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]);

<a name="l03196"></a>03196                 <span class="keyword">// C,X,V</span>

<a name="l03197"></a>03197

<a name="l03197"></a>03197                 <span class="keyword">//    sr[0] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm);</span>

<a name="l03198"></a>03198                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> &amp;&amp; <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">4&#39;d9</span>) <span class="vhdlkeyword">begin</span>

<a name="l03198"></a>03198                 <span class="keyword">//    sr[4] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm); //=ccr[0];</span>

<a name="l03199"></a>03199                         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;

<a name="l03199"></a>03199                 <span class="keyword">//    sr[1] &lt;= (~`Sm &amp; `Dm &amp; ~`Rm) | (`Sm &amp; ~`Dm &amp; `Rm);</span>

<a name="l03200"></a>03200                         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <span class="vhdllogic">4&#39;d0</span>;

<a name="l03200"></a>03200                 <span class="keyword">// +: 0-1,    0-0=0, 1-1=0</span>

<a name="l03201"></a>03201                     <span class="vhdlkeyword">end</span>

<a name="l03201"></a>03201                 <span class="keyword">// -: 0-0=1,  1-0,   1-1=1</span>

<a name="l03202"></a>03202                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; (<a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> || <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d15</span>)) <span class="vhdlkeyword">begin</span>

<a name="l03202"></a>03202                 <span class="keyword">// operand1 - operand2 &gt; 0</span>

<a name="l03203"></a>03203                         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;

<a name="l03203"></a>03203                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &amp;&amp; ((~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03204"></a>03204                         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] + <span class="vhdllogic">4&#39;d1</span>;

<a name="l03204"></a>03204                     <span class="keyword">// clear N</span>

<a name="l03205"></a>03205                     <span class="vhdlkeyword">end</span>

<a name="l03205"></a>03205                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03206"></a>03206                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03206"></a>03206                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03207"></a>03207                         <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] + <span class="vhdllogic">4&#39;d1</span>;

<a name="l03207"></a>03207                 <span class="vhdlkeyword">end</span>

<a name="l03208"></a>03208                     <span class="vhdlkeyword">end</span>

<a name="l03208"></a>03208                 <span class="keyword">// operand1 &lt; 0</span>

<a name="l03209"></a>03209

<a name="l03209"></a>03209                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03210"></a>03210                     <span class="keyword">//V undefined: unchanged</span>

<a name="l03210"></a>03210                     <span class="keyword">// set N</span>

<a name="l03211"></a>03211                     <span class="keyword">//Z</span>

<a name="l03211"></a>03211                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03212"></a>03212                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l03212"></a>03212                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03213"></a>03213                     <span class="keyword">//C,X</span>

<a name="l03213"></a>03213                 <span class="vhdlkeyword">end</span>

<a name="l03214"></a>03214                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;

<a name="l03214"></a>03214                 <span class="keyword">// no trap</span>

<a name="l03215"></a>03215                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">//=C</span>

<a name="l03215"></a>03215                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l03216"></a>03216                 <span class="vhdlkeyword">end</span>

<a name="l03216"></a>03216                     <span class="keyword">// N undefined: not affected</span>

<a name="l03217"></a>03217                 <span class="keyword">// SWAP</span>

<a name="l03217"></a>03217                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03218"></a>03218                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };

<a name="l03218"></a>03218                 <span class="vhdlkeyword">end</span>

<a name="l03219"></a>03219                 <span class="keyword">// EXT byte to word</span>

<a name="l03219"></a>03219

<a name="l03220"></a>03220                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_10</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = { <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], {<span class="vhdllogic">8</span>{<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };

<a name="l03220"></a>03220                 <span class="keyword">// X not affected</span>

<a name="l03221"></a>03221                 <span class="keyword">// EXT word to long</span>

<a name="l03221"></a>03221             <span class="vhdlkeyword">end</span>

<a name="l03222"></a>03222                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_11</span> ) <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> = { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };

<a name="l03222"></a>03222

<a name="l03223"></a>03223

<a name="l03223"></a>03223             <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03224"></a>03224                 <span class="keyword">// N set if negative else clear</span>

<a name="l03224"></a>03224

<a name="l03225"></a>03225                 <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03225"></a>03225                 <span class="keyword">// division by 0</span>

<a name="l03226"></a>03226

<a name="l03226"></a>03226                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03227"></a>03227                 <span class="keyword">// CLR,NOT,SWAP,EXT</span>

<a name="l03227"></a>03227                     <span class="keyword">// X not affected</span>

<a name="l03228"></a>03228                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03228"></a>03228                     <span class="keyword">// C cleared</span>

<a name="l03229"></a>03229                     <span class="keyword">// X not affected</span>

<a name="l03229"></a>03229                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03230"></a>03230                     <span class="keyword">// C,V cleared</span>

<a name="l03230"></a>03230                     <span class="keyword">// V,Z,N undefined: cleared</span>

<a name="l03231"></a>03231                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03231"></a>03231                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03232"></a>03232                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03232"></a>03232                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03233"></a>03233                     <span class="keyword">// Z set</span>

<a name="l03233"></a>03233                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03234"></a>03234                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l03234"></a>03234

<a name="l03235"></a>03235                 <span class="vhdlkeyword">end</span>

<a name="l03235"></a>03235                     <span class="keyword">// set trap</span>

<a name="l03236"></a>03236                 <span class="keyword">// NEGX</span>

<a name="l03236"></a>03236                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03237"></a>03237                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03237"></a>03237                 <span class="vhdlkeyword">end</span>

<a name="l03238"></a>03238                     <span class="keyword">// C set if borrow</span>

<a name="l03238"></a>03238                 <span class="keyword">// division in idle state</span>

<a name="l03239"></a>03239                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03239"></a>03239                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03240"></a>03240                     <span class="keyword">// X=C</span>

<a name="l03240"></a>03240                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03241"></a>03241                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03241"></a>03241                 <span class="vhdlkeyword">end</span>

<a name="l03242"></a>03242                     <span class="keyword">// V set if overflow</span>

<a name="l03242"></a>03242                 <span class="keyword">// division overflow: divu, divs</span>

<a name="l03243"></a>03243                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03243"></a>03243                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a8d11b113e74362e74035541da1b0a02e">div_overflow</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>

<a name="l03244"></a>03244                     <span class="keyword">// Z cleared if nonzero else unchanged</span>

<a name="l03244"></a>03244                 <span class="keyword">/*OPTIM</span>

<a name="l03245"></a>03245                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l03245"></a>03245 <span class="keyword">                else if( ((ir[15:12] == 4&#39;b1000 &amp;&amp; mult_div_sign == 1&#39;b0) &amp;&amp; (divu_quotient[31:16] != 16&#39;d0)) ||</span>

<a name="l03246"></a>03246                 <span class="vhdlkeyword">end</span>

<a name="l03246"></a>03246 <span class="keyword">                         ((ir[15:12] == 4&#39;b1000 &amp;&amp; mult_div_sign == 1&#39;b1) &amp;&amp; (divs_quotient[31:16] != {16{divs_quotient[15]}}))</span>

<a name="l03247"></a>03247                 <span class="keyword">// NEG</span>

<a name="l03247"></a>03247 <span class="keyword">                ) begin</span>

<a name="l03248"></a>03248                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03248"></a>03248 <span class="keyword">                */</span>

<a name="l03249"></a>03249                     <span class="keyword">// C clear if zero else set</span>

<a name="l03249"></a>03249                     <span class="keyword">// X not affected</span>

<a name="l03250"></a>03250                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03250"></a>03250                     <span class="keyword">// C cleared</span>

<a name="l03251"></a>03251                     <span class="keyword">// X=C</span>

<a name="l03251"></a>03251                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03252"></a>03252                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03252"></a>03252                     <span class="keyword">// V set</span>

<a name="l03253"></a>03253                     <span class="keyword">// V set if overflow</span>

<a name="l03253"></a>03253                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03254"></a>03254                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a427db1cde5547577da8b980693d9bf64">`Rm</a><span class="vhdlchar"></span>;

<a name="l03254"></a>03254                     <span class="keyword">// Z,N undefined: cleared and set</span>

<a name="l03255"></a>03255                     <span class="keyword">// Z set if zero else clear</span>

<a name="l03255"></a>03255                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03256"></a>03256                     <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">`Z</a><span class="vhdlchar"></span>;

<a name="l03256"></a>03256                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03257"></a>03257                 <span class="vhdlkeyword">end</span>

<a name="l03257"></a>03257

<a name="l03258"></a>03258             <span class="vhdlkeyword">end</span>

<a name="l03258"></a>03258                     <span class="keyword">// set trap</span>

<a name="l03259"></a>03259

<a name="l03259"></a>03259                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;

<a name="l03260"></a>03260

<a name="l03260"></a>03260                 <span class="vhdlkeyword">end</span>

<a name="l03261"></a>03261             <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">`ALU_SIMPLE_LONG_ADD</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03261"></a>03261                 <span class="keyword">// division</span>

<a name="l03262"></a>03262                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03262"></a>03262                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03263"></a>03263

<a name="l03263"></a>03263                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= {<a class="code" href="classalu.html#ad32bb10563baa2d2d78c2a23e8f2219e">div_remainder</a>, <a class="code" href="classalu.html#af65ee78a38f09889c3b8c9efc759f559">div_quotient</a>};

<a name="l03264"></a>03264                 <span class="keyword">// CCR not affected</span>

<a name="l03264"></a>03264

<a name="l03265"></a>03265             <span class="vhdlkeyword">end</span>

<a name="l03265"></a>03265                     <span class="keyword">// X not affected</span>

<a name="l03266"></a>03266

<a name="l03266"></a>03266                     <span class="keyword">// C cleared</span>

<a name="l03267"></a>03267             <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">`ALU_SIMPLE_LONG_SUB</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03267"></a>03267                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03268"></a>03268                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03268"></a>03268                     <span class="keyword">// V cleared</span>

<a name="l03269"></a>03269

<a name="l03269"></a>03269                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03270"></a>03270                 <span class="keyword">// CCR not affected</span>

<a name="l03270"></a>03270                     <span class="keyword">// Z</span>

<a name="l03271"></a>03271             <span class="vhdlkeyword">end</span>

<a name="l03271"></a>03271                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#af65ee78a38f09889c3b8c9efc759f559">div_quotient</a> == <span class="vhdllogic">16&#39;b0</span>);

<a name="l03272"></a>03272

<a name="l03272"></a>03272                     <span class="keyword">// N</span>

<a name="l03273"></a>03273             <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">`ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03273"></a>03273                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#af65ee78a38f09889c3b8c9efc759f559">div_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>);

<a name="l03274"></a>03274

<a name="l03274"></a>03274

<a name="l03275"></a>03275                 <span class="keyword">// MOVE TO SR,RTE,STOP,ORI to SR,ANDI to SR,EORI to SR</span>

<a name="l03275"></a>03275                     <span class="keyword">// set trap</span>

<a name="l03276"></a>03276                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0110</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span> ||

<a name="l03276"></a>03276                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03277"></a>03277                     <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span>

<a name="l03277"></a>03277                 <span class="vhdlkeyword">end</span>

<a name="l03278"></a>03278                 )         <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> &lt;= { <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };

<a name="l03278"></a>03278                 <span class="keyword">// multiplication</span>

<a name="l03279"></a>03279                 <span class="keyword">// MOVE TO CCR,RTR,ORI to CCR,ANDI to CCR,EORI to CCR</span>

<a name="l03279"></a>03279                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03280"></a>03280                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0111</span> ||

<a name="l03280"></a>03280                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#aff5530027f36561324e060e703004b6b">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03281"></a>03281                             <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span> || <a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span>

<a name="l03281"></a>03281

<a name="l03282"></a>03282                 )        <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a> &lt;= { <a class="code" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };

<a name="l03282"></a>03282                     <span class="keyword">// X not affected</span>

<a name="l03283"></a>03283             <span class="vhdlkeyword">end</span>

<a name="l03283"></a>03283                     <span class="keyword">// C cleared</span>

<a name="l03284"></a>03284

<a name="l03284"></a>03284                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03285"></a>03285             <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">`ALU_SIMPLE_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03285"></a>03285                     <span class="keyword">// V cleared</span>

<a name="l03286"></a>03286                 <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;

<a name="l03286"></a>03286                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03287"></a>03287

<a name="l03287"></a>03287                     <span class="keyword">// Z</span>

<a name="l03288"></a>03288                 <span class="keyword">// CCR not affected</span>

<a name="l03288"></a>03288                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#aff5530027f36561324e060e703004b6b">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>);

<a name="l03289"></a>03289             <span class="vhdlkeyword">end</span>

<a name="l03289"></a>03289                     <span class="keyword">// N</span>

<a name="l03290"></a>03290

<a name="l03290"></a>03290                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#aff5530027f36561324e060e703004b6b">mult_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>);

<a name="l03291"></a>03291             <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">`ALU_LINK_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03291"></a>03291

<a name="l03292"></a>03292                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">3&#39;b111</span>) <span class="vhdlkeyword">begin</span>

<a name="l03292"></a>03292                     <span class="keyword">// set trap</span>

<a name="l03293"></a>03293                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a> - <span class="vhdllogic">32&#39;d4</span>;

<a name="l03293"></a>03293                     <a class="code" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03294"></a>03294                 <span class="vhdlkeyword">end</span>

<a name="l03294"></a>03294                 <span class="vhdlkeyword">end</span>

<a name="l03295"></a>03295                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l03295"></a>03295             <span class="vhdlkeyword">end</span>

<a name="l03296"></a>03296                     <a class="code" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a> &lt;= <a class="code" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a>;

<a name="l03296"></a>03296

<a name="l03297"></a>03297                 <span class="vhdlkeyword">end</span>

<a name="l03297"></a>03297

<a name="l03298"></a>03298

<a name="l03298"></a>03298             <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">`ALU_BCHG_BCLR_BSET_BTST</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 97 LE</span>

<a name="l03299"></a>03299                 <span class="keyword">// CCR not affected</span>

<a name="l03299"></a>03299                 <span class="keyword">// byte</span>

<a name="l03300"></a>03300             <span class="vhdlkeyword">end</span>

<a name="l03300"></a>03300                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03301"></a>03301

<a name="l03301"></a>03301                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]);

<a name="l03302"></a>03302         <span class="vhdlkeyword">endcase</span>

<a name="l03302"></a>03302                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l03303"></a>03303     <span class="vhdlkeyword">end</span>

<a name="l03303"></a>03303                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;

<a name="l03304"></a>03304 <span class="vhdlkeyword">end</span>

<a name="l03304"></a>03304 <span class="vhdlkeyword">end</span>

<a name="l03305"></a>03305                 <span class="keyword">// long</span>

<a name="l03306"></a>03306                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03307"></a>03307                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]);

<a name="l03308"></a>03308                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l03309"></a>03309                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[ <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;

<a name="l03310"></a>03310                 <span class="vhdlkeyword">end</span>

<a name="l03311"></a>03311

<a name="l03312"></a>03312                 <span class="keyword">// C,V,N,X not affected</span>

<a name="l03313"></a>03313             <span class="vhdlkeyword">end</span>

<a name="l03314"></a>03314

<a name="l03315"></a>03315             <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">`ALU_TAS</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03316"></a>03316                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= { <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] };

<a name="l03317"></a>03317

<a name="l03318"></a>03318                 <span class="keyword">// X not affected</span>

<a name="l03319"></a>03319                 <span class="keyword">// C cleared</span>

<a name="l03320"></a>03320                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03321"></a>03321                 <span class="keyword">// V cleared</span>

<a name="l03322"></a>03322                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03323"></a>03323

<a name="l03324"></a>03324                 <span class="keyword">// N set</span>

<a name="l03325"></a>03325                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>);

<a name="l03326"></a>03326                 <span class="keyword">// Z set</span>

<a name="l03327"></a>03327                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>);

<a name="l03328"></a>03328             <span class="vhdlkeyword">end</span>

<a name="l03329"></a>03329

<a name="l03330"></a>03330

<a name="l03331"></a>03331             <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">`ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03332"></a>03332                 <span class="keyword">// NEGX / CLR / NEG / NOT</span>

<a name="l03333"></a>03333                 <span class="vhdlkeyword">if</span> ((<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span>) || (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span>))

<a name="l03334"></a>03334                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = <span class="vhdllogic">32&#39;b0</span> - (<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; {<span class="vhdllogic">32</span>{<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>] | ~<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">9</span>]}}) - ((<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &amp; ~<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>] &amp; ~<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">9</span>]) | (<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">10</span>] &amp; <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">9</span>]));

<a name="l03335"></a>03335                 <span class="keyword">/*OPTIM</span>

<a name="l03336"></a>03336 <span class="keyword">                // NEGX</span>

<a name="l03337"></a>03337 <span class="keyword">                if(    ir[11:8] == 4&#39;b0000 ) result = 32&#39;b0 - operand1[31:0] - sr[4];</span>

<a name="l03338"></a>03338 <span class="keyword">                // CLR</span>

<a name="l03339"></a>03339 <span class="keyword">                else if (ir[11:8] == 4&#39;b0010) result = 32&#39;b0;</span>

<a name="l03340"></a>03340 <span class="keyword">                // NEG</span>

<a name="l03341"></a>03341 <span class="keyword">                else if( ir[11:8] == 4&#39;b0100 ) result = 32&#39;b0 - operand1[31:0];</span>

<a name="l03342"></a>03342 <span class="keyword">                // NOT</span>

<a name="l03343"></a>03343 <span class="keyword">                else if( ir[11:8] == 4&#39;b0110 ) result = ~operand1[31:0];</span>

<a name="l03344"></a>03344 <span class="keyword">                */</span>

<a name="l03345"></a>03345                 <span class="keyword">// NBCD</span>

<a name="l03346"></a>03346                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03347"></a>03347

<a name="l03348"></a>03348                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>];

<a name="l03349"></a>03349                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = (<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">4&#39;d9</span>) ? (<span class="vhdllogic">5&#39;d24</span> - <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]) : (<span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]);

<a name="l03350"></a>03350

<a name="l03351"></a>03351                     <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> &amp;&amp; <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">4&#39;d9</span>) <span class="vhdlkeyword">begin</span>

<a name="l03352"></a>03352                         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;

<a name="l03353"></a>03353                         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <span class="vhdllogic">4&#39;d0</span>;

<a name="l03354"></a>03354                     <span class="vhdlkeyword">end</span>

<a name="l03355"></a>03355                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; (<a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> || <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d15</span>)) <span class="vhdlkeyword">begin</span>

<a name="l03356"></a>03356                         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;

<a name="l03357"></a>03357                         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] + <span class="vhdllogic">4&#39;d1</span>;

<a name="l03358"></a>03358                     <span class="vhdlkeyword">end</span>

<a name="l03359"></a>03359                     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>

<a name="l03360"></a>03360                         <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] + <span class="vhdllogic">4&#39;d1</span>;

<a name="l03361"></a>03361                     <span class="vhdlkeyword">end</span>

<a name="l03362"></a>03362

<a name="l03363"></a>03363                     <span class="keyword">//V undefined: unchanged</span>

<a name="l03364"></a>03364                     <span class="keyword">//Z</span>

<a name="l03365"></a>03365                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03366"></a>03366                     <span class="keyword">//C,X</span>

<a name="l03367"></a>03367                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;

<a name="l03368"></a>03368                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">//=C</span>

<a name="l03369"></a>03369                 <span class="vhdlkeyword">end</span>

<a name="l03370"></a>03370                 <span class="keyword">// SWAP</span>

<a name="l03371"></a>03371                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };

<a name="l03372"></a>03372                 <span class="keyword">// EXT byte to word</span>

<a name="l03373"></a>03373                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_10</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = { <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], {<span class="vhdllogic">8</span>{<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };

<a name="l03374"></a>03374                 <span class="keyword">// EXT word to long</span>

<a name="l03375"></a>03375                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_11</span> ) <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> = { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };

<a name="l03376"></a>03376

<a name="l03377"></a>03377                 <span class="keyword">// N set if negative else clear</span>

<a name="l03378"></a>03378                 <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03379"></a>03379

<a name="l03380"></a>03380                 <span class="keyword">// CLR,NOT,SWAP,EXT</span>

<a name="l03381"></a>03381                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03382"></a>03382                     <span class="keyword">// X not affected</span>

<a name="l03383"></a>03383                     <span class="keyword">// C,V cleared</span>

<a name="l03384"></a>03384                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03385"></a>03385                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;

<a name="l03386"></a>03386                     <span class="keyword">// Z set</span>

<a name="l03387"></a>03387                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03388"></a>03388                 <span class="vhdlkeyword">end</span>

<a name="l03389"></a>03389                 <span class="keyword">// NEGX</span>

<a name="l03390"></a>03390                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03391"></a>03391                     <span class="keyword">// C set if borrow</span>

<a name="l03392"></a>03392                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03393"></a>03393                     <span class="keyword">// X=C</span>

<a name="l03394"></a>03394                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03395"></a>03395                     <span class="keyword">// V set if overflow</span>

<a name="l03396"></a>03396                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03397"></a>03397                     <span class="keyword">// Z cleared if nonzero else unchanged</span>

<a name="l03398"></a>03398                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03399"></a>03399                 <span class="vhdlkeyword">end</span>

<a name="l03400"></a>03400                 <span class="keyword">// NEG</span>

<a name="l03401"></a>03401                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <span class="vhdlkeyword">begin</span>

<a name="l03402"></a>03402                     <span class="keyword">// C clear if zero else set</span>

<a name="l03403"></a>03403                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03404"></a>03404                     <span class="keyword">// X=C</span>

<a name="l03405"></a>03405                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03406"></a>03406                     <span class="keyword">// V set if overflow</span>

<a name="l03407"></a>03407                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;

<a name="l03408"></a>03408                     <span class="keyword">// Z set if zero else clear</span>

<a name="l03409"></a>03409                     <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;

<a name="l03410"></a>03410                 <span class="vhdlkeyword">end</span>

<a name="l03411"></a>03411             <span class="vhdlkeyword">end</span>

<a name="l03412"></a>03412

<a name="l03413"></a>03413

<a name="l03414"></a>03414             <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">`ALU_SIMPLE_LONG_ADD</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03415"></a>03415                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03416"></a>03416

<a name="l03417"></a>03417                 <span class="keyword">// CCR not affected</span>

<a name="l03418"></a>03418             <span class="vhdlkeyword">end</span>

<a name="l03419"></a>03419

<a name="l03420"></a>03420             <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">`ALU_SIMPLE_LONG_SUB</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03421"></a>03421                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];

<a name="l03422"></a>03422

<a name="l03423"></a>03423                 <span class="keyword">// CCR not affected</span>

<a name="l03424"></a>03424             <span class="vhdlkeyword">end</span>

<a name="l03425"></a>03425

<a name="l03426"></a>03426             <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">`ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03427"></a>03427

<a name="l03428"></a>03428                 <span class="keyword">// MOVE TO SR,RTE,STOP,ORI to SR,ANDI to SR,EORI to SR</span>

<a name="l03429"></a>03429                 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0110</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span> ||

<a name="l03430"></a>03430                     <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span>

<a name="l03431"></a>03431                 )         <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> &lt;= { <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };

<a name="l03432"></a>03432                 <span class="keyword">// MOVE TO CCR,RTR,ORI to CCR,ANDI to CCR,EORI to CCR</span>

<a name="l03433"></a>03433                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(     <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0111</span> ||

<a name="l03434"></a>03434                             <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span> || <a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span>

<a name="l03435"></a>03435                 )        <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a> &lt;= { <a class="code" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };

<a name="l03436"></a>03436             <span class="vhdlkeyword">end</span>

<a name="l03437"></a>03437

<a name="l03438"></a>03438             <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">`ALU_SIMPLE_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03439"></a>03439                 <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l03440"></a>03440

<a name="l03441"></a>03441                 <span class="keyword">// CCR not affected</span>

<a name="l03442"></a>03442             <span class="vhdlkeyword">end</span>

<a name="l03443"></a>03443

<a name="l03444"></a>03444             <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">`ALU_LINK_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>

<a name="l03445"></a>03445                 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">3&#39;b111</span>) <span class="vhdlkeyword">begin</span>

<a name="l03446"></a>03446                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a> - <span class="vhdllogic">32&#39;d4</span>;

<a name="l03447"></a>03447                 <span class="vhdlkeyword">end</span>

<a name="l03448"></a>03448                 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>

<a name="l03449"></a>03449                     <a class="code" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a> &lt;= <a class="code" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a>;

<a name="l03450"></a>03450                 <span class="vhdlkeyword">end</span>

<a name="l03451"></a>03451

<a name="l03452"></a>03452                 <span class="keyword">// CCR not affected</span>

<a name="l03453"></a>03453             <span class="vhdlkeyword">end</span>

<a name="l03454"></a>03454

<a name="l03455"></a>03455         <span class="vhdlkeyword">endcase</span>

<a name="l03456"></a>03456     <span class="vhdlkeyword">end</span>

<a name="l03457"></a>03457 <span class="vhdlkeyword">end</span>

</pre></div>

</pre></div>

</div>

</div>

</div>

</div>

<hr/><h2>Member Data Documentation</h2>

<hr/><h2>Member Data Documentation</h2>

<a class="anchor" id="ad7c0ea5d383c8038bf5854a8973218a2"></a><!-- doxytag: member="alu::clock" ref="ad7c0ea5d383c8038bf5854a8973218a2" args="" -->

<a class="anchor" id="aaa60d149641cba8468ad7791eb5999ab"></a><!-- doxytag: member="alu::clock" ref="aaa60d149641cba8468ad7791eb5999ab" args="" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ad7c0ea5d383c8038bf5854a8973218a2">clock</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#aaa60d149641cba8468ad7791eb5999ab">clock</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02548">2548</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02592">2592</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a118127ef2a8f772e6e0b1b7f6166d43a"></a><!-- doxytag: member="alu::reset_n" ref="a118127ef2a8f772e6e0b1b7f6166d43a" args="" -->

<a class="anchor" id="a5e83fb99cb897f45ca128fa1594c5967"></a><!-- doxytag: member="alu::reset_n" ref="a5e83fb99cb897f45ca128fa1594c5967" args="" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a118127ef2a8f772e6e0b1b7f6166d43a">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a5e83fb99cb897f45ca128fa1594c5967">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02549">2549</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02593">2593</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="ad5077564c06a917e134e2be4f7f63650"></a><!-- doxytag: member="alu::address" ref="ad5077564c06a917e134e2be4f7f63650" args="" -->

<a class="anchor" id="a379cf0ab5b30f07c291e327fc5bb194f"></a><!-- doxytag: member="alu::address" ref="a379cf0ab5b30f07c291e327fc5bb194f" args="" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ad5077564c06a917e134e2be4f7f63650">address</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a379cf0ab5b30f07c291e327fc5bb194f">address</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02552">2552</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02596">2596</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="adca74bf3d9f5a4137f53633fcdaf4625"></a><!-- doxytag: member="alu::ir" ref="adca74bf3d9f5a4137f53633fcdaf4625" args="" -->

<a class="anchor" id="aff1294ddc1983f4e66996a118dc19d01"></a><!-- doxytag: member="alu::ir" ref="aff1294ddc1983f4e66996a118dc19d01" args="" -->

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      <table class="memname">

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#adca74bf3d9f5a4137f53633fcdaf4625">ir</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#aff1294ddc1983f4e66996a118dc19d01">ir</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

        </tr>

      </table>

      </table>

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<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02554">2554</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02598">2598</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a2dcdbec96479ce2e4183caf6173a90d7"></a><!-- doxytag: member="alu::size" ref="a2dcdbec96479ce2e4183caf6173a90d7" args="" -->

<a class="anchor" id="ab689dbfef609d2f29a3bfd8eea9ac4c9"></a><!-- doxytag: member="alu::size" ref="ab689dbfef609d2f29a3bfd8eea9ac4c9" args="" -->

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      <table class="memname">

      <table class="memname">

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a2dcdbec96479ce2e4183caf6173a90d7">size</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ab689dbfef609d2f29a3bfd8eea9ac4c9">size</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

        </tr>

      </table>

      </table>

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<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02556">2556</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02600">2600</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a224405fe69bdbfbcfce86640e891968b"></a><!-- doxytag: member="alu::operand1" ref="a224405fe69bdbfbcfce86640e891968b" args="" -->

<a class="anchor" id="a321dfa4a70bd231091e44e3972b71b6d"></a><!-- doxytag: member="alu::operand1" ref="a321dfa4a70bd231091e44e3972b71b6d" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a224405fe69bdbfbcfce86640e891968b">operand1</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a321dfa4a70bd231091e44e3972b71b6d">operand1</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

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      </table>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02558">2558</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02602">2602</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

</div>

<a class="anchor" id="ad29df655eb2fbf597cab42f723ee89b8"></a><!-- doxytag: member="alu::operand2" ref="ad29df655eb2fbf597cab42f723ee89b8" args="" -->

<a class="anchor" id="abea2bb54b9dba60806dcf2fccc896748"></a><!-- doxytag: member="alu::operand2" ref="abea2bb54b9dba60806dcf2fccc896748" args="" -->

<div class="memitem">

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ad29df655eb2fbf597cab42f723ee89b8">operand2</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#abea2bb54b9dba60806dcf2fccc896748">operand2</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02559">2559</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02603">2603</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

</div>

<a class="anchor" id="ab9e3f505c78e6c0b2340a5e1b364514b"></a><!-- doxytag: member="alu::interrupt_mask" ref="ab9e3f505c78e6c0b2340a5e1b364514b" args="" -->

<a class="anchor" id="aaec5e2b3f347a2651f6456b7d0dafe16"></a><!-- doxytag: member="alu::interrupt_mask" ref="aaec5e2b3f347a2651f6456b7d0dafe16" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ab9e3f505c78e6c0b2340a5e1b364514b">interrupt_mask</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#aaec5e2b3f347a2651f6456b7d0dafe16">interrupt_mask</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02561">2561</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02605">2605</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="ab0c0bd4569a63b8d08b2e7a1d27cf177"></a><!-- doxytag: member="alu::alu_control" ref="ab0c0bd4569a63b8d08b2e7a1d27cf177" args="" -->

<a class="anchor" id="acd09435ce38c12172a01a2b3725577dc"></a><!-- doxytag: member="alu::alu_control" ref="acd09435ce38c12172a01a2b3725577dc" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ab0c0bd4569a63b8d08b2e7a1d27cf177">alu_control</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#acd09435ce38c12172a01a2b3725577dc">alu_control</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>

        </tr>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02562">2562</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02606">2606</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="acf8f101c1e7acf19b3f2689e167274bb"></a><!-- doxytag: member="alu::sr" ref="acf8f101c1e7acf19b3f2689e167274bb" args="" -->

<a class="anchor" id="a82a5493611ab7e8e59a11376b01bf617"></a><!-- doxytag: member="alu::sr" ref="a82a5493611ab7e8e59a11376b01bf617" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#acf8f101c1e7acf19b3f2689e167274bb">sr</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a82a5493611ab7e8e59a11376b01bf617">sr</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">15</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

        </tr>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02564">2564</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02608">2608</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="ae6619e261e0bef4badfe6941e2208782"></a><!-- doxytag: member="alu::result" ref="ae6619e261e0bef4badfe6941e2208782" args="" -->

<a class="anchor" id="aa956d8f0509c2338b20188ff77b3c219"></a><!-- doxytag: member="alu::result" ref="aa956d8f0509c2338b20188ff77b3c219" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ae6619e261e0bef4badfe6941e2208782">result</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#aa956d8f0509c2338b20188ff77b3c219">result</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

        </tr>

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      </table>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02565">2565</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02609">2609</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="a9967a58a4b4ce228c54e58f560547165"></a><!-- doxytag: member="alu::special" ref="a9967a58a4b4ce228c54e58f560547165" args="" -->

<a class="anchor" id="a41770492859599997a003e2681e7d955"></a><!-- doxytag: member="alu::alu_signal" ref="a41770492859599997a003e2681e7d955" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a9967a58a4b4ce228c54e58f560547165">special</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a41770492859599997a003e2681e7d955">alu_signal</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

        </tr>

        </tr>

      </table>

      </table>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02566">2566</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02611">2611</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="a84d66cf834afa9133f1934f03d6cc1a5"></a><!-- doxytag: member="alu::divu_quotient" ref="a84d66cf834afa9133f1934f03d6cc1a5" args="wire[31:0]" -->

<a class="anchor" id="ab6a8e15c686ee360ddad15cd4d995ea9"></a><!-- doxytag: member="alu::alu_mult_div_ready" ref="ab6a8e15c686ee360ddad15cd4d995ea9" args="" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a84d66cf834afa9133f1934f03d6cc1a5">divu_quotient</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ab6a8e15c686ee360ddad15cd4d995ea9">alu_mult_div_ready</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>

        </tr>

        </tr>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02569">2569</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02612">2612</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="a8cef22afb37b55eea85eda4c20f9b1b7"></a><!-- doxytag: member="alu::divu_remainder" ref="a8cef22afb37b55eea85eda4c20f9b1b7" args="wire[15:0]" -->

<a class="anchor" id="abbf525422eca0279b697f742b90237e0"></a><!-- doxytag: member="alu::mult_div_sign" ref="abbf525422eca0279b697f742b90237e0" args="wire" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a8cef22afb37b55eea85eda4c20f9b1b7">divu_remainder</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#abbf525422eca0279b697f742b90237e0">mult_div_sign</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>

        </tr>

        </tr>

      </table>

      </table>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02570">2570</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02623">2623</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="ad580d5c6f7f3f0bc39f873db4ba36301"></a><!-- doxytag: member="alu::divs_quotient" ref="ad580d5c6f7f3f0bc39f873db4ba36301" args="wire[31:0]" -->

<a class="anchor" id="a01e7473ea866a8cc46912bc69b59f8b0"></a><!-- doxytag: member="alu::div_count" ref="a01e7473ea866a8cc46912bc69b59f8b0" args="reg[4:0]" -->

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        <tr>

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ad580d5c6f7f3f0bc39f873db4ba36301">divs_quotient</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a01e7473ea866a8cc46912bc69b59f8b0">div_count</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[4:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02571">2571</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02626">2626</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a0723b9ed6da6c9a2d2b68b36563b42e3"></a><!-- doxytag: member="alu::divs_remainder" ref="a0723b9ed6da6c9a2d2b68b36563b42e3" args="wire[15:0]" -->

<a class="anchor" id="ab225284f49794091a5a28e73b8b13e14"></a><!-- doxytag: member="alu::quotient" ref="ab225284f49794091a5a28e73b8b13e14" args="reg[16:0]" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a0723b9ed6da6c9a2d2b68b36563b42e3">divs_remainder</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ab225284f49794091a5a28e73b8b13e14">quotient</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[16:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02572">2572</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02627">2627</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a23c8e6648d0b07c6593402658bf83095"></a><!-- doxytag: member="alu::mulu_result" ref="a23c8e6648d0b07c6593402658bf83095" args="wire[31:0]" -->

<a class="anchor" id="a0c2a64b2f5dd32b2159ca0f29de360aa"></a><!-- doxytag: member="alu::dividend" ref="a0c2a64b2f5dd32b2159ca0f29de360aa" args="reg[31:0]" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a23c8e6648d0b07c6593402658bf83095">mulu_result</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a0c2a64b2f5dd32b2159ca0f29de360aa">dividend</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[31:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02573">2573</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02628">2628</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a37551519218b05f156135f78f2ee2fe1"></a><!-- doxytag: member="alu::muls_result" ref="a37551519218b05f156135f78f2ee2fe1" args="wire[31:0]" -->

<a class="anchor" id="a9c2364593889150d7f5679fc33b0f1fa"></a><!-- doxytag: member="alu::divider" ref="a9c2364593889150d7f5679fc33b0f1fa" args="reg[31:0]" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a37551519218b05f156135f78f2ee2fe1">muls_result</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a9c2364593889150d7f5679fc33b0f1fa">divider</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[31:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02574">2574</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02628">2628</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a9b48bcb40d77a92c8109c2e4a2fa44c8"></a><!-- doxytag: member="alu::interrupt_mask_copy" ref="a9b48bcb40d77a92c8109c2e4a2fa44c8" args="reg[2:0]" -->

<a class="anchor" id="a07af2646e5b543c5be95dddb22fd4ea6"></a><!-- doxytag: member="alu::div_diff" ref="a07af2646e5b543c5be95dddb22fd4ea6" args="wire[32:0]" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a9b48bcb40d77a92c8109c2e4a2fa44c8">interrupt_mask_copy</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[2:0]]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a07af2646e5b543c5be95dddb22fd4ea6">div_diff</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[32:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02663">2663</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02631">2631</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

</div>

</div>

<a class="anchor" id="a2a89cf942a86f276e4786fba4873e515"></a><!-- doxytag: member="alu::was_interrupt" ref="a2a89cf942a86f276e4786fba4873e515" args="reg" -->

<a class="anchor" id="a8d11b113e74362e74035541da1b0a02e"></a><!-- doxytag: member="alu::div_overflow" ref="a8d11b113e74362e74035541da1b0a02e" args="wire" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a2a89cf942a86f276e4786fba4873e515">was_interrupt</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a8d11b113e74362e74035541da1b0a02e">div_overflow</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02664">2664</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02634">2634</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

</div>

<a class="anchor" id="a50ba636de1e4c3986cdd2a6d7d5779d3"></a><!-- doxytag: member="alu::Dm" ref="a50ba636de1e4c3986cdd2a6d7d5779d3" args="((size==2'b00)?operand1[7]:(size==2'b01)?operand1[15]:operand1[31])" -->

<a class="anchor" id="af65ee78a38f09889c3b8c9efc759f559"></a><!-- doxytag: member="alu::div_quotient" ref="af65ee78a38f09889c3b8c9efc759f559" args="wire[15:0]" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a50ba636de1e4c3986cdd2a6d7d5779d3">Dm</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#af65ee78a38f09889c3b8c9efc759f559">div_quotient</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02655">2655</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02640">2640</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

</div>

<a class="anchor" id="a663a13286f43eb65ddc36752990daf91"></a><!-- doxytag: member="alu::lpm_divide" ref="a663a13286f43eb65ddc36752990daf91" args="" -->

<a class="anchor" id="ad32bb10563baa2d2d78c2a23e8f2219e"></a><!-- doxytag: member="alu::div_remainder" ref="ad32bb10563baa2d2d78c2a23e8f2219e" args="wire[15:0]" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a663a13286f43eb65ddc36752990daf91">lpm_divide</a></span> <b><span class="vhdlchar">divu_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ad32bb10563baa2d2d78c2a23e8f2219e">div_remainder</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[15:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02591">2591</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02646">2646</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

<a class="anchor" id="a63937f247c96f23cecbf16343afc85c6"></a><!-- doxytag: member="alu::lpm_divide" ref="a63937f247c96f23cecbf16343afc85c6" args="" -->

<a class="anchor" id="aff5530027f36561324e060e703004b6b"></a><!-- doxytag: member="alu::mult_result" ref="aff5530027f36561324e060e703004b6b" args="wire[33:0]" -->

<div class="memitem">

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<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a63937f247c96f23cecbf16343afc85c6">lpm_divide</a></span> <b><span class="vhdlchar">divs_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#aff5530027f36561324e060e703004b6b">mult_result</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[33:0]]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02608">2608</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02743">2743</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

<a class="anchor" id="ab6caa4c83db93eebe29133a1ce68435e"></a><!-- doxytag: member="alu::interrupt_mask_copy" ref="ab6caa4c83db93eebe29133a1ce68435e" args="reg[2:0]" -->

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<div class="memproto">

      <table class="memname">

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ab6caa4c83db93eebe29133a1ce68435e">interrupt_mask_copy</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[2:0]]</code></td>

        </tr>

      </table>

</div>

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02804">2804</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

</div>

</div>

<a class="anchor" id="afbfdb3d9663bb0dbde8f5ad7af046b27"></a><!-- doxytag: member="alu::was_interrupt" ref="afbfdb3d9663bb0dbde8f5ad7af046b27" args="reg" -->

<div class="memitem">

<div class="memproto">

      <table class="memname">

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#afbfdb3d9663bb0dbde8f5ad7af046b27">was_interrupt</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>

        </tr>

      </table>

</div>

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02805">2805</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

</div>

<a class="anchor" id="a971600ecbf5096805b63eedb9e8c57e2"></a><!-- doxytag: member="alu::lpm_mult" ref="a971600ecbf5096805b63eedb9e8c57e2" args="" -->

<a class="anchor" id="a09fdad5ef76ddc7865c6e3a9cfc09123"></a><!-- doxytag: member="alu::Dm" ref="a09fdad5ef76ddc7865c6e3a9cfc09123" args="((size[0]==1'b1)?operand1[7]:(size[1]==1'b1)?operand1[15]:operand1[31])" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a971600ecbf5096805b63eedb9e8c57e2">lpm_mult</a></span> <b><span class="vhdlchar">mulu_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">Dm</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

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<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02624">2624</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02796">2796</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

<a class="anchor" id="a26728d930b96d3b4eb3777152250aa48"></a><!-- doxytag: member="alu::lpm_mult" ref="a26728d930b96d3b4eb3777152250aa48" args="" -->

<a class="anchor" id="a6447478386a93e0306b7cb09937c23c3"></a><!-- doxytag: member="alu::lpm_mult" ref="a6447478386a93e0306b7cb09937c23c3" args="" -->

<div class="memitem">

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<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a26728d930b96d3b4eb3777152250aa48">lpm_mult</a></span> <b><span class="vhdlchar">muls_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">lpm_mult</a></span> <b><span class="vhdlchar">muls</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

<div class="memdoc">

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02638">2638</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02745">2745</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

<a class="anchor" id="a427db1cde5547577da8b980693d9bf64"></a><!-- doxytag: member="alu::Rm" ref="a427db1cde5547577da8b980693d9bf64" args="((size==2'b00)?result[7]:(size==2'b01)?result[15]:result[31])" -->

<a class="anchor" id="a942f3773659fb9e9e38101743237144a"></a><!-- doxytag: member="alu::Rm" ref="a942f3773659fb9e9e38101743237144a" args="((size[0]==1'b1)?result[7]:(size[1]==1'b1)?result[15]:result[31])" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a427db1cde5547577da8b980693d9bf64">Rm</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a942f3773659fb9e9e38101743237144a">Rm</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

        </tr>

        </tr>

      </table>

      </table>

</div>

</div>

<div class="memdoc">

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02657">2657</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02798">2798</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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</div>

</div>

</div>

<a class="anchor" id="a5b1a1cc35b92a5b359102232856eacc1"></a><!-- doxytag: member="alu::Sm" ref="a5b1a1cc35b92a5b359102232856eacc1" args="((size==2'b00)?operand2[7]:(size==2'b01)?operand2[15]:operand2[31])" -->

<a class="anchor" id="a52a04e7012270413af6cecfc29ce720a"></a><!-- doxytag: member="alu::Sm" ref="a52a04e7012270413af6cecfc29ce720a" args="((size[0]==1'b1)?operand2[7]:(size[1]==1'b1)?operand2[15]:operand2[31])" -->

<div class="memitem">

<div class="memitem">

<div class="memproto">

<div class="memproto">

      <table class="memname">

      <table class="memname">

        <tr>

        <tr>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a5b1a1cc35b92a5b359102232856eacc1">Sm</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

        </tr>

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      </table>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02653">2653</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02794">2794</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<a class="anchor" id="a23a70b72cb751afcb0b4fd2c1adfe24c"></a><!-- doxytag: member="alu::Z" ref="a23a70b72cb751afcb0b4fd2c1adfe24c" args="((size==2'b00)?(result[7:0]==8'b0):(size==2'b01)?(result[15:0]==16'b0):(result[31:0]==32'b0))" -->

<a class="anchor" id="ac5469ea2de38c1332c5a56b6b6242d55"></a><!-- doxytag: member="alu::Z" ref="ac5469ea2de38c1332c5a56b6b6242d55" args="((size[0]==1'b1)?(result[7:0]==8'b0):(size[1]==1'b1)?(result[15:0]==16'b0):(result[31:0]==32'b0))" -->

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          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#a23a70b72cb751afcb0b4fd2c1adfe24c">Z</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

          <td class="memname"><span class="stringliteral"><a class="el" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>

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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02659">2659</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02800">2800</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>

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<hr/>The documentation for this class was generated from the following file:<ul>

<hr/>The documentation for this class was generated from the following file:<ul>

<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>

<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>

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</ul>

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<hr class="footer"/><address class="footer"><small>Generated on Sat Dec 11 2010 13:21:13 for ao68000 by&#160;

<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 16:45:29 for ao68000 by&#160;

<a href="http://www.doxygen.org/index.html">

<a href="http://www.doxygen.org/index.html">

<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>

<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>

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