| Line 162... |
Line 162... |
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/* Synthesisable stimuli sequencer. */
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/* Synthesisable stimuli sequencer. */
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/* Data transmitter. */
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/* Data transmitter. */
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sequencer: process(nReset,irq_write) is
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sequencer_ns: process(all) is begin
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txFSM<=i_txFSM;
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if not nReset then txFSM<=idle;
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else
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case i_txFSM is
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when idle=>
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if outstandingTransactions>0 then txFSM<=transmitting; end if;
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when transmitting=>
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if axiMaster_out.tLast then
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txFSM<=idle;
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end if;
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when others=> null;
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end case;
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end if;
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end process sequencer_ns;
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sequencer_op: process(nReset,irq_write) is
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/* Local procedures to map BFM signals with the package procedure. */
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/* Local procedures to map BFM signals with the package procedure. */
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procedure read(address:in i_transactor.t_addr) is begin
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procedure read(address:in i_transactor.t_addr) is begin
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i_transactor.read(readRequest,address);
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i_transactor.read(readRequest,address);
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end procedure read;
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end procedure read;
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| Line 188... |
Line 204... |
if not nReset then
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if not nReset then
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/*simulation only. */
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/*simulation only. */
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/* synthesis translate_off */
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/* synthesis translate_off */
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rv0.InitSeed(rv0'instance_name);
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rv0.InitSeed(rv0'instance_name);
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/* synthesis translate_on */
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/* synthesis translate_on */
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txFSM<=idle;
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elsif falling_edge(irq_write) then
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elsif falling_edge(irq_write) then
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case txFSM is
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case txFSM is
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when idle=>
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if outstandingTransactions>0 then
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/* synthesis translate_off */
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write(rv0.RandSigned(axiMaster_out.tData'length));
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/* synthesis translate_on */
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txFSM<=transmitting;
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end if;
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when transmitting=>
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when transmitting=>
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if writeResponse.trigger then
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if txFSM/=i_txFSM or writeResponse.trigger then
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/* synthesis translate_off */
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/* synthesis translate_off */
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write(rv0.RandSigned(axiMaster_out.tData'length));
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write(rv0.RandSigned(axiMaster_out.tData'length));
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/* synthesis translate_on */
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/* synthesis translate_on */
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end if;
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end if;
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if axiMaster_out.tLast then
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txFSM<=idle;
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end if;
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when others=>null;
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when others=>null;
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end case;
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end case;
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end if;
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end if;
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end process sequencer;
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end process sequencer_op;
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sequencer_regs: process(irq_write) is begin
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if falling_edge(irq_write) then
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i_txFSM<=txFSM;
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end if;
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end process sequencer_regs;
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/* Reset symbolsPerTransfer to new value (prepare for new transfer) after current transfer has been completed. */
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/* Reset symbolsPerTransfer to new value (prepare for new transfer) after current transfer has been completed. */
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process(nReset,irq_write) is
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process(nReset,irq_write) is
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/* synthesis translate_off */
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/* synthesis translate_off */
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variable rv0:RandomPType;
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variable rv0:RandomPType;
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