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https://opencores.org/ocsvn/axi4_tlm_bfm/axi4_tlm_bfm/trunk
[/] [axi4_tlm_bfm/] [trunk/] [rtl/] [user.vhdl] - Diff between revs 15 and 16
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| Rev 15 |
Rev 16 |
| Line 221... |
Line 221... |
if falling_edge(irq_write) then
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if falling_edge(irq_write) then
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i_txFSM<=txFSM;
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i_txFSM<=txFSM;
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end if;
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end if;
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end process sequencer_regs;
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end process sequencer_regs;
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/* Transaction counter. */
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process(nReset,symbolsPerTransfer,irq_write) is begin
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if not nReset then outstandingTransactions<=symbolsPerTransfer;
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elsif falling_edge(irq_write) then
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/* Use synchronous reset for outstandingTransactions to meet timing because it is a huge register set. */
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if not nReset then outstandingTransactions<=symbolsPerTransfer;
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else
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if outstandingTransactions<1 then
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outstandingTransactions<=symbolsPerTransfer;
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report "No more pending transactions." severity note;
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elsif axiMaster_in.tReady then outstandingTransactions<=outstandingTransactions-1;
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end if;
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end if;
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end if;
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end process;
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/* Reset symbolsPerTransfer to new value (prepare for new transfer) after current transfer has been completed. */
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/* Reset symbolsPerTransfer to new value (prepare for new transfer) after current transfer has been completed. */
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process(nReset,irq_write) is
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process(nReset,irq_write) is
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/* synthesis translate_off */
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/* synthesis translate_off */
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variable rv0:RandomPType;
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variable rv0:RandomPType;
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/* synthesis translate_on */
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/* synthesis translate_on */
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