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[/] [bustap-jtag/] [trunk/] [rtl/] [altera/] [virtual_jtag_adda_trig.v] - Diff between revs 6 and 9
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// Date : 2012/03/15
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// Date : 2012/03/15
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// Description : addr/data trigger input from debug host
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// Description : addr/data trigger input from debug host
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// via Virtual JTAG.
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// via Virtual JTAG.
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//**************************************************************
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//**************************************************************
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`include "../../sim/altera/jtag_sim_define.h"
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`timescale 1ns/1ns
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`timescale 1ns/1ns
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module virtual_jtag_adda_trig(trig_out);
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module virtual_jtag_adda_trig(trig_out);
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parameter trig_width = 32;
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parameter trig_width = 32;
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.jtag_state_e2ir ());
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.jtag_state_e2ir ());
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defparam
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defparam
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sld_virtual_jtag_component.sld_auto_instance_index = "NO",
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sld_virtual_jtag_component.sld_auto_instance_index = "NO",
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sld_virtual_jtag_component.sld_instance_index = 2,
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sld_virtual_jtag_component.sld_instance_index = 2,
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sld_virtual_jtag_component.sld_ir_width = 2,
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sld_virtual_jtag_component.sld_ir_width = 2,
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sld_virtual_jtag_component.sld_sim_action = "((1,1,1,2))",
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sld_virtual_jtag_component.sld_sim_action = `TRIG_SLD_SIM_ACTION,
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sld_virtual_jtag_component.sld_sim_n_scan = 1,
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sld_virtual_jtag_component.sld_sim_n_scan = `TRIG_SLD_SIM_N_SCAN,
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sld_virtual_jtag_component.sld_sim_total_length = 2;
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sld_virtual_jtag_component.sld_sim_total_length = `TRIG_SLD_SIM_T_LENG;
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endmodule
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endmodule
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