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https://opencores.org/ocsvn/fpuvhdl/fpuvhdl/trunk
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LIBRARY ieee;
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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USE ieee.std_logic_1164.all;
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USE ieee.std_logic_arith.all;
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USE ieee.std_logic_arith.all;
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LIBRARY HAVOC;
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ARCHITECTURE pipeline OF FPmul IS
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ARCHITECTURE pipeline OF FPmul IS
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-- Architecture declarations
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-- Architecture declarations
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-- Internal signal declarations
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-- Internal signal declarations
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);
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);
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END COMPONENT;
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END COMPONENT;
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-- Optional embedded configurations
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-- Optional embedded configurations
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-- pragma synthesis_off
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-- pragma synthesis_off
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FOR ALL : FPmul_stage1 USE ENTITY HAVOC.FPmul_stage1;
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FOR ALL : FPmul_stage1 USE ENTITY work.FPmul_stage1;
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FOR ALL : FPmul_stage2 USE ENTITY HAVOC.FPmul_stage2;
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FOR ALL : FPmul_stage2 USE ENTITY work.FPmul_stage2;
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FOR ALL : FPmul_stage3 USE ENTITY HAVOC.FPmul_stage3;
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FOR ALL : FPmul_stage3 USE ENTITY work.FPmul_stage3;
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FOR ALL : FPmul_stage4 USE ENTITY HAVOC.FPmul_stage4;
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FOR ALL : FPmul_stage4 USE ENTITY work.FPmul_stage4;
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-- pragma synthesis_on
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-- pragma synthesis_on
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BEGIN
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BEGIN
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