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URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DFPAddsub96.sv] - Diff between revs 78 and 80

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Rev 78 Rev 80
Line 61... Line 61... 
reg [(N+1)*4-1:0] oaa10;
 
reg [(N+1)*4-1:0] oaa10;
 
reg [(N+1)*4-1:0] obb10;
 
reg [(N+1)*4-1:0] obb10;
 
wire [(N+1)*4-1:0] oss10;
 
wire [(N+1)*4-1:0] oss10;
 
wire oss10c;
 
wire oss10c;
 
 
 
 
 
BCDAdd8NClk #(.N((N+2)/2)) ubcdadn1
 
BCDAddNClk #(.N(N+1)) ubcdadn1
 
(
 
(
 
        .clk(clk),
 
        .clk(clk),
 
        .a({8'h00,oaa10}),
 
        .a({4'h0,oaa10}),
 
        .b({8'h00,obb10}),
 
        .b({4'h0,obb10}),
 
        .o(oss10),
 
        .o(oss10),
 
        .ci(1'b0),
 
        .ci(1'b0),
 
        .co(oss10c)
 
        .co(oss10c)
 
);
 
);
 
 
 
 
 
wire [(N+1)*4-1:0] odd10;
 
wire [(N+1)*4-1:0] odd10;
 
wire odd10c;
 
wire odd10c;
 
 
 
 
 
BCDSubtract #(N+2) ubcdsubn1
 
BCDSubtract #(.N(N+1)) ubcdsubn1
 
(
 
(
 
        .clk(clk),
 
        .clk(clk),
 
        .a({8'h00,oaa10}),
 
        .a({4'h00,oaa10}),
 
        .b({8'h00,obb10}),
 
        .b({4'h00,obb10}),
 
        .o(odd10),
 
        .o(odd10),
 
        .co(odd10c)
 
        .sgn(odd10c)
 
);
 
);
 
/*
 
/*
 
BCDSub8NClk #(.N((N+2)/2)) ubcdsdn1
 
BCDSub8NClk #(.N((N+2)/2)) ubcdsdn1
 
(
 
(
 
        .clk(clk),
 
        .clk(clk),

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