URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.interface/] [hibi_udp/] [1.0/] [hibi_udp.1.0.xml] - Diff between revs 153 and 160

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Rev 153	Rev 160
Line 8...	Line 8...
`ip.hwp.interface`	`ip.hwp.interface`
`hibi_udp`	`hibi_udp`
`1.0`	`1.0`


`hibi_slave`	`clk_udp`



	`false`



	`CLK`

	`0`
	`0`



	`clk_udp`

	`0`
	`0`




	`8`
	`little`


	`hibi_master`



`false`	`false`



`AV`	`AV`
Line 23...	Line 50...
`0`	`0`
`0`	`0`



`hibi_av_in`	`hibi_av_out`

`0`	`0`
`0`	`0`


Line 39...	Line 66...
`4`	`4`
`0`	`0`



`hibi_comm_in`	`hibi_comm_out`

`4`	`4`
`0`	`0`


Line 55...	Line 82...
`31`	`31`
`0`	`0`



`hibi_data_in`	`hibi_data_out`

`31`	`31`
`0`	`0`





`EMPTY`	`RE`

`0`	`0`
`0`	`0`



`hibi_empty_in`	`hibi_re_out`

`0`	`0`
`0`	`0`





`FULL`	`WE`

`0`	`0`
`0`	`0`



`hibi_full_in`	`hibi_we_out`

`0`	`0`
`0`	`0`


Line 99...	Line 126...

`8`	`8`
`little`	`little`


`hibi_master`	`hibi_slave`



`false`	`false`



`AV`	`AV`
Line 114...	Line 141...
`0`	`0`
`0`	`0`



`hibi_av_out`	`hibi_av_in`

`0`	`0`
`0`	`0`


Line 130...	Line 157...
`4`	`4`
`0`	`0`



`hibi_comm_out`	`hibi_comm_in`

`4`	`4`
`0`	`0`


Line 146...	Line 173...
`31`	`31`
`0`	`0`



`hibi_data_out`	`hibi_data_in`

`31`	`31`
`0`	`0`





`RE`	`EMPTY`

`0`	`0`
`0`	`0`



`hibi_re_out`	`hibi_empty_in`

`0`	`0`
`0`	`0`





`WE`	`FULL`

`0`	`0`
`0`	`0`



`hibi_we_out`	`hibi_full_in`

`0`	`0`
`0`	`0`


Line 190...	Line 217...

`8`	`8`
`little`	`little`


`clk_udp`	`clk`



`false`	`false`

Line 205...	Line 232...
`0`	`0`
`0`	`0`



`clk_udp`	`clk`

`0`	`0`
`0`	`0`


Line 382...	Line 409...


`8`	`8`
`little`	`little`


`clk`



`false`



`CLK`

`0`
`0`



`clk`

`0`
`0`




`8`
`little`





`structural`	`structural`
`::`	`::`


	`structural_vhd`



	`structural_vhd`
	`VHDL:Kactus2:`
	`vhdl`
	`hibi_udp(structural)`

	`structural_vhdlSource`





`clk`	`clk`
Line 433...	Line 445...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 452...	Line 465...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 471...	Line 485...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 490...	Line 505...

`std_logic_vector`	`std_logic_vector`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 509...	Line 525...

`std_logic_vector`	`std_logic_vector`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 528...	Line 545...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 547...	Line 565...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 566...	Line 585...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 585...	Line 605...

`std_logic_vector`	`std_logic_vector`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 604...	Line 625...

`std_logic_vector`	`std_logic_vector`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 623...	Line 645...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 642...	Line 665...

`std_logic`	`std_logic`
`IEEE.std_logic_1164.all`	`IEEE.std_logic_1164.all`
`rtl`	`rtl`
`structural`	`structural`
	`structural_vhd`





Line 748...	Line 772...







	`structural_vhdlSource`
	`sourceFiles`

	`vhd/hibi_udp.vhd`
	`vhdlSource`
	`true`
	`work`

	`vcom`
	`-quiet -check_synthesis -work work`
	`true`



	`vhdlSource`
	`vcom`
	`-quiet -check_synthesis -work work`
	`true`


	`vhdlSource-87`
	`vcom`
	`-quiet -check_synthesis -work work`
	`true`


	`vhdlSource-93`
	`vcom`
	`-quiet -check_synthesis -work work`
	`true`






`IP`	`IP`
`HW`	`HW`

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[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.interface/] [hibi_udp/] [1.0/] [hibi_udp.1.0.xml] - Diff between revs 153 and 160