OpenCores
URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master/] [trunk/] [test/] [tbIso7816_3_Master.v] - Diff between revs 19 and 20

Show entire file | Details | Blame | View Log

Rev 19 Rev 20
Line 1... Line 1...
/*
/*
Author: Sebastien Riou (acapola)
Author: Sebastien Riou (acapola)
Creation date: 22:16:42 01/10/2011
Creation date: 22:16:42 01/10/2011
 
 
$LastChangedDate: 2011-04-17 23:31:29 +0200 (Sun, 17 Apr 2011) $
$LastChangedDate: 2011-04-18 12:57:36 +0200 (Mon, 18 Apr 2011) $
$LastChangedBy: acapola $
$LastChangedBy: acapola $
$LastChangedRevision: 19 $
$LastChangedRevision: 20 $
$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/test/tbIso7816_3_Master.v $
$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/test/tbIso7816_3_Master.v $
 
 
This file is under the BSD licence:
This file is under the BSD licence:
Copyright (c) 2011, Sebastien Riou
Copyright (c) 2011, Sebastien Riou
 
 
Line 118... Line 118...
                .useIndirectConvention(useIndirectConvention),
                .useIndirectConvention(useIndirectConvention),
                .tsError(tsError),
                .tsError(tsError),
                .tsReceived(tsReceived),
                .tsReceived(tsReceived),
                .atrIsEarly(atrIsEarly),
                .atrIsEarly(atrIsEarly),
                .atrIsLate(atrIsLate),
                .atrIsLate(atrIsLate),
                //.isoSio(isoSioTerm), 
 
                .isTx(isTxTerm),
                .isTx(isTxTerm),
                .isoSioIn(isoSioInTerm),
                .isoSioIn(isoSioInTerm),
                .isoSioOut(isoSioOutTerm),
                .isoSioOut(isoSioOutTerm),
                .isoClk(isoClk),
                .isoClk(isoClk),
                .isoReset(isoReset),
                .isoReset(isoReset),
Line 233... Line 232...
                        #(CLK_PERIOD*372*12);
                        #(CLK_PERIOD*372*12);
                        $finish;
                        $finish;
                end
                end
        end
        end
        //T=0 tpdu stimuli
        //T=0 tpdu stimuli
        //reg [7:0] byteFromCard;
 
        reg [8*256:0] bytesFromCard;
        reg [8*256:0] bytesFromCard;
        initial begin
        initial begin
                tbTestSequenceDone=1'b0;
                tbTestSequenceDone=1'b0;
                //receiveAndCheckHexBytes("3B00");
                //receiveAndCheckHexBytes("3B00");
                receiveByte(bytesFromCard[7:0]);//3B or 3F, so we don't check (Master and Spy do)
                receiveByte(bytesFromCard[7:0]);//3B or 3F, so we don't check (Master and Spy do)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.